1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
39 #include "opcode/i386.h"
43 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma
, disassemble_info
*);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma
);
55 static void print_displacement (char *, bfd_vma
);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma
get64 (void);
59 static bfd_signed_vma
get32 (void);
60 static bfd_signed_vma
get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma
, int);
63 static void OP_Skip_MODRM (int, int);
64 static void OP_REG (int, int);
65 static void OP_IMREG (int, int);
66 static void OP_I (int, int);
67 static void OP_I64 (int, int);
68 static void OP_sI (int, int);
69 static void OP_J (int, int);
70 static void OP_SEG (int, int);
71 static void OP_DIR (int, int);
72 static void OP_OFF (int, int);
73 static void OP_OFF64 (int, int);
74 static void ptr_reg (int, int);
75 static void OP_ESreg (int, int);
76 static void OP_DSreg (int, int);
77 static void OP_C (int, int);
78 static void OP_D (int, int);
79 static void OP_T (int, int);
80 static void OP_R (int, int);
81 static void OP_MMX (int, int);
82 static void OP_XMM (int, int);
83 static void OP_EM (int, int);
84 static void OP_EX (int, int);
85 static void OP_EMC (int,int);
86 static void OP_MXC (int,int);
87 static void OP_MS (int, int);
88 static void OP_XS (int, int);
89 static void OP_M (int, int);
90 static void OP_0f07 (int, int);
91 static void OP_Monitor (int, int);
92 static void OP_Mwait (int, int);
93 static void NOP_Fixup1 (int, int);
94 static void NOP_Fixup2 (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void BadOp (void);
98 static void REP_Fixup (int, int);
99 static void CMPXCHG8B_Fixup (int, int);
100 static void XMM_Fixup (int, int);
101 static void CRC32_Fixup (int, int);
104 /* Points to first byte not fetched. */
105 bfd_byte
*max_fetched
;
106 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
119 enum address_mode address_mode
;
121 /* Flags for the prefixes for the current instruction. See below. */
124 /* REX prefix the current instruction. See below. */
126 /* Bits of REX we've already used. */
128 /* Mark parts used in the REX prefix. When we are testing for
129 empty prefix (for 8bit register REX extension), just mask it
130 out. Otherwise test for REX bit is excuse for existence of REX
131 only in case value is nonzero. */
132 #define USED_REX(value) \
137 rex_used |= (value) | REX_OPCODE; \
140 rex_used |= REX_OPCODE; \
143 /* Flags for prefixes which we somehow handled when printing the
144 current instruction. */
145 static int used_prefixes
;
147 /* Flags stored in PREFIXES. */
148 #define PREFIX_REPZ 1
149 #define PREFIX_REPNZ 2
150 #define PREFIX_LOCK 4
152 #define PREFIX_SS 0x10
153 #define PREFIX_DS 0x20
154 #define PREFIX_ES 0x40
155 #define PREFIX_FS 0x80
156 #define PREFIX_GS 0x100
157 #define PREFIX_DATA 0x200
158 #define PREFIX_ADDR 0x400
159 #define PREFIX_FWAIT 0x800
161 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
162 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
164 #define FETCH_DATA(info, addr) \
165 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
166 ? 1 : fetch_data ((info), (addr)))
169 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
172 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
173 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
175 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
176 status
= (*info
->read_memory_func
) (start
,
178 addr
- priv
->max_fetched
,
184 /* If we did manage to read at least one byte, then
185 print_insn_i386 will do something sensible. Otherwise, print
186 an error. We do that here because this is where we know
188 if (priv
->max_fetched
== priv
->the_buffer
)
189 (*info
->memory_error_func
) (status
, start
, info
);
190 longjmp (priv
->bailout
, 1);
193 priv
->max_fetched
= addr
;
197 #define XX { NULL, 0 }
199 #define Eb { OP_E, b_mode }
200 #define Ev { OP_E, v_mode }
201 #define Ed { OP_E, d_mode }
202 #define Edq { OP_E, dq_mode }
203 #define Edqw { OP_E, dqw_mode }
204 #define Edqb { OP_E, dqb_mode }
205 #define Edqd { OP_E, dqd_mode }
206 #define Eq { OP_E, q_mode }
207 #define indirEv { OP_indirE, stack_v_mode }
208 #define indirEp { OP_indirE, f_mode }
209 #define stackEv { OP_E, stack_v_mode }
210 #define Em { OP_E, m_mode }
211 #define Ew { OP_E, w_mode }
212 #define M { OP_M, 0 } /* lea, lgdt, etc. */
213 #define Ma { OP_M, v_mode }
214 #define Mb { OP_M, b_mode }
215 #define Md { OP_M, d_mode }
216 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
217 #define Mq { OP_M, q_mode }
218 #define Gb { OP_G, b_mode }
219 #define Gv { OP_G, v_mode }
220 #define Gd { OP_G, d_mode }
221 #define Gdq { OP_G, dq_mode }
222 #define Gm { OP_G, m_mode }
223 #define Gw { OP_G, w_mode }
224 #define Rd { OP_R, d_mode }
225 #define Rm { OP_R, m_mode }
226 #define Ib { OP_I, b_mode }
227 #define sIb { OP_sI, b_mode } /* sign extened byte */
228 #define Iv { OP_I, v_mode }
229 #define Iq { OP_I, q_mode }
230 #define Iv64 { OP_I64, v_mode }
231 #define Iw { OP_I, w_mode }
232 #define I1 { OP_I, const_1_mode }
233 #define Jb { OP_J, b_mode }
234 #define Jv { OP_J, v_mode }
235 #define Cm { OP_C, m_mode }
236 #define Dm { OP_D, m_mode }
237 #define Td { OP_T, d_mode }
238 #define Skip_MODRM { OP_Skip_MODRM, 0 }
240 #define RMeAX { OP_REG, eAX_reg }
241 #define RMeBX { OP_REG, eBX_reg }
242 #define RMeCX { OP_REG, eCX_reg }
243 #define RMeDX { OP_REG, eDX_reg }
244 #define RMeSP { OP_REG, eSP_reg }
245 #define RMeBP { OP_REG, eBP_reg }
246 #define RMeSI { OP_REG, eSI_reg }
247 #define RMeDI { OP_REG, eDI_reg }
248 #define RMrAX { OP_REG, rAX_reg }
249 #define RMrBX { OP_REG, rBX_reg }
250 #define RMrCX { OP_REG, rCX_reg }
251 #define RMrDX { OP_REG, rDX_reg }
252 #define RMrSP { OP_REG, rSP_reg }
253 #define RMrBP { OP_REG, rBP_reg }
254 #define RMrSI { OP_REG, rSI_reg }
255 #define RMrDI { OP_REG, rDI_reg }
256 #define RMAL { OP_REG, al_reg }
257 #define RMAL { OP_REG, al_reg }
258 #define RMCL { OP_REG, cl_reg }
259 #define RMDL { OP_REG, dl_reg }
260 #define RMBL { OP_REG, bl_reg }
261 #define RMAH { OP_REG, ah_reg }
262 #define RMCH { OP_REG, ch_reg }
263 #define RMDH { OP_REG, dh_reg }
264 #define RMBH { OP_REG, bh_reg }
265 #define RMAX { OP_REG, ax_reg }
266 #define RMDX { OP_REG, dx_reg }
268 #define eAX { OP_IMREG, eAX_reg }
269 #define eBX { OP_IMREG, eBX_reg }
270 #define eCX { OP_IMREG, eCX_reg }
271 #define eDX { OP_IMREG, eDX_reg }
272 #define eSP { OP_IMREG, eSP_reg }
273 #define eBP { OP_IMREG, eBP_reg }
274 #define eSI { OP_IMREG, eSI_reg }
275 #define eDI { OP_IMREG, eDI_reg }
276 #define AL { OP_IMREG, al_reg }
277 #define CL { OP_IMREG, cl_reg }
278 #define DL { OP_IMREG, dl_reg }
279 #define BL { OP_IMREG, bl_reg }
280 #define AH { OP_IMREG, ah_reg }
281 #define CH { OP_IMREG, ch_reg }
282 #define DH { OP_IMREG, dh_reg }
283 #define BH { OP_IMREG, bh_reg }
284 #define AX { OP_IMREG, ax_reg }
285 #define DX { OP_IMREG, dx_reg }
286 #define zAX { OP_IMREG, z_mode_ax_reg }
287 #define indirDX { OP_IMREG, indir_dx_reg }
289 #define Sw { OP_SEG, w_mode }
290 #define Sv { OP_SEG, v_mode }
291 #define Ap { OP_DIR, 0 }
292 #define Ob { OP_OFF64, b_mode }
293 #define Ov { OP_OFF64, v_mode }
294 #define Xb { OP_DSreg, eSI_reg }
295 #define Xv { OP_DSreg, eSI_reg }
296 #define Xz { OP_DSreg, eSI_reg }
297 #define Yb { OP_ESreg, eDI_reg }
298 #define Yv { OP_ESreg, eDI_reg }
299 #define DSBX { OP_DSreg, eBX_reg }
301 #define es { OP_REG, es_reg }
302 #define ss { OP_REG, ss_reg }
303 #define cs { OP_REG, cs_reg }
304 #define ds { OP_REG, ds_reg }
305 #define fs { OP_REG, fs_reg }
306 #define gs { OP_REG, gs_reg }
308 #define MX { OP_MMX, 0 }
309 #define XM { OP_XMM, 0 }
310 #define EM { OP_EM, v_mode }
311 #define EMd { OP_EM, d_mode }
312 #define EMx { OP_EM, x_mode }
313 #define EXw { OP_EX, w_mode }
314 #define EXd { OP_EX, d_mode }
315 #define EXq { OP_EX, q_mode }
316 #define EXx { OP_EX, x_mode }
317 #define MS { OP_MS, v_mode }
318 #define XS { OP_XS, v_mode }
319 #define EMCq { OP_EMC, q_mode }
320 #define MXC { OP_MXC, 0 }
321 #define OPSUF { OP_3DNowSuffix, 0 }
322 #define OPSIMD { OP_SIMD_Suffix, 0 }
323 #define XMM0 { XMM_Fixup, 0 }
325 /* Used handle "rep" prefix for string instructions. */
326 #define Xbr { REP_Fixup, eSI_reg }
327 #define Xvr { REP_Fixup, eSI_reg }
328 #define Ybr { REP_Fixup, eDI_reg }
329 #define Yvr { REP_Fixup, eDI_reg }
330 #define Yzr { REP_Fixup, eDI_reg }
331 #define indirDXr { REP_Fixup, indir_dx_reg }
332 #define ALr { REP_Fixup, al_reg }
333 #define eAXr { REP_Fixup, eAX_reg }
335 #define cond_jump_flag { NULL, cond_jump_mode }
336 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
338 /* bits in sizeflag */
339 #define SUFFIX_ALWAYS 4
343 #define b_mode 1 /* byte operand */
344 #define v_mode 2 /* operand size depends on prefixes */
345 #define w_mode 3 /* word operand */
346 #define d_mode 4 /* double word operand */
347 #define q_mode 5 /* quad word operand */
348 #define t_mode 6 /* ten-byte operand */
349 #define x_mode 7 /* 16-byte XMM operand */
350 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
351 #define cond_jump_mode 9
352 #define loop_jcxz_mode 10
353 #define dq_mode 11 /* operand size depends on REX prefixes. */
354 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
355 #define f_mode 13 /* 4- or 6-byte pointer operand */
356 #define const_1_mode 14
357 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
358 #define z_mode 16 /* non-quad operand size depends on prefixes */
359 #define o_mode 17 /* 16-byte operand */
360 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
361 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
406 #define z_mode_ax_reg 149
407 #define indir_dx_reg 150
411 #define USE_PREFIX_USER_TABLE 3
412 #define X86_64_SPECIAL 4
413 #define IS_3BYTE_OPCODE 5
414 #define USE_OPC_EXT_TABLE 6
415 #define USE_OPC_EXT_RM_TABLE 7
417 #define FLOAT NULL, { { NULL, FLOATCODE } }
419 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
420 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
421 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
422 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
423 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
424 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
425 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
426 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
427 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
428 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
429 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
430 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
431 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
432 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
433 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
434 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
435 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
436 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
437 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
438 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
439 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
440 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
441 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
442 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
443 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
444 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
445 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
446 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
448 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
449 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
450 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
451 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
452 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
453 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
454 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
455 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
456 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
457 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
458 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
459 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
460 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
461 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
462 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
463 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
464 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
465 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
466 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
467 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
468 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
469 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
470 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
471 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
472 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
473 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
474 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
475 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
476 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
477 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
478 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
479 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
480 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
481 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
482 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
483 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
484 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
485 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
486 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
487 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
488 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
489 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
490 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
491 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
492 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
493 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
494 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
495 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
496 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
497 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
498 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
499 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
500 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
501 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
502 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
503 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
504 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
505 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
506 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
507 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
508 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
509 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
510 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
511 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
512 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
513 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
514 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
515 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
516 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
517 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
518 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
519 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
520 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
521 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
522 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
523 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
524 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
525 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
526 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
527 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
528 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
529 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
530 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
531 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
532 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
533 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
534 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
535 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
536 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
537 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
538 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
539 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
540 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
541 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
542 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
543 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
544 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
545 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
546 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
547 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
548 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
551 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
552 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
553 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
554 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
556 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
557 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
559 #define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
560 #define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
561 #define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
562 #define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
563 #define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
564 #define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
565 #define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
566 #define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
567 #define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
568 #define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
569 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
570 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
571 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
572 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
573 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
574 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
575 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
576 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
577 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
578 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
579 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
580 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
581 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
582 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
583 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
584 #define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
585 #define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
586 #define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
587 #define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
588 #define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
589 #define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
590 #define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
591 #define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
592 #define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
593 #define OPC_EXT_34 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 34 } }
594 #define OPC_EXT_35 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 35 } }
595 #define OPC_EXT_36 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 36 } }
596 #define OPC_EXT_37 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 37 } }
597 #define OPC_EXT_38 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 38 } }
598 #define OPC_EXT_39 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 39 } }
600 #define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
601 #define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
602 #define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
603 #define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
604 #define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
605 #define OPC_EXT_RM_5 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 5 } }
606 #define OPC_EXT_RM_6 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 6 } }
608 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
619 /* Upper case letters in the instruction names here are macros.
620 'A' => print 'b' if no register operands or suffix_always is true
621 'B' => print 'b' if suffix_always is true
622 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
624 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
625 . suffix_always is true
626 'E' => print 'e' if 32-bit form of jcxz
627 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
628 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
629 'H' => print ",pt" or ",pn" branch hint
630 'I' => honor following macro letter even in Intel mode (implemented only
631 . for some of the macro letters)
633 'K' => print 'd' or 'q' if rex prefix is present.
634 'L' => print 'l' if suffix_always is true
635 'N' => print 'n' if instruction has no wait "prefix"
636 'O' => print 'd' or 'o' (or 'q' in Intel mode)
637 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
638 . or suffix_always is true. print 'q' if rex prefix is present.
639 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
641 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
642 'S' => print 'w', 'l' or 'q' if suffix_always is true
643 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
644 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
645 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
646 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
647 'X' => print 's', 'd' depending on data16 prefix (for XMM)
648 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
649 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
651 Many of the above letters print nothing in Intel mode. See "putop"
654 Braces '{' and '}', and vertical bars '|', indicate alternative
655 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
656 modes. In cases where there are only two alternatives, the X86_64
657 instruction is reserved, and "(bad)" is printed.
660 static const struct dis386 dis386
[] = {
662 { "addB", { Eb
, Gb
} },
663 { "addS", { Ev
, Gv
} },
664 { "addB", { Gb
, Eb
} },
665 { "addS", { Gv
, Ev
} },
666 { "addB", { AL
, Ib
} },
667 { "addS", { eAX
, Iv
} },
668 { "push{T|}", { es
} },
669 { "pop{T|}", { es
} },
671 { "orB", { Eb
, Gb
} },
672 { "orS", { Ev
, Gv
} },
673 { "orB", { Gb
, Eb
} },
674 { "orS", { Gv
, Ev
} },
675 { "orB", { AL
, Ib
} },
676 { "orS", { eAX
, Iv
} },
677 { "push{T|}", { cs
} },
678 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
680 { "adcB", { Eb
, Gb
} },
681 { "adcS", { Ev
, Gv
} },
682 { "adcB", { Gb
, Eb
} },
683 { "adcS", { Gv
, Ev
} },
684 { "adcB", { AL
, Ib
} },
685 { "adcS", { eAX
, Iv
} },
686 { "push{T|}", { ss
} },
687 { "pop{T|}", { ss
} },
689 { "sbbB", { Eb
, Gb
} },
690 { "sbbS", { Ev
, Gv
} },
691 { "sbbB", { Gb
, Eb
} },
692 { "sbbS", { Gv
, Ev
} },
693 { "sbbB", { AL
, Ib
} },
694 { "sbbS", { eAX
, Iv
} },
695 { "push{T|}", { ds
} },
696 { "pop{T|}", { ds
} },
698 { "andB", { Eb
, Gb
} },
699 { "andS", { Ev
, Gv
} },
700 { "andB", { Gb
, Eb
} },
701 { "andS", { Gv
, Ev
} },
702 { "andB", { AL
, Ib
} },
703 { "andS", { eAX
, Iv
} },
704 { "(bad)", { XX
} }, /* SEG ES prefix */
705 { "daa{|}", { XX
} },
707 { "subB", { Eb
, Gb
} },
708 { "subS", { Ev
, Gv
} },
709 { "subB", { Gb
, Eb
} },
710 { "subS", { Gv
, Ev
} },
711 { "subB", { AL
, Ib
} },
712 { "subS", { eAX
, Iv
} },
713 { "(bad)", { XX
} }, /* SEG CS prefix */
714 { "das{|}", { XX
} },
716 { "xorB", { Eb
, Gb
} },
717 { "xorS", { Ev
, Gv
} },
718 { "xorB", { Gb
, Eb
} },
719 { "xorS", { Gv
, Ev
} },
720 { "xorB", { AL
, Ib
} },
721 { "xorS", { eAX
, Iv
} },
722 { "(bad)", { XX
} }, /* SEG SS prefix */
723 { "aaa{|}", { XX
} },
725 { "cmpB", { Eb
, Gb
} },
726 { "cmpS", { Ev
, Gv
} },
727 { "cmpB", { Gb
, Eb
} },
728 { "cmpS", { Gv
, Ev
} },
729 { "cmpB", { AL
, Ib
} },
730 { "cmpS", { eAX
, Iv
} },
731 { "(bad)", { XX
} }, /* SEG DS prefix */
732 { "aas{|}", { XX
} },
734 { "inc{S|}", { RMeAX
} },
735 { "inc{S|}", { RMeCX
} },
736 { "inc{S|}", { RMeDX
} },
737 { "inc{S|}", { RMeBX
} },
738 { "inc{S|}", { RMeSP
} },
739 { "inc{S|}", { RMeBP
} },
740 { "inc{S|}", { RMeSI
} },
741 { "inc{S|}", { RMeDI
} },
743 { "dec{S|}", { RMeAX
} },
744 { "dec{S|}", { RMeCX
} },
745 { "dec{S|}", { RMeDX
} },
746 { "dec{S|}", { RMeBX
} },
747 { "dec{S|}", { RMeSP
} },
748 { "dec{S|}", { RMeBP
} },
749 { "dec{S|}", { RMeSI
} },
750 { "dec{S|}", { RMeDI
} },
752 { "pushV", { RMrAX
} },
753 { "pushV", { RMrCX
} },
754 { "pushV", { RMrDX
} },
755 { "pushV", { RMrBX
} },
756 { "pushV", { RMrSP
} },
757 { "pushV", { RMrBP
} },
758 { "pushV", { RMrSI
} },
759 { "pushV", { RMrDI
} },
761 { "popV", { RMrAX
} },
762 { "popV", { RMrCX
} },
763 { "popV", { RMrDX
} },
764 { "popV", { RMrBX
} },
765 { "popV", { RMrSP
} },
766 { "popV", { RMrBP
} },
767 { "popV", { RMrSI
} },
768 { "popV", { RMrDI
} },
774 { "(bad)", { XX
} }, /* seg fs */
775 { "(bad)", { XX
} }, /* seg gs */
776 { "(bad)", { XX
} }, /* op size prefix */
777 { "(bad)", { XX
} }, /* adr size prefix */
780 { "imulS", { Gv
, Ev
, Iv
} },
781 { "pushT", { sIb
} },
782 { "imulS", { Gv
, Ev
, sIb
} },
783 { "ins{b||b|}", { Ybr
, indirDX
} },
784 { "ins{R||G|}", { Yzr
, indirDX
} },
785 { "outs{b||b|}", { indirDXr
, Xb
} },
786 { "outs{R||G|}", { indirDXr
, Xz
} },
788 { "joH", { Jb
, XX
, cond_jump_flag
} },
789 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
790 { "jbH", { Jb
, XX
, cond_jump_flag
} },
791 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
792 { "jeH", { Jb
, XX
, cond_jump_flag
} },
793 { "jneH", { Jb
, XX
, cond_jump_flag
} },
794 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
795 { "jaH", { Jb
, XX
, cond_jump_flag
} },
797 { "jsH", { Jb
, XX
, cond_jump_flag
} },
798 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
799 { "jpH", { Jb
, XX
, cond_jump_flag
} },
800 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
801 { "jlH", { Jb
, XX
, cond_jump_flag
} },
802 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
803 { "jleH", { Jb
, XX
, cond_jump_flag
} },
804 { "jgH", { Jb
, XX
, cond_jump_flag
} },
810 { "testB", { Eb
, Gb
} },
811 { "testS", { Ev
, Gv
} },
812 { "xchgB", { Eb
, Gb
} },
813 { "xchgS", { Ev
, Gv
} },
815 { "movB", { Eb
, Gb
} },
816 { "movS", { Ev
, Gv
} },
817 { "movB", { Gb
, Eb
} },
818 { "movS", { Gv
, Ev
} },
819 { "movD", { Sv
, Sw
} },
821 { "movD", { Sw
, Sv
} },
825 { "xchgS", { RMeCX
, eAX
} },
826 { "xchgS", { RMeDX
, eAX
} },
827 { "xchgS", { RMeBX
, eAX
} },
828 { "xchgS", { RMeSP
, eAX
} },
829 { "xchgS", { RMeBP
, eAX
} },
830 { "xchgS", { RMeSI
, eAX
} },
831 { "xchgS", { RMeDI
, eAX
} },
833 { "cW{t||t|}R", { XX
} },
834 { "cR{t||t|}O", { XX
} },
835 { "Jcall{T|}", { Ap
} },
836 { "(bad)", { XX
} }, /* fwait */
837 { "pushfT", { XX
} },
839 { "sahf{|}", { XX
} },
840 { "lahf{|}", { XX
} },
842 { "movB", { AL
, Ob
} },
843 { "movS", { eAX
, Ov
} },
844 { "movB", { Ob
, AL
} },
845 { "movS", { Ov
, eAX
} },
846 { "movs{b||b|}", { Ybr
, Xb
} },
847 { "movs{R||R|}", { Yvr
, Xv
} },
848 { "cmps{b||b|}", { Xb
, Yb
} },
849 { "cmps{R||R|}", { Xv
, Yv
} },
851 { "testB", { AL
, Ib
} },
852 { "testS", { eAX
, Iv
} },
853 { "stosB", { Ybr
, AL
} },
854 { "stosS", { Yvr
, eAX
} },
855 { "lodsB", { ALr
, Xb
} },
856 { "lodsS", { eAXr
, Xv
} },
857 { "scasB", { AL
, Yb
} },
858 { "scasS", { eAX
, Yv
} },
860 { "movB", { RMAL
, Ib
} },
861 { "movB", { RMCL
, Ib
} },
862 { "movB", { RMDL
, Ib
} },
863 { "movB", { RMBL
, Ib
} },
864 { "movB", { RMAH
, Ib
} },
865 { "movB", { RMCH
, Ib
} },
866 { "movB", { RMDH
, Ib
} },
867 { "movB", { RMBH
, Ib
} },
869 { "movS", { RMeAX
, Iv64
} },
870 { "movS", { RMeCX
, Iv64
} },
871 { "movS", { RMeDX
, Iv64
} },
872 { "movS", { RMeBX
, Iv64
} },
873 { "movS", { RMeSP
, Iv64
} },
874 { "movS", { RMeBP
, Iv64
} },
875 { "movS", { RMeSI
, Iv64
} },
876 { "movS", { RMeDI
, Iv64
} },
887 { "enterT", { Iw
, Ib
} },
888 { "leaveT", { XX
} },
893 { "into{|}", { XX
} },
900 { "aam{|}", { sIb
} },
901 { "aad{|}", { sIb
} },
903 { "xlat", { DSBX
} },
914 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
915 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
916 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
917 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
918 { "inB", { AL
, Ib
} },
919 { "inG", { zAX
, Ib
} },
920 { "outB", { Ib
, AL
} },
921 { "outG", { Ib
, zAX
} },
925 { "Jjmp{T|}", { Ap
} },
927 { "inB", { AL
, indirDX
} },
928 { "inG", { zAX
, indirDX
} },
929 { "outB", { indirDX
, AL
} },
930 { "outG", { indirDX
, zAX
} },
932 { "(bad)", { XX
} }, /* lock prefix */
934 { "(bad)", { XX
} }, /* repne */
935 { "(bad)", { XX
} }, /* repz */
951 static const struct dis386 dis386_twobyte
[] = {
955 { "larS", { Gv
, Ew
} },
956 { "lslS", { Gv
, Ew
} },
958 { "syscall", { XX
} },
960 { "sysretP", { XX
} },
963 { "wbinvd", { XX
} },
969 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
975 { "unpcklpX", { XM
, EXq
} },
976 { "unpckhpX", { XM
, EXq
} },
989 { "movZ", { Rm
, Cm
} },
990 { "movZ", { Rm
, Dm
} },
991 { "movZ", { Cm
, Rm
} },
992 { "movZ", { Dm
, Rm
} },
993 { "movL", { Rd
, Td
} },
995 { "movL", { Td
, Rd
} },
998 { "movapX", { XM
, EXx
} },
999 { "movapX", { EXx
, XM
} },
1007 { "wrmsr", { XX
} },
1008 { "rdtsc", { XX
} },
1009 { "rdmsr", { XX
} },
1010 { "rdpmc", { XX
} },
1011 { "sysenter", { XX
} },
1012 { "sysexit", { XX
} },
1013 { "(bad)", { XX
} },
1014 { "(bad)", { XX
} },
1017 { "(bad)", { XX
} },
1019 { "(bad)", { XX
} },
1020 { "(bad)", { XX
} },
1021 { "(bad)", { XX
} },
1022 { "(bad)", { XX
} },
1023 { "(bad)", { XX
} },
1025 { "cmovo", { Gv
, Ev
} },
1026 { "cmovno", { Gv
, Ev
} },
1027 { "cmovb", { Gv
, Ev
} },
1028 { "cmovae", { Gv
, Ev
} },
1029 { "cmove", { Gv
, Ev
} },
1030 { "cmovne", { Gv
, Ev
} },
1031 { "cmovbe", { Gv
, Ev
} },
1032 { "cmova", { Gv
, Ev
} },
1034 { "cmovs", { Gv
, Ev
} },
1035 { "cmovns", { Gv
, Ev
} },
1036 { "cmovp", { Gv
, Ev
} },
1037 { "cmovnp", { Gv
, Ev
} },
1038 { "cmovl", { Gv
, Ev
} },
1039 { "cmovge", { Gv
, Ev
} },
1040 { "cmovle", { Gv
, Ev
} },
1041 { "cmovg", { Gv
, Ev
} },
1043 { "movmskpX", { Gdq
, XS
} },
1047 { "andpX", { XM
, EXx
} },
1048 { "andnpX", { XM
, EXx
} },
1049 { "orpX", { XM
, EXx
} },
1050 { "xorpX", { XM
, EXx
} },
1064 { "packsswb", { MX
, EM
} },
1065 { "pcmpgtb", { MX
, EM
} },
1066 { "pcmpgtw", { MX
, EM
} },
1067 { "pcmpgtd", { MX
, EM
} },
1068 { "packuswb", { MX
, EM
} },
1070 { "punpckhbw", { MX
, EM
} },
1071 { "punpckhwd", { MX
, EM
} },
1072 { "punpckhdq", { MX
, EM
} },
1073 { "packssdw", { MX
, EM
} },
1076 { "movK", { MX
, Edq
} },
1083 { "pcmpeqb", { MX
, EM
} },
1084 { "pcmpeqw", { MX
, EM
} },
1085 { "pcmpeqd", { MX
, EM
} },
1090 { "(bad)", { XX
} },
1091 { "(bad)", { XX
} },
1097 { "joH", { Jv
, XX
, cond_jump_flag
} },
1098 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1099 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1100 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1101 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1102 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1103 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1104 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1106 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1107 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1108 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1109 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1110 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1111 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1112 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1113 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1116 { "setno", { Eb
} },
1118 { "setae", { Eb
} },
1120 { "setne", { Eb
} },
1121 { "setbe", { Eb
} },
1125 { "setns", { Eb
} },
1127 { "setnp", { Eb
} },
1129 { "setge", { Eb
} },
1130 { "setle", { Eb
} },
1133 { "pushT", { fs
} },
1135 { "cpuid", { XX
} },
1136 { "btS", { Ev
, Gv
} },
1137 { "shldS", { Ev
, Gv
, Ib
} },
1138 { "shldS", { Ev
, Gv
, CL
} },
1142 { "pushT", { gs
} },
1145 { "btsS", { Ev
, Gv
} },
1146 { "shrdS", { Ev
, Gv
, Ib
} },
1147 { "shrdS", { Ev
, Gv
, CL
} },
1149 { "imulS", { Gv
, Ev
} },
1151 { "cmpxchgB", { Eb
, Gb
} },
1152 { "cmpxchgS", { Ev
, Gv
} },
1154 { "btrS", { Ev
, Gv
} },
1157 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1158 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1163 { "btcS", { Ev
, Gv
} },
1164 { "bsfS", { Gv
, Ev
} },
1166 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1167 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1169 { "xaddB", { Eb
, Gb
} },
1170 { "xaddS", { Ev
, Gv
} },
1172 { "movntiS", { Ev
, Gv
} },
1173 { "pinsrw", { MX
, Edqw
, Ib
} },
1174 { "pextrw", { Gdq
, MS
, Ib
} },
1175 { "shufpX", { XM
, EXx
, Ib
} },
1178 { "bswap", { RMeAX
} },
1179 { "bswap", { RMeCX
} },
1180 { "bswap", { RMeDX
} },
1181 { "bswap", { RMeBX
} },
1182 { "bswap", { RMeSP
} },
1183 { "bswap", { RMeBP
} },
1184 { "bswap", { RMeSI
} },
1185 { "bswap", { RMeDI
} },
1188 { "psrlw", { MX
, EM
} },
1189 { "psrld", { MX
, EM
} },
1190 { "psrlq", { MX
, EM
} },
1191 { "paddq", { MX
, EM
} },
1192 { "pmullw", { MX
, EM
} },
1194 { "pmovmskb", { Gdq
, MS
} },
1196 { "psubusb", { MX
, EM
} },
1197 { "psubusw", { MX
, EM
} },
1198 { "pminub", { MX
, EM
} },
1199 { "pand", { MX
, EM
} },
1200 { "paddusb", { MX
, EM
} },
1201 { "paddusw", { MX
, EM
} },
1202 { "pmaxub", { MX
, EM
} },
1203 { "pandn", { MX
, EM
} },
1205 { "pavgb", { MX
, EM
} },
1206 { "psraw", { MX
, EM
} },
1207 { "psrad", { MX
, EM
} },
1208 { "pavgw", { MX
, EM
} },
1209 { "pmulhuw", { MX
, EM
} },
1210 { "pmulhw", { MX
, EM
} },
1214 { "psubsb", { MX
, EM
} },
1215 { "psubsw", { MX
, EM
} },
1216 { "pminsw", { MX
, EM
} },
1217 { "por", { MX
, EM
} },
1218 { "paddsb", { MX
, EM
} },
1219 { "paddsw", { MX
, EM
} },
1220 { "pmaxsw", { MX
, EM
} },
1221 { "pxor", { MX
, EM
} },
1224 { "psllw", { MX
, EM
} },
1225 { "pslld", { MX
, EM
} },
1226 { "psllq", { MX
, EM
} },
1227 { "pmuludq", { MX
, EM
} },
1228 { "pmaddwd", { MX
, EM
} },
1229 { "psadbw", { MX
, EM
} },
1232 { "psubb", { MX
, EM
} },
1233 { "psubw", { MX
, EM
} },
1234 { "psubd", { MX
, EM
} },
1235 { "psubq", { MX
, EM
} },
1236 { "paddb", { MX
, EM
} },
1237 { "paddw", { MX
, EM
} },
1238 { "paddd", { MX
, EM
} },
1239 { "(bad)", { XX
} },
1242 static const unsigned char onebyte_has_modrm
[256] = {
1243 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1244 /* ------------------------------- */
1245 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1246 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1247 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1248 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1249 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1250 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1251 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1252 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1253 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1254 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1255 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1256 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1257 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1258 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1259 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1260 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1261 /* ------------------------------- */
1262 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1265 static const unsigned char twobyte_has_modrm
[256] = {
1266 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1267 /* ------------------------------- */
1268 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1269 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1270 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1271 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1272 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1273 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1274 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1275 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1276 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1277 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1278 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1279 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1280 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1281 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1282 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1283 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1284 /* ------------------------------- */
1285 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1288 static char obuf
[100];
1290 static char scratchbuf
[100];
1291 static unsigned char *start_codep
;
1292 static unsigned char *insn_codep
;
1293 static unsigned char *codep
;
1294 static const char *lock_prefix
;
1295 static const char *data_prefix
;
1296 static const char *addr_prefix
;
1297 static const char *repz_prefix
;
1298 static const char *repnz_prefix
;
1299 static disassemble_info
*the_info
;
1307 static unsigned char need_modrm
;
1309 /* If we are accessing mod/rm/reg without need_modrm set, then the
1310 values are stale. Hitting this abort likely indicates that you
1311 need to update onebyte_has_modrm or twobyte_has_modrm. */
1312 #define MODRM_CHECK if (!need_modrm) abort ()
1314 static const char **names64
;
1315 static const char **names32
;
1316 static const char **names16
;
1317 static const char **names8
;
1318 static const char **names8rex
;
1319 static const char **names_seg
;
1320 static const char **index16
;
1322 static const char *intel_names64
[] = {
1323 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1324 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1326 static const char *intel_names32
[] = {
1327 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1328 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1330 static const char *intel_names16
[] = {
1331 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1332 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1334 static const char *intel_names8
[] = {
1335 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1337 static const char *intel_names8rex
[] = {
1338 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1339 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1341 static const char *intel_names_seg
[] = {
1342 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1344 static const char *intel_index16
[] = {
1345 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1348 static const char *att_names64
[] = {
1349 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1350 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1352 static const char *att_names32
[] = {
1353 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1354 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1356 static const char *att_names16
[] = {
1357 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1358 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1360 static const char *att_names8
[] = {
1361 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1363 static const char *att_names8rex
[] = {
1364 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1365 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1367 static const char *att_names_seg
[] = {
1368 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1370 static const char *att_index16
[] = {
1371 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1374 static const struct dis386 grps
[][8] = {
1377 { "popU", { stackEv
} },
1378 { "(bad)", { XX
} },
1379 { "(bad)", { XX
} },
1380 { "(bad)", { XX
} },
1381 { "(bad)", { XX
} },
1382 { "(bad)", { XX
} },
1383 { "(bad)", { XX
} },
1384 { "(bad)", { XX
} },
1388 { "addA", { Eb
, Ib
} },
1389 { "orA", { Eb
, Ib
} },
1390 { "adcA", { Eb
, Ib
} },
1391 { "sbbA", { Eb
, Ib
} },
1392 { "andA", { Eb
, Ib
} },
1393 { "subA", { Eb
, Ib
} },
1394 { "xorA", { Eb
, Ib
} },
1395 { "cmpA", { Eb
, Ib
} },
1399 { "addQ", { Ev
, Iv
} },
1400 { "orQ", { Ev
, Iv
} },
1401 { "adcQ", { Ev
, Iv
} },
1402 { "sbbQ", { Ev
, Iv
} },
1403 { "andQ", { Ev
, Iv
} },
1404 { "subQ", { Ev
, Iv
} },
1405 { "xorQ", { Ev
, Iv
} },
1406 { "cmpQ", { Ev
, Iv
} },
1410 { "addQ", { Ev
, sIb
} },
1411 { "orQ", { Ev
, sIb
} },
1412 { "adcQ", { Ev
, sIb
} },
1413 { "sbbQ", { Ev
, sIb
} },
1414 { "andQ", { Ev
, sIb
} },
1415 { "subQ", { Ev
, sIb
} },
1416 { "xorQ", { Ev
, sIb
} },
1417 { "cmpQ", { Ev
, sIb
} },
1421 { "rolA", { Eb
, Ib
} },
1422 { "rorA", { Eb
, Ib
} },
1423 { "rclA", { Eb
, Ib
} },
1424 { "rcrA", { Eb
, Ib
} },
1425 { "shlA", { Eb
, Ib
} },
1426 { "shrA", { Eb
, Ib
} },
1427 { "(bad)", { XX
} },
1428 { "sarA", { Eb
, Ib
} },
1432 { "rolQ", { Ev
, Ib
} },
1433 { "rorQ", { Ev
, Ib
} },
1434 { "rclQ", { Ev
, Ib
} },
1435 { "rcrQ", { Ev
, Ib
} },
1436 { "shlQ", { Ev
, Ib
} },
1437 { "shrQ", { Ev
, Ib
} },
1438 { "(bad)", { XX
} },
1439 { "sarQ", { Ev
, Ib
} },
1443 { "rolA", { Eb
, I1
} },
1444 { "rorA", { Eb
, I1
} },
1445 { "rclA", { Eb
, I1
} },
1446 { "rcrA", { Eb
, I1
} },
1447 { "shlA", { Eb
, I1
} },
1448 { "shrA", { Eb
, I1
} },
1449 { "(bad)", { XX
} },
1450 { "sarA", { Eb
, I1
} },
1454 { "rolQ", { Ev
, I1
} },
1455 { "rorQ", { Ev
, I1
} },
1456 { "rclQ", { Ev
, I1
} },
1457 { "rcrQ", { Ev
, I1
} },
1458 { "shlQ", { Ev
, I1
} },
1459 { "shrQ", { Ev
, I1
} },
1460 { "(bad)", { XX
} },
1461 { "sarQ", { Ev
, I1
} },
1465 { "rolA", { Eb
, CL
} },
1466 { "rorA", { Eb
, CL
} },
1467 { "rclA", { Eb
, CL
} },
1468 { "rcrA", { Eb
, CL
} },
1469 { "shlA", { Eb
, CL
} },
1470 { "shrA", { Eb
, CL
} },
1471 { "(bad)", { XX
} },
1472 { "sarA", { Eb
, CL
} },
1476 { "rolQ", { Ev
, CL
} },
1477 { "rorQ", { Ev
, CL
} },
1478 { "rclQ", { Ev
, CL
} },
1479 { "rcrQ", { Ev
, CL
} },
1480 { "shlQ", { Ev
, CL
} },
1481 { "shrQ", { Ev
, CL
} },
1482 { "(bad)", { XX
} },
1483 { "sarQ", { Ev
, CL
} },
1487 { "testA", { Eb
, Ib
} },
1488 { "(bad)", { Eb
} },
1491 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1492 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1493 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1494 { "idivA", { Eb
} }, /* and idiv for consistency. */
1498 { "testQ", { Ev
, Iv
} },
1499 { "(bad)", { XX
} },
1502 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1503 { "imulQ", { Ev
} },
1505 { "idivQ", { Ev
} },
1511 { "(bad)", { XX
} },
1512 { "(bad)", { XX
} },
1513 { "(bad)", { XX
} },
1514 { "(bad)", { XX
} },
1515 { "(bad)", { XX
} },
1516 { "(bad)", { XX
} },
1522 { "callT", { indirEv
} },
1523 { "JcallT", { indirEp
} },
1524 { "jmpT", { indirEv
} },
1525 { "JjmpT", { indirEp
} },
1526 { "pushU", { stackEv
} },
1527 { "(bad)", { XX
} },
1531 { "sldtD", { Sv
} },
1537 { "(bad)", { XX
} },
1538 { "(bad)", { XX
} },
1546 { "smswD", { Sv
} },
1547 { "(bad)", { XX
} },
1553 { "(bad)", { XX
} },
1554 { "(bad)", { XX
} },
1555 { "(bad)", { XX
} },
1556 { "(bad)", { XX
} },
1557 { "btQ", { Ev
, Ib
} },
1558 { "btsQ", { Ev
, Ib
} },
1559 { "btrQ", { Ev
, Ib
} },
1560 { "btcQ", { Ev
, Ib
} },
1564 { "(bad)", { XX
} },
1565 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1566 { "(bad)", { XX
} },
1567 { "(bad)", { XX
} },
1568 { "(bad)", { XX
} },
1569 { "(bad)", { XX
} },
1575 { "movA", { Eb
, Ib
} },
1576 { "(bad)", { XX
} },
1577 { "(bad)", { XX
} },
1578 { "(bad)", { XX
} },
1579 { "(bad)", { XX
} },
1580 { "(bad)", { XX
} },
1581 { "(bad)", { XX
} },
1582 { "(bad)", { XX
} },
1586 { "movQ", { Ev
, Iv
} },
1587 { "(bad)", { XX
} },
1588 { "(bad)", { XX
} },
1589 { "(bad)", { XX
} },
1590 { "(bad)", { XX
} },
1591 { "(bad)", { XX
} },
1592 { "(bad)", { XX
} },
1593 { "(bad)", { XX
} },
1597 { "(bad)", { XX
} },
1598 { "(bad)", { XX
} },
1600 { "(bad)", { XX
} },
1602 { "(bad)", { XX
} },
1604 { "(bad)", { XX
} },
1608 { "(bad)", { XX
} },
1609 { "(bad)", { XX
} },
1611 { "(bad)", { XX
} },
1613 { "(bad)", { XX
} },
1615 { "(bad)", { XX
} },
1619 { "(bad)", { XX
} },
1620 { "(bad)", { XX
} },
1623 { "(bad)", { XX
} },
1624 { "(bad)", { XX
} },
1634 { "(bad)", { XX
} },
1645 { "(bad)", { XX
} },
1646 { "(bad)", { XX
} },
1647 { "(bad)", { XX
} },
1648 { "(bad)", { XX
} },
1652 { "prefetch", { Eb
} },
1653 { "prefetchw", { Eb
} },
1654 { "(bad)", { XX
} },
1655 { "(bad)", { XX
} },
1656 { "(bad)", { XX
} },
1657 { "(bad)", { XX
} },
1658 { "(bad)", { XX
} },
1659 { "(bad)", { XX
} },
1663 { "xstore-rng", { { OP_0f07
, 0 } } },
1664 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1665 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1666 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1667 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1668 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1669 { "(bad)", { { OP_0f07
, 0 } } },
1670 { "(bad)", { { OP_0f07
, 0 } } },
1674 { "montmul", { { OP_0f07
, 0 } } },
1675 { "xsha1", { { OP_0f07
, 0 } } },
1676 { "xsha256", { { OP_0f07
, 0 } } },
1677 { "(bad)", { { OP_0f07
, 0 } } },
1678 { "(bad)", { { OP_0f07
, 0 } } },
1679 { "(bad)", { { OP_0f07
, 0 } } },
1680 { "(bad)", { { OP_0f07
, 0 } } },
1681 { "(bad)", { { OP_0f07
, 0 } } },
1685 static const struct dis386 prefix_user_table
[][4] = {
1688 { "addps", { XM
, EXx
} },
1689 { "addss", { XM
, EXd
} },
1690 { "addpd", { XM
, EXx
} },
1691 { "addsd", { XM
, EXq
} },
1695 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1696 { "", { XM
, EXd
, OPSIMD
} },
1697 { "", { XM
, EXx
, OPSIMD
} },
1698 { "", { XM
, EXq
, OPSIMD
} },
1702 { "cvtpi2ps", { XM
, EMCq
} },
1703 { "cvtsi2ssY", { XM
, Ev
} },
1704 { "cvtpi2pd", { XM
, EMCq
} },
1705 { "cvtsi2sdY", { XM
, Ev
} },
1709 { "cvtps2pi", { MXC
, EXq
} },
1710 { "cvtss2siY", { Gv
, EXd
} },
1711 { "cvtpd2pi", { MXC
, EXx
} },
1712 { "cvtsd2siY", { Gv
, EXq
} },
1716 { "cvttps2pi", { MXC
, EXq
} },
1717 { "cvttss2siY", { Gv
, EXd
} },
1718 { "cvttpd2pi", { MXC
, EXx
} },
1719 { "cvttsd2siY", { Gv
, EXq
} },
1723 { "divps", { XM
, EXx
} },
1724 { "divss", { XM
, EXd
} },
1725 { "divpd", { XM
, EXx
} },
1726 { "divsd", { XM
, EXq
} },
1730 { "maxps", { XM
, EXx
} },
1731 { "maxss", { XM
, EXd
} },
1732 { "maxpd", { XM
, EXx
} },
1733 { "maxsd", { XM
, EXq
} },
1737 { "minps", { XM
, EXx
} },
1738 { "minss", { XM
, EXd
} },
1739 { "minpd", { XM
, EXx
} },
1740 { "minsd", { XM
, EXq
} },
1744 { "movups", { XM
, EXx
} },
1745 { "movss", { XM
, EXd
} },
1746 { "movupd", { XM
, EXx
} },
1747 { "movsd", { XM
, EXq
} },
1751 { "movups", { EXx
, XM
} },
1752 { "movss", { EXd
, XM
} },
1753 { "movupd", { EXx
, XM
} },
1754 { "movsd", { EXq
, XM
} },
1758 { "mulps", { XM
, EXx
} },
1759 { "mulss", { XM
, EXd
} },
1760 { "mulpd", { XM
, EXx
} },
1761 { "mulsd", { XM
, EXq
} },
1765 { "rcpps", { XM
, EXx
} },
1766 { "rcpss", { XM
, EXd
} },
1767 { "(bad)", { XM
, EXx
} },
1768 { "(bad)", { XM
, EXx
} },
1772 { "rsqrtps",{ XM
, EXx
} },
1773 { "rsqrtss",{ XM
, EXd
} },
1774 { "(bad)", { XM
, EXx
} },
1775 { "(bad)", { XM
, EXx
} },
1779 { "sqrtps", { XM
, EXx
} },
1780 { "sqrtss", { XM
, EXd
} },
1781 { "sqrtpd", { XM
, EXx
} },
1782 { "sqrtsd", { XM
, EXq
} },
1786 { "subps", { XM
, EXx
} },
1787 { "subss", { XM
, EXd
} },
1788 { "subpd", { XM
, EXx
} },
1789 { "subsd", { XM
, EXq
} },
1793 { "(bad)", { XM
, EXx
} },
1794 { "cvtdq2pd", { XM
, EXq
} },
1795 { "cvttpd2dq", { XM
, EXx
} },
1796 { "cvtpd2dq", { XM
, EXx
} },
1800 { "cvtdq2ps", { XM
, EXx
} },
1801 { "cvttps2dq", { XM
, EXx
} },
1802 { "cvtps2dq", { XM
, EXx
} },
1803 { "(bad)", { XM
, EXx
} },
1807 { "cvtps2pd", { XM
, EXq
} },
1808 { "cvtss2sd", { XM
, EXd
} },
1809 { "cvtpd2ps", { XM
, EXx
} },
1810 { "cvtsd2ss", { XM
, EXq
} },
1814 { "maskmovq", { MX
, MS
} },
1815 { "(bad)", { XM
, EXx
} },
1816 { "maskmovdqu", { XM
, XS
} },
1817 { "(bad)", { XM
, EXx
} },
1821 { "movq", { MX
, EM
} },
1822 { "movdqu", { XM
, EXx
} },
1823 { "movdqa", { XM
, EXx
} },
1824 { "(bad)", { XM
, EXx
} },
1828 { "movq", { EM
, MX
} },
1829 { "movdqu", { EXx
, XM
} },
1830 { "movdqa", { EXx
, XM
} },
1831 { "(bad)", { EXx
, XM
} },
1835 { "(bad)", { EXx
, XM
} },
1836 { "movq2dq",{ XM
, MS
} },
1837 { "movq", { EXq
, XM
} },
1838 { "movdq2q",{ MX
, XS
} },
1842 { "pshufw", { MX
, EM
, Ib
} },
1843 { "pshufhw",{ XM
, EXx
, Ib
} },
1844 { "pshufd", { XM
, EXx
, Ib
} },
1845 { "pshuflw",{ XM
, EXx
, Ib
} },
1849 { "movK", { Edq
, MX
} },
1850 { "movq", { XM
, EXq
} },
1851 { "movK", { Edq
, XM
} },
1852 { "(bad)", { Ed
, XM
} },
1856 { "(bad)", { MX
, EXx
} },
1857 { "(bad)", { XM
, EXx
} },
1858 { "punpckhqdq", { XM
, EXx
} },
1859 { "(bad)", { XM
, EXx
} },
1863 { "movntq", { EM
, MX
} },
1864 { "(bad)", { EM
, XM
} },
1865 { "movntdq",{ EM
, XM
} },
1866 { "(bad)", { EM
, XM
} },
1870 { "(bad)", { MX
, EXx
} },
1871 { "(bad)", { XM
, EXx
} },
1872 { "punpcklqdq", { XM
, EXx
} },
1873 { "(bad)", { XM
, EXx
} },
1877 { "(bad)", { MX
, EXx
} },
1878 { "(bad)", { XM
, EXx
} },
1879 { "addsubpd", { XM
, EXx
} },
1880 { "addsubps", { XM
, EXx
} },
1884 { "(bad)", { MX
, EXx
} },
1885 { "(bad)", { XM
, EXx
} },
1886 { "haddpd", { XM
, EXx
} },
1887 { "haddps", { XM
, EXx
} },
1891 { "(bad)", { MX
, EXx
} },
1892 { "(bad)", { XM
, EXx
} },
1893 { "hsubpd", { XM
, EXx
} },
1894 { "hsubps", { XM
, EXx
} },
1899 { "movsldup", { XM
, EXx
} },
1900 { "movlpd", { XM
, EXq
} },
1901 { "movddup", { XM
, EXq
} },
1906 { "movshdup", { XM
, EXx
} },
1907 { "movhpd", { XM
, EXq
} },
1908 { "(bad)", { XM
, EXq
} },
1912 { "(bad)", { XM
, EXx
} },
1913 { "(bad)", { XM
, EXx
} },
1914 { "(bad)", { XM
, EXx
} },
1919 {"movntps", { Ev
, XM
} },
1920 {"movntss", { Ed
, XM
} },
1921 {"movntpd", { Ev
, XM
} },
1922 {"movntsd", { Eq
, XM
} },
1927 {"vmread", { Em
, Gm
} },
1929 {"extrq", { XS
, Ib
, Ib
} },
1930 {"insertq", { XM
, XS
, Ib
, Ib
} },
1935 {"vmwrite", { Gm
, Em
} },
1937 {"extrq", { XM
, XS
} },
1938 {"insertq", { XM
, XS
} },
1943 { "bsrS", { Gv
, Ev
} },
1944 { "lzcntS", { Gv
, Ev
} },
1945 { "bsrS", { Gv
, Ev
} },
1946 { "(bad)", { XX
} },
1951 { "(bad)", { XX
} },
1952 { "popcntS", { Gv
, Ev
} },
1953 { "(bad)", { XX
} },
1954 { "(bad)", { XX
} },
1959 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
1960 { "pause", { XX
} },
1961 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
1962 { "(bad)", { XX
} },
1967 { "(bad)", { XX
} },
1968 { "(bad)", { XX
} },
1969 { "pblendvb", {XM
, EXx
, XMM0
} },
1970 { "(bad)", { XX
} },
1975 { "(bad)", { XX
} },
1976 { "(bad)", { XX
} },
1977 { "blendvps", {XM
, EXx
, XMM0
} },
1978 { "(bad)", { XX
} },
1983 { "(bad)", { XX
} },
1984 { "(bad)", { XX
} },
1985 { "blendvpd", { XM
, EXx
, XMM0
} },
1986 { "(bad)", { XX
} },
1991 { "(bad)", { XX
} },
1992 { "(bad)", { XX
} },
1993 { "ptest", { XM
, EXx
} },
1994 { "(bad)", { XX
} },
1999 { "(bad)", { XX
} },
2000 { "(bad)", { XX
} },
2001 { "pmovsxbw", { XM
, EXq
} },
2002 { "(bad)", { XX
} },
2007 { "(bad)", { XX
} },
2008 { "(bad)", { XX
} },
2009 { "pmovsxbd", { XM
, EXd
} },
2010 { "(bad)", { XX
} },
2015 { "(bad)", { XX
} },
2016 { "(bad)", { XX
} },
2017 { "pmovsxbq", { XM
, EXw
} },
2018 { "(bad)", { XX
} },
2023 { "(bad)", { XX
} },
2024 { "(bad)", { XX
} },
2025 { "pmovsxwd", { XM
, EXq
} },
2026 { "(bad)", { XX
} },
2031 { "(bad)", { XX
} },
2032 { "(bad)", { XX
} },
2033 { "pmovsxwq", { XM
, EXd
} },
2034 { "(bad)", { XX
} },
2039 { "(bad)", { XX
} },
2040 { "(bad)", { XX
} },
2041 { "pmovsxdq", { XM
, EXq
} },
2042 { "(bad)", { XX
} },
2047 { "(bad)", { XX
} },
2048 { "(bad)", { XX
} },
2049 { "pmuldq", { XM
, EXx
} },
2050 { "(bad)", { XX
} },
2055 { "(bad)", { XX
} },
2056 { "(bad)", { XX
} },
2057 { "pcmpeqq", { XM
, EXx
} },
2058 { "(bad)", { XX
} },
2063 { "(bad)", { XX
} },
2064 { "(bad)", { XX
} },
2065 { "movntdqa", { XM
, EM
} },
2066 { "(bad)", { XX
} },
2071 { "(bad)", { XX
} },
2072 { "(bad)", { XX
} },
2073 { "packusdw", { XM
, EXx
} },
2074 { "(bad)", { XX
} },
2079 { "(bad)", { XX
} },
2080 { "(bad)", { XX
} },
2081 { "pmovzxbw", { XM
, EXq
} },
2082 { "(bad)", { XX
} },
2087 { "(bad)", { XX
} },
2088 { "(bad)", { XX
} },
2089 { "pmovzxbd", { XM
, EXd
} },
2090 { "(bad)", { XX
} },
2095 { "(bad)", { XX
} },
2096 { "(bad)", { XX
} },
2097 { "pmovzxbq", { XM
, EXw
} },
2098 { "(bad)", { XX
} },
2103 { "(bad)", { XX
} },
2104 { "(bad)", { XX
} },
2105 { "pmovzxwd", { XM
, EXq
} },
2106 { "(bad)", { XX
} },
2111 { "(bad)", { XX
} },
2112 { "(bad)", { XX
} },
2113 { "pmovzxwq", { XM
, EXd
} },
2114 { "(bad)", { XX
} },
2119 { "(bad)", { XX
} },
2120 { "(bad)", { XX
} },
2121 { "pmovzxdq", { XM
, EXq
} },
2122 { "(bad)", { XX
} },
2127 { "(bad)", { XX
} },
2128 { "(bad)", { XX
} },
2129 { "pminsb", { XM
, EXx
} },
2130 { "(bad)", { XX
} },
2135 { "(bad)", { XX
} },
2136 { "(bad)", { XX
} },
2137 { "pminsd", { XM
, EXx
} },
2138 { "(bad)", { XX
} },
2143 { "(bad)", { XX
} },
2144 { "(bad)", { XX
} },
2145 { "pminuw", { XM
, EXx
} },
2146 { "(bad)", { XX
} },
2151 { "(bad)", { XX
} },
2152 { "(bad)", { XX
} },
2153 { "pminud", { XM
, EXx
} },
2154 { "(bad)", { XX
} },
2159 { "(bad)", { XX
} },
2160 { "(bad)", { XX
} },
2161 { "pmaxsb", { XM
, EXx
} },
2162 { "(bad)", { XX
} },
2167 { "(bad)", { XX
} },
2168 { "(bad)", { XX
} },
2169 { "pmaxsd", { XM
, EXx
} },
2170 { "(bad)", { XX
} },
2175 { "(bad)", { XX
} },
2176 { "(bad)", { XX
} },
2177 { "pmaxuw", { XM
, EXx
} },
2178 { "(bad)", { XX
} },
2183 { "(bad)", { XX
} },
2184 { "(bad)", { XX
} },
2185 { "pmaxud", { XM
, EXx
} },
2186 { "(bad)", { XX
} },
2191 { "(bad)", { XX
} },
2192 { "(bad)", { XX
} },
2193 { "pmulld", { XM
, EXx
} },
2194 { "(bad)", { XX
} },
2199 { "(bad)", { XX
} },
2200 { "(bad)", { XX
} },
2201 { "phminposuw", { XM
, EXx
} },
2202 { "(bad)", { XX
} },
2207 { "(bad)", { XX
} },
2208 { "(bad)", { XX
} },
2209 { "roundps", { XM
, EXx
, Ib
} },
2210 { "(bad)", { XX
} },
2215 { "(bad)", { XX
} },
2216 { "(bad)", { XX
} },
2217 { "roundpd", { XM
, EXx
, Ib
} },
2218 { "(bad)", { XX
} },
2223 { "(bad)", { XX
} },
2224 { "(bad)", { XX
} },
2225 { "roundss", { XM
, EXd
, Ib
} },
2226 { "(bad)", { XX
} },
2231 { "(bad)", { XX
} },
2232 { "(bad)", { XX
} },
2233 { "roundsd", { XM
, EXq
, Ib
} },
2234 { "(bad)", { XX
} },
2239 { "(bad)", { XX
} },
2240 { "(bad)", { XX
} },
2241 { "blendps", { XM
, EXx
, Ib
} },
2242 { "(bad)", { XX
} },
2247 { "(bad)", { XX
} },
2248 { "(bad)", { XX
} },
2249 { "blendpd", { XM
, EXx
, Ib
} },
2250 { "(bad)", { XX
} },
2255 { "(bad)", { XX
} },
2256 { "(bad)", { XX
} },
2257 { "pblendw", { XM
, EXx
, Ib
} },
2258 { "(bad)", { XX
} },
2263 { "(bad)", { XX
} },
2264 { "(bad)", { XX
} },
2265 { "pextrb", { Edqb
, XM
, Ib
} },
2266 { "(bad)", { XX
} },
2271 { "(bad)", { XX
} },
2272 { "(bad)", { XX
} },
2273 { "pextrw", { Edqw
, XM
, Ib
} },
2274 { "(bad)", { XX
} },
2279 { "(bad)", { XX
} },
2280 { "(bad)", { XX
} },
2281 { "pextrK", { Edq
, XM
, Ib
} },
2282 { "(bad)", { XX
} },
2287 { "(bad)", { XX
} },
2288 { "(bad)", { XX
} },
2289 { "extractps", { Edqd
, XM
, Ib
} },
2290 { "(bad)", { XX
} },
2295 { "(bad)", { XX
} },
2296 { "(bad)", { XX
} },
2297 { "pinsrb", { XM
, Edqb
, Ib
} },
2298 { "(bad)", { XX
} },
2303 { "(bad)", { XX
} },
2304 { "(bad)", { XX
} },
2305 { "insertps", { XM
, EXd
, Ib
} },
2306 { "(bad)", { XX
} },
2311 { "(bad)", { XX
} },
2312 { "(bad)", { XX
} },
2313 { "pinsrK", { XM
, Edq
, Ib
} },
2314 { "(bad)", { XX
} },
2319 { "(bad)", { XX
} },
2320 { "(bad)", { XX
} },
2321 { "dpps", { XM
, EXx
, Ib
} },
2322 { "(bad)", { XX
} },
2327 { "(bad)", { XX
} },
2328 { "(bad)", { XX
} },
2329 { "dppd", { XM
, EXx
, Ib
} },
2330 { "(bad)", { XX
} },
2335 { "(bad)", { XX
} },
2336 { "(bad)", { XX
} },
2337 { "mpsadbw", { XM
, EXx
, Ib
} },
2338 { "(bad)", { XX
} },
2343 { "(bad)", { XX
} },
2344 { "(bad)", { XX
} },
2345 { "pcmpgtq", { XM
, EXx
} },
2346 { "(bad)", { XX
} },
2351 { "(bad)", { XX
} },
2352 { "(bad)", { XX
} },
2353 { "(bad)", { XX
} },
2354 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2359 { "(bad)", { XX
} },
2360 { "(bad)", { XX
} },
2361 { "(bad)", { XX
} },
2362 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2367 { "(bad)", { XX
} },
2368 { "(bad)", { XX
} },
2369 { "pcmpestrm", { XM
, EXx
, Ib
} },
2370 { "(bad)", { XX
} },
2375 { "(bad)", { XX
} },
2376 { "(bad)", { XX
} },
2377 { "pcmpestri", { XM
, EXx
, Ib
} },
2378 { "(bad)", { XX
} },
2383 { "(bad)", { XX
} },
2384 { "(bad)", { XX
} },
2385 { "pcmpistrm", { XM
, EXx
, Ib
} },
2386 { "(bad)", { XX
} },
2391 { "(bad)", { XX
} },
2392 { "(bad)", { XX
} },
2393 { "pcmpistri", { XM
, EXx
, Ib
} },
2394 { "(bad)", { XX
} },
2399 { "ucomiss",{ XM
, EXd
} },
2400 { "(bad)", { XX
} },
2401 { "ucomisd",{ XM
, EXq
} },
2402 { "(bad)", { XX
} },
2407 { "comiss", { XM
, EXd
} },
2408 { "(bad)", { XX
} },
2409 { "comisd", { XM
, EXq
} },
2410 { "(bad)", { XX
} },
2415 { "punpcklbw",{ MX
, EMd
} },
2416 { "(bad)", { XX
} },
2417 { "punpcklbw",{ MX
, EMx
} },
2418 { "(bad)", { XX
} },
2423 { "punpcklwd",{ MX
, EMd
} },
2424 { "(bad)", { XX
} },
2425 { "punpcklwd",{ MX
, EMx
} },
2426 { "(bad)", { XX
} },
2431 { "punpckldq",{ MX
, EMd
} },
2432 { "(bad)", { XX
} },
2433 { "punpckldq",{ MX
, EMx
} },
2434 { "(bad)", { XX
} },
2439 { "vmptrld",{ Mq
} },
2440 { "vmxon", { Mq
} },
2441 { "vmclear",{ Mq
} },
2442 { "(bad)", { XX
} },
2447 { "(bad)", { XX
} },
2448 { "(bad)", { XX
} },
2449 { "psrldq", { MS
, Ib
} },
2450 { "(bad)", { XX
} },
2455 { "(bad)", { XX
} },
2456 { "(bad)", { XX
} },
2457 { "pslldq", { MS
, Ib
} },
2458 { "(bad)", { XX
} },
2462 static const struct dis386 x86_64_table
[][2] = {
2464 { "pusha{P|}", { XX
} },
2465 { "(bad)", { XX
} },
2468 { "popa{P|}", { XX
} },
2469 { "(bad)", { XX
} },
2473 { "(bad)", { XX
} },
2476 { "arpl", { Ew
, Gw
} },
2477 { "movs{||lq|xd}", { Gv
, Ed
} },
2481 static const struct dis386 three_byte_table
[][256] = {
2485 { "pshufb", { MX
, EM
} },
2486 { "phaddw", { MX
, EM
} },
2487 { "phaddd", { MX
, EM
} },
2488 { "phaddsw", { MX
, EM
} },
2489 { "pmaddubsw", { MX
, EM
} },
2490 { "phsubw", { MX
, EM
} },
2491 { "phsubd", { MX
, EM
} },
2492 { "phsubsw", { MX
, EM
} },
2494 { "psignb", { MX
, EM
} },
2495 { "psignw", { MX
, EM
} },
2496 { "psignd", { MX
, EM
} },
2497 { "pmulhrsw", { MX
, EM
} },
2498 { "(bad)", { XX
} },
2499 { "(bad)", { XX
} },
2500 { "(bad)", { XX
} },
2501 { "(bad)", { XX
} },
2504 { "(bad)", { XX
} },
2505 { "(bad)", { XX
} },
2506 { "(bad)", { XX
} },
2509 { "(bad)", { XX
} },
2512 { "(bad)", { XX
} },
2513 { "(bad)", { XX
} },
2514 { "(bad)", { XX
} },
2515 { "(bad)", { XX
} },
2516 { "pabsb", { MX
, EM
} },
2517 { "pabsw", { MX
, EM
} },
2518 { "pabsd", { MX
, EM
} },
2519 { "(bad)", { XX
} },
2527 { "(bad)", { XX
} },
2528 { "(bad)", { XX
} },
2534 { "(bad)", { XX
} },
2535 { "(bad)", { XX
} },
2536 { "(bad)", { XX
} },
2537 { "(bad)", { XX
} },
2545 { "(bad)", { XX
} },
2559 { "(bad)", { XX
} },
2560 { "(bad)", { XX
} },
2561 { "(bad)", { XX
} },
2562 { "(bad)", { XX
} },
2563 { "(bad)", { XX
} },
2564 { "(bad)", { XX
} },
2566 { "(bad)", { XX
} },
2567 { "(bad)", { XX
} },
2568 { "(bad)", { XX
} },
2569 { "(bad)", { XX
} },
2570 { "(bad)", { XX
} },
2571 { "(bad)", { XX
} },
2572 { "(bad)", { XX
} },
2573 { "(bad)", { XX
} },
2575 { "(bad)", { XX
} },
2576 { "(bad)", { XX
} },
2577 { "(bad)", { XX
} },
2578 { "(bad)", { XX
} },
2579 { "(bad)", { XX
} },
2580 { "(bad)", { XX
} },
2581 { "(bad)", { XX
} },
2582 { "(bad)", { XX
} },
2584 { "(bad)", { XX
} },
2585 { "(bad)", { XX
} },
2586 { "(bad)", { XX
} },
2587 { "(bad)", { XX
} },
2588 { "(bad)", { XX
} },
2589 { "(bad)", { XX
} },
2590 { "(bad)", { XX
} },
2591 { "(bad)", { XX
} },
2593 { "(bad)", { XX
} },
2594 { "(bad)", { XX
} },
2595 { "(bad)", { XX
} },
2596 { "(bad)", { XX
} },
2597 { "(bad)", { XX
} },
2598 { "(bad)", { XX
} },
2599 { "(bad)", { XX
} },
2600 { "(bad)", { XX
} },
2602 { "(bad)", { XX
} },
2603 { "(bad)", { XX
} },
2604 { "(bad)", { XX
} },
2605 { "(bad)", { XX
} },
2606 { "(bad)", { XX
} },
2607 { "(bad)", { XX
} },
2608 { "(bad)", { XX
} },
2609 { "(bad)", { XX
} },
2611 { "(bad)", { XX
} },
2612 { "(bad)", { XX
} },
2613 { "(bad)", { XX
} },
2614 { "(bad)", { XX
} },
2615 { "(bad)", { XX
} },
2616 { "(bad)", { XX
} },
2617 { "(bad)", { XX
} },
2618 { "(bad)", { XX
} },
2620 { "(bad)", { XX
} },
2621 { "(bad)", { XX
} },
2622 { "(bad)", { XX
} },
2623 { "(bad)", { XX
} },
2624 { "(bad)", { XX
} },
2625 { "(bad)", { XX
} },
2626 { "(bad)", { XX
} },
2627 { "(bad)", { XX
} },
2629 { "(bad)", { XX
} },
2630 { "(bad)", { XX
} },
2631 { "(bad)", { XX
} },
2632 { "(bad)", { XX
} },
2633 { "(bad)", { XX
} },
2634 { "(bad)", { XX
} },
2635 { "(bad)", { XX
} },
2636 { "(bad)", { XX
} },
2638 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2640 { "(bad)", { XX
} },
2641 { "(bad)", { XX
} },
2642 { "(bad)", { XX
} },
2643 { "(bad)", { XX
} },
2644 { "(bad)", { XX
} },
2645 { "(bad)", { XX
} },
2647 { "(bad)", { XX
} },
2648 { "(bad)", { XX
} },
2649 { "(bad)", { XX
} },
2650 { "(bad)", { XX
} },
2651 { "(bad)", { XX
} },
2652 { "(bad)", { XX
} },
2653 { "(bad)", { XX
} },
2654 { "(bad)", { XX
} },
2656 { "(bad)", { XX
} },
2657 { "(bad)", { XX
} },
2658 { "(bad)", { XX
} },
2659 { "(bad)", { XX
} },
2660 { "(bad)", { XX
} },
2661 { "(bad)", { XX
} },
2662 { "(bad)", { XX
} },
2663 { "(bad)", { XX
} },
2665 { "(bad)", { XX
} },
2666 { "(bad)", { XX
} },
2667 { "(bad)", { XX
} },
2668 { "(bad)", { XX
} },
2669 { "(bad)", { XX
} },
2670 { "(bad)", { XX
} },
2671 { "(bad)", { XX
} },
2672 { "(bad)", { XX
} },
2674 { "(bad)", { XX
} },
2675 { "(bad)", { XX
} },
2676 { "(bad)", { XX
} },
2677 { "(bad)", { XX
} },
2678 { "(bad)", { XX
} },
2679 { "(bad)", { XX
} },
2680 { "(bad)", { XX
} },
2681 { "(bad)", { XX
} },
2683 { "(bad)", { XX
} },
2684 { "(bad)", { XX
} },
2685 { "(bad)", { XX
} },
2686 { "(bad)", { XX
} },
2687 { "(bad)", { XX
} },
2688 { "(bad)", { XX
} },
2689 { "(bad)", { XX
} },
2690 { "(bad)", { XX
} },
2692 { "(bad)", { XX
} },
2693 { "(bad)", { XX
} },
2694 { "(bad)", { XX
} },
2695 { "(bad)", { XX
} },
2696 { "(bad)", { XX
} },
2697 { "(bad)", { XX
} },
2698 { "(bad)", { XX
} },
2699 { "(bad)", { XX
} },
2701 { "(bad)", { XX
} },
2702 { "(bad)", { XX
} },
2703 { "(bad)", { XX
} },
2704 { "(bad)", { XX
} },
2705 { "(bad)", { XX
} },
2706 { "(bad)", { XX
} },
2707 { "(bad)", { XX
} },
2708 { "(bad)", { XX
} },
2710 { "(bad)", { XX
} },
2711 { "(bad)", { XX
} },
2712 { "(bad)", { XX
} },
2713 { "(bad)", { XX
} },
2714 { "(bad)", { XX
} },
2715 { "(bad)", { XX
} },
2716 { "(bad)", { XX
} },
2717 { "(bad)", { XX
} },
2719 { "(bad)", { XX
} },
2720 { "(bad)", { XX
} },
2721 { "(bad)", { XX
} },
2722 { "(bad)", { XX
} },
2723 { "(bad)", { XX
} },
2724 { "(bad)", { XX
} },
2725 { "(bad)", { XX
} },
2726 { "(bad)", { XX
} },
2728 { "(bad)", { XX
} },
2729 { "(bad)", { XX
} },
2730 { "(bad)", { XX
} },
2731 { "(bad)", { XX
} },
2732 { "(bad)", { XX
} },
2733 { "(bad)", { XX
} },
2734 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2737 { "(bad)", { XX
} },
2738 { "(bad)", { XX
} },
2739 { "(bad)", { XX
} },
2740 { "(bad)", { XX
} },
2741 { "(bad)", { XX
} },
2742 { "(bad)", { XX
} },
2743 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2746 { "(bad)", { XX
} },
2747 { "(bad)", { XX
} },
2748 { "(bad)", { XX
} },
2749 { "(bad)", { XX
} },
2750 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2752 { "(bad)", { XX
} },
2753 { "(bad)", { XX
} },
2757 { "(bad)", { XX
} },
2758 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2760 { "(bad)", { XX
} },
2761 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2764 { "(bad)", { XX
} },
2765 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "(bad)", { XX
} },
2770 { "(bad)", { XX
} },
2771 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "(bad)", { XX
} },
2778 { "(bad)", { XX
} },
2779 { "(bad)", { XX
} },
2780 { "(bad)", { XX
} },
2781 { "(bad)", { XX
} },
2782 { "(bad)", { XX
} },
2783 { "(bad)", { XX
} },
2792 { "palignr", { MX
, EM
, Ib
} },
2794 { "(bad)", { XX
} },
2795 { "(bad)", { XX
} },
2796 { "(bad)", { XX
} },
2797 { "(bad)", { XX
} },
2803 { "(bad)", { XX
} },
2804 { "(bad)", { XX
} },
2805 { "(bad)", { XX
} },
2806 { "(bad)", { XX
} },
2807 { "(bad)", { XX
} },
2808 { "(bad)", { XX
} },
2809 { "(bad)", { XX
} },
2810 { "(bad)", { XX
} },
2815 { "(bad)", { XX
} },
2816 { "(bad)", { XX
} },
2817 { "(bad)", { XX
} },
2818 { "(bad)", { XX
} },
2819 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2824 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2827 { "(bad)", { XX
} },
2828 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2833 { "(bad)", { XX
} },
2834 { "(bad)", { XX
} },
2835 { "(bad)", { XX
} },
2836 { "(bad)", { XX
} },
2837 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2842 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2845 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2851 { "(bad)", { XX
} },
2852 { "(bad)", { XX
} },
2853 { "(bad)", { XX
} },
2854 { "(bad)", { XX
} },
2855 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2860 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2863 { "(bad)", { XX
} },
2864 { "(bad)", { XX
} },
2866 { "(bad)", { XX
} },
2867 { "(bad)", { XX
} },
2868 { "(bad)", { XX
} },
2869 { "(bad)", { XX
} },
2870 { "(bad)", { XX
} },
2871 { "(bad)", { XX
} },
2872 { "(bad)", { XX
} },
2873 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2877 { "(bad)", { XX
} },
2878 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2881 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2888 { "(bad)", { XX
} },
2889 { "(bad)", { XX
} },
2890 { "(bad)", { XX
} },
2891 { "(bad)", { XX
} },
2893 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2896 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2899 { "(bad)", { XX
} },
2900 { "(bad)", { XX
} },
2902 { "(bad)", { XX
} },
2903 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2905 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2908 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2914 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2917 { "(bad)", { XX
} },
2918 { "(bad)", { XX
} },
2920 { "(bad)", { XX
} },
2921 { "(bad)", { XX
} },
2922 { "(bad)", { XX
} },
2923 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2926 { "(bad)", { XX
} },
2927 { "(bad)", { XX
} },
2929 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2932 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2935 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2941 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2944 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2953 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2962 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2966 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2971 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2977 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2980 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2989 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2998 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3007 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3013 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3016 { "(bad)", { XX
} },
3017 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3020 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3025 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3034 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3037 { "(bad)", { XX
} },
3038 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3040 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3043 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3046 { "(bad)", { XX
} },
3047 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3049 { "(bad)", { XX
} },
3050 { "(bad)", { XX
} },
3051 { "(bad)", { XX
} },
3052 { "(bad)", { XX
} },
3053 { "(bad)", { XX
} },
3055 { "(bad)", { XX
} },
3056 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3060 { "(bad)", { XX
} },
3061 { "(bad)", { XX
} },
3062 { "(bad)", { XX
} },
3066 static const struct dis386 opc_ext_table
[][2] = {
3069 { "leaS", { Gv
, M
} },
3070 { "(bad)", { XX
} },
3074 { "les{S|}", { Gv
, Mp
} },
3075 { "(bad)", { XX
} },
3079 { "ldsS", { Gv
, Mp
} },
3080 { "(bad)", { XX
} },
3084 { "lssS", { Gv
, Mp
} },
3085 { "(bad)", { XX
} },
3089 { "lfsS", { Gv
, Mp
} },
3090 { "(bad)", { XX
} },
3094 { "lgsS", { Gv
, Mp
} },
3095 { "(bad)", { XX
} },
3099 { "sgdt{Q|IQ||}", { M
} },
3104 { "sidt{Q|IQ||}", { M
} },
3109 { "lgdt{Q|Q||}", { M
} },
3110 { "(bad)", { XX
} },
3115 { "(bad)", { XX
} },
3119 { "vmptrst", { Mq
} },
3120 { "(bad)", { XX
} },
3124 { "(bad)", { XX
} },
3125 { "psrlw", { MS
, Ib
} },
3129 { "(bad)", { XX
} },
3130 { "psraw", { MS
, Ib
} },
3134 { "(bad)", { XX
} },
3135 { "psllw", { MS
, Ib
} },
3139 { "(bad)", { XX
} },
3140 { "psrld", { MS
, Ib
} },
3144 { "(bad)", { XX
} },
3145 { "psrad", { MS
, Ib
} },
3149 { "(bad)", { XX
} },
3150 { "pslld", { MS
, Ib
} },
3154 { "(bad)", { XX
} },
3155 { "psrlq", { MS
, Ib
} },
3159 { "(bad)", { XX
} },
3164 { "(bad)", { XX
} },
3165 { "psllq", { MS
, Ib
} },
3169 { "(bad)", { XX
} },
3174 { "fxsave", { M
} },
3175 { "(bad)", { XX
} },
3179 { "fxrstor", { M
} },
3180 { "(bad)", { XX
} },
3184 { "ldmxcsr", { Md
} },
3185 { "(bad)", { XX
} },
3189 { "stmxcsr", { Md
} },
3190 { "(bad)", { XX
} },
3194 { "(bad)", { XX
} },
3199 { "(bad)", { XX
} },
3204 { "clflush", { Mb
} },
3209 { "prefetchnta", { Mb
} },
3210 { "(bad)", { XX
} },
3214 { "prefetcht0", { Mb
} },
3215 { "(bad)", { XX
} },
3219 { "prefetcht1", { Mb
} },
3220 { "(bad)", { XX
} },
3224 { "prefetcht2", { Mb
} },
3225 { "(bad)", { XX
} },
3229 { "lddqu", { XM
, M
} },
3230 { "(bad)", { XX
} },
3234 { "bound{S|}", { Gv
, Ma
} },
3235 { "(bad)", { XX
} },
3239 { "movlpX", { EXq
, XM
} },
3240 { "(bad)", { XX
} },
3244 { "movhpX", { EXq
, XM
} },
3245 { "(bad)", { XX
} },
3249 { "movlpX", { XM
, EXq
} },
3250 { "movhlpX", { XM
, EXq
} },
3254 { "movhpX", { XM
, EXq
} },
3255 { "movlhpX", { XM
, EXq
} },
3259 { "invlpg", { Mb
} },
3264 { "lidt{Q|Q||}", { M
} },
3269 static const struct dis386 opc_ext_rm_table
[][8] = {
3272 { "(bad)", { XX
} },
3273 { "vmcall", { Skip_MODRM
} },
3274 { "vmlaunch", { Skip_MODRM
} },
3275 { "vmresume", { Skip_MODRM
} },
3276 { "vmxoff", { Skip_MODRM
} },
3277 { "(bad)", { XX
} },
3278 { "(bad)", { XX
} },
3279 { "(bad)", { XX
} },
3283 { "monitor", { { OP_Monitor
, 0 } } },
3284 { "mwait", { { OP_Mwait
, 0 } } },
3285 { "(bad)", { XX
} },
3286 { "(bad)", { XX
} },
3287 { "(bad)", { XX
} },
3288 { "(bad)", { XX
} },
3289 { "(bad)", { XX
} },
3290 { "(bad)", { XX
} },
3294 { "lfence", { Skip_MODRM
} },
3295 { "(bad)", { XX
} },
3296 { "(bad)", { XX
} },
3297 { "(bad)", { XX
} },
3298 { "(bad)", { XX
} },
3299 { "(bad)", { XX
} },
3300 { "(bad)", { XX
} },
3301 { "(bad)", { XX
} },
3305 { "mfence", { Skip_MODRM
} },
3306 { "(bad)", { XX
} },
3307 { "(bad)", { XX
} },
3308 { "(bad)", { XX
} },
3309 { "(bad)", { XX
} },
3310 { "(bad)", { XX
} },
3311 { "(bad)", { XX
} },
3312 { "(bad)", { XX
} },
3316 { "sfence", { Skip_MODRM
} },
3317 { "(bad)", { XX
} },
3318 { "(bad)", { XX
} },
3319 { "(bad)", { XX
} },
3320 { "(bad)", { XX
} },
3321 { "(bad)", { XX
} },
3322 { "(bad)", { XX
} },
3323 { "(bad)", { XX
} },
3327 { "swapgs", { Skip_MODRM
} },
3328 { "rdtscp", { Skip_MODRM
} },
3329 { "(bad)", { XX
} },
3330 { "(bad)", { XX
} },
3331 { "(bad)", { XX
} },
3332 { "(bad)", { XX
} },
3333 { "(bad)", { XX
} },
3334 { "(bad)", { XX
} },
3338 { "vmrun", { Skip_MODRM
} },
3339 { "vmmcall", { Skip_MODRM
} },
3340 { "vmload", { Skip_MODRM
} },
3341 { "vmsave", { Skip_MODRM
} },
3342 { "stgi", { Skip_MODRM
} },
3343 { "clgi", { Skip_MODRM
} },
3344 { "skinit", { Skip_MODRM
} },
3345 { "invlpga", { Skip_MODRM
} },
3349 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3361 FETCH_DATA (the_info
, codep
+ 1);
3365 /* REX prefixes family. */
3382 if (address_mode
== mode_64bit
)
3388 prefixes
|= PREFIX_REPZ
;
3391 prefixes
|= PREFIX_REPNZ
;
3394 prefixes
|= PREFIX_LOCK
;
3397 prefixes
|= PREFIX_CS
;
3400 prefixes
|= PREFIX_SS
;
3403 prefixes
|= PREFIX_DS
;
3406 prefixes
|= PREFIX_ES
;
3409 prefixes
|= PREFIX_FS
;
3412 prefixes
|= PREFIX_GS
;
3415 prefixes
|= PREFIX_DATA
;
3418 prefixes
|= PREFIX_ADDR
;
3421 /* fwait is really an instruction. If there are prefixes
3422 before the fwait, they belong to the fwait, *not* to the
3423 following instruction. */
3424 if (prefixes
|| rex
)
3426 prefixes
|= PREFIX_FWAIT
;
3430 prefixes
= PREFIX_FWAIT
;
3435 /* Rex is ignored when followed by another prefix. */
3446 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3450 prefix_name (int pref
, int sizeflag
)
3452 static const char *rexes
[16] =
3457 "rex.XB", /* 0x43 */
3459 "rex.RB", /* 0x45 */
3460 "rex.RX", /* 0x46 */
3461 "rex.RXB", /* 0x47 */
3463 "rex.WB", /* 0x49 */
3464 "rex.WX", /* 0x4a */
3465 "rex.WXB", /* 0x4b */
3466 "rex.WR", /* 0x4c */
3467 "rex.WRB", /* 0x4d */
3468 "rex.WRX", /* 0x4e */
3469 "rex.WRXB", /* 0x4f */
3474 /* REX prefixes family. */
3491 return rexes
[pref
- 0x40];
3511 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3513 if (address_mode
== mode_64bit
)
3514 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3516 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3524 static char op_out
[MAX_OPERANDS
][100];
3525 static int op_ad
, op_index
[MAX_OPERANDS
];
3526 static int two_source_ops
;
3527 static bfd_vma op_address
[MAX_OPERANDS
];
3528 static bfd_vma op_riprel
[MAX_OPERANDS
];
3529 static bfd_vma start_pc
;
3532 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3533 * (see topic "Redundant prefixes" in the "Differences from 8086"
3534 * section of the "Virtual 8086 Mode" chapter.)
3535 * 'pc' should be the address of this instruction, it will
3536 * be used to print the target address if this is a relative jump or call
3537 * The function returns the length of this instruction in bytes.
3540 static char intel_syntax
;
3541 static char open_char
;
3542 static char close_char
;
3543 static char separator_char
;
3544 static char scale_char
;
3546 /* Here for backwards compatibility. When gdb stops using
3547 print_insn_i386_att and print_insn_i386_intel these functions can
3548 disappear, and print_insn_i386 be merged into print_insn. */
3550 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
3554 return print_insn (pc
, info
);
3558 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
3562 return print_insn (pc
, info
);
3566 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3570 return print_insn (pc
, info
);
3574 print_i386_disassembler_options (FILE *stream
)
3576 fprintf (stream
, _("\n\
3577 The following i386/x86-64 specific disassembler options are supported for use\n\
3578 with the -M switch (multiple options should be separated by commas):\n"));
3580 fprintf (stream
, _(" x86-64 Disassemble in 64bit mode\n"));
3581 fprintf (stream
, _(" i386 Disassemble in 32bit mode\n"));
3582 fprintf (stream
, _(" i8086 Disassemble in 16bit mode\n"));
3583 fprintf (stream
, _(" att Display instruction in AT&T syntax\n"));
3584 fprintf (stream
, _(" intel Display instruction in Intel syntax\n"));
3585 fprintf (stream
, _(" addr64 Assume 64bit address size\n"));
3586 fprintf (stream
, _(" addr32 Assume 32bit address size\n"));
3587 fprintf (stream
, _(" addr16 Assume 16bit address size\n"));
3588 fprintf (stream
, _(" data32 Assume 32bit data size\n"));
3589 fprintf (stream
, _(" data16 Assume 16bit data size\n"));
3590 fprintf (stream
, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3593 /* Get a pointer to struct dis386 with a valid name. */
3595 static const struct dis386
*
3596 get_valid_dis386 (const struct dis386
*dp
)
3600 if (dp
->name
!= NULL
)
3603 switch (dp
->op
[0].bytemode
)
3606 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3609 case USE_PREFIX_USER_TABLE
:
3611 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3612 if (prefixes
& PREFIX_REPZ
)
3619 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3621 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3622 if (prefixes
& PREFIX_REPNZ
)
3625 repnz_prefix
= NULL
;
3629 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3630 if (prefixes
& PREFIX_DATA
)
3637 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3640 case X86_64_SPECIAL
:
3641 index
= address_mode
== mode_64bit
? 1 : 0;
3642 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3645 case USE_OPC_EXT_TABLE
:
3646 index
= modrm
.mod
== 0x3 ? 1 : 0;
3647 dp
= &opc_ext_table
[dp
->op
[1].bytemode
][index
];
3650 case USE_OPC_EXT_RM_TABLE
:
3652 dp
= &opc_ext_rm_table
[dp
->op
[1].bytemode
][index
];
3656 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3660 if (dp
->name
!= NULL
)
3663 return get_valid_dis386 (dp
);
3667 print_insn (bfd_vma pc
, disassemble_info
*info
)
3669 const struct dis386
*dp
;
3671 char *op_txt
[MAX_OPERANDS
];
3675 struct dis_private priv
;
3677 char prefix_obuf
[32];
3680 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3681 || info
->mach
== bfd_mach_x86_64
)
3682 address_mode
= mode_64bit
;
3684 address_mode
= mode_32bit
;
3686 if (intel_syntax
== (char) -1)
3687 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3688 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3690 if (info
->mach
== bfd_mach_i386_i386
3691 || info
->mach
== bfd_mach_x86_64
3692 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3693 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3694 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3695 else if (info
->mach
== bfd_mach_i386_i8086
)
3696 priv
.orig_sizeflag
= 0;
3700 for (p
= info
->disassembler_options
; p
!= NULL
; )
3702 if (CONST_STRNEQ (p
, "x86-64"))
3704 address_mode
= mode_64bit
;
3705 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3707 else if (CONST_STRNEQ (p
, "i386"))
3709 address_mode
= mode_32bit
;
3710 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3712 else if (CONST_STRNEQ (p
, "i8086"))
3714 address_mode
= mode_16bit
;
3715 priv
.orig_sizeflag
= 0;
3717 else if (CONST_STRNEQ (p
, "intel"))
3721 else if (CONST_STRNEQ (p
, "att"))
3725 else if (CONST_STRNEQ (p
, "addr"))
3727 if (address_mode
== mode_64bit
)
3729 if (p
[4] == '3' && p
[5] == '2')
3730 priv
.orig_sizeflag
&= ~AFLAG
;
3731 else if (p
[4] == '6' && p
[5] == '4')
3732 priv
.orig_sizeflag
|= AFLAG
;
3736 if (p
[4] == '1' && p
[5] == '6')
3737 priv
.orig_sizeflag
&= ~AFLAG
;
3738 else if (p
[4] == '3' && p
[5] == '2')
3739 priv
.orig_sizeflag
|= AFLAG
;
3742 else if (CONST_STRNEQ (p
, "data"))
3744 if (p
[4] == '1' && p
[5] == '6')
3745 priv
.orig_sizeflag
&= ~DFLAG
;
3746 else if (p
[4] == '3' && p
[5] == '2')
3747 priv
.orig_sizeflag
|= DFLAG
;
3749 else if (CONST_STRNEQ (p
, "suffix"))
3750 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3752 p
= strchr (p
, ',');
3759 names64
= intel_names64
;
3760 names32
= intel_names32
;
3761 names16
= intel_names16
;
3762 names8
= intel_names8
;
3763 names8rex
= intel_names8rex
;
3764 names_seg
= intel_names_seg
;
3765 index16
= intel_index16
;
3768 separator_char
= '+';
3773 names64
= att_names64
;
3774 names32
= att_names32
;
3775 names16
= att_names16
;
3776 names8
= att_names8
;
3777 names8rex
= att_names8rex
;
3778 names_seg
= att_names_seg
;
3779 index16
= att_index16
;
3782 separator_char
= ',';
3786 /* The output looks better if we put 7 bytes on a line, since that
3787 puts most long word instructions on a single line. */
3788 info
->bytes_per_line
= 7;
3790 info
->private_data
= &priv
;
3791 priv
.max_fetched
= priv
.the_buffer
;
3792 priv
.insn_start
= pc
;
3795 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3803 start_codep
= priv
.the_buffer
;
3804 codep
= priv
.the_buffer
;
3806 if (setjmp (priv
.bailout
) != 0)
3810 /* Getting here means we tried for data but didn't get it. That
3811 means we have an incomplete instruction of some sort. Just
3812 print the first byte as a prefix or a .byte pseudo-op. */
3813 if (codep
> priv
.the_buffer
)
3815 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3817 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3820 /* Just print the first byte as a .byte instruction. */
3821 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3822 (unsigned int) priv
.the_buffer
[0]);
3835 sizeflag
= priv
.orig_sizeflag
;
3837 FETCH_DATA (info
, codep
+ 1);
3838 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3840 if (((prefixes
& PREFIX_FWAIT
)
3841 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3842 || (rex
&& rex_used
))
3846 /* fwait not followed by floating point instruction, or rex followed
3847 by other prefixes. Print the first prefix. */
3848 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3850 name
= INTERNAL_DISASSEMBLER_ERROR
;
3851 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3858 unsigned char threebyte
;
3859 FETCH_DATA (info
, codep
+ 2);
3860 threebyte
= *++codep
;
3861 dp
= &dis386_twobyte
[threebyte
];
3862 need_modrm
= twobyte_has_modrm
[*codep
];
3864 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3866 FETCH_DATA (info
, codep
+ 2);
3872 dp
= &dis386
[*codep
];
3873 need_modrm
= onebyte_has_modrm
[*codep
];
3877 if ((prefixes
& PREFIX_REPZ
))
3879 repz_prefix
= "repz ";
3880 used_prefixes
|= PREFIX_REPZ
;
3885 if ((prefixes
& PREFIX_REPNZ
))
3887 repnz_prefix
= "repnz ";
3888 used_prefixes
|= PREFIX_REPNZ
;
3891 repnz_prefix
= NULL
;
3893 if ((prefixes
& PREFIX_LOCK
))
3895 lock_prefix
= "lock ";
3896 used_prefixes
|= PREFIX_LOCK
;
3902 if (prefixes
& PREFIX_ADDR
)
3905 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3907 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3908 addr_prefix
= "addr32 ";
3910 addr_prefix
= "addr16 ";
3911 used_prefixes
|= PREFIX_ADDR
;
3916 if ((prefixes
& PREFIX_DATA
))
3919 if (dp
->op
[2].bytemode
== cond_jump_mode
3920 && dp
->op
[0].bytemode
== v_mode
3923 if (sizeflag
& DFLAG
)
3924 data_prefix
= "data32 ";
3926 data_prefix
= "data16 ";
3927 used_prefixes
|= PREFIX_DATA
;
3931 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3933 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3934 modrm
.mod
= (*codep
>> 6) & 3;
3935 modrm
.reg
= (*codep
>> 3) & 7;
3936 modrm
.rm
= *codep
& 7;
3938 else if (need_modrm
)
3940 FETCH_DATA (info
, codep
+ 1);
3941 modrm
.mod
= (*codep
>> 6) & 3;
3942 modrm
.reg
= (*codep
>> 3) & 7;
3943 modrm
.rm
= *codep
& 7;
3946 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3952 dp
= get_valid_dis386 (dp
);
3953 if (dp
!= NULL
&& putop (dp
->name
, sizeflag
) == 0)
3955 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3958 op_ad
= MAX_OPERANDS
- 1 - i
;
3960 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3965 /* See if any prefixes were not used. If so, print the first one
3966 separately. If we don't do this, we'll wind up printing an
3967 instruction stream which does not precisely correspond to the
3968 bytes we are disassembling. */
3969 if ((prefixes
& ~used_prefixes
) != 0)
3973 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3975 name
= INTERNAL_DISASSEMBLER_ERROR
;
3976 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3979 if (rex
& ~rex_used
)
3982 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3984 name
= INTERNAL_DISASSEMBLER_ERROR
;
3985 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3989 prefix_obufp
= prefix_obuf
;
3991 prefix_obufp
= stpcpy (prefix_obufp
, lock_prefix
);
3993 prefix_obufp
= stpcpy (prefix_obufp
, repz_prefix
);
3995 prefix_obufp
= stpcpy (prefix_obufp
, repnz_prefix
);
3997 prefix_obufp
= stpcpy (prefix_obufp
, addr_prefix
);
3999 prefix_obufp
= stpcpy (prefix_obufp
, data_prefix
);
4001 if (prefix_obuf
[0] != 0)
4002 (*info
->fprintf_func
) (info
->stream
, "%s", prefix_obuf
);
4004 obufp
= obuf
+ strlen (obuf
);
4005 for (i
= strlen (obuf
) + strlen (prefix_obuf
); i
< 6; i
++)
4008 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
4010 /* The enter and bound instructions are printed with operands in the same
4011 order as the intel book; everything else is printed in reverse order. */
4012 if (intel_syntax
|| two_source_ops
)
4016 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4017 op_txt
[i
] = op_out
[i
];
4019 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
4021 op_ad
= op_index
[i
];
4022 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
4023 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
4024 riprel
= op_riprel
[i
];
4025 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
4026 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
4031 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4032 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
4036 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
4040 (*info
->fprintf_func
) (info
->stream
, ",");
4041 if (op_index
[i
] != -1 && !op_riprel
[i
])
4042 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
4044 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
4048 for (i
= 0; i
< MAX_OPERANDS
; i
++)
4049 if (op_index
[i
] != -1 && op_riprel
[i
])
4051 (*info
->fprintf_func
) (info
->stream
, " # ");
4052 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
4053 + op_address
[op_index
[i
]]), info
);
4056 return codep
- priv
.the_buffer
;
4059 static const char *float_mem
[] = {
4134 static const unsigned char float_mem_mode
[] = {
4209 #define ST { OP_ST, 0 }
4210 #define STi { OP_STi, 0 }
4212 #define FGRPd9_2 NULL, { { NULL, 0 } }
4213 #define FGRPd9_4 NULL, { { NULL, 1 } }
4214 #define FGRPd9_5 NULL, { { NULL, 2 } }
4215 #define FGRPd9_6 NULL, { { NULL, 3 } }
4216 #define FGRPd9_7 NULL, { { NULL, 4 } }
4217 #define FGRPda_5 NULL, { { NULL, 5 } }
4218 #define FGRPdb_4 NULL, { { NULL, 6 } }
4219 #define FGRPde_3 NULL, { { NULL, 7 } }
4220 #define FGRPdf_4 NULL, { { NULL, 8 } }
4222 static const struct dis386 float_reg
[][8] = {
4225 { "fadd", { ST
, STi
} },
4226 { "fmul", { ST
, STi
} },
4227 { "fcom", { STi
} },
4228 { "fcomp", { STi
} },
4229 { "fsub", { ST
, STi
} },
4230 { "fsubr", { ST
, STi
} },
4231 { "fdiv", { ST
, STi
} },
4232 { "fdivr", { ST
, STi
} },
4237 { "fxch", { STi
} },
4239 { "(bad)", { XX
} },
4247 { "fcmovb", { ST
, STi
} },
4248 { "fcmove", { ST
, STi
} },
4249 { "fcmovbe",{ ST
, STi
} },
4250 { "fcmovu", { ST
, STi
} },
4251 { "(bad)", { XX
} },
4253 { "(bad)", { XX
} },
4254 { "(bad)", { XX
} },
4258 { "fcmovnb",{ ST
, STi
} },
4259 { "fcmovne",{ ST
, STi
} },
4260 { "fcmovnbe",{ ST
, STi
} },
4261 { "fcmovnu",{ ST
, STi
} },
4263 { "fucomi", { ST
, STi
} },
4264 { "fcomi", { ST
, STi
} },
4265 { "(bad)", { XX
} },
4269 { "fadd", { STi
, ST
} },
4270 { "fmul", { STi
, ST
} },
4271 { "(bad)", { XX
} },
4272 { "(bad)", { XX
} },
4274 { "fsub", { STi
, ST
} },
4275 { "fsubr", { STi
, ST
} },
4276 { "fdiv", { STi
, ST
} },
4277 { "fdivr", { STi
, ST
} },
4279 { "fsubr", { STi
, ST
} },
4280 { "fsub", { STi
, ST
} },
4281 { "fdivr", { STi
, ST
} },
4282 { "fdiv", { STi
, ST
} },
4287 { "ffree", { STi
} },
4288 { "(bad)", { XX
} },
4290 { "fstp", { STi
} },
4291 { "fucom", { STi
} },
4292 { "fucomp", { STi
} },
4293 { "(bad)", { XX
} },
4294 { "(bad)", { XX
} },
4298 { "faddp", { STi
, ST
} },
4299 { "fmulp", { STi
, ST
} },
4300 { "(bad)", { XX
} },
4303 { "fsubp", { STi
, ST
} },
4304 { "fsubrp", { STi
, ST
} },
4305 { "fdivp", { STi
, ST
} },
4306 { "fdivrp", { STi
, ST
} },
4308 { "fsubrp", { STi
, ST
} },
4309 { "fsubp", { STi
, ST
} },
4310 { "fdivrp", { STi
, ST
} },
4311 { "fdivp", { STi
, ST
} },
4316 { "ffreep", { STi
} },
4317 { "(bad)", { XX
} },
4318 { "(bad)", { XX
} },
4319 { "(bad)", { XX
} },
4321 { "fucomip", { ST
, STi
} },
4322 { "fcomip", { ST
, STi
} },
4323 { "(bad)", { XX
} },
4327 static char *fgrps
[][8] = {
4330 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4335 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4340 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4345 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4350 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4355 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4360 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4361 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4366 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4371 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4376 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED
,
4377 int sizeflag ATTRIBUTE_UNUSED
)
4379 /* Skip mod/rm byte. */
4385 dofloat (int sizeflag
)
4387 const struct dis386
*dp
;
4388 unsigned char floatop
;
4390 floatop
= codep
[-1];
4394 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4396 putop (float_mem
[fp_indx
], sizeflag
);
4399 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4402 /* Skip mod/rm byte. */
4406 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4407 if (dp
->name
== NULL
)
4409 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4411 /* Instruction fnstsw is only one with strange arg. */
4412 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4413 strcpy (op_out
[0], names16
[0]);
4417 putop (dp
->name
, sizeflag
);
4422 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4427 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4432 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4434 oappend ("%st" + intel_syntax
);
4438 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4440 sprintf (scratchbuf
, "%%st(%d)", modrm
.rm
);
4441 oappend (scratchbuf
+ intel_syntax
);
4444 /* Capital letters in template are macros. */
4446 putop (const char *template, int sizeflag
)
4451 for (p
= template; *p
; p
++)
4462 if (address_mode
== mode_64bit
)
4470 /* Alternative not valid. */
4471 strcpy (obuf
, "(bad)");
4475 else if (*p
== '\0')
4496 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4502 if (sizeflag
& SUFFIX_ALWAYS
)
4506 if (intel_syntax
&& !alt
)
4508 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4510 if (sizeflag
& DFLAG
)
4511 *obufp
++ = intel_syntax
? 'd' : 'l';
4513 *obufp
++ = intel_syntax
? 'w' : 's';
4514 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4518 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4525 else if (sizeflag
& DFLAG
)
4526 *obufp
++ = intel_syntax
? 'd' : 'l';
4529 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4534 case 'E': /* For jcxz/jecxz */
4535 if (address_mode
== mode_64bit
)
4537 if (sizeflag
& AFLAG
)
4543 if (sizeflag
& AFLAG
)
4545 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4550 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4552 if (sizeflag
& AFLAG
)
4553 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4555 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4556 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4560 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4562 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4567 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4572 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4573 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4575 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4578 if (prefixes
& PREFIX_DS
)
4599 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4608 if (sizeflag
& SUFFIX_ALWAYS
)
4612 if ((prefixes
& PREFIX_FWAIT
) == 0)
4615 used_prefixes
|= PREFIX_FWAIT
;
4621 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4626 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4631 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4640 if ((prefixes
& PREFIX_DATA
)
4642 || (sizeflag
& SUFFIX_ALWAYS
))
4649 if (sizeflag
& DFLAG
)
4654 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4660 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4662 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4668 if (intel_syntax
&& !alt
)
4671 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4677 if (sizeflag
& DFLAG
)
4678 *obufp
++ = intel_syntax
? 'd' : 'l';
4682 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4689 else if (sizeflag
& DFLAG
)
4698 if (intel_syntax
&& !p
[1]
4699 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4702 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4707 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4709 if (sizeflag
& SUFFIX_ALWAYS
)
4717 if (sizeflag
& SUFFIX_ALWAYS
)
4723 if (sizeflag
& DFLAG
)
4727 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4732 if (prefixes
& PREFIX_DATA
)
4736 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4747 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4749 /* operand size flag for cwtl, cbtw */
4758 else if (sizeflag
& DFLAG
)
4763 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4773 oappend (const char *s
)
4776 obufp
+= strlen (s
);
4782 if (prefixes
& PREFIX_CS
)
4784 used_prefixes
|= PREFIX_CS
;
4785 oappend ("%cs:" + intel_syntax
);
4787 if (prefixes
& PREFIX_DS
)
4789 used_prefixes
|= PREFIX_DS
;
4790 oappend ("%ds:" + intel_syntax
);
4792 if (prefixes
& PREFIX_SS
)
4794 used_prefixes
|= PREFIX_SS
;
4795 oappend ("%ss:" + intel_syntax
);
4797 if (prefixes
& PREFIX_ES
)
4799 used_prefixes
|= PREFIX_ES
;
4800 oappend ("%es:" + intel_syntax
);
4802 if (prefixes
& PREFIX_FS
)
4804 used_prefixes
|= PREFIX_FS
;
4805 oappend ("%fs:" + intel_syntax
);
4807 if (prefixes
& PREFIX_GS
)
4809 used_prefixes
|= PREFIX_GS
;
4810 oappend ("%gs:" + intel_syntax
);
4815 OP_indirE (int bytemode
, int sizeflag
)
4819 OP_E (bytemode
, sizeflag
);
4823 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
4825 if (address_mode
== mode_64bit
)
4833 sprintf_vma (tmp
, disp
);
4834 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4835 strcpy (buf
+ 2, tmp
+ i
);
4839 bfd_signed_vma v
= disp
;
4846 /* Check for possible overflow on 0x8000000000000000. */
4849 strcpy (buf
, "9223372036854775808");
4863 tmp
[28 - i
] = (v
% 10) + '0';
4867 strcpy (buf
, tmp
+ 29 - i
);
4873 sprintf (buf
, "0x%x", (unsigned int) disp
);
4875 sprintf (buf
, "%d", (int) disp
);
4879 /* Put DISP in BUF as signed hex number. */
4882 print_displacement (char *buf
, bfd_vma disp
)
4884 bfd_signed_vma val
= disp
;
4893 /* Check for possible overflow. */
4896 switch (address_mode
)
4899 strcpy (buf
+ j
, "0x8000000000000000");
4902 strcpy (buf
+ j
, "0x80000000");
4905 strcpy (buf
+ j
, "0x8000");
4915 sprintf_vma (tmp
, val
);
4916 for (i
= 0; tmp
[i
] == '0'; i
++)
4920 strcpy (buf
+ j
, tmp
+ i
);
4924 intel_operand_size (int bytemode
, int sizeflag
)
4930 oappend ("BYTE PTR ");
4934 oappend ("WORD PTR ");
4937 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4939 oappend ("QWORD PTR ");
4940 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4948 oappend ("QWORD PTR ");
4949 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4950 oappend ("DWORD PTR ");
4952 oappend ("WORD PTR ");
4953 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4956 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4958 oappend ("WORD PTR ");
4960 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4964 oappend ("DWORD PTR ");
4967 oappend ("QWORD PTR ");
4970 if (address_mode
== mode_64bit
)
4971 oappend ("QWORD PTR ");
4973 oappend ("DWORD PTR ");
4976 if (sizeflag
& DFLAG
)
4977 oappend ("FWORD PTR ");
4979 oappend ("DWORD PTR ");
4980 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4983 oappend ("TBYTE PTR ");
4986 oappend ("XMMWORD PTR ");
4989 oappend ("OWORD PTR ");
4997 OP_E (int bytemode
, int sizeflag
)
5006 /* Skip mod/rm byte. */
5017 oappend (names8rex
[modrm
.rm
+ add
]);
5019 oappend (names8
[modrm
.rm
+ add
]);
5022 oappend (names16
[modrm
.rm
+ add
]);
5025 oappend (names32
[modrm
.rm
+ add
]);
5028 oappend (names64
[modrm
.rm
+ add
]);
5031 if (address_mode
== mode_64bit
)
5032 oappend (names64
[modrm
.rm
+ add
]);
5034 oappend (names32
[modrm
.rm
+ add
]);
5037 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5039 oappend (names64
[modrm
.rm
+ add
]);
5040 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5052 oappend (names64
[modrm
.rm
+ add
]);
5053 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5054 oappend (names32
[modrm
.rm
+ add
]);
5056 oappend (names16
[modrm
.rm
+ add
]);
5057 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5062 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5070 intel_operand_size (bytemode
, sizeflag
);
5073 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5075 /* 32/64 bit address mode */
5090 FETCH_DATA (the_info
, codep
+ 1);
5091 index
= (*codep
>> 3) & 7;
5092 if (address_mode
== mode_64bit
|| index
!= 0x4)
5093 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5094 scale
= (*codep
>> 6) & 3;
5106 if ((base
& 7) == 5)
5109 if (address_mode
== mode_64bit
&& !havesib
)
5115 FETCH_DATA (the_info
, codep
+ 1);
5117 if ((disp
& 0x80) != 0)
5125 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
5128 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5130 if (havedisp
|| riprel
)
5131 print_displacement (scratchbuf
, disp
);
5133 print_operand_value (scratchbuf
, 1, disp
);
5134 oappend (scratchbuf
);
5142 if (havedisp
|| (intel_syntax
&& riprel
))
5144 *obufp
++ = open_char
;
5145 if (intel_syntax
&& riprel
)
5152 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5153 ? names64
[base
] : names32
[base
]);
5158 if (!intel_syntax
|| havebase
)
5160 *obufp
++ = separator_char
;
5163 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5164 ? names64
[index
] : names32
[index
]);
5166 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
5168 *obufp
++ = scale_char
;
5170 sprintf (scratchbuf
, "%d", 1 << scale
);
5171 oappend (scratchbuf
);
5175 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
5177 if ((bfd_signed_vma
) disp
>= 0)
5182 else if (modrm
.mod
!= 1)
5186 disp
= - (bfd_signed_vma
) disp
;
5189 print_displacement (scratchbuf
, disp
);
5190 oappend (scratchbuf
);
5193 *obufp
++ = close_char
;
5196 else if (intel_syntax
)
5198 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5200 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5201 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5205 oappend (names_seg
[ds_reg
- es_reg
]);
5208 print_operand_value (scratchbuf
, 1, disp
);
5209 oappend (scratchbuf
);
5214 { /* 16 bit address mode */
5221 if ((disp
& 0x8000) != 0)
5226 FETCH_DATA (the_info
, codep
+ 1);
5228 if ((disp
& 0x80) != 0)
5233 if ((disp
& 0x8000) != 0)
5239 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5241 print_displacement (scratchbuf
, disp
);
5242 oappend (scratchbuf
);
5245 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5247 *obufp
++ = open_char
;
5249 oappend (index16
[modrm
.rm
]);
5251 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5253 if ((bfd_signed_vma
) disp
>= 0)
5258 else if (modrm
.mod
!= 1)
5262 disp
= - (bfd_signed_vma
) disp
;
5265 print_displacement (scratchbuf
, disp
);
5266 oappend (scratchbuf
);
5269 *obufp
++ = close_char
;
5272 else if (intel_syntax
)
5274 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5275 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5279 oappend (names_seg
[ds_reg
- es_reg
]);
5282 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
5283 oappend (scratchbuf
);
5289 OP_G (int bytemode
, int sizeflag
)
5300 oappend (names8rex
[modrm
.reg
+ add
]);
5302 oappend (names8
[modrm
.reg
+ add
]);
5305 oappend (names16
[modrm
.reg
+ add
]);
5308 oappend (names32
[modrm
.reg
+ add
]);
5311 oappend (names64
[modrm
.reg
+ add
]);
5320 oappend (names64
[modrm
.reg
+ add
]);
5321 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5322 oappend (names32
[modrm
.reg
+ add
]);
5324 oappend (names16
[modrm
.reg
+ add
]);
5325 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5328 if (address_mode
== mode_64bit
)
5329 oappend (names64
[modrm
.reg
+ add
]);
5331 oappend (names32
[modrm
.reg
+ add
]);
5334 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5347 FETCH_DATA (the_info
, codep
+ 8);
5348 a
= *codep
++ & 0xff;
5349 a
|= (*codep
++ & 0xff) << 8;
5350 a
|= (*codep
++ & 0xff) << 16;
5351 a
|= (*codep
++ & 0xff) << 24;
5352 b
= *codep
++ & 0xff;
5353 b
|= (*codep
++ & 0xff) << 8;
5354 b
|= (*codep
++ & 0xff) << 16;
5355 b
|= (*codep
++ & 0xff) << 24;
5356 x
= a
+ ((bfd_vma
) b
<< 32);
5364 static bfd_signed_vma
5367 bfd_signed_vma x
= 0;
5369 FETCH_DATA (the_info
, codep
+ 4);
5370 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5371 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5372 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5373 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5377 static bfd_signed_vma
5380 bfd_signed_vma x
= 0;
5382 FETCH_DATA (the_info
, codep
+ 4);
5383 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5384 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5385 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5386 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5388 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5398 FETCH_DATA (the_info
, codep
+ 2);
5399 x
= *codep
++ & 0xff;
5400 x
|= (*codep
++ & 0xff) << 8;
5405 set_op (bfd_vma op
, int riprel
)
5407 op_index
[op_ad
] = op_ad
;
5408 if (address_mode
== mode_64bit
)
5410 op_address
[op_ad
] = op
;
5411 op_riprel
[op_ad
] = riprel
;
5415 /* Mask to get a 32-bit address. */
5416 op_address
[op_ad
] = op
& 0xffffffff;
5417 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5422 OP_REG (int code
, int sizeflag
)
5432 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5433 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5434 s
= names16
[code
- ax_reg
+ add
];
5436 case es_reg
: case ss_reg
: case cs_reg
:
5437 case ds_reg
: case fs_reg
: case gs_reg
:
5438 s
= names_seg
[code
- es_reg
+ add
];
5440 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5441 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5444 s
= names8rex
[code
- al_reg
+ add
];
5446 s
= names8
[code
- al_reg
];
5448 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5449 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5450 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5452 s
= names64
[code
- rAX_reg
+ add
];
5455 code
+= eAX_reg
- rAX_reg
;
5457 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5458 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5461 s
= names64
[code
- eAX_reg
+ add
];
5462 else if (sizeflag
& DFLAG
)
5463 s
= names32
[code
- eAX_reg
+ add
];
5465 s
= names16
[code
- eAX_reg
+ add
];
5466 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5469 s
= INTERNAL_DISASSEMBLER_ERROR
;
5476 OP_IMREG (int code
, int sizeflag
)
5488 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5489 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5490 s
= names16
[code
- ax_reg
];
5492 case es_reg
: case ss_reg
: case cs_reg
:
5493 case ds_reg
: case fs_reg
: case gs_reg
:
5494 s
= names_seg
[code
- es_reg
];
5496 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5497 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5500 s
= names8rex
[code
- al_reg
];
5502 s
= names8
[code
- al_reg
];
5504 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5505 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5508 s
= names64
[code
- eAX_reg
];
5509 else if (sizeflag
& DFLAG
)
5510 s
= names32
[code
- eAX_reg
];
5512 s
= names16
[code
- eAX_reg
];
5513 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5516 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5521 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5524 s
= INTERNAL_DISASSEMBLER_ERROR
;
5531 OP_I (int bytemode
, int sizeflag
)
5534 bfd_signed_vma mask
= -1;
5539 FETCH_DATA (the_info
, codep
+ 1);
5544 if (address_mode
== mode_64bit
)
5554 else if (sizeflag
& DFLAG
)
5564 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5575 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5580 scratchbuf
[0] = '$';
5581 print_operand_value (scratchbuf
+ 1, 1, op
);
5582 oappend (scratchbuf
+ intel_syntax
);
5583 scratchbuf
[0] = '\0';
5587 OP_I64 (int bytemode
, int sizeflag
)
5590 bfd_signed_vma mask
= -1;
5592 if (address_mode
!= mode_64bit
)
5594 OP_I (bytemode
, sizeflag
);
5601 FETCH_DATA (the_info
, codep
+ 1);
5609 else if (sizeflag
& DFLAG
)
5619 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5626 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5631 scratchbuf
[0] = '$';
5632 print_operand_value (scratchbuf
+ 1, 1, op
);
5633 oappend (scratchbuf
+ intel_syntax
);
5634 scratchbuf
[0] = '\0';
5638 OP_sI (int bytemode
, int sizeflag
)
5641 bfd_signed_vma mask
= -1;
5646 FETCH_DATA (the_info
, codep
+ 1);
5648 if ((op
& 0x80) != 0)
5656 else if (sizeflag
& DFLAG
)
5665 if ((op
& 0x8000) != 0)
5668 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5673 if ((op
& 0x8000) != 0)
5677 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5681 scratchbuf
[0] = '$';
5682 print_operand_value (scratchbuf
+ 1, 1, op
);
5683 oappend (scratchbuf
+ intel_syntax
);
5687 OP_J (int bytemode
, int sizeflag
)
5691 bfd_vma segment
= 0;
5696 FETCH_DATA (the_info
, codep
+ 1);
5698 if ((disp
& 0x80) != 0)
5702 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5707 if ((disp
& 0x8000) != 0)
5709 /* In 16bit mode, address is wrapped around at 64k within
5710 the same segment. Otherwise, a data16 prefix on a jump
5711 instruction means that the pc is masked to 16 bits after
5712 the displacement is added! */
5714 if ((prefixes
& PREFIX_DATA
) == 0)
5715 segment
= ((start_pc
+ codep
- start_codep
)
5716 & ~((bfd_vma
) 0xffff));
5718 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5721 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5724 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5726 print_operand_value (scratchbuf
, 1, disp
);
5727 oappend (scratchbuf
);
5731 OP_SEG (int bytemode
, int sizeflag
)
5733 if (bytemode
== w_mode
)
5734 oappend (names_seg
[modrm
.reg
]);
5736 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5740 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5744 if (sizeflag
& DFLAG
)
5754 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5756 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
5758 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
5759 oappend (scratchbuf
);
5763 OP_OFF (int bytemode
, int sizeflag
)
5767 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5768 intel_operand_size (bytemode
, sizeflag
);
5771 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5778 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5779 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5781 oappend (names_seg
[ds_reg
- es_reg
]);
5785 print_operand_value (scratchbuf
, 1, off
);
5786 oappend (scratchbuf
);
5790 OP_OFF64 (int bytemode
, int sizeflag
)
5794 if (address_mode
!= mode_64bit
5795 || (prefixes
& PREFIX_ADDR
))
5797 OP_OFF (bytemode
, sizeflag
);
5801 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5802 intel_operand_size (bytemode
, sizeflag
);
5809 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5810 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5812 oappend (names_seg
[ds_reg
- es_reg
]);
5816 print_operand_value (scratchbuf
, 1, off
);
5817 oappend (scratchbuf
);
5821 ptr_reg (int code
, int sizeflag
)
5825 *obufp
++ = open_char
;
5826 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5827 if (address_mode
== mode_64bit
)
5829 if (!(sizeflag
& AFLAG
))
5830 s
= names32
[code
- eAX_reg
];
5832 s
= names64
[code
- eAX_reg
];
5834 else if (sizeflag
& AFLAG
)
5835 s
= names32
[code
- eAX_reg
];
5837 s
= names16
[code
- eAX_reg
];
5839 *obufp
++ = close_char
;
5844 OP_ESreg (int code
, int sizeflag
)
5850 case 0x6d: /* insw/insl */
5851 intel_operand_size (z_mode
, sizeflag
);
5853 case 0xa5: /* movsw/movsl/movsq */
5854 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5855 case 0xab: /* stosw/stosl */
5856 case 0xaf: /* scasw/scasl */
5857 intel_operand_size (v_mode
, sizeflag
);
5860 intel_operand_size (b_mode
, sizeflag
);
5863 oappend ("%es:" + intel_syntax
);
5864 ptr_reg (code
, sizeflag
);
5868 OP_DSreg (int code
, int sizeflag
)
5874 case 0x6f: /* outsw/outsl */
5875 intel_operand_size (z_mode
, sizeflag
);
5877 case 0xa5: /* movsw/movsl/movsq */
5878 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5879 case 0xad: /* lodsw/lodsl/lodsq */
5880 intel_operand_size (v_mode
, sizeflag
);
5883 intel_operand_size (b_mode
, sizeflag
);
5893 prefixes
|= PREFIX_DS
;
5895 ptr_reg (code
, sizeflag
);
5899 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5907 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5910 used_prefixes
|= PREFIX_LOCK
;
5913 sprintf (scratchbuf
, "%%cr%d", modrm
.reg
+ add
);
5914 oappend (scratchbuf
+ intel_syntax
);
5918 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5925 sprintf (scratchbuf
, "db%d", modrm
.reg
+ add
);
5927 sprintf (scratchbuf
, "%%db%d", modrm
.reg
+ add
);
5928 oappend (scratchbuf
);
5932 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5934 sprintf (scratchbuf
, "%%tr%d", modrm
.reg
);
5935 oappend (scratchbuf
+ intel_syntax
);
5939 OP_R (int bytemode
, int sizeflag
)
5942 OP_E (bytemode
, sizeflag
);
5948 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5950 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5951 if (prefixes
& PREFIX_DATA
)
5957 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5960 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5961 oappend (scratchbuf
+ intel_syntax
);
5965 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5971 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5972 oappend (scratchbuf
+ intel_syntax
);
5976 OP_EM (int bytemode
, int sizeflag
)
5980 if (intel_syntax
&& bytemode
== v_mode
)
5982 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5983 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5985 OP_E (bytemode
, sizeflag
);
5989 /* Skip mod/rm byte. */
5992 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5993 if (prefixes
& PREFIX_DATA
)
6000 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
6003 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
6004 oappend (scratchbuf
+ intel_syntax
);
6007 /* cvt* are the only instructions in sse2 which have
6008 both SSE and MMX operands and also have 0x66 prefix
6009 in their opcode. 0x66 was originally used to differentiate
6010 between SSE and MMX instruction(operands). So we have to handle the
6011 cvt* separately using OP_EMC and OP_MXC */
6013 OP_EMC (int bytemode
, int sizeflag
)
6017 if (intel_syntax
&& bytemode
== v_mode
)
6019 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
6020 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6022 OP_E (bytemode
, sizeflag
);
6026 /* Skip mod/rm byte. */
6029 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6030 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
6031 oappend (scratchbuf
+ intel_syntax
);
6035 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6037 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6038 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
6039 oappend (scratchbuf
+ intel_syntax
);
6043 OP_EX (int bytemode
, int sizeflag
)
6048 OP_E (bytemode
, sizeflag
);
6055 /* Skip mod/rm byte. */
6058 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
6059 oappend (scratchbuf
+ intel_syntax
);
6063 OP_MS (int bytemode
, int sizeflag
)
6066 OP_EM (bytemode
, sizeflag
);
6072 OP_XS (int bytemode
, int sizeflag
)
6075 OP_EX (bytemode
, sizeflag
);
6081 OP_M (int bytemode
, int sizeflag
)
6084 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6087 OP_E (bytemode
, sizeflag
);
6091 OP_0f07 (int bytemode
, int sizeflag
)
6093 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
6096 OP_E (bytemode
, sizeflag
);
6099 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6100 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6103 NOP_Fixup1 (int bytemode
, int sizeflag
)
6105 if ((prefixes
& PREFIX_DATA
) != 0
6108 && address_mode
== mode_64bit
))
6109 OP_REG (bytemode
, sizeflag
);
6111 strcpy (obuf
, "nop");
6115 NOP_Fixup2 (int bytemode
, int sizeflag
)
6117 if ((prefixes
& PREFIX_DATA
) != 0
6120 && address_mode
== mode_64bit
))
6121 OP_IMREG (bytemode
, sizeflag
);
6124 static const char *const Suffix3DNow
[] = {
6125 /* 00 */ NULL
, NULL
, NULL
, NULL
,
6126 /* 04 */ NULL
, NULL
, NULL
, NULL
,
6127 /* 08 */ NULL
, NULL
, NULL
, NULL
,
6128 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
6129 /* 10 */ NULL
, NULL
, NULL
, NULL
,
6130 /* 14 */ NULL
, NULL
, NULL
, NULL
,
6131 /* 18 */ NULL
, NULL
, NULL
, NULL
,
6132 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
6133 /* 20 */ NULL
, NULL
, NULL
, NULL
,
6134 /* 24 */ NULL
, NULL
, NULL
, NULL
,
6135 /* 28 */ NULL
, NULL
, NULL
, NULL
,
6136 /* 2C */ NULL
, NULL
, NULL
, NULL
,
6137 /* 30 */ NULL
, NULL
, NULL
, NULL
,
6138 /* 34 */ NULL
, NULL
, NULL
, NULL
,
6139 /* 38 */ NULL
, NULL
, NULL
, NULL
,
6140 /* 3C */ NULL
, NULL
, NULL
, NULL
,
6141 /* 40 */ NULL
, NULL
, NULL
, NULL
,
6142 /* 44 */ NULL
, NULL
, NULL
, NULL
,
6143 /* 48 */ NULL
, NULL
, NULL
, NULL
,
6144 /* 4C */ NULL
, NULL
, NULL
, NULL
,
6145 /* 50 */ NULL
, NULL
, NULL
, NULL
,
6146 /* 54 */ NULL
, NULL
, NULL
, NULL
,
6147 /* 58 */ NULL
, NULL
, NULL
, NULL
,
6148 /* 5C */ NULL
, NULL
, NULL
, NULL
,
6149 /* 60 */ NULL
, NULL
, NULL
, NULL
,
6150 /* 64 */ NULL
, NULL
, NULL
, NULL
,
6151 /* 68 */ NULL
, NULL
, NULL
, NULL
,
6152 /* 6C */ NULL
, NULL
, NULL
, NULL
,
6153 /* 70 */ NULL
, NULL
, NULL
, NULL
,
6154 /* 74 */ NULL
, NULL
, NULL
, NULL
,
6155 /* 78 */ NULL
, NULL
, NULL
, NULL
,
6156 /* 7C */ NULL
, NULL
, NULL
, NULL
,
6157 /* 80 */ NULL
, NULL
, NULL
, NULL
,
6158 /* 84 */ NULL
, NULL
, NULL
, NULL
,
6159 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
6160 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
6161 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
6162 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
6163 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
6164 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
6165 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
6166 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
6167 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
6168 /* AC */ NULL
, NULL
, "pfacc", NULL
,
6169 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
6170 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
6171 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
6172 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
6173 /* C0 */ NULL
, NULL
, NULL
, NULL
,
6174 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6175 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6176 /* CC */ NULL
, NULL
, NULL
, NULL
,
6177 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6178 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6179 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6180 /* DC */ NULL
, NULL
, NULL
, NULL
,
6181 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6182 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6183 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6184 /* EC */ NULL
, NULL
, NULL
, NULL
,
6185 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6186 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6187 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6188 /* FC */ NULL
, NULL
, NULL
, NULL
,
6192 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6194 const char *mnemonic
;
6196 FETCH_DATA (the_info
, codep
+ 1);
6197 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6198 place where an 8-bit immediate would normally go. ie. the last
6199 byte of the instruction. */
6200 obufp
= obuf
+ strlen (obuf
);
6201 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6206 /* Since a variable sized modrm/sib chunk is between the start
6207 of the opcode (0x0f0f) and the opcode suffix, we need to do
6208 all the modrm processing first, and don't know until now that
6209 we have a bad opcode. This necessitates some cleaning up. */
6210 op_out
[0][0] = '\0';
6211 op_out
[1][0] = '\0';
6216 static const char *simd_cmp_op
[] = {
6228 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6230 unsigned int cmp_type
;
6232 FETCH_DATA (the_info
, codep
+ 1);
6233 obufp
= obuf
+ strlen (obuf
);
6234 cmp_type
= *codep
++ & 0xff;
6237 char suffix1
= 'p', suffix2
= 's';
6238 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6239 if (prefixes
& PREFIX_REPZ
)
6243 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6244 if (prefixes
& PREFIX_DATA
)
6248 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6249 if (prefixes
& PREFIX_REPNZ
)
6250 suffix1
= 's', suffix2
= 'd';
6253 sprintf (scratchbuf
, "cmp%s%c%c",
6254 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6255 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6256 oappend (scratchbuf
);
6260 /* We have a bad extension byte. Clean up. */
6261 op_out
[0][0] = '\0';
6262 op_out
[1][0] = '\0';
6268 OP_Mwait (int bytemode ATTRIBUTE_UNUSED
,
6269 int sizeflag ATTRIBUTE_UNUSED
)
6271 /* mwait %eax,%ecx */
6274 const char **names
= (address_mode
== mode_64bit
6275 ? names64
: names32
);
6276 strcpy (op_out
[0], names
[0]);
6277 strcpy (op_out
[1], names
[1]);
6280 /* Skip mod/rm byte. */
6286 OP_Monitor (int bytemode ATTRIBUTE_UNUSED
,
6287 int sizeflag ATTRIBUTE_UNUSED
)
6289 /* monitor %eax,%ecx,%edx" */
6292 const char **op1_names
;
6293 const char **names
= (address_mode
== mode_64bit
6294 ? names64
: names32
);
6296 if (!(prefixes
& PREFIX_ADDR
))
6297 op1_names
= (address_mode
== mode_16bit
6301 /* Remove "addr16/addr32". */
6303 op1_names
= (address_mode
!= mode_32bit
6304 ? names32
: names16
);
6305 used_prefixes
|= PREFIX_ADDR
;
6307 strcpy (op_out
[0], op1_names
[0]);
6308 strcpy (op_out
[1], names
[1]);
6309 strcpy (op_out
[2], names
[2]);
6312 /* Skip mod/rm byte. */
6320 /* Throw away prefixes and 1st. opcode byte. */
6321 codep
= insn_codep
+ 1;
6326 REP_Fixup (int bytemode
, int sizeflag
)
6328 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6330 if (prefixes
& PREFIX_REPZ
)
6331 repz_prefix
= "rep ";
6338 OP_IMREG (bytemode
, sizeflag
);
6341 OP_ESreg (bytemode
, sizeflag
);
6344 OP_DSreg (bytemode
, sizeflag
);
6353 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6358 /* Change cmpxchg8b to cmpxchg16b. */
6359 char *p
= obuf
+ strlen (obuf
) - 2;
6363 OP_M (bytemode
, sizeflag
);
6367 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6369 sprintf (scratchbuf
, "%%xmm%d", reg
);
6370 oappend (scratchbuf
+ intel_syntax
);
6374 CRC32_Fixup (int bytemode
, int sizeflag
)
6376 /* Add proper suffix to "crc32". */
6377 char *p
= obuf
+ strlen (obuf
);
6394 else if (sizeflag
& DFLAG
)
6398 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6401 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6410 /* Skip mod/rm byte. */
6415 add
= (rex
& REX_B
) ? 8 : 0;
6416 if (bytemode
== b_mode
)
6420 oappend (names8rex
[modrm
.rm
+ add
]);
6422 oappend (names8
[modrm
.rm
+ add
]);
6428 oappend (names64
[modrm
.rm
+ add
]);
6429 else if ((prefixes
& PREFIX_DATA
))
6430 oappend (names16
[modrm
.rm
+ add
]);
6432 oappend (names32
[modrm
.rm
+ add
]);
6436 OP_E (bytemode
, sizeflag
);