1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 1997
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
28 * The main tables describing the instructions is essentially a copy
29 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
30 * Programmers Manual. Usually, there is a capital letter, followed
31 * by a small letter. The capital letter tell the addressing mode,
32 * and the small letter tells about the operand size. Refer to
33 * the Intel manual for details.
43 static int fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
47 /* Points to first byte not fetched. */
48 bfd_byte
*max_fetched
;
49 bfd_byte the_buffer
[MAXLEN
];
54 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
55 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
57 #define FETCH_DATA(info, addr) \
58 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
59 ? 1 : fetch_data ((info), (addr)))
62 fetch_data (info
, addr
)
63 struct disassemble_info
*info
;
67 struct dis_private
*priv
= (struct dis_private
*)info
->private_data
;
68 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
70 status
= (*info
->read_memory_func
) (start
,
72 addr
- priv
->max_fetched
,
76 (*info
->memory_error_func
) (status
, start
, info
);
77 longjmp (priv
->bailout
, 1);
80 priv
->max_fetched
= addr
;
84 #define Eb OP_E, b_mode
85 #define indirEb OP_indirE, b_mode
86 #define Gb OP_G, b_mode
87 #define Ev OP_E, v_mode
88 #define indirEv OP_indirE, v_mode
89 #define Ew OP_E, w_mode
90 #define Ma OP_E, v_mode
92 #define Mp OP_E, 0 /* ? */
93 #define Gv OP_G, v_mode
94 #define Gw OP_G, w_mode
95 #define Rw OP_rm, w_mode
96 #define Rd OP_rm, d_mode
97 #define Ib OP_I, b_mode
98 #define sIb OP_sI, b_mode /* sign extened byte */
99 #define Iv OP_I, v_mode
100 #define Iw OP_I, w_mode
101 #define Jb OP_J, b_mode
102 #define Jv OP_J, v_mode
104 #define ONE OP_ONE, 0
106 #define Cd OP_C, d_mode
107 #define Dd OP_D, d_mode
108 #define Td OP_T, d_mode
110 #define eAX OP_REG, eAX_reg
111 #define eBX OP_REG, eBX_reg
112 #define eCX OP_REG, eCX_reg
113 #define eDX OP_REG, eDX_reg
114 #define eSP OP_REG, eSP_reg
115 #define eBP OP_REG, eBP_reg
116 #define eSI OP_REG, eSI_reg
117 #define eDI OP_REG, eDI_reg
118 #define AL OP_REG, al_reg
119 #define CL OP_REG, cl_reg
120 #define DL OP_REG, dl_reg
121 #define BL OP_REG, bl_reg
122 #define AH OP_REG, ah_reg
123 #define CH OP_REG, ch_reg
124 #define DH OP_REG, dh_reg
125 #define BH OP_REG, bh_reg
126 #define AX OP_REG, ax_reg
127 #define DX OP_REG, dx_reg
128 #define indirDX OP_REG, indir_dx_reg
130 #define Sw OP_SEG, w_mode
131 #define Ap OP_DIR, lptr
132 #define Av OP_DIR, v_mode
133 #define Ob OP_OFF, b_mode
134 #define Ov OP_OFF, v_mode
135 #define Xb OP_DSSI, b_mode
136 #define Xv OP_DSSI, v_mode
137 #define Yb OP_ESDI, b_mode
138 #define Yv OP_ESDI, v_mode
140 #define es OP_REG, es_reg
141 #define ss OP_REG, ss_reg
142 #define cs OP_REG, cs_reg
143 #define ds OP_REG, ds_reg
144 #define fs OP_REG, fs_reg
145 #define gs OP_REG, gs_reg
147 typedef int (*op_rtn
) PARAMS ((int bytemode
, int aflag
, int dflag
));
149 static int OP_E
PARAMS ((int, int, int));
150 static int OP_G
PARAMS ((int, int, int));
151 static int OP_I
PARAMS ((int, int, int));
152 static int OP_indirE
PARAMS ((int, int, int));
153 static int OP_sI
PARAMS ((int, int, int));
154 static int OP_REG
PARAMS ((int, int, int));
155 static int OP_J
PARAMS ((int, int, int));
156 static int OP_DIR
PARAMS ((int, int, int));
157 static int OP_OFF
PARAMS ((int, int, int));
158 static int OP_ESDI
PARAMS ((int, int, int));
159 static int OP_DSSI
PARAMS ((int, int, int));
160 static int OP_SEG
PARAMS ((int, int, int));
161 static int OP_C
PARAMS ((int, int, int));
162 static int OP_D
PARAMS ((int, int, int));
163 static int OP_T
PARAMS ((int, int, int));
164 static int OP_rm
PARAMS ((int, int, int));
165 static int OP_ST
PARAMS ((int, int, int));
166 static int OP_STi
PARAMS ((int, int, int));
168 static int OP_ONE
PARAMS ((int, int, int));
171 static void append_prefix
PARAMS ((void));
172 static void set_op
PARAMS ((int op
));
173 static void putop
PARAMS ((char *template, int aflag
, int dflag
));
174 static void dofloat
PARAMS ((int aflag
, int dflag
));
175 static int get16
PARAMS ((void));
176 static int get32
PARAMS ((void));
177 static void ckprefix
PARAMS ((void));
219 #define indir_dx_reg 150
221 #define GRP1b NULL, NULL, 0
222 #define GRP1S NULL, NULL, 1
223 #define GRP1Ss NULL, NULL, 2
224 #define GRP2b NULL, NULL, 3
225 #define GRP2S NULL, NULL, 4
226 #define GRP2b_one NULL, NULL, 5
227 #define GRP2S_one NULL, NULL, 6
228 #define GRP2b_cl NULL, NULL, 7
229 #define GRP2S_cl NULL, NULL, 8
230 #define GRP3b NULL, NULL, 9
231 #define GRP3S NULL, NULL, 10
232 #define GRP4 NULL, NULL, 11
233 #define GRP5 NULL, NULL, 12
234 #define GRP6 NULL, NULL, 13
235 #define GRP7 NULL, NULL, 14
236 #define GRP8 NULL, NULL, 15
237 #define GRP9 NULL, NULL, 16
240 #define FLOAT NULL, NULL, FLOATCODE
252 static struct dis386 dis386
[] = {
270 { "(bad)" }, /* 0x0f extended opcode escape */
296 { "(bad)" }, /* SEG ES prefix */
305 { "(bad)" }, /* SEG CS prefix */
314 { "(bad)" }, /* SEG SS prefix */
323 { "(bad)" }, /* SEG DS prefix */
364 { "boundS", Gv
, Ma
},
366 { "(bad)" }, /* seg fs */
367 { "(bad)" }, /* seg gs */
368 { "(bad)" }, /* op size prefix */
369 { "(bad)" }, /* adr size prefix */
371 { "pushS", Iv
}, /* 386 book wrong */
372 { "imulS", Gv
, Ev
, Iv
},
373 { "pushl", sIb
}, /* push of byte really pushes 4 bytes */
374 { "imulS", Gv
, Ev
, Ib
},
375 { "insb", Yb
, indirDX
},
376 { "insS", Yv
, indirDX
},
377 { "outsb", indirDX
, Xb
},
378 { "outsS", indirDX
, Xv
},
417 { "xchgS", eCX
, eAX
},
418 { "xchgS", eDX
, eAX
},
419 { "xchgS", eBX
, eAX
},
420 { "xchgS", eSP
, eAX
},
421 { "xchgS", eBP
, eAX
},
422 { "xchgS", eSI
, eAX
},
423 { "xchgS", eDI
, eAX
},
428 { "(bad)" }, /* fwait */
444 { "testS", eAX
, Iv
},
446 { "stosS", Yv
, eAX
},
448 { "lodsS", eAX
, Xv
},
450 { "scasS", eAX
, Yv
},
519 { "inb", AL
, indirDX
},
520 { "inS", eAX
, indirDX
},
521 { "outb", indirDX
, AL
},
522 { "outS", indirDX
, eAX
},
524 { "(bad)" }, /* lock prefix */
526 { "(bad)" }, /* repne */
527 { "(bad)" }, /* repz */
543 static struct dis386 dis386_twobyte
[] = {
556 { "(bad)" }, { "ud2a" },
557 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
559 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
560 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
562 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
563 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
565 /* these are all backward in appendix A of the intel book */
575 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
576 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
578 { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" },
579 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
581 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
582 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
584 { "cmovo", Gv
,Ev
}, { "cmovno", Gv
,Ev
}, { "cmovb", Gv
,Ev
}, { "cmovae", Gv
,Ev
},
585 { "cmove", Gv
,Ev
}, { "cmovne", Gv
,Ev
}, { "cmovbe", Gv
,Ev
}, { "cmova", Gv
,Ev
},
587 { "cmovs", Gv
,Ev
}, { "cmovns", Gv
,Ev
}, { "cmovp", Gv
,Ev
}, { "cmovnp", Gv
,Ev
},
588 { "cmovl", Gv
,Ev
}, { "cmovge", Gv
,Ev
}, { "cmovle", Gv
,Ev
}, { "cmovg", Gv
,Ev
},
590 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
591 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
593 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
594 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
596 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
597 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
599 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
600 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
602 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
603 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
605 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
606 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
648 { "shldS", Ev
, Gv
, Ib
},
649 { "shldS", Ev
, Gv
, CL
},
657 { "shrdS", Ev
, Gv
, Ib
},
658 { "shrdS", Ev
, Gv
, CL
},
662 { "cmpxchgb", Eb
, Gb
},
663 { "cmpxchgS", Ev
, Gv
},
664 { "lssS", Gv
, Mp
}, /* 386 lists only Mp */
666 { "lfsS", Gv
, Mp
}, /* 386 lists only Mp */
667 { "lgsS", Gv
, Mp
}, /* 386 lists only Mp */
668 { "movzbS", Gv
, Eb
},
669 { "movzwS", Gv
, Ew
},
677 { "movsbS", Gv
, Eb
},
678 { "movswS", Gv
, Ew
},
698 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
699 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
701 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
702 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
704 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
705 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
707 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
708 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
710 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
711 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
713 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
714 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
717 static const unsigned char onebyte_has_modrm
[256] = {
718 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
719 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
720 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
721 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
722 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
723 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
724 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0,
725 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
726 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
727 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
728 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
729 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
730 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0,
731 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,
732 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
733 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1
736 static const unsigned char twobyte_has_modrm
[256] = {
737 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,
738 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
739 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,
740 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
741 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
742 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
743 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
744 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
745 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
746 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
747 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1,
748 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,
749 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,
750 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
751 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
752 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
755 static char obuf
[100];
757 static char scratchbuf
[100];
758 static unsigned char *start_codep
;
759 static unsigned char *codep
;
760 static disassemble_info
*the_info
;
764 static void oappend
PARAMS ((char *s
));
766 static char *names32
[]={
767 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
769 static char *names16
[] = {
770 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
772 static char *names8
[] = {
773 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
775 static char *names_seg
[] = {
776 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
778 static char *index16
[] = {
779 "bx+si","bx+di","bp+si","bp+di","si","di","bp","bx"
782 static struct dis386 grps
[][8] = {
900 { "imulS", eAX
, Ev
},
902 { "idivS", eAX
, Ev
},
920 { "lcall", indirEv
},
972 #define PREFIX_REPZ 1
973 #define PREFIX_REPNZ 2
974 #define PREFIX_LOCK 4
976 #define PREFIX_SS 0x10
977 #define PREFIX_DS 0x20
978 #define PREFIX_ES 0x40
979 #define PREFIX_FS 0x80
980 #define PREFIX_GS 0x100
981 #define PREFIX_DATA 0x200
982 #define PREFIX_ADR 0x400
983 #define PREFIX_FWAIT 0x800
993 FETCH_DATA (the_info
, codep
+ 1);
997 prefixes
|= PREFIX_REPZ
;
1000 prefixes
|= PREFIX_REPNZ
;
1003 prefixes
|= PREFIX_LOCK
;
1006 prefixes
|= PREFIX_CS
;
1009 prefixes
|= PREFIX_SS
;
1012 prefixes
|= PREFIX_DS
;
1015 prefixes
|= PREFIX_ES
;
1018 prefixes
|= PREFIX_FS
;
1021 prefixes
|= PREFIX_GS
;
1024 prefixes
|= PREFIX_DATA
;
1027 prefixes
|= PREFIX_ADR
;
1030 prefixes
|= PREFIX_FWAIT
;
1039 static char op1out
[100], op2out
[100], op3out
[100];
1040 static int op_address
[3], op_ad
, op_index
[3];
1041 static int start_pc
;
1045 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1046 * (see topic "Redundant prefixes" in the "Differences from 8086"
1047 * section of the "Virtual 8086 Mode" chapter.)
1048 * 'pc' should be the address of this instruction, it will
1049 * be used to print the target address if this is a relative jump or call
1050 * The function returns the length of this instruction in bytes.
1053 int print_insn_x86
PARAMS ((bfd_vma pc
, disassemble_info
*info
, int aflag
,
1056 print_insn_i386 (pc
, info
)
1058 disassemble_info
*info
;
1060 if (info
->mach
== bfd_mach_i386_i386
)
1061 return print_insn_x86 (pc
, info
, 1, 1);
1062 else if (info
->mach
== bfd_mach_i386_i8086
)
1063 return print_insn_x86 (pc
, info
, 0, 0);
1069 print_insn_x86 (pc
, info
, aflag
, dflag
)
1071 disassemble_info
*info
;
1075 int enter_instruction
;
1076 char *first
, *second
, *third
;
1078 unsigned char need_modrm
;
1080 struct dis_private priv
;
1081 bfd_byte
*inbuf
= priv
.the_buffer
;
1083 /* The output looks better if we put 5 bytes on a line, since that
1084 puts long word instructions on a single line. */
1085 info
->bytes_per_line
= 5;
1087 info
->private_data
= (PTR
) &priv
;
1088 priv
.max_fetched
= priv
.the_buffer
;
1089 priv
.insn_start
= pc
;
1090 if (setjmp (priv
.bailout
) != 0)
1099 op_index
[0] = op_index
[1] = op_index
[2] = -1;
1103 start_codep
= inbuf
;
1108 FETCH_DATA (info
, codep
+ 1);
1110 enter_instruction
= 1;
1112 enter_instruction
= 0;
1116 if (prefixes
& PREFIX_REPZ
)
1118 if (prefixes
& PREFIX_REPNZ
)
1120 if (prefixes
& PREFIX_LOCK
)
1123 if ((prefixes
& PREFIX_FWAIT
)
1124 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
1126 /* fwait not followed by floating point instruction */
1127 (*info
->fprintf_func
) (info
->stream
, "fwait");
1131 if (prefixes
& PREFIX_DATA
)
1134 if (prefixes
& PREFIX_ADR
)
1137 oappend ("addr16 ");
1142 FETCH_DATA (info
, codep
+ 2);
1143 dp
= &dis386_twobyte
[*++codep
];
1144 need_modrm
= twobyte_has_modrm
[*codep
];
1148 dp
= &dis386
[*codep
];
1149 need_modrm
= onebyte_has_modrm
[*codep
];
1155 FETCH_DATA (info
, codep
+ 1);
1156 mod
= (*codep
>> 6) & 3;
1157 reg
= (*codep
>> 3) & 7;
1161 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
1163 dofloat (aflag
, dflag
);
1167 if (dp
->name
== NULL
)
1168 dp
= &grps
[dp
->bytemode1
][reg
];
1170 putop (dp
->name
, aflag
, dflag
);
1175 (*dp
->op1
)(dp
->bytemode1
, aflag
, dflag
);
1180 (*dp
->op2
)(dp
->bytemode2
, aflag
, dflag
);
1185 (*dp
->op3
)(dp
->bytemode3
, aflag
, dflag
);
1188 obufp
= obuf
+ strlen (obuf
);
1189 for (i
= strlen (obuf
); i
< 6; i
++)
1192 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
1194 /* enter instruction is printed with operands in the
1195 * same order as the intel book; everything else
1196 * is printed in reverse order
1198 if (enter_instruction
)
1203 op_ad
= op_index
[0];
1204 op_index
[0] = op_index
[2];
1205 op_index
[2] = op_ad
;
1216 if (op_index
[0] != -1)
1217 (*info
->print_address_func
) (op_address
[op_index
[0]], info
);
1219 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
1225 (*info
->fprintf_func
) (info
->stream
, ",");
1226 if (op_index
[1] != -1)
1227 (*info
->print_address_func
) (op_address
[op_index
[1]], info
);
1229 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
1235 (*info
->fprintf_func
) (info
->stream
, ",");
1236 if (op_index
[2] != -1)
1237 (*info
->print_address_func
) (op_address
[op_index
[2]], info
);
1239 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
1241 return (codep
- inbuf
);
1244 static char *float_mem
[] = {
1320 #define STi OP_STi, 0
1322 #define FGRPd9_2 NULL, NULL, 0
1323 #define FGRPd9_4 NULL, NULL, 1
1324 #define FGRPd9_5 NULL, NULL, 2
1325 #define FGRPd9_6 NULL, NULL, 3
1326 #define FGRPd9_7 NULL, NULL, 4
1327 #define FGRPda_5 NULL, NULL, 5
1328 #define FGRPdb_4 NULL, NULL, 6
1329 #define FGRPde_3 NULL, NULL, 7
1330 #define FGRPdf_4 NULL, NULL, 8
1332 static struct dis386 float_reg
[][8] = {
1335 { "fadd", ST
, STi
},
1336 { "fmul", ST
, STi
},
1339 { "fsub", ST
, STi
},
1340 { "fsubr", ST
, STi
},
1341 { "fdiv", ST
, STi
},
1342 { "fdivr", ST
, STi
},
1357 { "fcmovb", ST
, STi
},
1358 { "fcmove", ST
, STi
},
1359 { "fcmovbe",ST
, STi
},
1360 { "fcmovu", ST
, STi
},
1368 { "fcmovnb",ST
, STi
},
1369 { "fcmovne",ST
, STi
},
1370 { "fcmovnbe",ST
, STi
},
1371 { "fcmovnu",ST
, STi
},
1373 { "fucomi", ST
, STi
},
1374 { "fcomi", ST
, STi
},
1379 { "fadd", STi
, ST
},
1380 { "fmul", STi
, ST
},
1383 { "fsub", STi
, ST
},
1384 { "fsubr", STi
, ST
},
1385 { "fdiv", STi
, ST
},
1386 { "fdivr", STi
, ST
},
1401 { "faddp", STi
, ST
},
1402 { "fmulp", STi
, ST
},
1405 { "fsubp", STi
, ST
},
1406 { "fsubrp", STi
, ST
},
1407 { "fdivp", STi
, ST
},
1408 { "fdivrp", STi
, ST
},
1417 { "fucomip",ST
, STi
},
1418 { "fcomip", ST
, STi
},
1424 static char *fgrps
[][8] = {
1427 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1432 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1437 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1442 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1447 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1452 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1457 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1458 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1463 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1468 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1473 dofloat (aflag
, dflag
)
1478 unsigned char floatop
;
1480 floatop
= codep
[-1];
1484 putop (float_mem
[(floatop
- 0xd8) * 8 + reg
], aflag
, dflag
);
1486 OP_E (v_mode
, aflag
, dflag
);
1491 dp
= &float_reg
[floatop
- 0xd8][reg
];
1492 if (dp
->name
== NULL
)
1494 putop (fgrps
[dp
->bytemode1
][rm
], aflag
, dflag
);
1495 /* instruction fnstsw is only one with strange arg */
1497 && FETCH_DATA (the_info
, codep
+ 1)
1499 strcpy (op1out
, "%eax");
1503 putop (dp
->name
, aflag
, dflag
);
1506 (*dp
->op1
)(dp
->bytemode1
, aflag
, dflag
);
1509 (*dp
->op2
)(dp
->bytemode2
, aflag
, dflag
);
1515 OP_ST (ignore
, aflag
, dflag
)
1526 OP_STi (ignore
, aflag
, dflag
)
1531 sprintf (scratchbuf
, "%%st(%d)", rm
);
1532 oappend (scratchbuf
);
1537 /* capital letters in template are macros */
1539 putop (template, aflag
, dflag
)
1546 for (p
= template; *p
; p
++)
1553 case 'C': /* For jcxz/jecxz */
1558 if ((prefixes
& PREFIX_FWAIT
) == 0)
1562 /* operand size flag */
1578 obufp
+= strlen (s
);
1585 if (prefixes
& PREFIX_CS
)
1587 if (prefixes
& PREFIX_DS
)
1589 if (prefixes
& PREFIX_SS
)
1591 if (prefixes
& PREFIX_ES
)
1593 if (prefixes
& PREFIX_FS
)
1595 if (prefixes
& PREFIX_GS
)
1600 OP_indirE (bytemode
, aflag
, dflag
)
1606 return OP_E (bytemode
, aflag
, dflag
);
1610 OP_E (bytemode
, aflag
, dflag
)
1617 /* skip mod/rm byte */
1625 oappend (names8
[rm
]);
1628 oappend (names16
[rm
]);
1632 oappend (names32
[rm
]);
1634 oappend (names16
[rm
]);
1637 oappend ("<bad dis table>");
1646 if (aflag
) /* 32 bit address mode */
1661 FETCH_DATA (the_info
, codep
+ 1);
1662 scale
= (*codep
>> 6) & 3;
1663 index
= (*codep
>> 3) & 7;
1678 FETCH_DATA (the_info
, codep
+ 1);
1679 disp
= *(char *)codep
++;
1686 if (mod
!= 0 || base
== 5)
1688 sprintf (scratchbuf
, "0x%x", disp
);
1689 oappend (scratchbuf
);
1692 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
1696 oappend (names32
[base
]);
1701 sprintf (scratchbuf
, ",%s", names32
[index
]);
1702 oappend (scratchbuf
);
1704 sprintf (scratchbuf
, ",%d", 1 << scale
);
1705 oappend (scratchbuf
);
1711 { /* 16 bit address mode */
1716 disp
= (short) get16 ();
1719 FETCH_DATA (the_info
, codep
+ 1);
1720 disp
= *(char *)codep
++;
1723 disp
= (short) get16 ();
1727 if (mod
!= 0 || rm
== 6)
1729 sprintf (scratchbuf
, "0x%x", disp
);
1730 oappend (scratchbuf
);
1733 if (mod
!= 0 || rm
!= 6)
1736 oappend (index16
[rm
]);
1744 OP_G (bytemode
, aflag
, dflag
)
1752 oappend (names8
[reg
]);
1755 oappend (names16
[reg
]);
1758 oappend (names32
[reg
]);
1762 oappend (names32
[reg
]);
1764 oappend (names16
[reg
]);
1767 oappend ("<internal disassembler error>");
1778 FETCH_DATA (the_info
, codep
+ 4);
1779 x
= *codep
++ & 0xff;
1780 x
|= (*codep
++ & 0xff) << 8;
1781 x
|= (*codep
++ & 0xff) << 16;
1782 x
|= (*codep
++ & 0xff) << 24;
1791 FETCH_DATA (the_info
, codep
+ 2);
1792 x
= *codep
++ & 0xff;
1793 x
|= (*codep
++ & 0xff) << 8;
1801 op_index
[op_ad
] = op_ad
;
1802 op_address
[op_ad
] = op
;
1806 OP_REG (code
, aflag
, dflag
)
1815 case indir_dx_reg
: s
= "(%dx)"; break;
1816 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
1817 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
1818 s
= names16
[code
- ax_reg
];
1820 case es_reg
: case ss_reg
: case cs_reg
:
1821 case ds_reg
: case fs_reg
: case gs_reg
:
1822 s
= names_seg
[code
- es_reg
];
1824 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
1825 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
1826 s
= names8
[code
- al_reg
];
1828 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
1829 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
1831 s
= names32
[code
- eAX_reg
];
1833 s
= names16
[code
- eAX_reg
];
1836 s
= "<internal disassembler error>";
1844 OP_I (bytemode
, aflag
, dflag
)
1854 FETCH_DATA (the_info
, codep
+ 1);
1855 op
= *codep
++ & 0xff;
1867 oappend ("<internal disassembler error>");
1870 sprintf (scratchbuf
, "$0x%x", op
);
1871 oappend (scratchbuf
);
1876 OP_sI (bytemode
, aflag
, dflag
)
1886 FETCH_DATA (the_info
, codep
+ 1);
1887 op
= *(char *)codep
++;
1893 op
= (short)get16();
1896 op
= (short)get16 ();
1899 oappend ("<internal disassembler error>");
1902 sprintf (scratchbuf
, "$0x%x", op
);
1903 oappend (scratchbuf
);
1908 OP_J (bytemode
, aflag
, dflag
)
1919 FETCH_DATA (the_info
, codep
+ 1);
1920 disp
= *(char *)codep
++;
1927 disp
= (short)get16 ();
1928 /* for some reason, a data16 prefix on a jump instruction
1929 means that the pc is masked to 16 bits after the
1930 displacement is added! */
1935 oappend ("<internal disassembler error>");
1938 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
1940 sprintf (scratchbuf
, "0x%x", disp
);
1941 oappend (scratchbuf
);
1947 OP_SEG (dummy
, aflag
, dflag
)
1952 static char *sreg
[] = {
1953 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
1956 oappend (sreg
[reg
]);
1961 OP_DIR (size
, aflag
, dflag
)
1981 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
1982 oappend (scratchbuf
);
1988 offset
= (short)get16 ();
1990 offset
= start_pc
+ codep
- start_codep
+ offset
;
1992 sprintf (scratchbuf
, "0x%x", offset
);
1993 oappend (scratchbuf
);
1996 oappend ("<internal disassembler error>");
2004 OP_OFF (bytemode
, aflag
, dflag
)
2018 sprintf (scratchbuf
, "0x%x", off
);
2019 oappend (scratchbuf
);
2025 OP_ESDI (dummy
, aflag
, dflag
)
2031 oappend (aflag
? "%edi" : "%di");
2038 OP_DSSI (dummy
, aflag
, dflag
)
2044 oappend (aflag
? "%esi" : "%si");
2054 OP_ONE (dummy
, aflag
, dflag
)
2067 OP_C (dummy
, aflag
, dflag
)
2072 codep
++; /* skip mod/rm */
2073 sprintf (scratchbuf
, "%%cr%d", reg
);
2074 oappend (scratchbuf
);
2080 OP_D (dummy
, aflag
, dflag
)
2085 codep
++; /* skip mod/rm */
2086 sprintf (scratchbuf
, "%%db%d", reg
);
2087 oappend (scratchbuf
);
2093 OP_T (dummy
, aflag
, dflag
)
2098 codep
++; /* skip mod/rm */
2099 sprintf (scratchbuf
, "%%tr%d", reg
);
2100 oappend (scratchbuf
);
2105 OP_rm (bytemode
, aflag
, dflag
)
2113 oappend (names32
[rm
]);
2116 oappend (names16
[rm
]);
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