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Fix bug 3000
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "dis-asm.h"
35 #include "sysdep.h"
36 #include "opintl.h"
37
38 #define MAXLEN 15
39
40 #include <setjmp.h>
41
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
46 #endif
47
48 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma, disassemble_info *);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_EMC (int,int);
89 static void OP_MXC (int,int);
90 static void OP_MS (int, int);
91 static void OP_XS (int, int);
92 static void OP_M (int, int);
93 static void OP_VMX (int, int);
94 static void OP_0fae (int, int);
95 static void OP_0f07 (int, int);
96 static void NOP_Fixup1 (int, int);
97 static void NOP_Fixup2 (int, int);
98 static void OP_3DNowSuffix (int, int);
99 static void OP_SIMD_Suffix (int, int);
100 static void SIMD_Fixup (int, int);
101 static void PNI_Fixup (int, int);
102 static void SVME_Fixup (int, int);
103 static void INVLPG_Fixup (int, int);
104 static void BadOp (void);
105 static void SEG_Fixup (int, int);
106 static void VMX_Fixup (int, int);
107 static void REP_Fixup (int, int);
108
109 struct dis_private {
110 /* Points to first byte not fetched. */
111 bfd_byte *max_fetched;
112 bfd_byte the_buffer[MAXLEN];
113 bfd_vma insn_start;
114 int orig_sizeflag;
115 jmp_buf bailout;
116 };
117
118 /* The opcode for the fwait instruction, which we treat as a prefix
119 when we can. */
120 #define FWAIT_OPCODE (0x9b)
121
122 enum address_mode
123 {
124 mode_16bit,
125 mode_32bit,
126 mode_64bit
127 };
128
129 enum address_mode address_mode;
130
131 /* Flags for the prefixes for the current instruction. See below. */
132 static int prefixes;
133
134 /* REX prefix the current instruction. See below. */
135 static int rex;
136 /* Bits of REX we've already used. */
137 static int rex_used;
138 #define REX_MODE64 8
139 #define REX_EXTX 4
140 #define REX_EXTY 2
141 #define REX_EXTZ 1
142 /* Mark parts used in the REX prefix. When we are testing for
143 empty prefix (for 8bit register REX extension), just mask it
144 out. Otherwise test for REX bit is excuse for existence of REX
145 only in case value is nonzero. */
146 #define USED_REX(value) \
147 { \
148 if (value) \
149 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
150 else \
151 rex_used |= 0x40; \
152 }
153
154 /* Flags for prefixes which we somehow handled when printing the
155 current instruction. */
156 static int used_prefixes;
157
158 /* Flags stored in PREFIXES. */
159 #define PREFIX_REPZ 1
160 #define PREFIX_REPNZ 2
161 #define PREFIX_LOCK 4
162 #define PREFIX_CS 8
163 #define PREFIX_SS 0x10
164 #define PREFIX_DS 0x20
165 #define PREFIX_ES 0x40
166 #define PREFIX_FS 0x80
167 #define PREFIX_GS 0x100
168 #define PREFIX_DATA 0x200
169 #define PREFIX_ADDR 0x400
170 #define PREFIX_FWAIT 0x800
171
172 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
173 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
174 on error. */
175 #define FETCH_DATA(info, addr) \
176 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
177 ? 1 : fetch_data ((info), (addr)))
178
179 static int
180 fetch_data (struct disassemble_info *info, bfd_byte *addr)
181 {
182 int status;
183 struct dis_private *priv = (struct dis_private *) info->private_data;
184 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
185
186 if (addr <= priv->the_buffer + MAXLEN)
187 status = (*info->read_memory_func) (start,
188 priv->max_fetched,
189 addr - priv->max_fetched,
190 info);
191 else
192 status = -1;
193 if (status != 0)
194 {
195 /* If we did manage to read at least one byte, then
196 print_insn_i386 will do something sensible. Otherwise, print
197 an error. We do that here because this is where we know
198 STATUS. */
199 if (priv->max_fetched == priv->the_buffer)
200 (*info->memory_error_func) (status, start, info);
201 longjmp (priv->bailout, 1);
202 }
203 else
204 priv->max_fetched = addr;
205 return 1;
206 }
207
208 #define XX NULL, 0
209
210 #define Eb OP_E, b_mode
211 #define Ev OP_E, v_mode
212 #define Ed OP_E, d_mode
213 #define Eq OP_E, q_mode
214 #define Edq OP_E, dq_mode
215 #define Edqw OP_E, dqw_mode
216 #define indirEv OP_indirE, stack_v_mode
217 #define indirEp OP_indirE, f_mode
218 #define stackEv OP_E, stack_v_mode
219 #define Em OP_E, m_mode
220 #define Ew OP_E, w_mode
221 #define Ma OP_E, v_mode
222 #define M OP_M, 0 /* lea, lgdt, etc. */
223 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
224 #define Gb OP_G, b_mode
225 #define Gv OP_G, v_mode
226 #define Gd OP_G, d_mode
227 #define Gdq OP_G, dq_mode
228 #define Gm OP_G, m_mode
229 #define Gw OP_G, w_mode
230 #define Rd OP_Rd, d_mode
231 #define Rm OP_Rd, m_mode
232 #define Ib OP_I, b_mode
233 #define sIb OP_sI, b_mode /* sign extened byte */
234 #define Iv OP_I, v_mode
235 #define Iq OP_I, q_mode
236 #define Iv64 OP_I64, v_mode
237 #define Iw OP_I, w_mode
238 #define I1 OP_I, const_1_mode
239 #define Jb OP_J, b_mode
240 #define Jv OP_J, v_mode
241 #define Cm OP_C, m_mode
242 #define Dm OP_D, m_mode
243 #define Td OP_T, d_mode
244 #define Sv SEG_Fixup, v_mode
245
246 #define RMeAX OP_REG, eAX_reg
247 #define RMeBX OP_REG, eBX_reg
248 #define RMeCX OP_REG, eCX_reg
249 #define RMeDX OP_REG, eDX_reg
250 #define RMeSP OP_REG, eSP_reg
251 #define RMeBP OP_REG, eBP_reg
252 #define RMeSI OP_REG, eSI_reg
253 #define RMeDI OP_REG, eDI_reg
254 #define RMrAX OP_REG, rAX_reg
255 #define RMrBX OP_REG, rBX_reg
256 #define RMrCX OP_REG, rCX_reg
257 #define RMrDX OP_REG, rDX_reg
258 #define RMrSP OP_REG, rSP_reg
259 #define RMrBP OP_REG, rBP_reg
260 #define RMrSI OP_REG, rSI_reg
261 #define RMrDI OP_REG, rDI_reg
262 #define RMAL OP_REG, al_reg
263 #define RMAL OP_REG, al_reg
264 #define RMCL OP_REG, cl_reg
265 #define RMDL OP_REG, dl_reg
266 #define RMBL OP_REG, bl_reg
267 #define RMAH OP_REG, ah_reg
268 #define RMCH OP_REG, ch_reg
269 #define RMDH OP_REG, dh_reg
270 #define RMBH OP_REG, bh_reg
271 #define RMAX OP_REG, ax_reg
272 #define RMDX OP_REG, dx_reg
273
274 #define eAX OP_IMREG, eAX_reg
275 #define eBX OP_IMREG, eBX_reg
276 #define eCX OP_IMREG, eCX_reg
277 #define eDX OP_IMREG, eDX_reg
278 #define eSP OP_IMREG, eSP_reg
279 #define eBP OP_IMREG, eBP_reg
280 #define eSI OP_IMREG, eSI_reg
281 #define eDI OP_IMREG, eDI_reg
282 #define AL OP_IMREG, al_reg
283 #define CL OP_IMREG, cl_reg
284 #define DL OP_IMREG, dl_reg
285 #define BL OP_IMREG, bl_reg
286 #define AH OP_IMREG, ah_reg
287 #define CH OP_IMREG, ch_reg
288 #define DH OP_IMREG, dh_reg
289 #define BH OP_IMREG, bh_reg
290 #define AX OP_IMREG, ax_reg
291 #define DX OP_IMREG, dx_reg
292 #define indirDX OP_IMREG, indir_dx_reg
293
294 #define Sw OP_SEG, w_mode
295 #define Ap OP_DIR, 0
296 #define Ob OP_OFF64, b_mode
297 #define Ov OP_OFF64, v_mode
298 #define Xb OP_DSreg, eSI_reg
299 #define Xv OP_DSreg, eSI_reg
300 #define Yb OP_ESreg, eDI_reg
301 #define Yv OP_ESreg, eDI_reg
302 #define DSBX OP_DSreg, eBX_reg
303
304 #define es OP_REG, es_reg
305 #define ss OP_REG, ss_reg
306 #define cs OP_REG, cs_reg
307 #define ds OP_REG, ds_reg
308 #define fs OP_REG, fs_reg
309 #define gs OP_REG, gs_reg
310
311 #define MX OP_MMX, 0
312 #define XM OP_XMM, 0
313 #define EM OP_EM, v_mode
314 #define EX OP_EX, v_mode
315 #define MS OP_MS, v_mode
316 #define XS OP_XS, v_mode
317 #define EMC OP_EMC, v_mode
318 #define MXC OP_MXC, 0
319 #define VM OP_VMX, q_mode
320 #define OPSUF OP_3DNowSuffix, 0
321 #define OPSIMD OP_SIMD_Suffix, 0
322
323 /* Used handle "rep" prefix for string instructions. */
324 #define Xbr REP_Fixup, eSI_reg
325 #define Xvr REP_Fixup, eSI_reg
326 #define Ybr REP_Fixup, eDI_reg
327 #define Yvr REP_Fixup, eDI_reg
328 #define indirDXr REP_Fixup, indir_dx_reg
329 #define ALr REP_Fixup, al_reg
330 #define eAXr REP_Fixup, eAX_reg
331
332 #define cond_jump_flag NULL, cond_jump_mode
333 #define loop_jcxz_flag NULL, loop_jcxz_mode
334
335 /* bits in sizeflag */
336 #define SUFFIX_ALWAYS 4
337 #define AFLAG 2
338 #define DFLAG 1
339
340 #define b_mode 1 /* byte operand */
341 #define v_mode 2 /* operand size depends on prefixes */
342 #define w_mode 3 /* word operand */
343 #define d_mode 4 /* double word operand */
344 #define q_mode 5 /* quad word operand */
345 #define t_mode 6 /* ten-byte operand */
346 #define x_mode 7 /* 16-byte XMM operand */
347 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
348 #define cond_jump_mode 9
349 #define loop_jcxz_mode 10
350 #define dq_mode 11 /* operand size depends on REX prefixes. */
351 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
352 #define f_mode 13 /* 4- or 6-byte pointer operand */
353 #define const_1_mode 14
354 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
355
356 #define es_reg 100
357 #define cs_reg 101
358 #define ss_reg 102
359 #define ds_reg 103
360 #define fs_reg 104
361 #define gs_reg 105
362
363 #define eAX_reg 108
364 #define eCX_reg 109
365 #define eDX_reg 110
366 #define eBX_reg 111
367 #define eSP_reg 112
368 #define eBP_reg 113
369 #define eSI_reg 114
370 #define eDI_reg 115
371
372 #define al_reg 116
373 #define cl_reg 117
374 #define dl_reg 118
375 #define bl_reg 119
376 #define ah_reg 120
377 #define ch_reg 121
378 #define dh_reg 122
379 #define bh_reg 123
380
381 #define ax_reg 124
382 #define cx_reg 125
383 #define dx_reg 126
384 #define bx_reg 127
385 #define sp_reg 128
386 #define bp_reg 129
387 #define si_reg 130
388 #define di_reg 131
389
390 #define rAX_reg 132
391 #define rCX_reg 133
392 #define rDX_reg 134
393 #define rBX_reg 135
394 #define rSP_reg 136
395 #define rBP_reg 137
396 #define rSI_reg 138
397 #define rDI_reg 139
398
399 #define indir_dx_reg 150
400
401 #define FLOATCODE 1
402 #define USE_GROUPS 2
403 #define USE_PREFIX_USER_TABLE 3
404 #define X86_64_SPECIAL 4
405 #define IS_3BYTE_OPCODE 5
406
407 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
408
409 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
410 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
411 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
412 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
413 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
414 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
415 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
416 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
417 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
418 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
419 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
420 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
421 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
422 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
423 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
424 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
425 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
426 #define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
427 #define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
428 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
429 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
430 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
431 #define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
432 #define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
433 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
434 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
435 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
436
437 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
438 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
439 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
440 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
441 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
442 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
443 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
444 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
445 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
446 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
447 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
448 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
449 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
450 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
451 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
452 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
453 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
454 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
455 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
456 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
457 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
458 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
459 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
460 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
461 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
462 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
463 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
464 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
465 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
466 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
467 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
468 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
469 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
470 #define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
471 #define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
472 #define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
473 #define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
474
475 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
476
477 #define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
478 #define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
479
480 typedef void (*op_rtn) (int bytemode, int sizeflag);
481
482 struct dis386 {
483 const char *name;
484 op_rtn op1;
485 int bytemode1;
486 op_rtn op2;
487 int bytemode2;
488 op_rtn op3;
489 int bytemode3;
490 op_rtn op4;
491 int bytemode4;
492 };
493
494 /* Upper case letters in the instruction names here are macros.
495 'A' => print 'b' if no register operands or suffix_always is true
496 'B' => print 'b' if suffix_always is true
497 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
498 . size prefix
499 'E' => print 'e' if 32-bit form of jcxz
500 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
501 'H' => print ",pt" or ",pn" branch hint
502 'I' => honor following macro letter even in Intel mode (implemented only
503 . for some of the macro letters)
504 'J' => print 'l'
505 'L' => print 'l' if suffix_always is true
506 'N' => print 'n' if instruction has no wait "prefix"
507 'O' => print 'd', or 'o'
508 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
509 . or suffix_always is true. print 'q' if rex prefix is present.
510 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
511 . is true
512 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
513 'S' => print 'w', 'l' or 'q' if suffix_always is true
514 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
515 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
516 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
517 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
518 'X' => print 's', 'd' depending on data16 prefix (for XMM)
519 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
520 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
521
522 Many of the above letters print nothing in Intel mode. See "putop"
523 for the details.
524
525 Braces '{' and '}', and vertical bars '|', indicate alternative
526 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
527 modes. In cases where there are only two alternatives, the X86_64
528 instruction is reserved, and "(bad)" is printed.
529 */
530
531 static const struct dis386 dis386[] = {
532 /* 00 */
533 { "addB", Eb, Gb, XX, XX },
534 { "addS", Ev, Gv, XX, XX },
535 { "addB", Gb, Eb, XX, XX },
536 { "addS", Gv, Ev, XX, XX },
537 { "addB", AL, Ib, XX, XX },
538 { "addS", eAX, Iv, XX, XX },
539 { "push{T|}", es, XX, XX, XX },
540 { "pop{T|}", es, XX, XX, XX },
541 /* 08 */
542 { "orB", Eb, Gb, XX, XX },
543 { "orS", Ev, Gv, XX, XX },
544 { "orB", Gb, Eb, XX, XX },
545 { "orS", Gv, Ev, XX , XX},
546 { "orB", AL, Ib, XX, XX },
547 { "orS", eAX, Iv, XX, XX },
548 { "push{T|}", cs, XX, XX, XX },
549 { "(bad)", XX, XX, XX, XX }, /* 0x0f extended opcode escape */
550 /* 10 */
551 { "adcB", Eb, Gb, XX, XX },
552 { "adcS", Ev, Gv, XX, XX },
553 { "adcB", Gb, Eb, XX, XX },
554 { "adcS", Gv, Ev, XX, XX },
555 { "adcB", AL, Ib, XX, XX },
556 { "adcS", eAX, Iv, XX, XX },
557 { "push{T|}", ss, XX, XX, XX },
558 { "pop{T|}", ss, XX, XX, XX },
559 /* 18 */
560 { "sbbB", Eb, Gb, XX, XX },
561 { "sbbS", Ev, Gv, XX, XX },
562 { "sbbB", Gb, Eb, XX, XX },
563 { "sbbS", Gv, Ev, XX, XX },
564 { "sbbB", AL, Ib, XX, XX },
565 { "sbbS", eAX, Iv, XX, XX },
566 { "push{T|}", ds, XX, XX, XX },
567 { "pop{T|}", ds, XX, XX, XX },
568 /* 20 */
569 { "andB", Eb, Gb, XX, XX },
570 { "andS", Ev, Gv, XX, XX },
571 { "andB", Gb, Eb, XX, XX },
572 { "andS", Gv, Ev, XX, XX },
573 { "andB", AL, Ib, XX, XX },
574 { "andS", eAX, Iv, XX, XX },
575 { "(bad)", XX, XX, XX, XX }, /* SEG ES prefix */
576 { "daa{|}", XX, XX, XX, XX },
577 /* 28 */
578 { "subB", Eb, Gb, XX, XX },
579 { "subS", Ev, Gv, XX, XX},
580 { "subB", Gb, Eb, XX, XX },
581 { "subS", Gv, Ev, XX, XX },
582 { "subB", AL, Ib, XX, XX },
583 { "subS", eAX, Iv, XX, XX },
584 { "(bad)", XX, XX, XX, XX }, /* SEG CS prefix */
585 { "das{|}", XX, XX, XX, XX },
586 /* 30 */
587 { "xorB", Eb, Gb, XX, XX },
588 { "xorS", Ev, Gv, XX, XX },
589 { "xorB", Gb, Eb, XX, XX },
590 { "xorS", Gv, Ev, XX, XX },
591 { "xorB", AL, Ib, XX, XX },
592 { "xorS", eAX, Iv, XX, XX },
593 { "(bad)", XX, XX, XX, XX }, /* SEG SS prefix */
594 { "aaa{|}", XX, XX, XX, XX },
595 /* 38 */
596 { "cmpB", Eb, Gb, XX, XX },
597 { "cmpS", Ev, Gv, XX, XX },
598 { "cmpB", Gb, Eb, XX, XX },
599 { "cmpS", Gv, Ev, XX, XX },
600 { "cmpB", AL, Ib, XX, XX },
601 { "cmpS", eAX, Iv, XX, XX },
602 { "(bad)", XX, XX, XX, XX }, /* SEG DS prefix */
603 { "aas{|}", XX, XX, XX, XX },
604 /* 40 */
605 { "inc{S|}", RMeAX, XX, XX, XX },
606 { "inc{S|}", RMeCX, XX, XX, XX },
607 { "inc{S|}", RMeDX, XX, XX, XX },
608 { "inc{S|}", RMeBX, XX, XX, XX },
609 { "inc{S|}", RMeSP, XX, XX, XX },
610 { "inc{S|}", RMeBP, XX, XX, XX },
611 { "inc{S|}", RMeSI, XX, XX, XX },
612 { "inc{S|}", RMeDI, XX, XX, XX },
613 /* 48 */
614 { "dec{S|}", RMeAX, XX, XX, XX },
615 { "dec{S|}", RMeCX, XX, XX, XX },
616 { "dec{S|}", RMeDX, XX, XX, XX },
617 { "dec{S|}", RMeBX, XX, XX, XX },
618 { "dec{S|}", RMeSP, XX, XX, XX },
619 { "dec{S|}", RMeBP, XX, XX, XX },
620 { "dec{S|}", RMeSI, XX, XX, XX },
621 { "dec{S|}", RMeDI, XX, XX, XX },
622 /* 50 */
623 { "pushV", RMrAX, XX, XX, XX },
624 { "pushV", RMrCX, XX, XX, XX },
625 { "pushV", RMrDX, XX, XX, XX },
626 { "pushV", RMrBX, XX, XX, XX },
627 { "pushV", RMrSP, XX, XX, XX },
628 { "pushV", RMrBP, XX, XX, XX },
629 { "pushV", RMrSI, XX, XX, XX },
630 { "pushV", RMrDI, XX, XX, XX },
631 /* 58 */
632 { "popV", RMrAX, XX, XX, XX },
633 { "popV", RMrCX, XX, XX, XX },
634 { "popV", RMrDX, XX, XX, XX },
635 { "popV", RMrBX, XX, XX, XX },
636 { "popV", RMrSP, XX, XX, XX },
637 { "popV", RMrBP, XX, XX, XX },
638 { "popV", RMrSI, XX, XX, XX },
639 { "popV", RMrDI, XX, XX, XX },
640 /* 60 */
641 { "pusha{P|}", XX, XX, XX, XX},
642 { "popa{P|}", XX, XX, XX, XX },
643 { "bound{S|}", Gv, Ma, XX, XX },
644 { X86_64_0 },
645 { "(bad)", XX, XX, XX, XX }, /* seg fs */
646 { "(bad)", XX, XX, XX, XX }, /* seg gs */
647 { "(bad)", XX, XX, XX, XX }, /* op size prefix */
648 { "(bad)", XX, XX, XX, XX }, /* adr size prefix */
649 /* 68 */
650 { "pushT", Iq, XX, XX, XX },
651 { "imulS", Gv, Ev, Iv, XX },
652 { "pushT", sIb, XX, XX, XX },
653 { "imulS", Gv, Ev, sIb, XX },
654 { "ins{b||b|}", Ybr, indirDX, XX, XX },
655 { "ins{R||R|}", Yvr, indirDX, XX, XX },
656 { "outs{b||b|}", indirDXr, Xb, XX, XX },
657 { "outs{R||R|}", indirDXr, Xv, XX, XX },
658 /* 70 */
659 { "joH", Jb, XX, cond_jump_flag, XX },
660 { "jnoH", Jb, XX, cond_jump_flag, XX },
661 { "jbH", Jb, XX, cond_jump_flag, XX },
662 { "jaeH", Jb, XX, cond_jump_flag, XX },
663 { "jeH", Jb, XX, cond_jump_flag, XX },
664 { "jneH", Jb, XX, cond_jump_flag, XX },
665 { "jbeH", Jb, XX, cond_jump_flag, XX },
666 { "jaH", Jb, XX, cond_jump_flag, XX },
667 /* 78 */
668 { "jsH", Jb, XX, cond_jump_flag, XX },
669 { "jnsH", Jb, XX, cond_jump_flag, XX },
670 { "jpH", Jb, XX, cond_jump_flag, XX },
671 { "jnpH", Jb, XX, cond_jump_flag, XX },
672 { "jlH", Jb, XX, cond_jump_flag, XX },
673 { "jgeH", Jb, XX, cond_jump_flag, XX },
674 { "jleH", Jb, XX, cond_jump_flag, XX },
675 { "jgH", Jb, XX, cond_jump_flag, XX },
676 /* 80 */
677 { GRP1b },
678 { GRP1S },
679 { "(bad)", XX, XX, XX, XX },
680 { GRP1Ss },
681 { "testB", Eb, Gb, XX, XX },
682 { "testS", Ev, Gv, XX, XX },
683 { "xchgB", Eb, Gb, XX, XX },
684 { "xchgS", Ev, Gv, XX, XX },
685 /* 88 */
686 { "movB", Eb, Gb, XX, XX },
687 { "movS", Ev, Gv, XX, XX },
688 { "movB", Gb, Eb, XX, XX },
689 { "movS", Gv, Ev, XX, XX },
690 { "movQ", Sv, Sw, XX, XX },
691 { "leaS", Gv, M, XX, XX },
692 { "movQ", Sw, Sv, XX, XX },
693 { "popU", stackEv, XX, XX, XX },
694 /* 90 */
695 { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX, XX },
696 { "xchgS", RMeCX, eAX, XX, XX },
697 { "xchgS", RMeDX, eAX, XX, XX },
698 { "xchgS", RMeBX, eAX, XX, XX },
699 { "xchgS", RMeSP, eAX, XX, XX },
700 { "xchgS", RMeBP, eAX, XX, XX },
701 { "xchgS", RMeSI, eAX, XX, XX },
702 { "xchgS", RMeDI, eAX, XX, XX },
703 /* 98 */
704 { "cW{tR||tR|}", XX, XX, XX, XX },
705 { "cR{tO||tO|}", XX, XX, XX, XX },
706 { "Jcall{T|}", Ap, XX, XX, XX },
707 { "(bad)", XX, XX, XX, XX }, /* fwait */
708 { "pushfT", XX, XX, XX, XX },
709 { "popfT", XX, XX, XX, XX },
710 { "sahf{|}", XX, XX, XX, XX },
711 { "lahf{|}", XX, XX, XX, XX },
712 /* a0 */
713 { "movB", AL, Ob, XX, XX },
714 { "movS", eAX, Ov, XX, XX },
715 { "movB", Ob, AL, XX, XX },
716 { "movS", Ov, eAX, XX, XX },
717 { "movs{b||b|}", Ybr, Xb, XX, XX },
718 { "movs{R||R|}", Yvr, Xv, XX, XX },
719 { "cmps{b||b|}", Xb, Yb, XX, XX },
720 { "cmps{R||R|}", Xv, Yv, XX, XX },
721 /* a8 */
722 { "testB", AL, Ib, XX, XX },
723 { "testS", eAX, Iv, XX, XX },
724 { "stosB", Ybr, AL, XX, XX },
725 { "stosS", Yvr, eAX, XX, XX },
726 { "lodsB", ALr, Xb, XX, XX },
727 { "lodsS", eAXr, Xv, XX, XX },
728 { "scasB", AL, Yb, XX, XX },
729 { "scasS", eAX, Yv, XX, XX },
730 /* b0 */
731 { "movB", RMAL, Ib, XX, XX },
732 { "movB", RMCL, Ib, XX, XX },
733 { "movB", RMDL, Ib, XX, XX },
734 { "movB", RMBL, Ib, XX, XX },
735 { "movB", RMAH, Ib, XX, XX },
736 { "movB", RMCH, Ib, XX, XX },
737 { "movB", RMDH, Ib, XX, XX },
738 { "movB", RMBH, Ib, XX, XX },
739 /* b8 */
740 { "movS", RMeAX, Iv64, XX, XX },
741 { "movS", RMeCX, Iv64, XX, XX },
742 { "movS", RMeDX, Iv64, XX, XX },
743 { "movS", RMeBX, Iv64, XX, XX },
744 { "movS", RMeSP, Iv64, XX, XX },
745 { "movS", RMeBP, Iv64, XX, XX },
746 { "movS", RMeSI, Iv64, XX, XX },
747 { "movS", RMeDI, Iv64, XX, XX },
748 /* c0 */
749 { GRP2b },
750 { GRP2S },
751 { "retT", Iw, XX, XX, XX },
752 { "retT", XX, XX, XX, XX },
753 { "les{S|}", Gv, Mp, XX, XX },
754 { "ldsS", Gv, Mp, XX, XX },
755 { GRP11_C6 },
756 { GRP11_C7 },
757 /* c8 */
758 { "enterT", Iw, Ib, XX, XX },
759 { "leaveT", XX, XX, XX, XX },
760 { "lretP", Iw, XX, XX, XX },
761 { "lretP", XX, XX, XX, XX },
762 { "int3", XX, XX, XX, XX },
763 { "int", Ib, XX, XX, XX },
764 { "into{|}", XX, XX, XX, XX },
765 { "iretP", XX, XX, XX, XX },
766 /* d0 */
767 { GRP2b_one },
768 { GRP2S_one },
769 { GRP2b_cl },
770 { GRP2S_cl },
771 { "aam{|}", sIb, XX, XX, XX },
772 { "aad{|}", sIb, XX, XX, XX },
773 { "(bad)", XX, XX, XX, XX },
774 { "xlat", DSBX, XX, XX, XX },
775 /* d8 */
776 { FLOAT },
777 { FLOAT },
778 { FLOAT },
779 { FLOAT },
780 { FLOAT },
781 { FLOAT },
782 { FLOAT },
783 { FLOAT },
784 /* e0 */
785 { "loopneFH", Jb, XX, loop_jcxz_flag, XX },
786 { "loopeFH", Jb, XX, loop_jcxz_flag, XX },
787 { "loopFH", Jb, XX, loop_jcxz_flag, XX },
788 { "jEcxzH", Jb, XX, loop_jcxz_flag, XX },
789 { "inB", AL, Ib, XX, XX },
790 { "inS", eAX, Ib, XX, XX },
791 { "outB", Ib, AL, XX, XX },
792 { "outS", Ib, eAX, XX, XX },
793 /* e8 */
794 { "callT", Jv, XX, XX, XX },
795 { "jmpT", Jv, XX, XX, XX },
796 { "Jjmp{T|}", Ap, XX, XX, XX },
797 { "jmp", Jb, XX, XX, XX },
798 { "inB", AL, indirDX, XX, XX },
799 { "inS", eAX, indirDX, XX, XX },
800 { "outB", indirDX, AL, XX, XX },
801 { "outS", indirDX, eAX, XX, XX },
802 /* f0 */
803 { "(bad)", XX, XX, XX, XX }, /* lock prefix */
804 { "icebp", XX, XX, XX, XX },
805 { "(bad)", XX, XX, XX, XX }, /* repne */
806 { "(bad)", XX, XX, XX, XX }, /* repz */
807 { "hlt", XX, XX, XX, XX },
808 { "cmc", XX, XX, XX, XX },
809 { GRP3b },
810 { GRP3S },
811 /* f8 */
812 { "clc", XX, XX, XX, XX },
813 { "stc", XX, XX, XX, XX },
814 { "cli", XX, XX, XX, XX },
815 { "sti", XX, XX, XX, XX },
816 { "cld", XX, XX, XX, XX },
817 { "std", XX, XX, XX, XX },
818 { GRP4 },
819 { GRP5 },
820 };
821
822 static const struct dis386 dis386_twobyte[] = {
823 /* 00 */
824 { GRP6 },
825 { GRP7 },
826 { "larS", Gv, Ew, XX, XX },
827 { "lslS", Gv, Ew, XX, XX },
828 { "(bad)", XX, XX, XX, XX },
829 { "syscall", XX, XX, XX, XX },
830 { "clts", XX, XX, XX, XX },
831 { "sysretP", XX, XX, XX, XX },
832 /* 08 */
833 { "invd", XX, XX, XX, XX},
834 { "wbinvd", XX, XX, XX, XX },
835 { "(bad)", XX, XX, XX, XX },
836 { "ud2a", XX, XX, XX, XX },
837 { "(bad)", XX, XX, XX, XX },
838 { GRPAMD },
839 { "femms", XX, XX, XX, XX },
840 { "", MX, EM, OPSUF, XX }, /* See OP_3DNowSuffix. */
841 /* 10 */
842 { PREGRP8 },
843 { PREGRP9 },
844 { PREGRP30 },
845 { "movlpX", EX, XM, SIMD_Fixup, 'h', XX },
846 { "unpcklpX", XM, EX, XX, XX },
847 { "unpckhpX", XM, EX, XX, XX },
848 { PREGRP31 },
849 { "movhpX", EX, XM, SIMD_Fixup, 'l', XX },
850 /* 18 */
851 { GRP16 },
852 { "(bad)", XX, XX, XX, XX },
853 { "(bad)", XX, XX, XX, XX },
854 { "(bad)", XX, XX, XX, XX },
855 { "(bad)", XX, XX, XX, XX },
856 { "(bad)", XX, XX, XX, XX },
857 { "(bad)", XX, XX, XX, XX },
858 { "nopQ", Ev, XX, XX, XX },
859 /* 20 */
860 { "movZ", Rm, Cm, XX, XX },
861 { "movZ", Rm, Dm, XX, XX },
862 { "movZ", Cm, Rm, XX, XX },
863 { "movZ", Dm, Rm, XX, XX },
864 { "movL", Rd, Td, XX, XX },
865 { "(bad)", XX, XX, XX, XX },
866 { "movL", Td, Rd, XX, XX },
867 { "(bad)", XX, XX, XX, XX },
868 /* 28 */
869 { "movapX", XM, EX, XX, XX },
870 { "movapX", EX, XM, XX, XX },
871 { PREGRP2 },
872 { PREGRP33 },
873 { PREGRP4 },
874 { PREGRP3 },
875 { "ucomisX", XM,EX, XX, XX },
876 { "comisX", XM,EX, XX, XX },
877 /* 30 */
878 { "wrmsr", XX, XX, XX, XX },
879 { "rdtsc", XX, XX, XX, XX },
880 { "rdmsr", XX, XX, XX, XX },
881 { "rdpmc", XX, XX, XX, XX },
882 { "sysenter", XX, XX, XX, XX },
883 { "sysexit", XX, XX, XX, XX },
884 { "(bad)", XX, XX, XX, XX },
885 { "(bad)", XX, XX, XX, XX },
886 /* 38 */
887 { THREE_BYTE_0 },
888 { "(bad)", XX, XX, XX, XX },
889 { THREE_BYTE_1 },
890 { "(bad)", XX, XX, XX, XX },
891 { "(bad)", XX, XX, XX, XX },
892 { "(bad)", XX, XX, XX, XX },
893 { "(bad)", XX, XX, XX, XX },
894 { "(bad)", XX, XX, XX, XX },
895 /* 40 */
896 { "cmovo", Gv, Ev, XX, XX },
897 { "cmovno", Gv, Ev, XX, XX },
898 { "cmovb", Gv, Ev, XX, XX },
899 { "cmovae", Gv, Ev, XX, XX },
900 { "cmove", Gv, Ev, XX, XX },
901 { "cmovne", Gv, Ev, XX, XX },
902 { "cmovbe", Gv, Ev, XX, XX },
903 { "cmova", Gv, Ev, XX, XX },
904 /* 48 */
905 { "cmovs", Gv, Ev, XX, XX },
906 { "cmovns", Gv, Ev, XX, XX },
907 { "cmovp", Gv, Ev, XX, XX },
908 { "cmovnp", Gv, Ev, XX, XX },
909 { "cmovl", Gv, Ev, XX, XX },
910 { "cmovge", Gv, Ev, XX, XX },
911 { "cmovle", Gv, Ev, XX, XX },
912 { "cmovg", Gv, Ev, XX, XX },
913 /* 50 */
914 { "movmskpX", Gdq, XS, XX, XX },
915 { PREGRP13 },
916 { PREGRP12 },
917 { PREGRP11 },
918 { "andpX", XM, EX, XX, XX },
919 { "andnpX", XM, EX, XX, XX },
920 { "orpX", XM, EX, XX, XX },
921 { "xorpX", XM, EX, XX, XX },
922 /* 58 */
923 { PREGRP0 },
924 { PREGRP10 },
925 { PREGRP17 },
926 { PREGRP16 },
927 { PREGRP14 },
928 { PREGRP7 },
929 { PREGRP5 },
930 { PREGRP6 },
931 /* 60 */
932 { "punpcklbw", MX, EM, XX, XX },
933 { "punpcklwd", MX, EM, XX, XX },
934 { "punpckldq", MX, EM, XX, XX },
935 { "packsswb", MX, EM, XX, XX },
936 { "pcmpgtb", MX, EM, XX, XX },
937 { "pcmpgtw", MX, EM, XX, XX },
938 { "pcmpgtd", MX, EM, XX, XX },
939 { "packuswb", MX, EM, XX, XX },
940 /* 68 */
941 { "punpckhbw", MX, EM, XX, XX },
942 { "punpckhwd", MX, EM, XX, XX },
943 { "punpckhdq", MX, EM, XX, XX },
944 { "packssdw", MX, EM, XX, XX },
945 { PREGRP26 },
946 { PREGRP24 },
947 { "movd", MX, Edq, XX, XX },
948 { PREGRP19 },
949 /* 70 */
950 { PREGRP22 },
951 { GRP12 },
952 { GRP13 },
953 { GRP14 },
954 { "pcmpeqb", MX, EM, XX, XX },
955 { "pcmpeqw", MX, EM, XX, XX },
956 { "pcmpeqd", MX, EM, XX, XX },
957 { "emms", XX, XX, XX, XX },
958 /* 78 */
959 { PREGRP34 },
960 { PREGRP35 },
961 { "(bad)", XX, XX, XX, XX },
962 { "(bad)", XX, XX, XX, XX },
963 { PREGRP28 },
964 { PREGRP29 },
965 { PREGRP23 },
966 { PREGRP20 },
967 /* 80 */
968 { "joH", Jv, XX, cond_jump_flag, XX },
969 { "jnoH", Jv, XX, cond_jump_flag, XX },
970 { "jbH", Jv, XX, cond_jump_flag, XX },
971 { "jaeH", Jv, XX, cond_jump_flag, XX },
972 { "jeH", Jv, XX, cond_jump_flag, XX },
973 { "jneH", Jv, XX, cond_jump_flag, XX },
974 { "jbeH", Jv, XX, cond_jump_flag, XX },
975 { "jaH", Jv, XX, cond_jump_flag, XX },
976 /* 88 */
977 { "jsH", Jv, XX, cond_jump_flag, XX },
978 { "jnsH", Jv, XX, cond_jump_flag, XX },
979 { "jpH", Jv, XX, cond_jump_flag, XX },
980 { "jnpH", Jv, XX, cond_jump_flag, XX },
981 { "jlH", Jv, XX, cond_jump_flag, XX },
982 { "jgeH", Jv, XX, cond_jump_flag, XX },
983 { "jleH", Jv, XX, cond_jump_flag, XX },
984 { "jgH", Jv, XX, cond_jump_flag, XX },
985 /* 90 */
986 { "seto", Eb, XX, XX, XX },
987 { "setno", Eb, XX, XX, XX },
988 { "setb", Eb, XX, XX, XX },
989 { "setae", Eb, XX, XX, XX },
990 { "sete", Eb, XX, XX, XX },
991 { "setne", Eb, XX, XX, XX },
992 { "setbe", Eb, XX, XX, XX },
993 { "seta", Eb, XX, XX, XX },
994 /* 98 */
995 { "sets", Eb, XX, XX, XX },
996 { "setns", Eb, XX, XX, XX },
997 { "setp", Eb, XX, XX, XX },
998 { "setnp", Eb, XX, XX, XX },
999 { "setl", Eb, XX, XX, XX },
1000 { "setge", Eb, XX, XX, XX },
1001 { "setle", Eb, XX, XX, XX },
1002 { "setg", Eb, XX, XX, XX },
1003 /* a0 */
1004 { "pushT", fs, XX, XX, XX },
1005 { "popT", fs, XX, XX, XX },
1006 { "cpuid", XX, XX, XX, XX },
1007 { "btS", Ev, Gv, XX, XX },
1008 { "shldS", Ev, Gv, Ib, XX },
1009 { "shldS", Ev, Gv, CL, XX },
1010 { GRPPADLCK2 },
1011 { GRPPADLCK1 },
1012 /* a8 */
1013 { "pushT", gs, XX, XX, XX },
1014 { "popT", gs, XX, XX, XX },
1015 { "rsm", XX, XX, XX, XX },
1016 { "btsS", Ev, Gv, XX, XX },
1017 { "shrdS", Ev, Gv, Ib, XX },
1018 { "shrdS", Ev, Gv, CL, XX },
1019 { GRP15 },
1020 { "imulS", Gv, Ev, XX, XX },
1021 /* b0 */
1022 { "cmpxchgB", Eb, Gb, XX, XX },
1023 { "cmpxchgS", Ev, Gv, XX, XX },
1024 { "lssS", Gv, Mp, XX, XX },
1025 { "btrS", Ev, Gv, XX, XX },
1026 { "lfsS", Gv, Mp, XX, XX },
1027 { "lgsS", Gv, Mp, XX, XX },
1028 { "movz{bR|x|bR|x}", Gv, Eb, XX, XX },
1029 { "movz{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movzww ! */
1030 /* b8 */
1031 { "popcntS", Gv, Ev, XX, XX },
1032 { "ud2b", XX, XX, XX, XX },
1033 { GRP8 },
1034 { "btcS", Ev, Gv, XX, XX },
1035 { "bsfS", Gv, Ev, XX, XX },
1036 { PREGRP36 },
1037 { "movs{bR|x|bR|x}", Gv, Eb, XX, XX },
1038 { "movs{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movsww ! */
1039 /* c0 */
1040 { "xaddB", Eb, Gb, XX, XX },
1041 { "xaddS", Ev, Gv, XX, XX },
1042 { PREGRP1 },
1043 { "movntiS", Ev, Gv, XX, XX },
1044 { "pinsrw", MX, Edqw, Ib, XX },
1045 { "pextrw", Gdq, MS, Ib, XX },
1046 { "shufpX", XM, EX, Ib, XX },
1047 { GRP9 },
1048 /* c8 */
1049 { "bswap", RMeAX, XX, XX, XX },
1050 { "bswap", RMeCX, XX, XX, XX },
1051 { "bswap", RMeDX, XX, XX, XX },
1052 { "bswap", RMeBX, XX, XX, XX },
1053 { "bswap", RMeSP, XX, XX, XX },
1054 { "bswap", RMeBP, XX, XX, XX },
1055 { "bswap", RMeSI, XX, XX, XX },
1056 { "bswap", RMeDI, XX, XX, XX },
1057 /* d0 */
1058 { PREGRP27 },
1059 { "psrlw", MX, EM, XX, XX },
1060 { "psrld", MX, EM, XX, XX },
1061 { "psrlq", MX, EM, XX, XX },
1062 { "paddq", MX, EM, XX, XX },
1063 { "pmullw", MX, EM, XX, XX },
1064 { PREGRP21 },
1065 { "pmovmskb", Gdq, MS, XX, XX },
1066 /* d8 */
1067 { "psubusb", MX, EM, XX, XX },
1068 { "psubusw", MX, EM, XX, XX },
1069 { "pminub", MX, EM, XX, XX },
1070 { "pand", MX, EM, XX, XX },
1071 { "paddusb", MX, EM, XX, XX },
1072 { "paddusw", MX, EM, XX, XX },
1073 { "pmaxub", MX, EM, XX, XX },
1074 { "pandn", MX, EM, XX, XX },
1075 /* e0 */
1076 { "pavgb", MX, EM, XX, XX },
1077 { "psraw", MX, EM, XX, XX },
1078 { "psrad", MX, EM, XX, XX },
1079 { "pavgw", MX, EM, XX, XX },
1080 { "pmulhuw", MX, EM, XX, XX },
1081 { "pmulhw", MX, EM, XX, XX },
1082 { PREGRP15 },
1083 { PREGRP25 },
1084 /* e8 */
1085 { "psubsb", MX, EM, XX, XX },
1086 { "psubsw", MX, EM, XX, XX },
1087 { "pminsw", MX, EM, XX, XX },
1088 { "por", MX, EM, XX, XX },
1089 { "paddsb", MX, EM, XX, XX },
1090 { "paddsw", MX, EM, XX, XX },
1091 { "pmaxsw", MX, EM, XX, XX },
1092 { "pxor", MX, EM, XX, XX },
1093 /* f0 */
1094 { PREGRP32 },
1095 { "psllw", MX, EM, XX, XX },
1096 { "pslld", MX, EM, XX, XX },
1097 { "psllq", MX, EM, XX, XX },
1098 { "pmuludq", MX, EM, XX, XX },
1099 { "pmaddwd", MX, EM, XX, XX },
1100 { "psadbw", MX, EM, XX, XX },
1101 { PREGRP18 },
1102 /* f8 */
1103 { "psubb", MX, EM, XX, XX },
1104 { "psubw", MX, EM, XX, XX },
1105 { "psubd", MX, EM, XX, XX },
1106 { "psubq", MX, EM, XX, XX },
1107 { "paddb", MX, EM, XX, XX },
1108 { "paddw", MX, EM, XX, XX },
1109 { "paddd", MX, EM, XX, XX },
1110 { "(bad)", XX, XX, XX, XX }
1111 };
1112
1113 static const unsigned char onebyte_has_modrm[256] = {
1114 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1115 /* ------------------------------- */
1116 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1117 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1118 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1119 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1120 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1121 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1122 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1123 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1124 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1125 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1126 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1127 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1128 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1129 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1130 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1131 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1132 /* ------------------------------- */
1133 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1134 };
1135
1136 static const unsigned char twobyte_has_modrm[256] = {
1137 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1138 /* ------------------------------- */
1139 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1140 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1141 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1142 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1143 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1144 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1145 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1146 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1147 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1148 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1149 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1150 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1151 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1152 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1153 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1154 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1155 /* ------------------------------- */
1156 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1157 };
1158
1159 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1160 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1161 /* ------------------------------- */
1162 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1163 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1164 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1165 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1166 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1167 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1168 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1169 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1170 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1171 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1172 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1173 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1174 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1175 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1176 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1177 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1178 /* ------------------------------- */
1179 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1180 };
1181
1182 static char obuf[100];
1183 static char *obufp;
1184 static char scratchbuf[100];
1185 static unsigned char *start_codep;
1186 static unsigned char *insn_codep;
1187 static unsigned char *codep;
1188 static disassemble_info *the_info;
1189 static int mod;
1190 static int rm;
1191 static int reg;
1192 static unsigned char need_modrm;
1193
1194 /* If we are accessing mod/rm/reg without need_modrm set, then the
1195 values are stale. Hitting this abort likely indicates that you
1196 need to update onebyte_has_modrm or twobyte_has_modrm. */
1197 #define MODRM_CHECK if (!need_modrm) abort ()
1198
1199 static const char **names64;
1200 static const char **names32;
1201 static const char **names16;
1202 static const char **names8;
1203 static const char **names8rex;
1204 static const char **names_seg;
1205 static const char **index16;
1206
1207 static const char *intel_names64[] = {
1208 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1209 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1210 };
1211 static const char *intel_names32[] = {
1212 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1213 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1214 };
1215 static const char *intel_names16[] = {
1216 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1217 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1218 };
1219 static const char *intel_names8[] = {
1220 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1221 };
1222 static const char *intel_names8rex[] = {
1223 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1224 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1225 };
1226 static const char *intel_names_seg[] = {
1227 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1228 };
1229 static const char *intel_index16[] = {
1230 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1231 };
1232
1233 static const char *att_names64[] = {
1234 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1235 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1236 };
1237 static const char *att_names32[] = {
1238 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1239 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1240 };
1241 static const char *att_names16[] = {
1242 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1243 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1244 };
1245 static const char *att_names8[] = {
1246 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1247 };
1248 static const char *att_names8rex[] = {
1249 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1250 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1251 };
1252 static const char *att_names_seg[] = {
1253 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1254 };
1255 static const char *att_index16[] = {
1256 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1257 };
1258
1259 static const struct dis386 grps[][8] = {
1260 /* GRP1b */
1261 {
1262 { "addA", Eb, Ib, XX, XX },
1263 { "orA", Eb, Ib, XX, XX },
1264 { "adcA", Eb, Ib, XX, XX },
1265 { "sbbA", Eb, Ib, XX, XX },
1266 { "andA", Eb, Ib, XX, XX },
1267 { "subA", Eb, Ib, XX, XX },
1268 { "xorA", Eb, Ib, XX, XX },
1269 { "cmpA", Eb, Ib, XX, XX }
1270 },
1271 /* GRP1S */
1272 {
1273 { "addQ", Ev, Iv, XX, XX },
1274 { "orQ", Ev, Iv, XX, XX },
1275 { "adcQ", Ev, Iv, XX, XX },
1276 { "sbbQ", Ev, Iv, XX, XX },
1277 { "andQ", Ev, Iv, XX, XX },
1278 { "subQ", Ev, Iv, XX, XX },
1279 { "xorQ", Ev, Iv, XX, XX },
1280 { "cmpQ", Ev, Iv, XX, XX }
1281 },
1282 /* GRP1Ss */
1283 {
1284 { "addQ", Ev, sIb, XX, XX },
1285 { "orQ", Ev, sIb, XX, XX },
1286 { "adcQ", Ev, sIb, XX, XX },
1287 { "sbbQ", Ev, sIb, XX, XX },
1288 { "andQ", Ev, sIb, XX, XX },
1289 { "subQ", Ev, sIb, XX, XX },
1290 { "xorQ", Ev, sIb, XX, XX },
1291 { "cmpQ", Ev, sIb, XX, XX }
1292 },
1293 /* GRP2b */
1294 {
1295 { "rolA", Eb, Ib, XX, XX },
1296 { "rorA", Eb, Ib, XX, XX },
1297 { "rclA", Eb, Ib, XX, XX },
1298 { "rcrA", Eb, Ib, XX, XX },
1299 { "shlA", Eb, Ib, XX, XX },
1300 { "shrA", Eb, Ib, XX, XX },
1301 { "(bad)", XX, XX, XX, XX },
1302 { "sarA", Eb, Ib, XX, XX },
1303 },
1304 /* GRP2S */
1305 {
1306 { "rolQ", Ev, Ib, XX, XX },
1307 { "rorQ", Ev, Ib, XX, XX },
1308 { "rclQ", Ev, Ib, XX, XX },
1309 { "rcrQ", Ev, Ib, XX, XX },
1310 { "shlQ", Ev, Ib, XX, XX },
1311 { "shrQ", Ev, Ib, XX, XX },
1312 { "(bad)", XX, XX, XX, XX },
1313 { "sarQ", Ev, Ib, XX, XX },
1314 },
1315 /* GRP2b_one */
1316 {
1317 { "rolA", Eb, I1, XX, XX },
1318 { "rorA", Eb, I1, XX, XX },
1319 { "rclA", Eb, I1, XX, XX },
1320 { "rcrA", Eb, I1, XX, XX },
1321 { "shlA", Eb, I1, XX, XX },
1322 { "shrA", Eb, I1, XX, XX },
1323 { "(bad)", XX, XX, XX, XX },
1324 { "sarA", Eb, I1, XX, XX },
1325 },
1326 /* GRP2S_one */
1327 {
1328 { "rolQ", Ev, I1, XX, XX },
1329 { "rorQ", Ev, I1, XX, XX },
1330 { "rclQ", Ev, I1, XX, XX },
1331 { "rcrQ", Ev, I1, XX, XX },
1332 { "shlQ", Ev, I1, XX, XX },
1333 { "shrQ", Ev, I1, XX, XX },
1334 { "(bad)", XX, XX, XX, XX },
1335 { "sarQ", Ev, I1, XX, XX },
1336 },
1337 /* GRP2b_cl */
1338 {
1339 { "rolA", Eb, CL, XX, XX },
1340 { "rorA", Eb, CL, XX, XX },
1341 { "rclA", Eb, CL, XX, XX },
1342 { "rcrA", Eb, CL, XX, XX },
1343 { "shlA", Eb, CL, XX, XX },
1344 { "shrA", Eb, CL, XX, XX },
1345 { "(bad)", XX, XX, XX, XX },
1346 { "sarA", Eb, CL, XX, XX },
1347 },
1348 /* GRP2S_cl */
1349 {
1350 { "rolQ", Ev, CL, XX, XX },
1351 { "rorQ", Ev, CL, XX, XX },
1352 { "rclQ", Ev, CL, XX, XX },
1353 { "rcrQ", Ev, CL, XX, XX },
1354 { "shlQ", Ev, CL, XX, XX },
1355 { "shrQ", Ev, CL, XX, XX },
1356 { "(bad)", XX, XX, XX, XX },
1357 { "sarQ", Ev, CL, XX, XX }
1358 },
1359 /* GRP3b */
1360 {
1361 { "testA", Eb, Ib, XX, XX },
1362 { "(bad)", Eb, XX, XX, XX },
1363 { "notA", Eb, XX, XX, XX },
1364 { "negA", Eb, XX, XX, XX },
1365 { "mulA", Eb, XX, XX, XX }, /* Don't print the implicit %al register, */
1366 { "imulA", Eb, XX, XX, XX }, /* to distinguish these opcodes from other */
1367 { "divA", Eb, XX, XX, XX }, /* mul/imul opcodes. Do the same for div */
1368 { "idivA", Eb, XX, XX, XX } /* and idiv for consistency. */
1369 },
1370 /* GRP3S */
1371 {
1372 { "testQ", Ev, Iv, XX, XX },
1373 { "(bad)", XX, XX, XX, XX },
1374 { "notQ", Ev, XX, XX, XX },
1375 { "negQ", Ev, XX, XX, XX },
1376 { "mulQ", Ev, XX, XX, XX }, /* Don't print the implicit register. */
1377 { "imulQ", Ev, XX, XX, XX },
1378 { "divQ", Ev, XX, XX, XX },
1379 { "idivQ", Ev, XX, XX, XX },
1380 },
1381 /* GRP4 */
1382 {
1383 { "incA", Eb, XX, XX, XX },
1384 { "decA", Eb, XX, XX, XX },
1385 { "(bad)", XX, XX, XX, XX },
1386 { "(bad)", XX, XX, XX, XX },
1387 { "(bad)", XX, XX, XX, XX },
1388 { "(bad)", XX, XX, XX, XX },
1389 { "(bad)", XX, XX, XX, XX },
1390 { "(bad)", XX, XX, XX, XX },
1391 },
1392 /* GRP5 */
1393 {
1394 { "incQ", Ev, XX, XX, XX },
1395 { "decQ", Ev, XX, XX, XX },
1396 { "callT", indirEv, XX, XX, XX },
1397 { "JcallT", indirEp, XX, XX, XX },
1398 { "jmpT", indirEv, XX, XX, XX },
1399 { "JjmpT", indirEp, XX, XX, XX },
1400 { "pushU", stackEv, XX, XX, XX },
1401 { "(bad)", XX, XX, XX, XX },
1402 },
1403 /* GRP6 */
1404 {
1405 { "sldt", Ev, XX, XX, XX },
1406 { "str", Ev, XX, XX, XX },
1407 { "lldt", Ew, XX, XX, XX },
1408 { "ltr", Ew, XX, XX, XX },
1409 { "verr", Ew, XX, XX, XX },
1410 { "verw", Ew, XX, XX, XX },
1411 { "(bad)", XX, XX, XX, XX },
1412 { "(bad)", XX, XX, XX, XX }
1413 },
1414 /* GRP7 */
1415 {
1416 { "sgdt{Q|IQ||}", VMX_Fixup, 0, XX, XX, XX },
1417 { "sidt{Q|IQ||}", PNI_Fixup, 0, XX, XX, XX },
1418 { "lgdt{Q|Q||}", M, XX, XX, XX },
1419 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX, XX },
1420 { "smsw", Ev, XX, XX, XX },
1421 { "(bad)", XX, XX, XX, XX },
1422 { "lmsw", Ew, XX, XX, XX },
1423 { "invlpg", INVLPG_Fixup, w_mode, XX, XX, XX },
1424 },
1425 /* GRP8 */
1426 {
1427 { "(bad)", XX, XX, XX, XX },
1428 { "(bad)", XX, XX, XX, XX },
1429 { "(bad)", XX, XX, XX, XX },
1430 { "(bad)", XX, XX, XX, XX },
1431 { "btQ", Ev, Ib, XX, XX },
1432 { "btsQ", Ev, Ib, XX, XX },
1433 { "btrQ", Ev, Ib, XX, XX },
1434 { "btcQ", Ev, Ib, XX, XX },
1435 },
1436 /* GRP9 */
1437 {
1438 { "(bad)", XX, XX, XX, XX },
1439 { "cmpxchg8b", Eq, XX, XX, XX },
1440 { "(bad)", XX, XX, XX, XX },
1441 { "(bad)", XX, XX, XX, XX },
1442 { "(bad)", XX, XX, XX, XX },
1443 { "(bad)", XX, XX, XX, XX },
1444 { "", VM, XX, XX, XX }, /* See OP_VMX. */
1445 { "vmptrst", Eq, XX, XX, XX },
1446 },
1447 /* GRP11_C6 */
1448 {
1449 { "movA", Eb, Ib, XX, XX },
1450 { "(bad)", XX, XX, XX, XX },
1451 { "(bad)", XX, XX, XX, XX },
1452 { "(bad)", XX, XX, XX, XX },
1453 { "(bad)", XX, XX, XX, XX },
1454 { "(bad)", XX, XX, XX, XX },
1455 { "(bad)", XX, XX, XX, XX },
1456 { "(bad)", XX, XX, XX, XX },
1457 },
1458 /* GRP11_C7 */
1459 {
1460 { "movQ", Ev, Iv, XX, XX },
1461 { "(bad)", XX, XX, XX, XX },
1462 { "(bad)", XX, XX, XX, XX },
1463 { "(bad)", XX, XX, XX, XX },
1464 { "(bad)", XX, XX, XX, XX },
1465 { "(bad)", XX, XX, XX, XX },
1466 { "(bad)", XX, XX, XX, XX },
1467 { "(bad)", XX, XX, XX, XX },
1468 },
1469 /* GRP12 */
1470 {
1471 { "(bad)", XX, XX, XX, XX },
1472 { "(bad)", XX, XX, XX, XX },
1473 { "psrlw", MS, Ib, XX, XX },
1474 { "(bad)", XX, XX, XX, XX },
1475 { "psraw", MS, Ib, XX, XX },
1476 { "(bad)", XX, XX, XX, XX },
1477 { "psllw", MS, Ib, XX, XX },
1478 { "(bad)", XX, XX, XX, XX },
1479 },
1480 /* GRP13 */
1481 {
1482 { "(bad)", XX, XX, XX, XX },
1483 { "(bad)", XX, XX, XX, XX },
1484 { "psrld", MS, Ib, XX, XX },
1485 { "(bad)", XX, XX, XX, XX },
1486 { "psrad", MS, Ib, XX, XX },
1487 { "(bad)", XX, XX, XX, XX },
1488 { "pslld", MS, Ib, XX, XX },
1489 { "(bad)", XX, XX, XX, XX },
1490 },
1491 /* GRP14 */
1492 {
1493 { "(bad)", XX, XX, XX, XX },
1494 { "(bad)", XX, XX, XX, XX },
1495 { "psrlq", MS, Ib, XX, XX },
1496 { "psrldq", MS, Ib, XX, XX },
1497 { "(bad)", XX, XX, XX, XX },
1498 { "(bad)", XX, XX, XX, XX },
1499 { "psllq", MS, Ib, XX, XX },
1500 { "pslldq", MS, Ib, XX, XX },
1501 },
1502 /* GRP15 */
1503 {
1504 { "fxsave", Ev, XX, XX, XX },
1505 { "fxrstor", Ev, XX, XX, XX },
1506 { "ldmxcsr", Ev, XX, XX, XX },
1507 { "stmxcsr", Ev, XX, XX, XX },
1508 { "(bad)", XX, XX, XX, XX },
1509 { "lfence", OP_0fae, 0, XX, XX, XX },
1510 { "mfence", OP_0fae, 0, XX, XX, XX },
1511 { "clflush", OP_0fae, 0, XX, XX, XX },
1512 },
1513 /* GRP16 */
1514 {
1515 { "prefetchnta", Ev, XX, XX, XX },
1516 { "prefetcht0", Ev, XX, XX, XX },
1517 { "prefetcht1", Ev, XX, XX, XX },
1518 { "prefetcht2", Ev, XX, XX, XX },
1519 { "(bad)", XX, XX, XX, XX },
1520 { "(bad)", XX, XX, XX, XX },
1521 { "(bad)", XX, XX, XX, XX },
1522 { "(bad)", XX, XX, XX, XX },
1523 },
1524 /* GRPAMD */
1525 {
1526 { "prefetch", Eb, XX, XX, XX },
1527 { "prefetchw", Eb, XX, XX, XX },
1528 { "(bad)", XX, XX, XX, XX },
1529 { "(bad)", XX, XX, XX, XX },
1530 { "(bad)", XX, XX, XX, XX },
1531 { "(bad)", XX, XX, XX, XX },
1532 { "(bad)", XX, XX, XX, XX },
1533 { "(bad)", XX, XX, XX, XX },
1534 },
1535 /* GRPPADLCK1 */
1536 {
1537 { "xstore-rng", OP_0f07, 0, XX, XX, XX },
1538 { "xcrypt-ecb", OP_0f07, 0, XX, XX, XX },
1539 { "xcrypt-cbc", OP_0f07, 0, XX, XX, XX },
1540 { "xcrypt-ctr", OP_0f07, 0, XX, XX, XX },
1541 { "xcrypt-cfb", OP_0f07, 0, XX, XX, XX },
1542 { "xcrypt-ofb", OP_0f07, 0, XX, XX, XX },
1543 { "(bad)", OP_0f07, 0, XX, XX, XX },
1544 { "(bad)", OP_0f07, 0, XX, XX, XX },
1545 },
1546 /* GRPPADLCK2 */
1547 {
1548 { "montmul", OP_0f07, 0, XX, XX, XX },
1549 { "xsha1", OP_0f07, 0, XX, XX, XX },
1550 { "xsha256", OP_0f07, 0, XX, XX, XX },
1551 { "(bad)", OP_0f07, 0, XX, XX, XX },
1552 { "(bad)", OP_0f07, 0, XX, XX, XX },
1553 { "(bad)", OP_0f07, 0, XX, XX, XX },
1554 { "(bad)", OP_0f07, 0, XX, XX, XX },
1555 { "(bad)", OP_0f07, 0, XX, XX, XX },
1556 }
1557 };
1558
1559 static const struct dis386 prefix_user_table[][4] = {
1560 /* PREGRP0 */
1561 {
1562 { "addps", XM, EX, XX, XX },
1563 { "addss", XM, EX, XX, XX },
1564 { "addpd", XM, EX, XX, XX },
1565 { "addsd", XM, EX, XX, XX },
1566 },
1567 /* PREGRP1 */
1568 {
1569 { "", XM, EX, OPSIMD, XX }, /* See OP_SIMD_SUFFIX. */
1570 { "", XM, EX, OPSIMD, XX },
1571 { "", XM, EX, OPSIMD, XX },
1572 { "", XM, EX, OPSIMD, XX },
1573 },
1574 /* PREGRP2 */
1575 {
1576 { "cvtpi2ps", XM, EMC, XX, XX },
1577 { "cvtsi2ssY", XM, Ev, XX, XX },
1578 { "cvtpi2pd", XM, EMC, XX, XX },
1579 { "cvtsi2sdY", XM, Ev, XX, XX },
1580 },
1581 /* PREGRP3 */
1582 {
1583 { "cvtps2pi", MXC, EX, XX, XX },
1584 { "cvtss2siY", Gv, EX, XX, XX },
1585 { "cvtpd2pi", MXC, EX, XX, XX },
1586 { "cvtsd2siY", Gv, EX, XX, XX },
1587 },
1588 /* PREGRP4 */
1589 {
1590 { "cvttps2pi", MXC, EX, XX, XX },
1591 { "cvttss2siY", Gv, EX, XX, XX },
1592 { "cvttpd2pi", MXC, EX, XX, XX },
1593 { "cvttsd2siY", Gv, EX, XX, XX },
1594 },
1595 /* PREGRP5 */
1596 {
1597 { "divps", XM, EX, XX, XX },
1598 { "divss", XM, EX, XX, XX },
1599 { "divpd", XM, EX, XX, XX },
1600 { "divsd", XM, EX, XX, XX },
1601 },
1602 /* PREGRP6 */
1603 {
1604 { "maxps", XM, EX, XX, XX },
1605 { "maxss", XM, EX, XX, XX },
1606 { "maxpd", XM, EX, XX, XX },
1607 { "maxsd", XM, EX, XX, XX },
1608 },
1609 /* PREGRP7 */
1610 {
1611 { "minps", XM, EX, XX, XX },
1612 { "minss", XM, EX, XX, XX },
1613 { "minpd", XM, EX, XX, XX },
1614 { "minsd", XM, EX, XX, XX },
1615 },
1616 /* PREGRP8 */
1617 {
1618 { "movups", XM, EX, XX, XX },
1619 { "movss", XM, EX, XX, XX },
1620 { "movupd", XM, EX, XX, XX },
1621 { "movsd", XM, EX, XX, XX },
1622 },
1623 /* PREGRP9 */
1624 {
1625 { "movups", EX, XM, XX, XX },
1626 { "movss", EX, XM, XX, XX },
1627 { "movupd", EX, XM, XX, XX },
1628 { "movsd", EX, XM, XX, XX },
1629 },
1630 /* PREGRP10 */
1631 {
1632 { "mulps", XM, EX, XX, XX },
1633 { "mulss", XM, EX, XX, XX },
1634 { "mulpd", XM, EX, XX, XX },
1635 { "mulsd", XM, EX, XX, XX },
1636 },
1637 /* PREGRP11 */
1638 {
1639 { "rcpps", XM, EX, XX, XX },
1640 { "rcpss", XM, EX, XX, XX },
1641 { "(bad)", XM, EX, XX, XX },
1642 { "(bad)", XM, EX, XX, XX },
1643 },
1644 /* PREGRP12 */
1645 {
1646 { "rsqrtps", XM, EX, XX, XX },
1647 { "rsqrtss", XM, EX, XX, XX },
1648 { "(bad)", XM, EX, XX, XX },
1649 { "(bad)", XM, EX, XX, XX },
1650 },
1651 /* PREGRP13 */
1652 {
1653 { "sqrtps", XM, EX, XX, XX },
1654 { "sqrtss", XM, EX, XX, XX },
1655 { "sqrtpd", XM, EX, XX, XX },
1656 { "sqrtsd", XM, EX, XX, XX },
1657 },
1658 /* PREGRP14 */
1659 {
1660 { "subps", XM, EX, XX, XX },
1661 { "subss", XM, EX, XX, XX },
1662 { "subpd", XM, EX, XX, XX },
1663 { "subsd", XM, EX, XX, XX },
1664 },
1665 /* PREGRP15 */
1666 {
1667 { "(bad)", XM, EX, XX, XX},
1668 { "cvtdq2pd", XM, EX, XX, XX },
1669 { "cvttpd2dq", XM, EX, XX, XX },
1670 { "cvtpd2dq", XM, EX, XX, XX },
1671 },
1672 /* PREGRP16 */
1673 {
1674 { "cvtdq2ps", XM, EX, XX, XX },
1675 { "cvttps2dq",XM, EX, XX, XX },
1676 { "cvtps2dq",XM, EX, XX, XX },
1677 { "(bad)", XM, EX, XX, XX },
1678 },
1679 /* PREGRP17 */
1680 {
1681 { "cvtps2pd", XM, EX, XX, XX },
1682 { "cvtss2sd", XM, EX, XX, XX },
1683 { "cvtpd2ps", XM, EX, XX, XX },
1684 { "cvtsd2ss", XM, EX, XX, XX },
1685 },
1686 /* PREGRP18 */
1687 {
1688 { "maskmovq", MX, MS, XX, XX },
1689 { "(bad)", XM, EX, XX, XX },
1690 { "maskmovdqu", XM, EX, XX, XX },
1691 { "(bad)", XM, EX, XX, XX },
1692 },
1693 /* PREGRP19 */
1694 {
1695 { "movq", MX, EM, XX, XX },
1696 { "movdqu", XM, EX, XX, XX },
1697 { "movdqa", XM, EX, XX, XX },
1698 { "(bad)", XM, EX, XX, XX },
1699 },
1700 /* PREGRP20 */
1701 {
1702 { "movq", EM, MX, XX, XX },
1703 { "movdqu", EX, XM, XX, XX },
1704 { "movdqa", EX, XM, XX, XX },
1705 { "(bad)", EX, XM, XX, XX },
1706 },
1707 /* PREGRP21 */
1708 {
1709 { "(bad)", EX, XM, XX, XX },
1710 { "movq2dq", XM, MS, XX, XX },
1711 { "movq", EX, XM, XX, XX },
1712 { "movdq2q", MX, XS, XX, XX },
1713 },
1714 /* PREGRP22 */
1715 {
1716 { "pshufw", MX, EM, Ib, XX },
1717 { "pshufhw", XM, EX, Ib, XX },
1718 { "pshufd", XM, EX, Ib, XX },
1719 { "pshuflw", XM, EX, Ib, XX},
1720 },
1721 /* PREGRP23 */
1722 {
1723 { "movd", Edq, MX, XX, XX },
1724 { "movq", XM, EX, XX, XX },
1725 { "movd", Edq, XM, XX, XX },
1726 { "(bad)", Ed, XM, XX, XX },
1727 },
1728 /* PREGRP24 */
1729 {
1730 { "(bad)", MX, EX, XX, XX },
1731 { "(bad)", XM, EX, XX, XX },
1732 { "punpckhqdq", XM, EX, XX, XX },
1733 { "(bad)", XM, EX, XX, XX },
1734 },
1735 /* PREGRP25 */
1736 {
1737 { "movntq", EM, MX, XX, XX },
1738 { "(bad)", EM, XM, XX, XX },
1739 { "movntdq", EM, XM, XX, XX },
1740 { "(bad)", EM, XM, XX, XX },
1741 },
1742 /* PREGRP26 */
1743 {
1744 { "(bad)", MX, EX, XX, XX },
1745 { "(bad)", XM, EX, XX, XX },
1746 { "punpcklqdq", XM, EX, XX, XX },
1747 { "(bad)", XM, EX, XX, XX },
1748 },
1749 /* PREGRP27 */
1750 {
1751 { "(bad)", MX, EX, XX, XX },
1752 { "(bad)", XM, EX, XX, XX },
1753 { "addsubpd", XM, EX, XX, XX },
1754 { "addsubps", XM, EX, XX, XX },
1755 },
1756 /* PREGRP28 */
1757 {
1758 { "(bad)", MX, EX, XX, XX },
1759 { "(bad)", XM, EX, XX, XX },
1760 { "haddpd", XM, EX, XX, XX },
1761 { "haddps", XM, EX, XX, XX },
1762 },
1763 /* PREGRP29 */
1764 {
1765 { "(bad)", MX, EX, XX, XX },
1766 { "(bad)", XM, EX, XX, XX },
1767 { "hsubpd", XM, EX, XX, XX },
1768 { "hsubps", XM, EX, XX, XX },
1769 },
1770 /* PREGRP30 */
1771 {
1772 { "movlpX", XM, EX, SIMD_Fixup, 'h', XX }, /* really only 2 operands */
1773 { "movsldup", XM, EX, XX, XX },
1774 { "movlpd", XM, EX, XX, XX },
1775 { "movddup", XM, EX, XX, XX },
1776 },
1777 /* PREGRP31 */
1778 {
1779 { "movhpX", XM, EX, SIMD_Fixup, 'l', XX },
1780 { "movshdup", XM, EX, XX, XX },
1781 { "movhpd", XM, EX, XX, XX },
1782 { "(bad)", XM, EX, XX, XX },
1783 },
1784 /* PREGRP32 */
1785 {
1786 { "(bad)", XM, EX, XX, XX },
1787 { "(bad)", XM, EX, XX, XX },
1788 { "(bad)", XM, EX, XX, XX },
1789 { "lddqu", XM, M, XX, XX },
1790 },
1791 /* PREGRP33 */
1792 {
1793 {"movntps",Ev, XM, XX, XX},
1794 {"movntss",Ev, XM, XX, XX},
1795 {"movntpd",Ev, XM, XX, XX},
1796 {"movntsd",Ev, XM, XX, XX},
1797 },
1798
1799 /* PREGRP34 */
1800 {
1801 {"vmread", Em, Gm, XX, XX},
1802 {"(bad)", XX, XX, XX, XX},
1803 {"extrq", XS, Ib, Ib, XX},
1804 {"insertq",XM, XS, Ib, Ib},
1805 },
1806
1807 /* PREGRP35 */
1808 {
1809 {"vmwrite", Gm, Em, XX, XX},
1810 {"(bad)", XX, XX, XX, XX},
1811 {"extrq", XM, XS, XX, XX},
1812 {"insertq", XM, XS, XX, XX},
1813 },
1814
1815 /* PREGRP36 */
1816 {
1817 { "bsrS", Gv, Ev, XX, XX },
1818 { "lzcntS", Gv, Ev, XX, XX },
1819 { "bsrS", Gv, Ev, XX, XX },
1820 { "(bad)", XX, XX, XX, XX },
1821 },
1822
1823 };
1824
1825 static const struct dis386 x86_64_table[][2] = {
1826 {
1827 { "arpl", Ew, Gw, XX, XX },
1828 { "movs{||lq|xd}", Gv, Ed, XX, XX },
1829 },
1830 };
1831
1832 static const struct dis386 three_byte_table[][32] = {
1833 /* THREE_BYTE_0 */
1834 {
1835 { "pshufb", MX, EM, XX, XX },
1836 { "phaddw", MX, EM, XX, XX },
1837 { "phaddd", MX, EM, XX, XX },
1838 { "phaddsw", MX, EM, XX, XX },
1839 { "pmaddubsw", MX, EM, XX, XX },
1840 { "phsubw", MX, EM, XX, XX },
1841 { "phsubd", MX, EM, XX, XX },
1842 { "phsubsw", MX, EM, XX, XX },
1843 { "psignb", MX, EM, XX, XX },
1844 { "psignw", MX, EM, XX, XX },
1845 { "psignd", MX, EM, XX, XX },
1846 { "pmulhrsw", MX, EM, XX, XX },
1847 { "(bad)", XX, XX, XX, XX },
1848 { "(bad)", XX, XX, XX, XX },
1849 { "(bad)", XX, XX, XX, XX },
1850 { "(bad)", XX, XX, XX, XX },
1851 { "(bad)", XX, XX, XX, XX },
1852 { "(bad)", XX, XX, XX, XX },
1853 { "(bad)", XX, XX, XX, XX },
1854 { "(bad)", XX, XX, XX, XX },
1855 { "(bad)", XX, XX, XX, XX },
1856 { "(bad)", XX, XX, XX, XX },
1857 { "(bad)", XX, XX, XX, XX },
1858 { "(bad)", XX, XX, XX, XX },
1859 { "(bad)", XX, XX, XX, XX },
1860 { "(bad)", XX, XX, XX, XX },
1861 { "(bad)", XX, XX, XX, XX },
1862 { "(bad)", XX, XX, XX, XX },
1863 { "pabsb", MX, EM, XX, XX },
1864 { "pabsw", MX, EM, XX, XX },
1865 { "pabsd", MX, EM, XX, XX },
1866 { "(bad)", XX, XX, XX, XX }
1867 },
1868 /* THREE_BYTE_1 */
1869 {
1870 { "(bad)", XX, XX, XX, XX },
1871 { "(bad)", XX, XX, XX, XX },
1872 { "(bad)", XX, XX, XX, XX },
1873 { "(bad)", XX, XX, XX, XX },
1874 { "(bad)", XX, XX, XX, XX },
1875 { "(bad)", XX, XX, XX, XX },
1876 { "(bad)", XX, XX, XX, XX },
1877 { "(bad)", XX, XX, XX, XX },
1878 { "(bad)", XX, XX, XX, XX },
1879 { "(bad)", XX, XX, XX, XX },
1880 { "(bad)", XX, XX, XX, XX },
1881 { "(bad)", XX, XX, XX, XX },
1882 { "(bad)", XX, XX, XX, XX },
1883 { "(bad)", XX, XX, XX, XX },
1884 { "(bad)", XX, XX, XX, XX },
1885 { "palignr", MX, EM, Ib, XX },
1886 { "(bad)", XX, XX, XX, XX },
1887 { "(bad)", XX, XX, XX, XX },
1888 { "(bad)", XX, XX, XX, XX },
1889 { "(bad)", XX, XX, XX, XX },
1890 { "(bad)", XX, XX, XX, XX },
1891 { "(bad)", XX, XX, XX, XX },
1892 { "(bad)", XX, XX, XX, XX },
1893 { "(bad)", XX, XX, XX, XX },
1894 { "(bad)", XX, XX, XX, XX },
1895 { "(bad)", XX, XX, XX, XX },
1896 { "(bad)", XX, XX, XX, XX },
1897 { "(bad)", XX, XX, XX, XX },
1898 { "(bad)", XX, XX, XX, XX },
1899 { "(bad)", XX, XX, XX, XX },
1900 { "(bad)", XX, XX, XX, XX },
1901 { "(bad)", XX, XX, XX, XX }
1902 },
1903 };
1904
1905 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1906
1907 static void
1908 ckprefix (void)
1909 {
1910 int newrex;
1911 rex = 0;
1912 prefixes = 0;
1913 used_prefixes = 0;
1914 rex_used = 0;
1915 while (1)
1916 {
1917 FETCH_DATA (the_info, codep + 1);
1918 newrex = 0;
1919 switch (*codep)
1920 {
1921 /* REX prefixes family. */
1922 case 0x40:
1923 case 0x41:
1924 case 0x42:
1925 case 0x43:
1926 case 0x44:
1927 case 0x45:
1928 case 0x46:
1929 case 0x47:
1930 case 0x48:
1931 case 0x49:
1932 case 0x4a:
1933 case 0x4b:
1934 case 0x4c:
1935 case 0x4d:
1936 case 0x4e:
1937 case 0x4f:
1938 if (address_mode == mode_64bit)
1939 newrex = *codep;
1940 else
1941 return;
1942 break;
1943 case 0xf3:
1944 prefixes |= PREFIX_REPZ;
1945 break;
1946 case 0xf2:
1947 prefixes |= PREFIX_REPNZ;
1948 break;
1949 case 0xf0:
1950 prefixes |= PREFIX_LOCK;
1951 break;
1952 case 0x2e:
1953 prefixes |= PREFIX_CS;
1954 break;
1955 case 0x36:
1956 prefixes |= PREFIX_SS;
1957 break;
1958 case 0x3e:
1959 prefixes |= PREFIX_DS;
1960 break;
1961 case 0x26:
1962 prefixes |= PREFIX_ES;
1963 break;
1964 case 0x64:
1965 prefixes |= PREFIX_FS;
1966 break;
1967 case 0x65:
1968 prefixes |= PREFIX_GS;
1969 break;
1970 case 0x66:
1971 prefixes |= PREFIX_DATA;
1972 break;
1973 case 0x67:
1974 prefixes |= PREFIX_ADDR;
1975 break;
1976 case FWAIT_OPCODE:
1977 /* fwait is really an instruction. If there are prefixes
1978 before the fwait, they belong to the fwait, *not* to the
1979 following instruction. */
1980 if (prefixes || rex)
1981 {
1982 prefixes |= PREFIX_FWAIT;
1983 codep++;
1984 return;
1985 }
1986 prefixes = PREFIX_FWAIT;
1987 break;
1988 default:
1989 return;
1990 }
1991 /* Rex is ignored when followed by another prefix. */
1992 if (rex)
1993 {
1994 rex_used = rex;
1995 return;
1996 }
1997 rex = newrex;
1998 codep++;
1999 }
2000 }
2001
2002 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
2003 prefix byte. */
2004
2005 static const char *
2006 prefix_name (int pref, int sizeflag)
2007 {
2008 switch (pref)
2009 {
2010 /* REX prefixes family. */
2011 case 0x40:
2012 return "rex";
2013 case 0x41:
2014 return "rexZ";
2015 case 0x42:
2016 return "rexY";
2017 case 0x43:
2018 return "rexYZ";
2019 case 0x44:
2020 return "rexX";
2021 case 0x45:
2022 return "rexXZ";
2023 case 0x46:
2024 return "rexXY";
2025 case 0x47:
2026 return "rexXYZ";
2027 case 0x48:
2028 return "rex64";
2029 case 0x49:
2030 return "rex64Z";
2031 case 0x4a:
2032 return "rex64Y";
2033 case 0x4b:
2034 return "rex64YZ";
2035 case 0x4c:
2036 return "rex64X";
2037 case 0x4d:
2038 return "rex64XZ";
2039 case 0x4e:
2040 return "rex64XY";
2041 case 0x4f:
2042 return "rex64XYZ";
2043 case 0xf3:
2044 return "repz";
2045 case 0xf2:
2046 return "repnz";
2047 case 0xf0:
2048 return "lock";
2049 case 0x2e:
2050 return "cs";
2051 case 0x36:
2052 return "ss";
2053 case 0x3e:
2054 return "ds";
2055 case 0x26:
2056 return "es";
2057 case 0x64:
2058 return "fs";
2059 case 0x65:
2060 return "gs";
2061 case 0x66:
2062 return (sizeflag & DFLAG) ? "data16" : "data32";
2063 case 0x67:
2064 if (address_mode == mode_64bit)
2065 return (sizeflag & AFLAG) ? "addr32" : "addr64";
2066 else
2067 return (sizeflag & AFLAG) ? "addr16" : "addr32";
2068 case FWAIT_OPCODE:
2069 return "fwait";
2070 default:
2071 return NULL;
2072 }
2073 }
2074
2075 static char op1out[100], op2out[100], op3out[100], op4out[100];
2076 static int op_ad, op_index[4];
2077 static int two_source_ops;
2078 static bfd_vma op_address[4];
2079 static bfd_vma op_riprel[4];
2080 static bfd_vma start_pc;
2081 \f
2082 /*
2083 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2084 * (see topic "Redundant prefixes" in the "Differences from 8086"
2085 * section of the "Virtual 8086 Mode" chapter.)
2086 * 'pc' should be the address of this instruction, it will
2087 * be used to print the target address if this is a relative jump or call
2088 * The function returns the length of this instruction in bytes.
2089 */
2090
2091 static char intel_syntax;
2092 static char open_char;
2093 static char close_char;
2094 static char separator_char;
2095 static char scale_char;
2096
2097 /* Here for backwards compatibility. When gdb stops using
2098 print_insn_i386_att and print_insn_i386_intel these functions can
2099 disappear, and print_insn_i386 be merged into print_insn. */
2100 int
2101 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
2102 {
2103 intel_syntax = 0;
2104
2105 return print_insn (pc, info);
2106 }
2107
2108 int
2109 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
2110 {
2111 intel_syntax = 1;
2112
2113 return print_insn (pc, info);
2114 }
2115
2116 int
2117 print_insn_i386 (bfd_vma pc, disassemble_info *info)
2118 {
2119 intel_syntax = -1;
2120
2121 return print_insn (pc, info);
2122 }
2123
2124 static int
2125 print_insn (bfd_vma pc, disassemble_info *info)
2126 {
2127 const struct dis386 *dp;
2128 int i;
2129 char *first, *second, *third, *fourth;
2130 int needcomma;
2131 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
2132 int sizeflag;
2133 const char *p;
2134 struct dis_private priv;
2135
2136 if (info->mach == bfd_mach_x86_64_intel_syntax
2137 || info->mach == bfd_mach_x86_64)
2138 address_mode = mode_64bit;
2139 else
2140 address_mode = mode_32bit;
2141
2142 if (intel_syntax == (char) -1)
2143 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2144 || info->mach == bfd_mach_x86_64_intel_syntax);
2145
2146 if (info->mach == bfd_mach_i386_i386
2147 || info->mach == bfd_mach_x86_64
2148 || info->mach == bfd_mach_i386_i386_intel_syntax
2149 || info->mach == bfd_mach_x86_64_intel_syntax)
2150 priv.orig_sizeflag = AFLAG | DFLAG;
2151 else if (info->mach == bfd_mach_i386_i8086)
2152 priv.orig_sizeflag = 0;
2153 else
2154 abort ();
2155
2156 for (p = info->disassembler_options; p != NULL; )
2157 {
2158 if (strncmp (p, "x86-64", 6) == 0)
2159 {
2160 address_mode = mode_64bit;
2161 priv.orig_sizeflag = AFLAG | DFLAG;
2162 }
2163 else if (strncmp (p, "i386", 4) == 0)
2164 {
2165 address_mode = mode_32bit;
2166 priv.orig_sizeflag = AFLAG | DFLAG;
2167 }
2168 else if (strncmp (p, "i8086", 5) == 0)
2169 {
2170 address_mode = mode_16bit;
2171 priv.orig_sizeflag = 0;
2172 }
2173 else if (strncmp (p, "intel", 5) == 0)
2174 {
2175 intel_syntax = 1;
2176 }
2177 else if (strncmp (p, "att", 3) == 0)
2178 {
2179 intel_syntax = 0;
2180 }
2181 else if (strncmp (p, "addr", 4) == 0)
2182 {
2183 if (p[4] == '1' && p[5] == '6')
2184 priv.orig_sizeflag &= ~AFLAG;
2185 else if (p[4] == '3' && p[5] == '2')
2186 priv.orig_sizeflag |= AFLAG;
2187 }
2188 else if (strncmp (p, "data", 4) == 0)
2189 {
2190 if (p[4] == '1' && p[5] == '6')
2191 priv.orig_sizeflag &= ~DFLAG;
2192 else if (p[4] == '3' && p[5] == '2')
2193 priv.orig_sizeflag |= DFLAG;
2194 }
2195 else if (strncmp (p, "suffix", 6) == 0)
2196 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2197
2198 p = strchr (p, ',');
2199 if (p != NULL)
2200 p++;
2201 }
2202
2203 if (intel_syntax)
2204 {
2205 names64 = intel_names64;
2206 names32 = intel_names32;
2207 names16 = intel_names16;
2208 names8 = intel_names8;
2209 names8rex = intel_names8rex;
2210 names_seg = intel_names_seg;
2211 index16 = intel_index16;
2212 open_char = '[';
2213 close_char = ']';
2214 separator_char = '+';
2215 scale_char = '*';
2216 }
2217 else
2218 {
2219 names64 = att_names64;
2220 names32 = att_names32;
2221 names16 = att_names16;
2222 names8 = att_names8;
2223 names8rex = att_names8rex;
2224 names_seg = att_names_seg;
2225 index16 = att_index16;
2226 open_char = '(';
2227 close_char = ')';
2228 separator_char = ',';
2229 scale_char = ',';
2230 }
2231
2232 /* The output looks better if we put 7 bytes on a line, since that
2233 puts most long word instructions on a single line. */
2234 info->bytes_per_line = 7;
2235
2236 info->private_data = &priv;
2237 priv.max_fetched = priv.the_buffer;
2238 priv.insn_start = pc;
2239
2240 obuf[0] = 0;
2241 op1out[0] = 0;
2242 op2out[0] = 0;
2243 op3out[0] = 0;
2244 op4out[0] = 0;
2245
2246 op_index[0] = op_index[1] = op_index[2] = op_index[3] = -1;
2247
2248 the_info = info;
2249 start_pc = pc;
2250 start_codep = priv.the_buffer;
2251 codep = priv.the_buffer;
2252
2253 if (setjmp (priv.bailout) != 0)
2254 {
2255 const char *name;
2256
2257 /* Getting here means we tried for data but didn't get it. That
2258 means we have an incomplete instruction of some sort. Just
2259 print the first byte as a prefix or a .byte pseudo-op. */
2260 if (codep > priv.the_buffer)
2261 {
2262 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2263 if (name != NULL)
2264 (*info->fprintf_func) (info->stream, "%s", name);
2265 else
2266 {
2267 /* Just print the first byte as a .byte instruction. */
2268 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2269 (unsigned int) priv.the_buffer[0]);
2270 }
2271
2272 return 1;
2273 }
2274
2275 return -1;
2276 }
2277
2278 obufp = obuf;
2279 ckprefix ();
2280
2281 insn_codep = codep;
2282 sizeflag = priv.orig_sizeflag;
2283
2284 FETCH_DATA (info, codep + 1);
2285 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2286
2287 if (((prefixes & PREFIX_FWAIT)
2288 && ((*codep < 0xd8) || (*codep > 0xdf)))
2289 || (rex && rex_used))
2290 {
2291 const char *name;
2292
2293 /* fwait not followed by floating point instruction, or rex followed
2294 by other prefixes. Print the first prefix. */
2295 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2296 if (name == NULL)
2297 name = INTERNAL_DISASSEMBLER_ERROR;
2298 (*info->fprintf_func) (info->stream, "%s", name);
2299 return 1;
2300 }
2301
2302 if (*codep == 0x0f)
2303 {
2304 FETCH_DATA (info, codep + 2);
2305 dp = &dis386_twobyte[*++codep];
2306 need_modrm = twobyte_has_modrm[*codep];
2307 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2308 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2309 }
2310 else
2311 {
2312 dp = &dis386[*codep];
2313 need_modrm = onebyte_has_modrm[*codep];
2314 uses_SSE_prefix = 0;
2315 uses_LOCK_prefix = 0;
2316 }
2317
2318 /*"lzcnt"=0xBD is the only non-sse instruction which uses F3 in the opcode without any "rep(z|nz)"*/
2319 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ) && *codep !=0xBD)
2320 {
2321 oappend ("repz ");
2322 used_prefixes |= PREFIX_REPZ;
2323 }
2324 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ) && *codep !=0xBD)
2325 {
2326 oappend ("repnz ");
2327 used_prefixes |= PREFIX_REPNZ;
2328 }
2329
2330 codep++;
2331
2332 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2333 {
2334 oappend ("lock ");
2335 used_prefixes |= PREFIX_LOCK;
2336 }
2337
2338 if (prefixes & PREFIX_ADDR)
2339 {
2340 sizeflag ^= AFLAG;
2341 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2342 {
2343 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
2344 oappend ("addr32 ");
2345 else
2346 oappend ("addr16 ");
2347 used_prefixes |= PREFIX_ADDR;
2348 }
2349 }
2350
2351 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2352 {
2353 sizeflag ^= DFLAG;
2354 if (dp->bytemode3 == cond_jump_mode
2355 && dp->bytemode1 == v_mode
2356 && !intel_syntax)
2357 {
2358 if (sizeflag & DFLAG)
2359 oappend ("data32 ");
2360 else
2361 oappend ("data16 ");
2362 used_prefixes |= PREFIX_DATA;
2363 }
2364 }
2365
2366 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
2367 {
2368 FETCH_DATA (info, codep + 2);
2369 dp = &three_byte_table[dp->bytemode2][*codep++];
2370 mod = (*codep >> 6) & 3;
2371 reg = (*codep >> 3) & 7;
2372 rm = *codep & 7;
2373 }
2374 else if (need_modrm)
2375 {
2376 FETCH_DATA (info, codep + 1);
2377 mod = (*codep >> 6) & 3;
2378 reg = (*codep >> 3) & 7;
2379 rm = *codep & 7;
2380 }
2381
2382 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2383 {
2384 dofloat (sizeflag);
2385 }
2386 else
2387 {
2388 int index;
2389 if (dp->name == NULL)
2390 {
2391 switch (dp->bytemode1)
2392 {
2393 case USE_GROUPS:
2394 dp = &grps[dp->bytemode2][reg];
2395 break;
2396
2397 case USE_PREFIX_USER_TABLE:
2398 index = 0;
2399 used_prefixes |= (prefixes & PREFIX_REPZ);
2400 if (prefixes & PREFIX_REPZ)
2401 index = 1;
2402 else
2403 {
2404 used_prefixes |= (prefixes & PREFIX_DATA);
2405 if (prefixes & PREFIX_DATA)
2406 index = 2;
2407 else
2408 {
2409 used_prefixes |= (prefixes & PREFIX_REPNZ);
2410 if (prefixes & PREFIX_REPNZ)
2411 index = 3;
2412 }
2413 }
2414 dp = &prefix_user_table[dp->bytemode2][index];
2415 break;
2416
2417 case X86_64_SPECIAL:
2418 index = address_mode == mode_64bit ? 1 : 0;
2419 dp = &x86_64_table[dp->bytemode2][index];
2420 break;
2421
2422 default:
2423 oappend (INTERNAL_DISASSEMBLER_ERROR);
2424 break;
2425 }
2426 }
2427
2428 if (putop (dp->name, sizeflag) == 0)
2429 {
2430 obufp = op1out;
2431 op_ad = 3;
2432 if (dp->op1)
2433 (*dp->op1) (dp->bytemode1, sizeflag);
2434
2435 obufp = op2out;
2436 op_ad = 2;
2437 if (dp->op2)
2438 (*dp->op2) (dp->bytemode2, sizeflag);
2439
2440 obufp = op3out;
2441 op_ad = 1;
2442 if (dp->op3)
2443 (*dp->op3) (dp->bytemode3, sizeflag);
2444
2445 obufp = op4out;
2446 op_ad = 0;
2447 if (dp->op4)
2448 (*dp->op4) (dp->bytemode4, sizeflag);
2449 }
2450 }
2451
2452 /* See if any prefixes were not used. If so, print the first one
2453 separately. If we don't do this, we'll wind up printing an
2454 instruction stream which does not precisely correspond to the
2455 bytes we are disassembling. */
2456 if ((prefixes & ~used_prefixes) != 0)
2457 {
2458 const char *name;
2459
2460 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2461 if (name == NULL)
2462 name = INTERNAL_DISASSEMBLER_ERROR;
2463 (*info->fprintf_func) (info->stream, "%s", name);
2464 return 1;
2465 }
2466 if (rex & ~rex_used)
2467 {
2468 const char *name;
2469 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2470 if (name == NULL)
2471 name = INTERNAL_DISASSEMBLER_ERROR;
2472 (*info->fprintf_func) (info->stream, "%s ", name);
2473 }
2474
2475 obufp = obuf + strlen (obuf);
2476 for (i = strlen (obuf); i < 6; i++)
2477 oappend (" ");
2478 oappend (" ");
2479 (*info->fprintf_func) (info->stream, "%s", obuf);
2480
2481 /* The enter and bound instructions are printed with operands in the same
2482 order as the intel book; everything else is printed in reverse order. */
2483 if (intel_syntax || two_source_ops)
2484 {
2485 first = op1out;
2486 second = op2out;
2487 third = op3out;
2488 fourth = op4out;
2489 op_ad = op_index[0];
2490 op_index[0] = op_index[3];
2491 op_index[3] = op_ad;
2492 op_ad = op_index[1];
2493 op_index[1] = op_index[2];
2494 op_index[2] = op_ad;
2495
2496 }
2497 else
2498 {
2499 first = op4out;
2500 second = op3out;
2501 third = op2out;
2502 fourth = op1out;
2503 }
2504 needcomma = 0;
2505 if (*first)
2506 {
2507 if (op_index[0] != -1 && !op_riprel[0])
2508 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2509 else
2510 (*info->fprintf_func) (info->stream, "%s", first);
2511 needcomma = 1;
2512 }
2513
2514 if (*second)
2515 {
2516 if (needcomma)
2517 (*info->fprintf_func) (info->stream, ",");
2518 if (op_index[1] != -1 && !op_riprel[1])
2519 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2520 else
2521 (*info->fprintf_func) (info->stream, "%s", second);
2522 needcomma = 1;
2523 }
2524
2525 if (*third)
2526 {
2527 if (needcomma)
2528 (*info->fprintf_func) (info->stream, ",");
2529 if (op_index[2] != -1 && !op_riprel[2])
2530 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2531 else
2532 (*info->fprintf_func) (info->stream, "%s", third);
2533 needcomma = 1;
2534 }
2535
2536 if (*fourth)
2537 {
2538 if (needcomma)
2539 (*info->fprintf_func) (info->stream, ",");
2540 if (op_index[3] != -1 && !op_riprel[3])
2541 (*info->print_address_func) ((bfd_vma) op_address[op_index[3]], info);
2542 else
2543 (*info->fprintf_func) (info->stream, "%s", fourth);
2544 }
2545
2546 for (i = 0; i < 4; i++)
2547 if (op_index[i] != -1 && op_riprel[i])
2548 {
2549 (*info->fprintf_func) (info->stream, " # ");
2550 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2551 + op_address[op_index[i]]), info);
2552 }
2553 return codep - priv.the_buffer;
2554 }
2555
2556 static const char *float_mem[] = {
2557 /* d8 */
2558 "fadd{s||s|}",
2559 "fmul{s||s|}",
2560 "fcom{s||s|}",
2561 "fcomp{s||s|}",
2562 "fsub{s||s|}",
2563 "fsubr{s||s|}",
2564 "fdiv{s||s|}",
2565 "fdivr{s||s|}",
2566 /* d9 */
2567 "fld{s||s|}",
2568 "(bad)",
2569 "fst{s||s|}",
2570 "fstp{s||s|}",
2571 "fldenvIC",
2572 "fldcw",
2573 "fNstenvIC",
2574 "fNstcw",
2575 /* da */
2576 "fiadd{l||l|}",
2577 "fimul{l||l|}",
2578 "ficom{l||l|}",
2579 "ficomp{l||l|}",
2580 "fisub{l||l|}",
2581 "fisubr{l||l|}",
2582 "fidiv{l||l|}",
2583 "fidivr{l||l|}",
2584 /* db */
2585 "fild{l||l|}",
2586 "fisttp{l||l|}",
2587 "fist{l||l|}",
2588 "fistp{l||l|}",
2589 "(bad)",
2590 "fld{t||t|}",
2591 "(bad)",
2592 "fstp{t||t|}",
2593 /* dc */
2594 "fadd{l||l|}",
2595 "fmul{l||l|}",
2596 "fcom{l||l|}",
2597 "fcomp{l||l|}",
2598 "fsub{l||l|}",
2599 "fsubr{l||l|}",
2600 "fdiv{l||l|}",
2601 "fdivr{l||l|}",
2602 /* dd */
2603 "fld{l||l|}",
2604 "fisttp{ll||ll|}",
2605 "fst{l||l|}",
2606 "fstp{l||l|}",
2607 "frstorIC",
2608 "(bad)",
2609 "fNsaveIC",
2610 "fNstsw",
2611 /* de */
2612 "fiadd",
2613 "fimul",
2614 "ficom",
2615 "ficomp",
2616 "fisub",
2617 "fisubr",
2618 "fidiv",
2619 "fidivr",
2620 /* df */
2621 "fild",
2622 "fisttp",
2623 "fist",
2624 "fistp",
2625 "fbld",
2626 "fild{ll||ll|}",
2627 "fbstp",
2628 "fistp{ll||ll|}",
2629 };
2630
2631 static const unsigned char float_mem_mode[] = {
2632 /* d8 */
2633 d_mode,
2634 d_mode,
2635 d_mode,
2636 d_mode,
2637 d_mode,
2638 d_mode,
2639 d_mode,
2640 d_mode,
2641 /* d9 */
2642 d_mode,
2643 0,
2644 d_mode,
2645 d_mode,
2646 0,
2647 w_mode,
2648 0,
2649 w_mode,
2650 /* da */
2651 d_mode,
2652 d_mode,
2653 d_mode,
2654 d_mode,
2655 d_mode,
2656 d_mode,
2657 d_mode,
2658 d_mode,
2659 /* db */
2660 d_mode,
2661 d_mode,
2662 d_mode,
2663 d_mode,
2664 0,
2665 t_mode,
2666 0,
2667 t_mode,
2668 /* dc */
2669 q_mode,
2670 q_mode,
2671 q_mode,
2672 q_mode,
2673 q_mode,
2674 q_mode,
2675 q_mode,
2676 q_mode,
2677 /* dd */
2678 q_mode,
2679 q_mode,
2680 q_mode,
2681 q_mode,
2682 0,
2683 0,
2684 0,
2685 w_mode,
2686 /* de */
2687 w_mode,
2688 w_mode,
2689 w_mode,
2690 w_mode,
2691 w_mode,
2692 w_mode,
2693 w_mode,
2694 w_mode,
2695 /* df */
2696 w_mode,
2697 w_mode,
2698 w_mode,
2699 w_mode,
2700 t_mode,
2701 q_mode,
2702 t_mode,
2703 q_mode
2704 };
2705
2706 #define ST OP_ST, 0
2707 #define STi OP_STi, 0
2708
2709 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
2710 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
2711 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
2712 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
2713 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
2714 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
2715 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
2716 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
2717 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
2718
2719 static const struct dis386 float_reg[][8] = {
2720 /* d8 */
2721 {
2722 { "fadd", ST, STi, XX, XX },
2723 { "fmul", ST, STi, XX, XX },
2724 { "fcom", STi, XX, XX, XX },
2725 { "fcomp", STi, XX, XX, XX },
2726 { "fsub", ST, STi, XX, XX },
2727 { "fsubr", ST, STi, XX, XX },
2728 { "fdiv", ST, STi, XX, XX },
2729 { "fdivr", ST, STi, XX, XX },
2730 },
2731 /* d9 */
2732 {
2733 { "fld", STi, XX, XX, XX },
2734 { "fxch", STi, XX, XX, XX },
2735 { FGRPd9_2 },
2736 { "(bad)", XX, XX, XX, XX },
2737 { FGRPd9_4 },
2738 { FGRPd9_5 },
2739 { FGRPd9_6 },
2740 { FGRPd9_7 },
2741 },
2742 /* da */
2743 {
2744 { "fcmovb", ST, STi, XX, XX },
2745 { "fcmove", ST, STi, XX, XX },
2746 { "fcmovbe",ST, STi, XX, XX },
2747 { "fcmovu", ST, STi, XX, XX },
2748 { "(bad)", XX, XX, XX, XX },
2749 { FGRPda_5 },
2750 { "(bad)", XX, XX, XX, XX },
2751 { "(bad)", XX, XX, XX, XX },
2752 },
2753 /* db */
2754 {
2755 { "fcmovnb",ST, STi, XX, XX },
2756 { "fcmovne",ST, STi, XX, XX },
2757 { "fcmovnbe",ST, STi, XX, XX },
2758 { "fcmovnu",ST, STi, XX, XX },
2759 { FGRPdb_4 },
2760 { "fucomi", ST, STi, XX, XX },
2761 { "fcomi", ST, STi, XX, XX },
2762 { "(bad)", XX, XX, XX, XX },
2763 },
2764 /* dc */
2765 {
2766 { "fadd", STi, ST, XX, XX },
2767 { "fmul", STi, ST, XX, XX },
2768 { "(bad)", XX, XX, XX, XX },
2769 { "(bad)", XX, XX, XX, XX },
2770 #if UNIXWARE_COMPAT
2771 { "fsub", STi, ST, XX, XX },
2772 { "fsubr", STi, ST, XX, XX },
2773 { "fdiv", STi, ST, XX, XX },
2774 { "fdivr", STi, ST, XX, XX },
2775 #else
2776 { "fsubr", STi, ST, XX, XX },
2777 { "fsub", STi, ST, XX, XX },
2778 { "fdivr", STi, ST, XX, XX },
2779 { "fdiv", STi, ST, XX, XX },
2780 #endif
2781 },
2782 /* dd */
2783 {
2784 { "ffree", STi, XX, XX, XX },
2785 { "(bad)", XX, XX, XX, XX },
2786 { "fst", STi, XX, XX, XX },
2787 { "fstp", STi, XX, XX, XX },
2788 { "fucom", STi, XX, XX, XX },
2789 { "fucomp", STi, XX, XX, XX },
2790 { "(bad)", XX, XX, XX, XX },
2791 { "(bad)", XX, XX, XX, XX },
2792 },
2793 /* de */
2794 {
2795 { "faddp", STi, ST, XX, XX },
2796 { "fmulp", STi, ST, XX, XX },
2797 { "(bad)", XX, XX, XX, XX },
2798 { FGRPde_3 },
2799 #if UNIXWARE_COMPAT
2800 { "fsubp", STi, ST, XX, XX },
2801 { "fsubrp", STi, ST, XX, XX },
2802 { "fdivp", STi, ST, XX, XX },
2803 { "fdivrp", STi, ST, XX, XX },
2804 #else
2805 { "fsubrp", STi, ST, XX, XX },
2806 { "fsubp", STi, ST, XX, XX },
2807 { "fdivrp", STi, ST, XX, XX },
2808 { "fdivp", STi, ST, XX, XX },
2809 #endif
2810 },
2811 /* df */
2812 {
2813 { "ffreep", STi, XX, XX, XX },
2814 { "(bad)", XX, XX, XX, XX },
2815 { "(bad)", XX, XX, XX, XX },
2816 { "(bad)", XX, XX, XX, XX },
2817 { FGRPdf_4 },
2818 { "fucomip",ST, STi, XX, XX },
2819 { "fcomip", ST, STi, XX, XX },
2820 { "(bad)", XX, XX, XX, XX },
2821 },
2822 };
2823
2824 static char *fgrps[][8] = {
2825 /* d9_2 0 */
2826 {
2827 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2828 },
2829
2830 /* d9_4 1 */
2831 {
2832 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2833 },
2834
2835 /* d9_5 2 */
2836 {
2837 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2838 },
2839
2840 /* d9_6 3 */
2841 {
2842 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2843 },
2844
2845 /* d9_7 4 */
2846 {
2847 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2848 },
2849
2850 /* da_5 5 */
2851 {
2852 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2853 },
2854
2855 /* db_4 6 */
2856 {
2857 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2858 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2859 },
2860
2861 /* de_3 7 */
2862 {
2863 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2864 },
2865
2866 /* df_4 8 */
2867 {
2868 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2869 },
2870 };
2871
2872 static void
2873 dofloat (int sizeflag)
2874 {
2875 const struct dis386 *dp;
2876 unsigned char floatop;
2877
2878 floatop = codep[-1];
2879
2880 if (mod != 3)
2881 {
2882 int fp_indx = (floatop - 0xd8) * 8 + reg;
2883
2884 putop (float_mem[fp_indx], sizeflag);
2885 obufp = op1out;
2886 op_ad = 2;
2887 OP_E (float_mem_mode[fp_indx], sizeflag);
2888 return;
2889 }
2890 /* Skip mod/rm byte. */
2891 MODRM_CHECK;
2892 codep++;
2893
2894 dp = &float_reg[floatop - 0xd8][reg];
2895 if (dp->name == NULL)
2896 {
2897 putop (fgrps[dp->bytemode1][rm], sizeflag);
2898
2899 /* Instruction fnstsw is only one with strange arg. */
2900 if (floatop == 0xdf && codep[-1] == 0xe0)
2901 strcpy (op1out, names16[0]);
2902 }
2903 else
2904 {
2905 putop (dp->name, sizeflag);
2906
2907 obufp = op1out;
2908 op_ad = 2;
2909 if (dp->op1)
2910 (*dp->op1) (dp->bytemode1, sizeflag);
2911
2912 obufp = op2out;
2913 op_ad = 1;
2914 if (dp->op2)
2915 (*dp->op2) (dp->bytemode2, sizeflag);
2916 }
2917 }
2918
2919 static void
2920 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2921 {
2922 oappend ("%st" + intel_syntax);
2923 }
2924
2925 static void
2926 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2927 {
2928 sprintf (scratchbuf, "%%st(%d)", rm);
2929 oappend (scratchbuf + intel_syntax);
2930 }
2931
2932 /* Capital letters in template are macros. */
2933 static int
2934 putop (const char *template, int sizeflag)
2935 {
2936 const char *p;
2937 int alt = 0;
2938
2939 for (p = template; *p; p++)
2940 {
2941 switch (*p)
2942 {
2943 default:
2944 *obufp++ = *p;
2945 break;
2946 case '{':
2947 alt = 0;
2948 if (intel_syntax)
2949 alt += 1;
2950 if (address_mode == mode_64bit)
2951 alt += 2;
2952 while (alt != 0)
2953 {
2954 while (*++p != '|')
2955 {
2956 if (*p == '}')
2957 {
2958 /* Alternative not valid. */
2959 strcpy (obuf, "(bad)");
2960 obufp = obuf + 5;
2961 return 1;
2962 }
2963 else if (*p == '\0')
2964 abort ();
2965 }
2966 alt--;
2967 }
2968 /* Fall through. */
2969 case 'I':
2970 alt = 1;
2971 continue;
2972 case '|':
2973 while (*++p != '}')
2974 {
2975 if (*p == '\0')
2976 abort ();
2977 }
2978 break;
2979 case '}':
2980 break;
2981 case 'A':
2982 if (intel_syntax)
2983 break;
2984 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2985 *obufp++ = 'b';
2986 break;
2987 case 'B':
2988 if (intel_syntax)
2989 break;
2990 if (sizeflag & SUFFIX_ALWAYS)
2991 *obufp++ = 'b';
2992 break;
2993 case 'C':
2994 if (intel_syntax && !alt)
2995 break;
2996 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2997 {
2998 if (sizeflag & DFLAG)
2999 *obufp++ = intel_syntax ? 'd' : 'l';
3000 else
3001 *obufp++ = intel_syntax ? 'w' : 's';
3002 used_prefixes |= (prefixes & PREFIX_DATA);
3003 }
3004 break;
3005 case 'E': /* For jcxz/jecxz */
3006 if (address_mode == mode_64bit)
3007 {
3008 if (sizeflag & AFLAG)
3009 *obufp++ = 'r';
3010 else
3011 *obufp++ = 'e';
3012 }
3013 else
3014 if (sizeflag & AFLAG)
3015 *obufp++ = 'e';
3016 used_prefixes |= (prefixes & PREFIX_ADDR);
3017 break;
3018 case 'F':
3019 if (intel_syntax)
3020 break;
3021 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3022 {
3023 if (sizeflag & AFLAG)
3024 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3025 else
3026 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3027 used_prefixes |= (prefixes & PREFIX_ADDR);
3028 }
3029 break;
3030 case 'H':
3031 if (intel_syntax)
3032 break;
3033 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3034 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3035 {
3036 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3037 *obufp++ = ',';
3038 *obufp++ = 'p';
3039 if (prefixes & PREFIX_DS)
3040 *obufp++ = 't';
3041 else
3042 *obufp++ = 'n';
3043 }
3044 break;
3045 case 'J':
3046 if (intel_syntax)
3047 break;
3048 *obufp++ = 'l';
3049 break;
3050 case 'Z':
3051 if (intel_syntax)
3052 break;
3053 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
3054 {
3055 *obufp++ = 'q';
3056 break;
3057 }
3058 /* Fall through. */
3059 case 'L':
3060 if (intel_syntax)
3061 break;
3062 if (sizeflag & SUFFIX_ALWAYS)
3063 *obufp++ = 'l';
3064 break;
3065 case 'N':
3066 if ((prefixes & PREFIX_FWAIT) == 0)
3067 *obufp++ = 'n';
3068 else
3069 used_prefixes |= PREFIX_FWAIT;
3070 break;
3071 case 'O':
3072 USED_REX (REX_MODE64);
3073 if (rex & REX_MODE64)
3074 *obufp++ = 'o';
3075 else
3076 *obufp++ = 'd';
3077 break;
3078 case 'T':
3079 if (intel_syntax)
3080 break;
3081 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3082 {
3083 *obufp++ = 'q';
3084 break;
3085 }
3086 /* Fall through. */
3087 case 'P':
3088 if (intel_syntax)
3089 break;
3090 if ((prefixes & PREFIX_DATA)
3091 || (rex & REX_MODE64)
3092 || (sizeflag & SUFFIX_ALWAYS))
3093 {
3094 USED_REX (REX_MODE64);
3095 if (rex & REX_MODE64)
3096 *obufp++ = 'q';
3097 else
3098 {
3099 if (sizeflag & DFLAG)
3100 *obufp++ = 'l';
3101 else
3102 *obufp++ = 'w';
3103 }
3104 used_prefixes |= (prefixes & PREFIX_DATA);
3105 }
3106 break;
3107 case 'U':
3108 if (intel_syntax)
3109 break;
3110 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3111 {
3112 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3113 *obufp++ = 'q';
3114 break;
3115 }
3116 /* Fall through. */
3117 case 'Q':
3118 if (intel_syntax && !alt)
3119 break;
3120 USED_REX (REX_MODE64);
3121 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3122 {
3123 if (rex & REX_MODE64)
3124 *obufp++ = 'q';
3125 else
3126 {
3127 if (sizeflag & DFLAG)
3128 *obufp++ = intel_syntax ? 'd' : 'l';
3129 else
3130 *obufp++ = 'w';
3131 }
3132 used_prefixes |= (prefixes & PREFIX_DATA);
3133 }
3134 break;
3135 case 'R':
3136 USED_REX (REX_MODE64);
3137 if (intel_syntax)
3138 {
3139 if (rex & REX_MODE64)
3140 {
3141 *obufp++ = 'q';
3142 *obufp++ = 't';
3143 }
3144 else if (sizeflag & DFLAG)
3145 {
3146 *obufp++ = 'd';
3147 *obufp++ = 'q';
3148 }
3149 else
3150 {
3151 *obufp++ = 'w';
3152 *obufp++ = 'd';
3153 }
3154 }
3155 else
3156 {
3157 if (rex & REX_MODE64)
3158 *obufp++ = 'q';
3159 else if (sizeflag & DFLAG)
3160 *obufp++ = 'l';
3161 else
3162 *obufp++ = 'w';
3163 }
3164 if (!(rex & REX_MODE64))
3165 used_prefixes |= (prefixes & PREFIX_DATA);
3166 break;
3167 case 'V':
3168 if (intel_syntax)
3169 break;
3170 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3171 {
3172 if (sizeflag & SUFFIX_ALWAYS)
3173 *obufp++ = 'q';
3174 break;
3175 }
3176 /* Fall through. */
3177 case 'S':
3178 if (intel_syntax)
3179 break;
3180 if (sizeflag & SUFFIX_ALWAYS)
3181 {
3182 if (rex & REX_MODE64)
3183 *obufp++ = 'q';
3184 else
3185 {
3186 if (sizeflag & DFLAG)
3187 *obufp++ = 'l';
3188 else
3189 *obufp++ = 'w';
3190 used_prefixes |= (prefixes & PREFIX_DATA);
3191 }
3192 }
3193 break;
3194 case 'X':
3195 if (prefixes & PREFIX_DATA)
3196 *obufp++ = 'd';
3197 else
3198 *obufp++ = 's';
3199 used_prefixes |= (prefixes & PREFIX_DATA);
3200 break;
3201 case 'Y':
3202 if (intel_syntax)
3203 break;
3204 if (rex & REX_MODE64)
3205 {
3206 USED_REX (REX_MODE64);
3207 *obufp++ = 'q';
3208 }
3209 break;
3210 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3211 case 'W':
3212 /* operand size flag for cwtl, cbtw */
3213 USED_REX (0);
3214 if (rex)
3215 *obufp++ = 'l';
3216 else if (sizeflag & DFLAG)
3217 *obufp++ = 'w';
3218 else
3219 *obufp++ = 'b';
3220 if (intel_syntax)
3221 {
3222 if (rex)
3223 {
3224 *obufp++ = 'q';
3225 *obufp++ = 'e';
3226 }
3227 if (sizeflag & DFLAG)
3228 {
3229 *obufp++ = 'd';
3230 *obufp++ = 'e';
3231 }
3232 else
3233 {
3234 *obufp++ = 'w';
3235 }
3236 }
3237 if (!rex)
3238 used_prefixes |= (prefixes & PREFIX_DATA);
3239 break;
3240 }
3241 alt = 0;
3242 }
3243 *obufp = 0;
3244 return 0;
3245 }
3246
3247 static void
3248 oappend (const char *s)
3249 {
3250 strcpy (obufp, s);
3251 obufp += strlen (s);
3252 }
3253
3254 static void
3255 append_seg (void)
3256 {
3257 if (prefixes & PREFIX_CS)
3258 {
3259 used_prefixes |= PREFIX_CS;
3260 oappend ("%cs:" + intel_syntax);
3261 }
3262 if (prefixes & PREFIX_DS)
3263 {
3264 used_prefixes |= PREFIX_DS;
3265 oappend ("%ds:" + intel_syntax);
3266 }
3267 if (prefixes & PREFIX_SS)
3268 {
3269 used_prefixes |= PREFIX_SS;
3270 oappend ("%ss:" + intel_syntax);
3271 }
3272 if (prefixes & PREFIX_ES)
3273 {
3274 used_prefixes |= PREFIX_ES;
3275 oappend ("%es:" + intel_syntax);
3276 }
3277 if (prefixes & PREFIX_FS)
3278 {
3279 used_prefixes |= PREFIX_FS;
3280 oappend ("%fs:" + intel_syntax);
3281 }
3282 if (prefixes & PREFIX_GS)
3283 {
3284 used_prefixes |= PREFIX_GS;
3285 oappend ("%gs:" + intel_syntax);
3286 }
3287 }
3288
3289 static void
3290 OP_indirE (int bytemode, int sizeflag)
3291 {
3292 if (!intel_syntax)
3293 oappend ("*");
3294 OP_E (bytemode, sizeflag);
3295 }
3296
3297 static void
3298 print_operand_value (char *buf, int hex, bfd_vma disp)
3299 {
3300 if (address_mode == mode_64bit)
3301 {
3302 if (hex)
3303 {
3304 char tmp[30];
3305 int i;
3306 buf[0] = '0';
3307 buf[1] = 'x';
3308 sprintf_vma (tmp, disp);
3309 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3310 strcpy (buf + 2, tmp + i);
3311 }
3312 else
3313 {
3314 bfd_signed_vma v = disp;
3315 char tmp[30];
3316 int i;
3317 if (v < 0)
3318 {
3319 *(buf++) = '-';
3320 v = -disp;
3321 /* Check for possible overflow on 0x8000000000000000. */
3322 if (v < 0)
3323 {
3324 strcpy (buf, "9223372036854775808");
3325 return;
3326 }
3327 }
3328 if (!v)
3329 {
3330 strcpy (buf, "0");
3331 return;
3332 }
3333
3334 i = 0;
3335 tmp[29] = 0;
3336 while (v)
3337 {
3338 tmp[28 - i] = (v % 10) + '0';
3339 v /= 10;
3340 i++;
3341 }
3342 strcpy (buf, tmp + 29 - i);
3343 }
3344 }
3345 else
3346 {
3347 if (hex)
3348 sprintf (buf, "0x%x", (unsigned int) disp);
3349 else
3350 sprintf (buf, "%d", (int) disp);
3351 }
3352 }
3353
3354 static void
3355 intel_operand_size (int bytemode, int sizeflag)
3356 {
3357 switch (bytemode)
3358 {
3359 case b_mode:
3360 oappend ("BYTE PTR ");
3361 break;
3362 case w_mode:
3363 case dqw_mode:
3364 oappend ("WORD PTR ");
3365 break;
3366 case stack_v_mode:
3367 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3368 {
3369 oappend ("QWORD PTR ");
3370 used_prefixes |= (prefixes & PREFIX_DATA);
3371 break;
3372 }
3373 /* FALLTHRU */
3374 case v_mode:
3375 case dq_mode:
3376 USED_REX (REX_MODE64);
3377 if (rex & REX_MODE64)
3378 oappend ("QWORD PTR ");
3379 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3380 oappend ("DWORD PTR ");
3381 else
3382 oappend ("WORD PTR ");
3383 used_prefixes |= (prefixes & PREFIX_DATA);
3384 break;
3385 case d_mode:
3386 oappend ("DWORD PTR ");
3387 break;
3388 case q_mode:
3389 oappend ("QWORD PTR ");
3390 break;
3391 case m_mode:
3392 if (address_mode == mode_64bit)
3393 oappend ("QWORD PTR ");
3394 else
3395 oappend ("DWORD PTR ");
3396 break;
3397 case f_mode:
3398 if (sizeflag & DFLAG)
3399 oappend ("FWORD PTR ");
3400 else
3401 oappend ("DWORD PTR ");
3402 used_prefixes |= (prefixes & PREFIX_DATA);
3403 break;
3404 case t_mode:
3405 oappend ("TBYTE PTR ");
3406 break;
3407 case x_mode:
3408 oappend ("XMMWORD PTR ");
3409 break;
3410 default:
3411 break;
3412 }
3413 }
3414
3415 static void
3416 OP_E (int bytemode, int sizeflag)
3417 {
3418 bfd_vma disp;
3419 int add = 0;
3420 int riprel = 0;
3421 USED_REX (REX_EXTZ);
3422 if (rex & REX_EXTZ)
3423 add += 8;
3424
3425 /* Skip mod/rm byte. */
3426 MODRM_CHECK;
3427 codep++;
3428
3429 if (mod == 3)
3430 {
3431 switch (bytemode)
3432 {
3433 case b_mode:
3434 USED_REX (0);
3435 if (rex)
3436 oappend (names8rex[rm + add]);
3437 else
3438 oappend (names8[rm + add]);
3439 break;
3440 case w_mode:
3441 oappend (names16[rm + add]);
3442 break;
3443 case d_mode:
3444 oappend (names32[rm + add]);
3445 break;
3446 case q_mode:
3447 oappend (names64[rm + add]);
3448 break;
3449 case m_mode:
3450 if (address_mode == mode_64bit)
3451 oappend (names64[rm + add]);
3452 else
3453 oappend (names32[rm + add]);
3454 break;
3455 case stack_v_mode:
3456 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3457 {
3458 oappend (names64[rm + add]);
3459 used_prefixes |= (prefixes & PREFIX_DATA);
3460 break;
3461 }
3462 bytemode = v_mode;
3463 /* FALLTHRU */
3464 case v_mode:
3465 case dq_mode:
3466 case dqw_mode:
3467 USED_REX (REX_MODE64);
3468 if (rex & REX_MODE64)
3469 oappend (names64[rm + add]);
3470 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3471 oappend (names32[rm + add]);
3472 else
3473 oappend (names16[rm + add]);
3474 used_prefixes |= (prefixes & PREFIX_DATA);
3475 break;
3476 case 0:
3477 break;
3478 default:
3479 oappend (INTERNAL_DISASSEMBLER_ERROR);
3480 break;
3481 }
3482 return;
3483 }
3484
3485 disp = 0;
3486 if (intel_syntax)
3487 intel_operand_size (bytemode, sizeflag);
3488 append_seg ();
3489
3490 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
3491 {
3492 int havesib;
3493 int havebase;
3494 int base;
3495 int index = 0;
3496 int scale = 0;
3497
3498 havesib = 0;
3499 havebase = 1;
3500 base = rm;
3501
3502 if (base == 4)
3503 {
3504 havesib = 1;
3505 FETCH_DATA (the_info, codep + 1);
3506 index = (*codep >> 3) & 7;
3507 if (address_mode == mode_64bit || index != 0x4)
3508 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3509 scale = (*codep >> 6) & 3;
3510 base = *codep & 7;
3511 USED_REX (REX_EXTY);
3512 if (rex & REX_EXTY)
3513 index += 8;
3514 codep++;
3515 }
3516 base += add;
3517
3518 switch (mod)
3519 {
3520 case 0:
3521 if ((base & 7) == 5)
3522 {
3523 havebase = 0;
3524 if (address_mode == mode_64bit && !havesib)
3525 riprel = 1;
3526 disp = get32s ();
3527 }
3528 break;
3529 case 1:
3530 FETCH_DATA (the_info, codep + 1);
3531 disp = *codep++;
3532 if ((disp & 0x80) != 0)
3533 disp -= 0x100;
3534 break;
3535 case 2:
3536 disp = get32s ();
3537 break;
3538 }
3539
3540 if (!intel_syntax)
3541 if (mod != 0 || (base & 7) == 5)
3542 {
3543 print_operand_value (scratchbuf, !riprel, disp);
3544 oappend (scratchbuf);
3545 if (riprel)
3546 {
3547 set_op (disp, 1);
3548 oappend ("(%rip)");
3549 }
3550 }
3551
3552 if (havebase || (havesib && (index != 4 || scale != 0)))
3553 {
3554 *obufp++ = open_char;
3555 if (intel_syntax && riprel)
3556 oappend ("rip + ");
3557 *obufp = '\0';
3558 if (havebase)
3559 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
3560 ? names64[base] : names32[base]);
3561 if (havesib)
3562 {
3563 if (index != 4)
3564 {
3565 if (!intel_syntax || havebase)
3566 {
3567 *obufp++ = separator_char;
3568 *obufp = '\0';
3569 }
3570 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
3571 ? names64[index] : names32[index]);
3572 }
3573 if (scale != 0 || (!intel_syntax && index != 4))
3574 {
3575 *obufp++ = scale_char;
3576 *obufp = '\0';
3577 sprintf (scratchbuf, "%d", 1 << scale);
3578 oappend (scratchbuf);
3579 }
3580 }
3581 if (intel_syntax && disp)
3582 {
3583 if ((bfd_signed_vma) disp > 0)
3584 {
3585 *obufp++ = '+';
3586 *obufp = '\0';
3587 }
3588 else if (mod != 1)
3589 {
3590 *obufp++ = '-';
3591 *obufp = '\0';
3592 disp = - (bfd_signed_vma) disp;
3593 }
3594
3595 print_operand_value (scratchbuf, mod != 1, disp);
3596 oappend (scratchbuf);
3597 }
3598
3599 *obufp++ = close_char;
3600 *obufp = '\0';
3601 }
3602 else if (intel_syntax)
3603 {
3604 if (mod != 0 || (base & 7) == 5)
3605 {
3606 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3607 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3608 ;
3609 else
3610 {
3611 oappend (names_seg[ds_reg - es_reg]);
3612 oappend (":");
3613 }
3614 print_operand_value (scratchbuf, 1, disp);
3615 oappend (scratchbuf);
3616 }
3617 }
3618 }
3619 else
3620 { /* 16 bit address mode */
3621 switch (mod)
3622 {
3623 case 0:
3624 if (rm == 6)
3625 {
3626 disp = get16 ();
3627 if ((disp & 0x8000) != 0)
3628 disp -= 0x10000;
3629 }
3630 break;
3631 case 1:
3632 FETCH_DATA (the_info, codep + 1);
3633 disp = *codep++;
3634 if ((disp & 0x80) != 0)
3635 disp -= 0x100;
3636 break;
3637 case 2:
3638 disp = get16 ();
3639 if ((disp & 0x8000) != 0)
3640 disp -= 0x10000;
3641 break;
3642 }
3643
3644 if (!intel_syntax)
3645 if (mod != 0 || rm == 6)
3646 {
3647 print_operand_value (scratchbuf, 0, disp);
3648 oappend (scratchbuf);
3649 }
3650
3651 if (mod != 0 || rm != 6)
3652 {
3653 *obufp++ = open_char;
3654 *obufp = '\0';
3655 oappend (index16[rm]);
3656 if (intel_syntax && disp)
3657 {
3658 if ((bfd_signed_vma) disp > 0)
3659 {
3660 *obufp++ = '+';
3661 *obufp = '\0';
3662 }
3663 else if (mod != 1)
3664 {
3665 *obufp++ = '-';
3666 *obufp = '\0';
3667 disp = - (bfd_signed_vma) disp;
3668 }
3669
3670 print_operand_value (scratchbuf, mod != 1, disp);
3671 oappend (scratchbuf);
3672 }
3673
3674 *obufp++ = close_char;
3675 *obufp = '\0';
3676 }
3677 else if (intel_syntax)
3678 {
3679 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3680 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3681 ;
3682 else
3683 {
3684 oappend (names_seg[ds_reg - es_reg]);
3685 oappend (":");
3686 }
3687 print_operand_value (scratchbuf, 1, disp & 0xffff);
3688 oappend (scratchbuf);
3689 }
3690 }
3691 }
3692
3693 static void
3694 OP_G (int bytemode, int sizeflag)
3695 {
3696 int add = 0;
3697 USED_REX (REX_EXTX);
3698 if (rex & REX_EXTX)
3699 add += 8;
3700 switch (bytemode)
3701 {
3702 case b_mode:
3703 USED_REX (0);
3704 if (rex)
3705 oappend (names8rex[reg + add]);
3706 else
3707 oappend (names8[reg + add]);
3708 break;
3709 case w_mode:
3710 oappend (names16[reg + add]);
3711 break;
3712 case d_mode:
3713 oappend (names32[reg + add]);
3714 break;
3715 case q_mode:
3716 oappend (names64[reg + add]);
3717 break;
3718 case v_mode:
3719 case dq_mode:
3720 case dqw_mode:
3721 USED_REX (REX_MODE64);
3722 if (rex & REX_MODE64)
3723 oappend (names64[reg + add]);
3724 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3725 oappend (names32[reg + add]);
3726 else
3727 oappend (names16[reg + add]);
3728 used_prefixes |= (prefixes & PREFIX_DATA);
3729 break;
3730 case m_mode:
3731 if (address_mode == mode_64bit)
3732 oappend (names64[reg + add]);
3733 else
3734 oappend (names32[reg + add]);
3735 break;
3736 default:
3737 oappend (INTERNAL_DISASSEMBLER_ERROR);
3738 break;
3739 }
3740 }
3741
3742 static bfd_vma
3743 get64 (void)
3744 {
3745 bfd_vma x;
3746 #ifdef BFD64
3747 unsigned int a;
3748 unsigned int b;
3749
3750 FETCH_DATA (the_info, codep + 8);
3751 a = *codep++ & 0xff;
3752 a |= (*codep++ & 0xff) << 8;
3753 a |= (*codep++ & 0xff) << 16;
3754 a |= (*codep++ & 0xff) << 24;
3755 b = *codep++ & 0xff;
3756 b |= (*codep++ & 0xff) << 8;
3757 b |= (*codep++ & 0xff) << 16;
3758 b |= (*codep++ & 0xff) << 24;
3759 x = a + ((bfd_vma) b << 32);
3760 #else
3761 abort ();
3762 x = 0;
3763 #endif
3764 return x;
3765 }
3766
3767 static bfd_signed_vma
3768 get32 (void)
3769 {
3770 bfd_signed_vma x = 0;
3771
3772 FETCH_DATA (the_info, codep + 4);
3773 x = *codep++ & (bfd_signed_vma) 0xff;
3774 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3775 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3776 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3777 return x;
3778 }
3779
3780 static bfd_signed_vma
3781 get32s (void)
3782 {
3783 bfd_signed_vma x = 0;
3784
3785 FETCH_DATA (the_info, codep + 4);
3786 x = *codep++ & (bfd_signed_vma) 0xff;
3787 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3788 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3789 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3790
3791 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3792
3793 return x;
3794 }
3795
3796 static int
3797 get16 (void)
3798 {
3799 int x = 0;
3800
3801 FETCH_DATA (the_info, codep + 2);
3802 x = *codep++ & 0xff;
3803 x |= (*codep++ & 0xff) << 8;
3804 return x;
3805 }
3806
3807 static void
3808 set_op (bfd_vma op, int riprel)
3809 {
3810 op_index[op_ad] = op_ad;
3811 if (address_mode == mode_64bit)
3812 {
3813 op_address[op_ad] = op;
3814 op_riprel[op_ad] = riprel;
3815 }
3816 else
3817 {
3818 /* Mask to get a 32-bit address. */
3819 op_address[op_ad] = op & 0xffffffff;
3820 op_riprel[op_ad] = riprel & 0xffffffff;
3821 }
3822 }
3823
3824 static void
3825 OP_REG (int code, int sizeflag)
3826 {
3827 const char *s;
3828 int add = 0;
3829 USED_REX (REX_EXTZ);
3830 if (rex & REX_EXTZ)
3831 add = 8;
3832
3833 switch (code)
3834 {
3835 case indir_dx_reg:
3836 if (intel_syntax)
3837 s = "[dx]";
3838 else
3839 s = "(%dx)";
3840 break;
3841 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3842 case sp_reg: case bp_reg: case si_reg: case di_reg:
3843 s = names16[code - ax_reg + add];
3844 break;
3845 case es_reg: case ss_reg: case cs_reg:
3846 case ds_reg: case fs_reg: case gs_reg:
3847 s = names_seg[code - es_reg + add];
3848 break;
3849 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3850 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3851 USED_REX (0);
3852 if (rex)
3853 s = names8rex[code - al_reg + add];
3854 else
3855 s = names8[code - al_reg];
3856 break;
3857 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3858 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3859 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3860 {
3861 s = names64[code - rAX_reg + add];
3862 break;
3863 }
3864 code += eAX_reg - rAX_reg;
3865 /* Fall through. */
3866 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3867 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3868 USED_REX (REX_MODE64);
3869 if (rex & REX_MODE64)
3870 s = names64[code - eAX_reg + add];
3871 else if (sizeflag & DFLAG)
3872 s = names32[code - eAX_reg + add];
3873 else
3874 s = names16[code - eAX_reg + add];
3875 used_prefixes |= (prefixes & PREFIX_DATA);
3876 break;
3877 default:
3878 s = INTERNAL_DISASSEMBLER_ERROR;
3879 break;
3880 }
3881 oappend (s);
3882 }
3883
3884 static void
3885 OP_IMREG (int code, int sizeflag)
3886 {
3887 const char *s;
3888
3889 switch (code)
3890 {
3891 case indir_dx_reg:
3892 if (intel_syntax)
3893 s = "[dx]";
3894 else
3895 s = "(%dx)";
3896 break;
3897 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3898 case sp_reg: case bp_reg: case si_reg: case di_reg:
3899 s = names16[code - ax_reg];
3900 break;
3901 case es_reg: case ss_reg: case cs_reg:
3902 case ds_reg: case fs_reg: case gs_reg:
3903 s = names_seg[code - es_reg];
3904 break;
3905 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3906 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3907 USED_REX (0);
3908 if (rex)
3909 s = names8rex[code - al_reg];
3910 else
3911 s = names8[code - al_reg];
3912 break;
3913 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3914 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3915 USED_REX (REX_MODE64);
3916 if (rex & REX_MODE64)
3917 s = names64[code - eAX_reg];
3918 else if (sizeflag & DFLAG)
3919 s = names32[code - eAX_reg];
3920 else
3921 s = names16[code - eAX_reg];
3922 used_prefixes |= (prefixes & PREFIX_DATA);
3923 break;
3924 default:
3925 s = INTERNAL_DISASSEMBLER_ERROR;
3926 break;
3927 }
3928 oappend (s);
3929 }
3930
3931 static void
3932 OP_I (int bytemode, int sizeflag)
3933 {
3934 bfd_signed_vma op;
3935 bfd_signed_vma mask = -1;
3936
3937 switch (bytemode)
3938 {
3939 case b_mode:
3940 FETCH_DATA (the_info, codep + 1);
3941 op = *codep++;
3942 mask = 0xff;
3943 break;
3944 case q_mode:
3945 if (address_mode == mode_64bit)
3946 {
3947 op = get32s ();
3948 break;
3949 }
3950 /* Fall through. */
3951 case v_mode:
3952 USED_REX (REX_MODE64);
3953 if (rex & REX_MODE64)
3954 op = get32s ();
3955 else if (sizeflag & DFLAG)
3956 {
3957 op = get32 ();
3958 mask = 0xffffffff;
3959 }
3960 else
3961 {
3962 op = get16 ();
3963 mask = 0xfffff;
3964 }
3965 used_prefixes |= (prefixes & PREFIX_DATA);
3966 break;
3967 case w_mode:
3968 mask = 0xfffff;
3969 op = get16 ();
3970 break;
3971 case const_1_mode:
3972 if (intel_syntax)
3973 oappend ("1");
3974 return;
3975 default:
3976 oappend (INTERNAL_DISASSEMBLER_ERROR);
3977 return;
3978 }
3979
3980 op &= mask;
3981 scratchbuf[0] = '$';
3982 print_operand_value (scratchbuf + 1, 1, op);
3983 oappend (scratchbuf + intel_syntax);
3984 scratchbuf[0] = '\0';
3985 }
3986
3987 static void
3988 OP_I64 (int bytemode, int sizeflag)
3989 {
3990 bfd_signed_vma op;
3991 bfd_signed_vma mask = -1;
3992
3993 if (address_mode != mode_64bit)
3994 {
3995 OP_I (bytemode, sizeflag);
3996 return;
3997 }
3998
3999 switch (bytemode)
4000 {
4001 case b_mode:
4002 FETCH_DATA (the_info, codep + 1);
4003 op = *codep++;
4004 mask = 0xff;
4005 break;
4006 case v_mode:
4007 USED_REX (REX_MODE64);
4008 if (rex & REX_MODE64)
4009 op = get64 ();
4010 else if (sizeflag & DFLAG)
4011 {
4012 op = get32 ();
4013 mask = 0xffffffff;
4014 }
4015 else
4016 {
4017 op = get16 ();
4018 mask = 0xfffff;
4019 }
4020 used_prefixes |= (prefixes & PREFIX_DATA);
4021 break;
4022 case w_mode:
4023 mask = 0xfffff;
4024 op = get16 ();
4025 break;
4026 default:
4027 oappend (INTERNAL_DISASSEMBLER_ERROR);
4028 return;
4029 }
4030
4031 op &= mask;
4032 scratchbuf[0] = '$';
4033 print_operand_value (scratchbuf + 1, 1, op);
4034 oappend (scratchbuf + intel_syntax);
4035 scratchbuf[0] = '\0';
4036 }
4037
4038 static void
4039 OP_sI (int bytemode, int sizeflag)
4040 {
4041 bfd_signed_vma op;
4042 bfd_signed_vma mask = -1;
4043
4044 switch (bytemode)
4045 {
4046 case b_mode:
4047 FETCH_DATA (the_info, codep + 1);
4048 op = *codep++;
4049 if ((op & 0x80) != 0)
4050 op -= 0x100;
4051 mask = 0xffffffff;
4052 break;
4053 case v_mode:
4054 USED_REX (REX_MODE64);
4055 if (rex & REX_MODE64)
4056 op = get32s ();
4057 else if (sizeflag & DFLAG)
4058 {
4059 op = get32s ();
4060 mask = 0xffffffff;
4061 }
4062 else
4063 {
4064 mask = 0xffffffff;
4065 op = get16 ();
4066 if ((op & 0x8000) != 0)
4067 op -= 0x10000;
4068 }
4069 used_prefixes |= (prefixes & PREFIX_DATA);
4070 break;
4071 case w_mode:
4072 op = get16 ();
4073 mask = 0xffffffff;
4074 if ((op & 0x8000) != 0)
4075 op -= 0x10000;
4076 break;
4077 default:
4078 oappend (INTERNAL_DISASSEMBLER_ERROR);
4079 return;
4080 }
4081
4082 scratchbuf[0] = '$';
4083 print_operand_value (scratchbuf + 1, 1, op);
4084 oappend (scratchbuf + intel_syntax);
4085 }
4086
4087 static void
4088 OP_J (int bytemode, int sizeflag)
4089 {
4090 bfd_vma disp;
4091 bfd_vma mask = -1;
4092
4093 switch (bytemode)
4094 {
4095 case b_mode:
4096 FETCH_DATA (the_info, codep + 1);
4097 disp = *codep++;
4098 if ((disp & 0x80) != 0)
4099 disp -= 0x100;
4100 break;
4101 case v_mode:
4102 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
4103 disp = get32s ();
4104 else
4105 {
4106 disp = get16 ();
4107 /* For some reason, a data16 prefix on a jump instruction
4108 means that the pc is masked to 16 bits after the
4109 displacement is added! */
4110 mask = 0xffff;
4111 }
4112 break;
4113 default:
4114 oappend (INTERNAL_DISASSEMBLER_ERROR);
4115 return;
4116 }
4117 disp = (start_pc + codep - start_codep + disp) & mask;
4118 set_op (disp, 0);
4119 print_operand_value (scratchbuf, 1, disp);
4120 oappend (scratchbuf);
4121 }
4122
4123 static void
4124 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4125 {
4126 oappend (names_seg[reg]);
4127 }
4128
4129 static void
4130 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
4131 {
4132 int seg, offset;
4133
4134 if (sizeflag & DFLAG)
4135 {
4136 offset = get32 ();
4137 seg = get16 ();
4138 }
4139 else
4140 {
4141 offset = get16 ();
4142 seg = get16 ();
4143 }
4144 used_prefixes |= (prefixes & PREFIX_DATA);
4145 if (intel_syntax)
4146 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
4147 else
4148 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
4149 oappend (scratchbuf);
4150 }
4151
4152 static void
4153 OP_OFF (int bytemode, int sizeflag)
4154 {
4155 bfd_vma off;
4156
4157 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4158 intel_operand_size (bytemode, sizeflag);
4159 append_seg ();
4160
4161 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
4162 off = get32 ();
4163 else
4164 off = get16 ();
4165
4166 if (intel_syntax)
4167 {
4168 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4169 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4170 {
4171 oappend (names_seg[ds_reg - es_reg]);
4172 oappend (":");
4173 }
4174 }
4175 print_operand_value (scratchbuf, 1, off);
4176 oappend (scratchbuf);
4177 }
4178
4179 static void
4180 OP_OFF64 (int bytemode, int sizeflag)
4181 {
4182 bfd_vma off;
4183
4184 if (address_mode != mode_64bit)
4185 {
4186 OP_OFF (bytemode, sizeflag);
4187 return;
4188 }
4189
4190 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4191 intel_operand_size (bytemode, sizeflag);
4192 append_seg ();
4193
4194 off = get64 ();
4195
4196 if (intel_syntax)
4197 {
4198 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4199 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4200 {
4201 oappend (names_seg[ds_reg - es_reg]);
4202 oappend (":");
4203 }
4204 }
4205 print_operand_value (scratchbuf, 1, off);
4206 oappend (scratchbuf);
4207 }
4208
4209 static void
4210 ptr_reg (int code, int sizeflag)
4211 {
4212 const char *s;
4213
4214 *obufp++ = open_char;
4215 used_prefixes |= (prefixes & PREFIX_ADDR);
4216 if (address_mode == mode_64bit)
4217 {
4218 if (!(sizeflag & AFLAG))
4219 s = names32[code - eAX_reg];
4220 else
4221 s = names64[code - eAX_reg];
4222 }
4223 else if (sizeflag & AFLAG)
4224 s = names32[code - eAX_reg];
4225 else
4226 s = names16[code - eAX_reg];
4227 oappend (s);
4228 *obufp++ = close_char;
4229 *obufp = 0;
4230 }
4231
4232 static void
4233 OP_ESreg (int code, int sizeflag)
4234 {
4235 if (intel_syntax)
4236 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
4237 oappend ("%es:" + intel_syntax);
4238 ptr_reg (code, sizeflag);
4239 }
4240
4241 static void
4242 OP_DSreg (int code, int sizeflag)
4243 {
4244 if (intel_syntax)
4245 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4246 ? v_mode
4247 : b_mode,
4248 sizeflag);
4249 if ((prefixes
4250 & (PREFIX_CS
4251 | PREFIX_DS
4252 | PREFIX_SS
4253 | PREFIX_ES
4254 | PREFIX_FS
4255 | PREFIX_GS)) == 0)
4256 prefixes |= PREFIX_DS;
4257 append_seg ();
4258 ptr_reg (code, sizeflag);
4259 }
4260
4261 static void
4262 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4263 {
4264 int add = 0;
4265 if (rex & REX_EXTX)
4266 {
4267 USED_REX (REX_EXTX);
4268 add = 8;
4269 }
4270 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
4271 {
4272 used_prefixes |= PREFIX_LOCK;
4273 add = 8;
4274 }
4275 sprintf (scratchbuf, "%%cr%d", reg + add);
4276 oappend (scratchbuf + intel_syntax);
4277 }
4278
4279 static void
4280 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4281 {
4282 int add = 0;
4283 USED_REX (REX_EXTX);
4284 if (rex & REX_EXTX)
4285 add = 8;
4286 if (intel_syntax)
4287 sprintf (scratchbuf, "db%d", reg + add);
4288 else
4289 sprintf (scratchbuf, "%%db%d", reg + add);
4290 oappend (scratchbuf);
4291 }
4292
4293 static void
4294 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4295 {
4296 sprintf (scratchbuf, "%%tr%d", reg);
4297 oappend (scratchbuf + intel_syntax);
4298 }
4299
4300 static void
4301 OP_Rd (int bytemode, int sizeflag)
4302 {
4303 if (mod == 3)
4304 OP_E (bytemode, sizeflag);
4305 else
4306 BadOp ();
4307 }
4308
4309 static void
4310 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4311 {
4312 used_prefixes |= (prefixes & PREFIX_DATA);
4313 if (prefixes & PREFIX_DATA)
4314 {
4315 int add = 0;
4316 USED_REX (REX_EXTX);
4317 if (rex & REX_EXTX)
4318 add = 8;
4319 sprintf (scratchbuf, "%%xmm%d", reg + add);
4320 }
4321 else
4322 sprintf (scratchbuf, "%%mm%d", reg);
4323 oappend (scratchbuf + intel_syntax);
4324 }
4325
4326 static void
4327 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4328 {
4329 int add = 0;
4330 USED_REX (REX_EXTX);
4331 if (rex & REX_EXTX)
4332 add = 8;
4333 sprintf (scratchbuf, "%%xmm%d", reg + add);
4334 oappend (scratchbuf + intel_syntax);
4335 }
4336
4337 static void
4338 OP_EM (int bytemode, int sizeflag)
4339 {
4340 if (mod != 3)
4341 {
4342 if (intel_syntax && bytemode == v_mode)
4343 {
4344 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4345 used_prefixes |= (prefixes & PREFIX_DATA);
4346 }
4347 OP_E (bytemode, sizeflag);
4348 return;
4349 }
4350
4351 /* Skip mod/rm byte. */
4352 MODRM_CHECK;
4353 codep++;
4354 used_prefixes |= (prefixes & PREFIX_DATA);
4355 if (prefixes & PREFIX_DATA)
4356 {
4357 int add = 0;
4358
4359 USED_REX (REX_EXTZ);
4360 if (rex & REX_EXTZ)
4361 add = 8;
4362 sprintf (scratchbuf, "%%xmm%d", rm + add);
4363 }
4364 else
4365 sprintf (scratchbuf, "%%mm%d", rm);
4366 oappend (scratchbuf + intel_syntax);
4367 }
4368
4369 /* cvt* are the only instructions in sse2 which have
4370 both SSE and MMX operands and also have 0x66 prefix
4371 in their opcode. 0x66 was originally used to differentiate
4372 between SSE and MMX instruction(operands). So we have to handle the
4373 cvt* separately using OP_EMC and OP_MXC */
4374 static void
4375 OP_EMC (int bytemode, int sizeflag)
4376 {
4377 if (mod != 3)
4378 {
4379 if (intel_syntax && bytemode == v_mode)
4380 {
4381 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4382 used_prefixes |= (prefixes & PREFIX_DATA);
4383 }
4384 OP_E (bytemode, sizeflag);
4385 return;
4386 }
4387
4388 /* Skip mod/rm byte. */
4389 MODRM_CHECK;
4390 codep++;
4391 used_prefixes |= (prefixes & PREFIX_DATA);
4392 sprintf (scratchbuf, "%%mm%d", rm);
4393 oappend (scratchbuf + intel_syntax);
4394 }
4395
4396 static void
4397 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4398 {
4399 used_prefixes |= (prefixes & PREFIX_DATA);
4400 sprintf (scratchbuf, "%%mm%d", reg);
4401 oappend (scratchbuf + intel_syntax);
4402 }
4403
4404 static void
4405 OP_EX (int bytemode, int sizeflag)
4406 {
4407 int add = 0;
4408 if (mod != 3)
4409 {
4410 if (intel_syntax && bytemode == v_mode)
4411 {
4412 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4413 {
4414 case 0: bytemode = x_mode; break;
4415 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4416 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4417 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4418 default: bytemode = 0; break;
4419 }
4420 }
4421 OP_E (bytemode, sizeflag);
4422 return;
4423 }
4424 USED_REX (REX_EXTZ);
4425 if (rex & REX_EXTZ)
4426 add = 8;
4427
4428 /* Skip mod/rm byte. */
4429 MODRM_CHECK;
4430 codep++;
4431 sprintf (scratchbuf, "%%xmm%d", rm + add);
4432 oappend (scratchbuf + intel_syntax);
4433 }
4434
4435 static void
4436 OP_MS (int bytemode, int sizeflag)
4437 {
4438 if (mod == 3)
4439 OP_EM (bytemode, sizeflag);
4440 else
4441 BadOp ();
4442 }
4443
4444 static void
4445 OP_XS (int bytemode, int sizeflag)
4446 {
4447 if (mod == 3)
4448 OP_EX (bytemode, sizeflag);
4449 else
4450 BadOp ();
4451 }
4452
4453 static void
4454 OP_M (int bytemode, int sizeflag)
4455 {
4456 if (mod == 3)
4457 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4458 else
4459 OP_E (bytemode, sizeflag);
4460 }
4461
4462 static void
4463 OP_0f07 (int bytemode, int sizeflag)
4464 {
4465 if (mod != 3 || rm != 0)
4466 BadOp ();
4467 else
4468 OP_E (bytemode, sizeflag);
4469 }
4470
4471 static void
4472 OP_0fae (int bytemode, int sizeflag)
4473 {
4474 if (mod == 3)
4475 {
4476 if (reg == 7)
4477 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4478
4479 if (reg < 5 || rm != 0)
4480 {
4481 BadOp (); /* bad sfence, mfence, or lfence */
4482 return;
4483 }
4484 }
4485 else if (reg != 7)
4486 {
4487 BadOp (); /* bad clflush */
4488 return;
4489 }
4490
4491 OP_E (bytemode, sizeflag);
4492 }
4493
4494 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
4495 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
4496 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
4497 */
4498
4499 static void
4500 NOP_Fixup1 (int bytemode, int sizeflag)
4501 {
4502 if (prefixes == PREFIX_REPZ)
4503 strcpy (obuf, "pause");
4504 else if (prefixes == PREFIX_DATA
4505 || ((rex & REX_MODE64) && rex != 0x48))
4506 OP_REG (bytemode, sizeflag);
4507 else
4508 strcpy (obuf, "nop");
4509 }
4510
4511 static void
4512 NOP_Fixup2 (int bytemode, int sizeflag)
4513 {
4514 if (prefixes == PREFIX_DATA
4515 || ((rex & REX_MODE64) && rex != 0x48))
4516 OP_IMREG (bytemode, sizeflag);
4517 }
4518
4519 static const char *const Suffix3DNow[] = {
4520 /* 00 */ NULL, NULL, NULL, NULL,
4521 /* 04 */ NULL, NULL, NULL, NULL,
4522 /* 08 */ NULL, NULL, NULL, NULL,
4523 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4524 /* 10 */ NULL, NULL, NULL, NULL,
4525 /* 14 */ NULL, NULL, NULL, NULL,
4526 /* 18 */ NULL, NULL, NULL, NULL,
4527 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4528 /* 20 */ NULL, NULL, NULL, NULL,
4529 /* 24 */ NULL, NULL, NULL, NULL,
4530 /* 28 */ NULL, NULL, NULL, NULL,
4531 /* 2C */ NULL, NULL, NULL, NULL,
4532 /* 30 */ NULL, NULL, NULL, NULL,
4533 /* 34 */ NULL, NULL, NULL, NULL,
4534 /* 38 */ NULL, NULL, NULL, NULL,
4535 /* 3C */ NULL, NULL, NULL, NULL,
4536 /* 40 */ NULL, NULL, NULL, NULL,
4537 /* 44 */ NULL, NULL, NULL, NULL,
4538 /* 48 */ NULL, NULL, NULL, NULL,
4539 /* 4C */ NULL, NULL, NULL, NULL,
4540 /* 50 */ NULL, NULL, NULL, NULL,
4541 /* 54 */ NULL, NULL, NULL, NULL,
4542 /* 58 */ NULL, NULL, NULL, NULL,
4543 /* 5C */ NULL, NULL, NULL, NULL,
4544 /* 60 */ NULL, NULL, NULL, NULL,
4545 /* 64 */ NULL, NULL, NULL, NULL,
4546 /* 68 */ NULL, NULL, NULL, NULL,
4547 /* 6C */ NULL, NULL, NULL, NULL,
4548 /* 70 */ NULL, NULL, NULL, NULL,
4549 /* 74 */ NULL, NULL, NULL, NULL,
4550 /* 78 */ NULL, NULL, NULL, NULL,
4551 /* 7C */ NULL, NULL, NULL, NULL,
4552 /* 80 */ NULL, NULL, NULL, NULL,
4553 /* 84 */ NULL, NULL, NULL, NULL,
4554 /* 88 */ NULL, NULL, "pfnacc", NULL,
4555 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4556 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4557 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4558 /* 98 */ NULL, NULL, "pfsub", NULL,
4559 /* 9C */ NULL, NULL, "pfadd", NULL,
4560 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4561 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4562 /* A8 */ NULL, NULL, "pfsubr", NULL,
4563 /* AC */ NULL, NULL, "pfacc", NULL,
4564 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4565 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4566 /* B8 */ NULL, NULL, NULL, "pswapd",
4567 /* BC */ NULL, NULL, NULL, "pavgusb",
4568 /* C0 */ NULL, NULL, NULL, NULL,
4569 /* C4 */ NULL, NULL, NULL, NULL,
4570 /* C8 */ NULL, NULL, NULL, NULL,
4571 /* CC */ NULL, NULL, NULL, NULL,
4572 /* D0 */ NULL, NULL, NULL, NULL,
4573 /* D4 */ NULL, NULL, NULL, NULL,
4574 /* D8 */ NULL, NULL, NULL, NULL,
4575 /* DC */ NULL, NULL, NULL, NULL,
4576 /* E0 */ NULL, NULL, NULL, NULL,
4577 /* E4 */ NULL, NULL, NULL, NULL,
4578 /* E8 */ NULL, NULL, NULL, NULL,
4579 /* EC */ NULL, NULL, NULL, NULL,
4580 /* F0 */ NULL, NULL, NULL, NULL,
4581 /* F4 */ NULL, NULL, NULL, NULL,
4582 /* F8 */ NULL, NULL, NULL, NULL,
4583 /* FC */ NULL, NULL, NULL, NULL,
4584 };
4585
4586 static void
4587 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4588 {
4589 const char *mnemonic;
4590
4591 FETCH_DATA (the_info, codep + 1);
4592 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4593 place where an 8-bit immediate would normally go. ie. the last
4594 byte of the instruction. */
4595 obufp = obuf + strlen (obuf);
4596 mnemonic = Suffix3DNow[*codep++ & 0xff];
4597 if (mnemonic)
4598 oappend (mnemonic);
4599 else
4600 {
4601 /* Since a variable sized modrm/sib chunk is between the start
4602 of the opcode (0x0f0f) and the opcode suffix, we need to do
4603 all the modrm processing first, and don't know until now that
4604 we have a bad opcode. This necessitates some cleaning up. */
4605 op1out[0] = '\0';
4606 op2out[0] = '\0';
4607 BadOp ();
4608 }
4609 }
4610
4611 static const char *simd_cmp_op[] = {
4612 "eq",
4613 "lt",
4614 "le",
4615 "unord",
4616 "neq",
4617 "nlt",
4618 "nle",
4619 "ord"
4620 };
4621
4622 static void
4623 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4624 {
4625 unsigned int cmp_type;
4626
4627 FETCH_DATA (the_info, codep + 1);
4628 obufp = obuf + strlen (obuf);
4629 cmp_type = *codep++ & 0xff;
4630 if (cmp_type < 8)
4631 {
4632 char suffix1 = 'p', suffix2 = 's';
4633 used_prefixes |= (prefixes & PREFIX_REPZ);
4634 if (prefixes & PREFIX_REPZ)
4635 suffix1 = 's';
4636 else
4637 {
4638 used_prefixes |= (prefixes & PREFIX_DATA);
4639 if (prefixes & PREFIX_DATA)
4640 suffix2 = 'd';
4641 else
4642 {
4643 used_prefixes |= (prefixes & PREFIX_REPNZ);
4644 if (prefixes & PREFIX_REPNZ)
4645 suffix1 = 's', suffix2 = 'd';
4646 }
4647 }
4648 sprintf (scratchbuf, "cmp%s%c%c",
4649 simd_cmp_op[cmp_type], suffix1, suffix2);
4650 used_prefixes |= (prefixes & PREFIX_REPZ);
4651 oappend (scratchbuf);
4652 }
4653 else
4654 {
4655 /* We have a bad extension byte. Clean up. */
4656 op1out[0] = '\0';
4657 op2out[0] = '\0';
4658 BadOp ();
4659 }
4660 }
4661
4662 static void
4663 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4664 {
4665 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4666 forms of these instructions. */
4667 if (mod == 3)
4668 {
4669 char *p = obuf + strlen (obuf);
4670 *(p + 1) = '\0';
4671 *p = *(p - 1);
4672 *(p - 1) = *(p - 2);
4673 *(p - 2) = *(p - 3);
4674 *(p - 3) = extrachar;
4675 }
4676 }
4677
4678 static void
4679 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4680 {
4681 if (mod == 3 && reg == 1 && rm <= 1)
4682 {
4683 /* Override "sidt". */
4684 size_t olen = strlen (obuf);
4685 char *p = obuf + olen - 4;
4686 const char **names = (address_mode == mode_64bit
4687 ? names64 : names32);
4688
4689 /* We might have a suffix when disassembling with -Msuffix. */
4690 if (*p == 'i')
4691 --p;
4692
4693 /* Remove "addr16/addr32" if we aren't in Intel mode. */
4694 if (!intel_syntax
4695 && (prefixes & PREFIX_ADDR)
4696 && olen >= (4 + 7)
4697 && *(p - 1) == ' '
4698 && strncmp (p - 7, "addr", 4) == 0
4699 && (strncmp (p - 3, "16", 2) == 0
4700 || strncmp (p - 3, "32", 2) == 0))
4701 p -= 7;
4702
4703 if (rm)
4704 {
4705 /* mwait %eax,%ecx */
4706 strcpy (p, "mwait");
4707 if (!intel_syntax)
4708 strcpy (op1out, names[0]);
4709 }
4710 else
4711 {
4712 /* monitor %eax,%ecx,%edx" */
4713 strcpy (p, "monitor");
4714 if (!intel_syntax)
4715 {
4716 const char **op1_names;
4717 if (!(prefixes & PREFIX_ADDR))
4718 op1_names = (address_mode == mode_16bit
4719 ? names16 : names);
4720 else
4721 {
4722 op1_names = (address_mode != mode_32bit
4723 ? names32 : names16);
4724 used_prefixes |= PREFIX_ADDR;
4725 }
4726 strcpy (op1out, op1_names[0]);
4727 strcpy (op3out, names[2]);
4728 }
4729 }
4730 if (!intel_syntax)
4731 {
4732 strcpy (op2out, names[1]);
4733 two_source_ops = 1;
4734 }
4735
4736 codep++;
4737 }
4738 else
4739 OP_M (0, sizeflag);
4740 }
4741
4742 static void
4743 SVME_Fixup (int bytemode, int sizeflag)
4744 {
4745 const char *alt;
4746 char *p;
4747
4748 switch (*codep)
4749 {
4750 case 0xd8:
4751 alt = "vmrun";
4752 break;
4753 case 0xd9:
4754 alt = "vmmcall";
4755 break;
4756 case 0xda:
4757 alt = "vmload";
4758 break;
4759 case 0xdb:
4760 alt = "vmsave";
4761 break;
4762 case 0xdc:
4763 alt = "stgi";
4764 break;
4765 case 0xdd:
4766 alt = "clgi";
4767 break;
4768 case 0xde:
4769 alt = "skinit";
4770 break;
4771 case 0xdf:
4772 alt = "invlpga";
4773 break;
4774 default:
4775 OP_M (bytemode, sizeflag);
4776 return;
4777 }
4778 /* Override "lidt". */
4779 p = obuf + strlen (obuf) - 4;
4780 /* We might have a suffix. */
4781 if (*p == 'i')
4782 --p;
4783 strcpy (p, alt);
4784 if (!(prefixes & PREFIX_ADDR))
4785 {
4786 ++codep;
4787 return;
4788 }
4789 used_prefixes |= PREFIX_ADDR;
4790 switch (*codep++)
4791 {
4792 case 0xdf:
4793 strcpy (op2out, names32[1]);
4794 two_source_ops = 1;
4795 /* Fall through. */
4796 case 0xd8:
4797 case 0xda:
4798 case 0xdb:
4799 *obufp++ = open_char;
4800 if (address_mode == mode_64bit || (sizeflag & AFLAG))
4801 alt = names32[0];
4802 else
4803 alt = names16[0];
4804 strcpy (obufp, alt);
4805 obufp += strlen (alt);
4806 *obufp++ = close_char;
4807 *obufp = '\0';
4808 break;
4809 }
4810 }
4811
4812 static void
4813 INVLPG_Fixup (int bytemode, int sizeflag)
4814 {
4815 const char *alt;
4816
4817 switch (*codep)
4818 {
4819 case 0xf8:
4820 alt = "swapgs";
4821 break;
4822 case 0xf9:
4823 alt = "rdtscp";
4824 break;
4825 default:
4826 OP_M (bytemode, sizeflag);
4827 return;
4828 }
4829 /* Override "invlpg". */
4830 strcpy (obuf + strlen (obuf) - 6, alt);
4831 codep++;
4832 }
4833
4834 static void
4835 BadOp (void)
4836 {
4837 /* Throw away prefixes and 1st. opcode byte. */
4838 codep = insn_codep + 1;
4839 oappend ("(bad)");
4840 }
4841
4842 static void
4843 SEG_Fixup (int extrachar, int sizeflag)
4844 {
4845 if (mod == 3)
4846 {
4847 /* We need to add a proper suffix with
4848
4849 movw %ds,%ax
4850 movl %ds,%eax
4851 movq %ds,%rax
4852 movw %ax,%ds
4853 movl %eax,%ds
4854 movq %rax,%ds
4855 */
4856 const char *suffix;
4857
4858 if (prefixes & PREFIX_DATA)
4859 suffix = "w";
4860 else
4861 {
4862 USED_REX (REX_MODE64);
4863 if (rex & REX_MODE64)
4864 suffix = "q";
4865 else
4866 suffix = "l";
4867 }
4868 strcat (obuf, suffix);
4869 }
4870 else
4871 {
4872 /* We need to fix the suffix for
4873
4874 movw %ds,(%eax)
4875 movw %ds,(%rax)
4876 movw (%eax),%ds
4877 movw (%rax),%ds
4878
4879 Override "mov[l|q]". */
4880 char *p = obuf + strlen (obuf) - 1;
4881
4882 /* We might not have a suffix. */
4883 if (*p == 'v')
4884 ++p;
4885 *p = 'w';
4886 }
4887
4888 OP_E (extrachar, sizeflag);
4889 }
4890
4891 static void
4892 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4893 {
4894 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
4895 {
4896 /* Override "sgdt". */
4897 char *p = obuf + strlen (obuf) - 4;
4898
4899 /* We might have a suffix when disassembling with -Msuffix. */
4900 if (*p == 'g')
4901 --p;
4902
4903 switch (rm)
4904 {
4905 case 1:
4906 strcpy (p, "vmcall");
4907 break;
4908 case 2:
4909 strcpy (p, "vmlaunch");
4910 break;
4911 case 3:
4912 strcpy (p, "vmresume");
4913 break;
4914 case 4:
4915 strcpy (p, "vmxoff");
4916 break;
4917 }
4918
4919 codep++;
4920 }
4921 else
4922 OP_E (0, sizeflag);
4923 }
4924
4925 static void
4926 OP_VMX (int bytemode, int sizeflag)
4927 {
4928 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
4929 if (prefixes & PREFIX_DATA)
4930 strcpy (obuf, "vmclear");
4931 else if (prefixes & PREFIX_REPZ)
4932 strcpy (obuf, "vmxon");
4933 else
4934 strcpy (obuf, "vmptrld");
4935 OP_E (bytemode, sizeflag);
4936 }
4937
4938 static void
4939 REP_Fixup (int bytemode, int sizeflag)
4940 {
4941 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
4942 lods and stos. */
4943 size_t ilen = 0;
4944
4945 if (prefixes & PREFIX_REPZ)
4946 switch (*insn_codep)
4947 {
4948 case 0x6e: /* outsb */
4949 case 0x6f: /* outsw/outsl */
4950 case 0xa4: /* movsb */
4951 case 0xa5: /* movsw/movsl/movsq */
4952 if (!intel_syntax)
4953 ilen = 5;
4954 else
4955 ilen = 4;
4956 break;
4957 case 0xaa: /* stosb */
4958 case 0xab: /* stosw/stosl/stosq */
4959 case 0xac: /* lodsb */
4960 case 0xad: /* lodsw/lodsl/lodsq */
4961 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4962 ilen = 5;
4963 else
4964 ilen = 4;
4965 break;
4966 case 0x6c: /* insb */
4967 case 0x6d: /* insl/insw */
4968 if (!intel_syntax)
4969 ilen = 4;
4970 else
4971 ilen = 3;
4972 break;
4973 default:
4974 abort ();
4975 break;
4976 }
4977
4978 if (ilen != 0)
4979 {
4980 size_t olen;
4981 char *p;
4982
4983 olen = strlen (obuf);
4984 p = obuf + olen - ilen - 1 - 4;
4985 /* Handle "repz [addr16|addr32]". */
4986 if ((prefixes & PREFIX_ADDR))
4987 p -= 1 + 6;
4988
4989 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
4990 }
4991
4992 switch (bytemode)
4993 {
4994 case al_reg:
4995 case eAX_reg:
4996 case indir_dx_reg:
4997 OP_IMREG (bytemode, sizeflag);
4998 break;
4999 case eDI_reg:
5000 OP_ESreg (bytemode, sizeflag);
5001 break;
5002 case eSI_reg:
5003 OP_DSreg (bytemode, sizeflag);
5004 break;
5005 default:
5006 abort ();
5007 break;
5008 }
5009 }
GDB Binutils - Deliverables
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