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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "dis-asm.h"
35 #include "sysdep.h"
36 #include "opintl.h"
37
38 #define MAXLEN 20
39
40 #include <setjmp.h>
41
42 #ifndef UNIXWARE_COMPAT
43 /* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45 #define UNIXWARE_COMPAT 1
46 #endif
47
48 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 static void ckprefix (void);
50 static const char *prefix_name (int, int);
51 static int print_insn (bfd_vma, disassemble_info *);
52 static void dofloat (int);
53 static void OP_ST (int, int);
54 static void OP_STi (int, int);
55 static int putop (const char *, int);
56 static void oappend (const char *);
57 static void append_seg (void);
58 static void OP_indirE (int, int);
59 static void print_operand_value (char *, int, bfd_vma);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_VMX (int, int);
92 static void OP_0fae (int, int);
93 static void OP_0f07 (int, int);
94 static void NOP_Fixup (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void PNI_Fixup (int, int);
99 static void SVME_Fixup (int, int);
100 static void INVLPG_Fixup (int, int);
101 static void BadOp (void);
102 static void SEG_Fixup (int, int);
103 static void VMX_Fixup (int, int);
104
105 struct dis_private {
106 /* Points to first byte not fetched. */
107 bfd_byte *max_fetched;
108 bfd_byte the_buffer[MAXLEN];
109 bfd_vma insn_start;
110 int orig_sizeflag;
111 jmp_buf bailout;
112 };
113
114 /* The opcode for the fwait instruction, which we treat as a prefix
115 when we can. */
116 #define FWAIT_OPCODE (0x9b)
117
118 enum address_mode
119 {
120 mode_16bit,
121 mode_32bit,
122 mode_64bit
123 };
124
125 enum address_mode address_mode;
126
127 /* Flags for the prefixes for the current instruction. See below. */
128 static int prefixes;
129
130 /* REX prefix the current instruction. See below. */
131 static int rex;
132 /* Bits of REX we've already used. */
133 static int rex_used;
134 #define REX_MODE64 8
135 #define REX_EXTX 4
136 #define REX_EXTY 2
137 #define REX_EXTZ 1
138 /* Mark parts used in the REX prefix. When we are testing for
139 empty prefix (for 8bit register REX extension), just mask it
140 out. Otherwise test for REX bit is excuse for existence of REX
141 only in case value is nonzero. */
142 #define USED_REX(value) \
143 { \
144 if (value) \
145 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
146 else \
147 rex_used |= 0x40; \
148 }
149
150 /* Flags for prefixes which we somehow handled when printing the
151 current instruction. */
152 static int used_prefixes;
153
154 /* Flags stored in PREFIXES. */
155 #define PREFIX_REPZ 1
156 #define PREFIX_REPNZ 2
157 #define PREFIX_LOCK 4
158 #define PREFIX_CS 8
159 #define PREFIX_SS 0x10
160 #define PREFIX_DS 0x20
161 #define PREFIX_ES 0x40
162 #define PREFIX_FS 0x80
163 #define PREFIX_GS 0x100
164 #define PREFIX_DATA 0x200
165 #define PREFIX_ADDR 0x400
166 #define PREFIX_FWAIT 0x800
167
168 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
169 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
170 on error. */
171 #define FETCH_DATA(info, addr) \
172 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
173 ? 1 : fetch_data ((info), (addr)))
174
175 static int
176 fetch_data (struct disassemble_info *info, bfd_byte *addr)
177 {
178 int status;
179 struct dis_private *priv = (struct dis_private *) info->private_data;
180 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
181
182 status = (*info->read_memory_func) (start,
183 priv->max_fetched,
184 addr - priv->max_fetched,
185 info);
186 if (status != 0)
187 {
188 /* If we did manage to read at least one byte, then
189 print_insn_i386 will do something sensible. Otherwise, print
190 an error. We do that here because this is where we know
191 STATUS. */
192 if (priv->max_fetched == priv->the_buffer)
193 (*info->memory_error_func) (status, start, info);
194 longjmp (priv->bailout, 1);
195 }
196 else
197 priv->max_fetched = addr;
198 return 1;
199 }
200
201 #define XX NULL, 0
202
203 #define Eb OP_E, b_mode
204 #define Ev OP_E, v_mode
205 #define Ed OP_E, d_mode
206 #define Eq OP_E, q_mode
207 #define Edq OP_E, dq_mode
208 #define Edqw OP_E, dqw_mode
209 #define indirEv OP_indirE, stack_v_mode
210 #define indirEp OP_indirE, f_mode
211 #define stackEv OP_E, stack_v_mode
212 #define Em OP_E, m_mode
213 #define Ew OP_E, w_mode
214 #define Ma OP_E, v_mode
215 #define M OP_M, 0 /* lea, lgdt, etc. */
216 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
217 #define Gb OP_G, b_mode
218 #define Gv OP_G, v_mode
219 #define Gd OP_G, d_mode
220 #define Gdq OP_G, dq_mode
221 #define Gm OP_G, m_mode
222 #define Gw OP_G, w_mode
223 #define Rd OP_Rd, d_mode
224 #define Rm OP_Rd, m_mode
225 #define Ib OP_I, b_mode
226 #define sIb OP_sI, b_mode /* sign extened byte */
227 #define Iv OP_I, v_mode
228 #define Iq OP_I, q_mode
229 #define Iv64 OP_I64, v_mode
230 #define Iw OP_I, w_mode
231 #define I1 OP_I, const_1_mode
232 #define Jb OP_J, b_mode
233 #define Jv OP_J, v_mode
234 #define Cm OP_C, m_mode
235 #define Dm OP_D, m_mode
236 #define Td OP_T, d_mode
237 #define Sv SEG_Fixup, v_mode
238
239 #define RMeAX OP_REG, eAX_reg
240 #define RMeBX OP_REG, eBX_reg
241 #define RMeCX OP_REG, eCX_reg
242 #define RMeDX OP_REG, eDX_reg
243 #define RMeSP OP_REG, eSP_reg
244 #define RMeBP OP_REG, eBP_reg
245 #define RMeSI OP_REG, eSI_reg
246 #define RMeDI OP_REG, eDI_reg
247 #define RMrAX OP_REG, rAX_reg
248 #define RMrBX OP_REG, rBX_reg
249 #define RMrCX OP_REG, rCX_reg
250 #define RMrDX OP_REG, rDX_reg
251 #define RMrSP OP_REG, rSP_reg
252 #define RMrBP OP_REG, rBP_reg
253 #define RMrSI OP_REG, rSI_reg
254 #define RMrDI OP_REG, rDI_reg
255 #define RMAL OP_REG, al_reg
256 #define RMAL OP_REG, al_reg
257 #define RMCL OP_REG, cl_reg
258 #define RMDL OP_REG, dl_reg
259 #define RMBL OP_REG, bl_reg
260 #define RMAH OP_REG, ah_reg
261 #define RMCH OP_REG, ch_reg
262 #define RMDH OP_REG, dh_reg
263 #define RMBH OP_REG, bh_reg
264 #define RMAX OP_REG, ax_reg
265 #define RMDX OP_REG, dx_reg
266
267 #define eAX OP_IMREG, eAX_reg
268 #define eBX OP_IMREG, eBX_reg
269 #define eCX OP_IMREG, eCX_reg
270 #define eDX OP_IMREG, eDX_reg
271 #define eSP OP_IMREG, eSP_reg
272 #define eBP OP_IMREG, eBP_reg
273 #define eSI OP_IMREG, eSI_reg
274 #define eDI OP_IMREG, eDI_reg
275 #define AL OP_IMREG, al_reg
276 #define AL OP_IMREG, al_reg
277 #define CL OP_IMREG, cl_reg
278 #define DL OP_IMREG, dl_reg
279 #define BL OP_IMREG, bl_reg
280 #define AH OP_IMREG, ah_reg
281 #define CH OP_IMREG, ch_reg
282 #define DH OP_IMREG, dh_reg
283 #define BH OP_IMREG, bh_reg
284 #define AX OP_IMREG, ax_reg
285 #define DX OP_IMREG, dx_reg
286 #define indirDX OP_IMREG, indir_dx_reg
287
288 #define Sw OP_SEG, w_mode
289 #define Ap OP_DIR, 0
290 #define Ob OP_OFF64, b_mode
291 #define Ov OP_OFF64, v_mode
292 #define Xb OP_DSreg, eSI_reg
293 #define Xv OP_DSreg, eSI_reg
294 #define Yb OP_ESreg, eDI_reg
295 #define Yv OP_ESreg, eDI_reg
296 #define DSBX OP_DSreg, eBX_reg
297
298 #define es OP_REG, es_reg
299 #define ss OP_REG, ss_reg
300 #define cs OP_REG, cs_reg
301 #define ds OP_REG, ds_reg
302 #define fs OP_REG, fs_reg
303 #define gs OP_REG, gs_reg
304
305 #define MX OP_MMX, 0
306 #define XM OP_XMM, 0
307 #define EM OP_EM, v_mode
308 #define EX OP_EX, v_mode
309 #define MS OP_MS, v_mode
310 #define XS OP_XS, v_mode
311 #define VM OP_VMX, q_mode
312 #define OPSUF OP_3DNowSuffix, 0
313 #define OPSIMD OP_SIMD_Suffix, 0
314
315 #define cond_jump_flag NULL, cond_jump_mode
316 #define loop_jcxz_flag NULL, loop_jcxz_mode
317
318 /* bits in sizeflag */
319 #define SUFFIX_ALWAYS 4
320 #define AFLAG 2
321 #define DFLAG 1
322
323 #define b_mode 1 /* byte operand */
324 #define v_mode 2 /* operand size depends on prefixes */
325 #define w_mode 3 /* word operand */
326 #define d_mode 4 /* double word operand */
327 #define q_mode 5 /* quad word operand */
328 #define t_mode 6 /* ten-byte operand */
329 #define x_mode 7 /* 16-byte XMM operand */
330 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
331 #define cond_jump_mode 9
332 #define loop_jcxz_mode 10
333 #define dq_mode 11 /* operand size depends on REX prefixes. */
334 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
335 #define f_mode 13 /* 4- or 6-byte pointer operand */
336 #define const_1_mode 14
337 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
338
339 #define es_reg 100
340 #define cs_reg 101
341 #define ss_reg 102
342 #define ds_reg 103
343 #define fs_reg 104
344 #define gs_reg 105
345
346 #define eAX_reg 108
347 #define eCX_reg 109
348 #define eDX_reg 110
349 #define eBX_reg 111
350 #define eSP_reg 112
351 #define eBP_reg 113
352 #define eSI_reg 114
353 #define eDI_reg 115
354
355 #define al_reg 116
356 #define cl_reg 117
357 #define dl_reg 118
358 #define bl_reg 119
359 #define ah_reg 120
360 #define ch_reg 121
361 #define dh_reg 122
362 #define bh_reg 123
363
364 #define ax_reg 124
365 #define cx_reg 125
366 #define dx_reg 126
367 #define bx_reg 127
368 #define sp_reg 128
369 #define bp_reg 129
370 #define si_reg 130
371 #define di_reg 131
372
373 #define rAX_reg 132
374 #define rCX_reg 133
375 #define rDX_reg 134
376 #define rBX_reg 135
377 #define rSP_reg 136
378 #define rBP_reg 137
379 #define rSI_reg 138
380 #define rDI_reg 139
381
382 #define indir_dx_reg 150
383
384 #define FLOATCODE 1
385 #define USE_GROUPS 2
386 #define USE_PREFIX_USER_TABLE 3
387 #define X86_64_SPECIAL 4
388
389 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
390
391 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
392 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
393 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
394 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
395 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
396 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
397 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
398 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
399 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
400 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
401 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
402 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
403 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
404 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
405 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
406 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
407 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
408 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
409 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
410 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
411 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
412 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
413 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
414 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
415 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
416
417 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
418 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
419 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
420 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
421 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
422 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
423 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
424 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
425 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
426 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
427 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
428 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
429 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
430 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
431 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
432 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
433 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
434 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
435 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
436 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
437 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
438 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
439 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
440 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
441 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
442 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
443 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
444 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
445 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
446 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
447 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
448 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
449 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
450
451 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
452
453 typedef void (*op_rtn) (int bytemode, int sizeflag);
454
455 struct dis386 {
456 const char *name;
457 op_rtn op1;
458 int bytemode1;
459 op_rtn op2;
460 int bytemode2;
461 op_rtn op3;
462 int bytemode3;
463 };
464
465 /* Upper case letters in the instruction names here are macros.
466 'A' => print 'b' if no register operands or suffix_always is true
467 'B' => print 'b' if suffix_always is true
468 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
469 . size prefix
470 'E' => print 'e' if 32-bit form of jcxz
471 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
472 'H' => print ",pt" or ",pn" branch hint
473 'I' => honor following macro letter even in Intel mode (implemented only
474 . for some of the macro letters)
475 'J' => print 'l'
476 'L' => print 'l' if suffix_always is true
477 'N' => print 'n' if instruction has no wait "prefix"
478 'O' => print 'd', or 'o'
479 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
480 . or suffix_always is true. print 'q' if rex prefix is present.
481 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
482 . is true
483 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
484 'S' => print 'w', 'l' or 'q' if suffix_always is true
485 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
486 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
487 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
488 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
489 'X' => print 's', 'd' depending on data16 prefix (for XMM)
490 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
491
492 Many of the above letters print nothing in Intel mode. See "putop"
493 for the details.
494
495 Braces '{' and '}', and vertical bars '|', indicate alternative
496 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
497 modes. In cases where there are only two alternatives, the X86_64
498 instruction is reserved, and "(bad)" is printed.
499 */
500
501 static const struct dis386 dis386[] = {
502 /* 00 */
503 { "addB", Eb, Gb, XX },
504 { "addS", Ev, Gv, XX },
505 { "addB", Gb, Eb, XX },
506 { "addS", Gv, Ev, XX },
507 { "addB", AL, Ib, XX },
508 { "addS", eAX, Iv, XX },
509 { "push{T|}", es, XX, XX },
510 { "pop{T|}", es, XX, XX },
511 /* 08 */
512 { "orB", Eb, Gb, XX },
513 { "orS", Ev, Gv, XX },
514 { "orB", Gb, Eb, XX },
515 { "orS", Gv, Ev, XX },
516 { "orB", AL, Ib, XX },
517 { "orS", eAX, Iv, XX },
518 { "push{T|}", cs, XX, XX },
519 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
520 /* 10 */
521 { "adcB", Eb, Gb, XX },
522 { "adcS", Ev, Gv, XX },
523 { "adcB", Gb, Eb, XX },
524 { "adcS", Gv, Ev, XX },
525 { "adcB", AL, Ib, XX },
526 { "adcS", eAX, Iv, XX },
527 { "push{T|}", ss, XX, XX },
528 { "pop{T|}", ss, XX, XX },
529 /* 18 */
530 { "sbbB", Eb, Gb, XX },
531 { "sbbS", Ev, Gv, XX },
532 { "sbbB", Gb, Eb, XX },
533 { "sbbS", Gv, Ev, XX },
534 { "sbbB", AL, Ib, XX },
535 { "sbbS", eAX, Iv, XX },
536 { "push{T|}", ds, XX, XX },
537 { "pop{T|}", ds, XX, XX },
538 /* 20 */
539 { "andB", Eb, Gb, XX },
540 { "andS", Ev, Gv, XX },
541 { "andB", Gb, Eb, XX },
542 { "andS", Gv, Ev, XX },
543 { "andB", AL, Ib, XX },
544 { "andS", eAX, Iv, XX },
545 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
546 { "daa{|}", XX, XX, XX },
547 /* 28 */
548 { "subB", Eb, Gb, XX },
549 { "subS", Ev, Gv, XX },
550 { "subB", Gb, Eb, XX },
551 { "subS", Gv, Ev, XX },
552 { "subB", AL, Ib, XX },
553 { "subS", eAX, Iv, XX },
554 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
555 { "das{|}", XX, XX, XX },
556 /* 30 */
557 { "xorB", Eb, Gb, XX },
558 { "xorS", Ev, Gv, XX },
559 { "xorB", Gb, Eb, XX },
560 { "xorS", Gv, Ev, XX },
561 { "xorB", AL, Ib, XX },
562 { "xorS", eAX, Iv, XX },
563 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
564 { "aaa{|}", XX, XX, XX },
565 /* 38 */
566 { "cmpB", Eb, Gb, XX },
567 { "cmpS", Ev, Gv, XX },
568 { "cmpB", Gb, Eb, XX },
569 { "cmpS", Gv, Ev, XX },
570 { "cmpB", AL, Ib, XX },
571 { "cmpS", eAX, Iv, XX },
572 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
573 { "aas{|}", XX, XX, XX },
574 /* 40 */
575 { "inc{S|}", RMeAX, XX, XX },
576 { "inc{S|}", RMeCX, XX, XX },
577 { "inc{S|}", RMeDX, XX, XX },
578 { "inc{S|}", RMeBX, XX, XX },
579 { "inc{S|}", RMeSP, XX, XX },
580 { "inc{S|}", RMeBP, XX, XX },
581 { "inc{S|}", RMeSI, XX, XX },
582 { "inc{S|}", RMeDI, XX, XX },
583 /* 48 */
584 { "dec{S|}", RMeAX, XX, XX },
585 { "dec{S|}", RMeCX, XX, XX },
586 { "dec{S|}", RMeDX, XX, XX },
587 { "dec{S|}", RMeBX, XX, XX },
588 { "dec{S|}", RMeSP, XX, XX },
589 { "dec{S|}", RMeBP, XX, XX },
590 { "dec{S|}", RMeSI, XX, XX },
591 { "dec{S|}", RMeDI, XX, XX },
592 /* 50 */
593 { "pushV", RMrAX, XX, XX },
594 { "pushV", RMrCX, XX, XX },
595 { "pushV", RMrDX, XX, XX },
596 { "pushV", RMrBX, XX, XX },
597 { "pushV", RMrSP, XX, XX },
598 { "pushV", RMrBP, XX, XX },
599 { "pushV", RMrSI, XX, XX },
600 { "pushV", RMrDI, XX, XX },
601 /* 58 */
602 { "popV", RMrAX, XX, XX },
603 { "popV", RMrCX, XX, XX },
604 { "popV", RMrDX, XX, XX },
605 { "popV", RMrBX, XX, XX },
606 { "popV", RMrSP, XX, XX },
607 { "popV", RMrBP, XX, XX },
608 { "popV", RMrSI, XX, XX },
609 { "popV", RMrDI, XX, XX },
610 /* 60 */
611 { "pusha{P|}", XX, XX, XX },
612 { "popa{P|}", XX, XX, XX },
613 { "bound{S|}", Gv, Ma, XX },
614 { X86_64_0 },
615 { "(bad)", XX, XX, XX }, /* seg fs */
616 { "(bad)", XX, XX, XX }, /* seg gs */
617 { "(bad)", XX, XX, XX }, /* op size prefix */
618 { "(bad)", XX, XX, XX }, /* adr size prefix */
619 /* 68 */
620 { "pushT", Iq, XX, XX },
621 { "imulS", Gv, Ev, Iv },
622 { "pushT", sIb, XX, XX },
623 { "imulS", Gv, Ev, sIb },
624 { "ins{b||b|}", Yb, indirDX, XX },
625 { "ins{R||R|}", Yv, indirDX, XX },
626 { "outs{b||b|}", indirDX, Xb, XX },
627 { "outs{R||R|}", indirDX, Xv, XX },
628 /* 70 */
629 { "joH", Jb, XX, cond_jump_flag },
630 { "jnoH", Jb, XX, cond_jump_flag },
631 { "jbH", Jb, XX, cond_jump_flag },
632 { "jaeH", Jb, XX, cond_jump_flag },
633 { "jeH", Jb, XX, cond_jump_flag },
634 { "jneH", Jb, XX, cond_jump_flag },
635 { "jbeH", Jb, XX, cond_jump_flag },
636 { "jaH", Jb, XX, cond_jump_flag },
637 /* 78 */
638 { "jsH", Jb, XX, cond_jump_flag },
639 { "jnsH", Jb, XX, cond_jump_flag },
640 { "jpH", Jb, XX, cond_jump_flag },
641 { "jnpH", Jb, XX, cond_jump_flag },
642 { "jlH", Jb, XX, cond_jump_flag },
643 { "jgeH", Jb, XX, cond_jump_flag },
644 { "jleH", Jb, XX, cond_jump_flag },
645 { "jgH", Jb, XX, cond_jump_flag },
646 /* 80 */
647 { GRP1b },
648 { GRP1S },
649 { "(bad)", XX, XX, XX },
650 { GRP1Ss },
651 { "testB", Eb, Gb, XX },
652 { "testS", Ev, Gv, XX },
653 { "xchgB", Eb, Gb, XX },
654 { "xchgS", Ev, Gv, XX },
655 /* 88 */
656 { "movB", Eb, Gb, XX },
657 { "movS", Ev, Gv, XX },
658 { "movB", Gb, Eb, XX },
659 { "movS", Gv, Ev, XX },
660 { "movQ", Sv, Sw, XX },
661 { "leaS", Gv, M, XX },
662 { "movQ", Sw, Sv, XX },
663 { "popU", stackEv, XX, XX },
664 /* 90 */
665 { "nop", NOP_Fixup, 0, XX, XX },
666 { "xchgS", RMeCX, eAX, XX },
667 { "xchgS", RMeDX, eAX, XX },
668 { "xchgS", RMeBX, eAX, XX },
669 { "xchgS", RMeSP, eAX, XX },
670 { "xchgS", RMeBP, eAX, XX },
671 { "xchgS", RMeSI, eAX, XX },
672 { "xchgS", RMeDI, eAX, XX },
673 /* 98 */
674 { "cW{tR||tR|}", XX, XX, XX },
675 { "cR{tO||tO|}", XX, XX, XX },
676 { "Jcall{T|}", Ap, XX, XX },
677 { "(bad)", XX, XX, XX }, /* fwait */
678 { "pushfT", XX, XX, XX },
679 { "popfT", XX, XX, XX },
680 { "sahf{|}", XX, XX, XX },
681 { "lahf{|}", XX, XX, XX },
682 /* a0 */
683 { "movB", AL, Ob, XX },
684 { "movS", eAX, Ov, XX },
685 { "movB", Ob, AL, XX },
686 { "movS", Ov, eAX, XX },
687 { "movs{b||b|}", Yb, Xb, XX },
688 { "movs{R||R|}", Yv, Xv, XX },
689 { "cmps{b||b|}", Xb, Yb, XX },
690 { "cmps{R||R|}", Xv, Yv, XX },
691 /* a8 */
692 { "testB", AL, Ib, XX },
693 { "testS", eAX, Iv, XX },
694 { "stosB", Yb, AL, XX },
695 { "stosS", Yv, eAX, XX },
696 { "lodsB", AL, Xb, XX },
697 { "lodsS", eAX, Xv, XX },
698 { "scasB", AL, Yb, XX },
699 { "scasS", eAX, Yv, XX },
700 /* b0 */
701 { "movB", RMAL, Ib, XX },
702 { "movB", RMCL, Ib, XX },
703 { "movB", RMDL, Ib, XX },
704 { "movB", RMBL, Ib, XX },
705 { "movB", RMAH, Ib, XX },
706 { "movB", RMCH, Ib, XX },
707 { "movB", RMDH, Ib, XX },
708 { "movB", RMBH, Ib, XX },
709 /* b8 */
710 { "movS", RMeAX, Iv64, XX },
711 { "movS", RMeCX, Iv64, XX },
712 { "movS", RMeDX, Iv64, XX },
713 { "movS", RMeBX, Iv64, XX },
714 { "movS", RMeSP, Iv64, XX },
715 { "movS", RMeBP, Iv64, XX },
716 { "movS", RMeSI, Iv64, XX },
717 { "movS", RMeDI, Iv64, XX },
718 /* c0 */
719 { GRP2b },
720 { GRP2S },
721 { "retT", Iw, XX, XX },
722 { "retT", XX, XX, XX },
723 { "les{S|}", Gv, Mp, XX },
724 { "ldsS", Gv, Mp, XX },
725 { "movA", Eb, Ib, XX },
726 { "movQ", Ev, Iv, XX },
727 /* c8 */
728 { "enterT", Iw, Ib, XX },
729 { "leaveT", XX, XX, XX },
730 { "lretP", Iw, XX, XX },
731 { "lretP", XX, XX, XX },
732 { "int3", XX, XX, XX },
733 { "int", Ib, XX, XX },
734 { "into{|}", XX, XX, XX },
735 { "iretP", XX, XX, XX },
736 /* d0 */
737 { GRP2b_one },
738 { GRP2S_one },
739 { GRP2b_cl },
740 { GRP2S_cl },
741 { "aam{|}", sIb, XX, XX },
742 { "aad{|}", sIb, XX, XX },
743 { "(bad)", XX, XX, XX },
744 { "xlat", DSBX, XX, XX },
745 /* d8 */
746 { FLOAT },
747 { FLOAT },
748 { FLOAT },
749 { FLOAT },
750 { FLOAT },
751 { FLOAT },
752 { FLOAT },
753 { FLOAT },
754 /* e0 */
755 { "loopneFH", Jb, XX, loop_jcxz_flag },
756 { "loopeFH", Jb, XX, loop_jcxz_flag },
757 { "loopFH", Jb, XX, loop_jcxz_flag },
758 { "jEcxzH", Jb, XX, loop_jcxz_flag },
759 { "inB", AL, Ib, XX },
760 { "inS", eAX, Ib, XX },
761 { "outB", Ib, AL, XX },
762 { "outS", Ib, eAX, XX },
763 /* e8 */
764 { "callT", Jv, XX, XX },
765 { "jmpT", Jv, XX, XX },
766 { "Jjmp{T|}", Ap, XX, XX },
767 { "jmp", Jb, XX, XX },
768 { "inB", AL, indirDX, XX },
769 { "inS", eAX, indirDX, XX },
770 { "outB", indirDX, AL, XX },
771 { "outS", indirDX, eAX, XX },
772 /* f0 */
773 { "(bad)", XX, XX, XX }, /* lock prefix */
774 { "icebp", XX, XX, XX },
775 { "(bad)", XX, XX, XX }, /* repne */
776 { "(bad)", XX, XX, XX }, /* repz */
777 { "hlt", XX, XX, XX },
778 { "cmc", XX, XX, XX },
779 { GRP3b },
780 { GRP3S },
781 /* f8 */
782 { "clc", XX, XX, XX },
783 { "stc", XX, XX, XX },
784 { "cli", XX, XX, XX },
785 { "sti", XX, XX, XX },
786 { "cld", XX, XX, XX },
787 { "std", XX, XX, XX },
788 { GRP4 },
789 { GRP5 },
790 };
791
792 static const struct dis386 dis386_twobyte[] = {
793 /* 00 */
794 { GRP6 },
795 { GRP7 },
796 { "larS", Gv, Ew, XX },
797 { "lslS", Gv, Ew, XX },
798 { "(bad)", XX, XX, XX },
799 { "syscall", XX, XX, XX },
800 { "clts", XX, XX, XX },
801 { "sysretP", XX, XX, XX },
802 /* 08 */
803 { "invd", XX, XX, XX },
804 { "wbinvd", XX, XX, XX },
805 { "(bad)", XX, XX, XX },
806 { "ud2a", XX, XX, XX },
807 { "(bad)", XX, XX, XX },
808 { GRPAMD },
809 { "femms", XX, XX, XX },
810 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
811 /* 10 */
812 { PREGRP8 },
813 { PREGRP9 },
814 { PREGRP30 },
815 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
816 { "unpcklpX", XM, EX, XX },
817 { "unpckhpX", XM, EX, XX },
818 { PREGRP31 },
819 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
820 /* 18 */
821 { GRP14 },
822 { "(bad)", XX, XX, XX },
823 { "(bad)", XX, XX, XX },
824 { "(bad)", XX, XX, XX },
825 { "(bad)", XX, XX, XX },
826 { "(bad)", XX, XX, XX },
827 { "(bad)", XX, XX, XX },
828 { "(bad)", XX, XX, XX },
829 /* 20 */
830 { "movL", Rm, Cm, XX },
831 { "movL", Rm, Dm, XX },
832 { "movL", Cm, Rm, XX },
833 { "movL", Dm, Rm, XX },
834 { "movL", Rd, Td, XX },
835 { "(bad)", XX, XX, XX },
836 { "movL", Td, Rd, XX },
837 { "(bad)", XX, XX, XX },
838 /* 28 */
839 { "movapX", XM, EX, XX },
840 { "movapX", EX, XM, XX },
841 { PREGRP2 },
842 { "movntpX", Ev, XM, XX },
843 { PREGRP4 },
844 { PREGRP3 },
845 { "ucomisX", XM,EX, XX },
846 { "comisX", XM,EX, XX },
847 /* 30 */
848 { "wrmsr", XX, XX, XX },
849 { "rdtsc", XX, XX, XX },
850 { "rdmsr", XX, XX, XX },
851 { "rdpmc", XX, XX, XX },
852 { "sysenter", XX, XX, XX },
853 { "sysexit", XX, XX, XX },
854 { "(bad)", XX, XX, XX },
855 { "(bad)", XX, XX, XX },
856 /* 38 */
857 { "(bad)", XX, XX, XX },
858 { "(bad)", XX, XX, XX },
859 { "(bad)", XX, XX, XX },
860 { "(bad)", XX, XX, XX },
861 { "(bad)", XX, XX, XX },
862 { "(bad)", XX, XX, XX },
863 { "(bad)", XX, XX, XX },
864 { "(bad)", XX, XX, XX },
865 /* 40 */
866 { "cmovo", Gv, Ev, XX },
867 { "cmovno", Gv, Ev, XX },
868 { "cmovb", Gv, Ev, XX },
869 { "cmovae", Gv, Ev, XX },
870 { "cmove", Gv, Ev, XX },
871 { "cmovne", Gv, Ev, XX },
872 { "cmovbe", Gv, Ev, XX },
873 { "cmova", Gv, Ev, XX },
874 /* 48 */
875 { "cmovs", Gv, Ev, XX },
876 { "cmovns", Gv, Ev, XX },
877 { "cmovp", Gv, Ev, XX },
878 { "cmovnp", Gv, Ev, XX },
879 { "cmovl", Gv, Ev, XX },
880 { "cmovge", Gv, Ev, XX },
881 { "cmovle", Gv, Ev, XX },
882 { "cmovg", Gv, Ev, XX },
883 /* 50 */
884 { "movmskpX", Gdq, XS, XX },
885 { PREGRP13 },
886 { PREGRP12 },
887 { PREGRP11 },
888 { "andpX", XM, EX, XX },
889 { "andnpX", XM, EX, XX },
890 { "orpX", XM, EX, XX },
891 { "xorpX", XM, EX, XX },
892 /* 58 */
893 { PREGRP0 },
894 { PREGRP10 },
895 { PREGRP17 },
896 { PREGRP16 },
897 { PREGRP14 },
898 { PREGRP7 },
899 { PREGRP5 },
900 { PREGRP6 },
901 /* 60 */
902 { "punpcklbw", MX, EM, XX },
903 { "punpcklwd", MX, EM, XX },
904 { "punpckldq", MX, EM, XX },
905 { "packsswb", MX, EM, XX },
906 { "pcmpgtb", MX, EM, XX },
907 { "pcmpgtw", MX, EM, XX },
908 { "pcmpgtd", MX, EM, XX },
909 { "packuswb", MX, EM, XX },
910 /* 68 */
911 { "punpckhbw", MX, EM, XX },
912 { "punpckhwd", MX, EM, XX },
913 { "punpckhdq", MX, EM, XX },
914 { "packssdw", MX, EM, XX },
915 { PREGRP26 },
916 { PREGRP24 },
917 { "movd", MX, Edq, XX },
918 { PREGRP19 },
919 /* 70 */
920 { PREGRP22 },
921 { GRP10 },
922 { GRP11 },
923 { GRP12 },
924 { "pcmpeqb", MX, EM, XX },
925 { "pcmpeqw", MX, EM, XX },
926 { "pcmpeqd", MX, EM, XX },
927 { "emms", XX, XX, XX },
928 /* 78 */
929 { "vmread", Em, Gm, XX },
930 { "vmwrite", Gm, Em, XX },
931 { "(bad)", XX, XX, XX },
932 { "(bad)", XX, XX, XX },
933 { PREGRP28 },
934 { PREGRP29 },
935 { PREGRP23 },
936 { PREGRP20 },
937 /* 80 */
938 { "joH", Jv, XX, cond_jump_flag },
939 { "jnoH", Jv, XX, cond_jump_flag },
940 { "jbH", Jv, XX, cond_jump_flag },
941 { "jaeH", Jv, XX, cond_jump_flag },
942 { "jeH", Jv, XX, cond_jump_flag },
943 { "jneH", Jv, XX, cond_jump_flag },
944 { "jbeH", Jv, XX, cond_jump_flag },
945 { "jaH", Jv, XX, cond_jump_flag },
946 /* 88 */
947 { "jsH", Jv, XX, cond_jump_flag },
948 { "jnsH", Jv, XX, cond_jump_flag },
949 { "jpH", Jv, XX, cond_jump_flag },
950 { "jnpH", Jv, XX, cond_jump_flag },
951 { "jlH", Jv, XX, cond_jump_flag },
952 { "jgeH", Jv, XX, cond_jump_flag },
953 { "jleH", Jv, XX, cond_jump_flag },
954 { "jgH", Jv, XX, cond_jump_flag },
955 /* 90 */
956 { "seto", Eb, XX, XX },
957 { "setno", Eb, XX, XX },
958 { "setb", Eb, XX, XX },
959 { "setae", Eb, XX, XX },
960 { "sete", Eb, XX, XX },
961 { "setne", Eb, XX, XX },
962 { "setbe", Eb, XX, XX },
963 { "seta", Eb, XX, XX },
964 /* 98 */
965 { "sets", Eb, XX, XX },
966 { "setns", Eb, XX, XX },
967 { "setp", Eb, XX, XX },
968 { "setnp", Eb, XX, XX },
969 { "setl", Eb, XX, XX },
970 { "setge", Eb, XX, XX },
971 { "setle", Eb, XX, XX },
972 { "setg", Eb, XX, XX },
973 /* a0 */
974 { "pushT", fs, XX, XX },
975 { "popT", fs, XX, XX },
976 { "cpuid", XX, XX, XX },
977 { "btS", Ev, Gv, XX },
978 { "shldS", Ev, Gv, Ib },
979 { "shldS", Ev, Gv, CL },
980 { GRPPADLCK2 },
981 { GRPPADLCK1 },
982 /* a8 */
983 { "pushT", gs, XX, XX },
984 { "popT", gs, XX, XX },
985 { "rsm", XX, XX, XX },
986 { "btsS", Ev, Gv, XX },
987 { "shrdS", Ev, Gv, Ib },
988 { "shrdS", Ev, Gv, CL },
989 { GRP13 },
990 { "imulS", Gv, Ev, XX },
991 /* b0 */
992 { "cmpxchgB", Eb, Gb, XX },
993 { "cmpxchgS", Ev, Gv, XX },
994 { "lssS", Gv, Mp, XX },
995 { "btrS", Ev, Gv, XX },
996 { "lfsS", Gv, Mp, XX },
997 { "lgsS", Gv, Mp, XX },
998 { "movz{bR|x|bR|x}", Gv, Eb, XX },
999 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
1000 /* b8 */
1001 { "(bad)", XX, XX, XX },
1002 { "ud2b", XX, XX, XX },
1003 { GRP8 },
1004 { "btcS", Ev, Gv, XX },
1005 { "bsfS", Gv, Ev, XX },
1006 { "bsrS", Gv, Ev, XX },
1007 { "movs{bR|x|bR|x}", Gv, Eb, XX },
1008 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
1009 /* c0 */
1010 { "xaddB", Eb, Gb, XX },
1011 { "xaddS", Ev, Gv, XX },
1012 { PREGRP1 },
1013 { "movntiS", Ev, Gv, XX },
1014 { "pinsrw", MX, Edqw, Ib },
1015 { "pextrw", Gdq, MS, Ib },
1016 { "shufpX", XM, EX, Ib },
1017 { GRP9 },
1018 /* c8 */
1019 { "bswap", RMeAX, XX, XX },
1020 { "bswap", RMeCX, XX, XX },
1021 { "bswap", RMeDX, XX, XX },
1022 { "bswap", RMeBX, XX, XX },
1023 { "bswap", RMeSP, XX, XX },
1024 { "bswap", RMeBP, XX, XX },
1025 { "bswap", RMeSI, XX, XX },
1026 { "bswap", RMeDI, XX, XX },
1027 /* d0 */
1028 { PREGRP27 },
1029 { "psrlw", MX, EM, XX },
1030 { "psrld", MX, EM, XX },
1031 { "psrlq", MX, EM, XX },
1032 { "paddq", MX, EM, XX },
1033 { "pmullw", MX, EM, XX },
1034 { PREGRP21 },
1035 { "pmovmskb", Gdq, MS, XX },
1036 /* d8 */
1037 { "psubusb", MX, EM, XX },
1038 { "psubusw", MX, EM, XX },
1039 { "pminub", MX, EM, XX },
1040 { "pand", MX, EM, XX },
1041 { "paddusb", MX, EM, XX },
1042 { "paddusw", MX, EM, XX },
1043 { "pmaxub", MX, EM, XX },
1044 { "pandn", MX, EM, XX },
1045 /* e0 */
1046 { "pavgb", MX, EM, XX },
1047 { "psraw", MX, EM, XX },
1048 { "psrad", MX, EM, XX },
1049 { "pavgw", MX, EM, XX },
1050 { "pmulhuw", MX, EM, XX },
1051 { "pmulhw", MX, EM, XX },
1052 { PREGRP15 },
1053 { PREGRP25 },
1054 /* e8 */
1055 { "psubsb", MX, EM, XX },
1056 { "psubsw", MX, EM, XX },
1057 { "pminsw", MX, EM, XX },
1058 { "por", MX, EM, XX },
1059 { "paddsb", MX, EM, XX },
1060 { "paddsw", MX, EM, XX },
1061 { "pmaxsw", MX, EM, XX },
1062 { "pxor", MX, EM, XX },
1063 /* f0 */
1064 { PREGRP32 },
1065 { "psllw", MX, EM, XX },
1066 { "pslld", MX, EM, XX },
1067 { "psllq", MX, EM, XX },
1068 { "pmuludq", MX, EM, XX },
1069 { "pmaddwd", MX, EM, XX },
1070 { "psadbw", MX, EM, XX },
1071 { PREGRP18 },
1072 /* f8 */
1073 { "psubb", MX, EM, XX },
1074 { "psubw", MX, EM, XX },
1075 { "psubd", MX, EM, XX },
1076 { "psubq", MX, EM, XX },
1077 { "paddb", MX, EM, XX },
1078 { "paddw", MX, EM, XX },
1079 { "paddd", MX, EM, XX },
1080 { "(bad)", XX, XX, XX }
1081 };
1082
1083 static const unsigned char onebyte_has_modrm[256] = {
1084 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1085 /* ------------------------------- */
1086 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1087 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1088 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1089 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1090 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1091 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1092 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1093 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1094 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1095 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1096 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1097 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1098 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1099 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1100 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1101 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1102 /* ------------------------------- */
1103 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1104 };
1105
1106 static const unsigned char twobyte_has_modrm[256] = {
1107 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1108 /* ------------------------------- */
1109 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1110 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1111 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1112 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1113 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1114 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1115 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1116 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1117 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1118 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1119 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1120 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1121 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1122 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1123 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1124 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1125 /* ------------------------------- */
1126 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1127 };
1128
1129 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1130 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1131 /* ------------------------------- */
1132 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1133 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1134 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1135 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1136 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1137 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1138 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1139 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1140 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1141 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1142 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1143 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1144 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1145 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1146 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1147 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1148 /* ------------------------------- */
1149 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1150 };
1151
1152 static char obuf[100];
1153 static char *obufp;
1154 static char scratchbuf[100];
1155 static unsigned char *start_codep;
1156 static unsigned char *insn_codep;
1157 static unsigned char *codep;
1158 static disassemble_info *the_info;
1159 static int mod;
1160 static int rm;
1161 static int reg;
1162 static unsigned char need_modrm;
1163
1164 /* If we are accessing mod/rm/reg without need_modrm set, then the
1165 values are stale. Hitting this abort likely indicates that you
1166 need to update onebyte_has_modrm or twobyte_has_modrm. */
1167 #define MODRM_CHECK if (!need_modrm) abort ()
1168
1169 static const char **names64;
1170 static const char **names32;
1171 static const char **names16;
1172 static const char **names8;
1173 static const char **names8rex;
1174 static const char **names_seg;
1175 static const char **index16;
1176
1177 static const char *intel_names64[] = {
1178 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1180 };
1181 static const char *intel_names32[] = {
1182 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1183 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1184 };
1185 static const char *intel_names16[] = {
1186 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1187 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1188 };
1189 static const char *intel_names8[] = {
1190 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1191 };
1192 static const char *intel_names8rex[] = {
1193 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1194 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1195 };
1196 static const char *intel_names_seg[] = {
1197 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1198 };
1199 static const char *intel_index16[] = {
1200 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1201 };
1202
1203 static const char *att_names64[] = {
1204 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1205 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1206 };
1207 static const char *att_names32[] = {
1208 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1209 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1210 };
1211 static const char *att_names16[] = {
1212 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1213 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1214 };
1215 static const char *att_names8[] = {
1216 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1217 };
1218 static const char *att_names8rex[] = {
1219 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1220 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1221 };
1222 static const char *att_names_seg[] = {
1223 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1224 };
1225 static const char *att_index16[] = {
1226 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1227 };
1228
1229 static const struct dis386 grps[][8] = {
1230 /* GRP1b */
1231 {
1232 { "addA", Eb, Ib, XX },
1233 { "orA", Eb, Ib, XX },
1234 { "adcA", Eb, Ib, XX },
1235 { "sbbA", Eb, Ib, XX },
1236 { "andA", Eb, Ib, XX },
1237 { "subA", Eb, Ib, XX },
1238 { "xorA", Eb, Ib, XX },
1239 { "cmpA", Eb, Ib, XX }
1240 },
1241 /* GRP1S */
1242 {
1243 { "addQ", Ev, Iv, XX },
1244 { "orQ", Ev, Iv, XX },
1245 { "adcQ", Ev, Iv, XX },
1246 { "sbbQ", Ev, Iv, XX },
1247 { "andQ", Ev, Iv, XX },
1248 { "subQ", Ev, Iv, XX },
1249 { "xorQ", Ev, Iv, XX },
1250 { "cmpQ", Ev, Iv, XX }
1251 },
1252 /* GRP1Ss */
1253 {
1254 { "addQ", Ev, sIb, XX },
1255 { "orQ", Ev, sIb, XX },
1256 { "adcQ", Ev, sIb, XX },
1257 { "sbbQ", Ev, sIb, XX },
1258 { "andQ", Ev, sIb, XX },
1259 { "subQ", Ev, sIb, XX },
1260 { "xorQ", Ev, sIb, XX },
1261 { "cmpQ", Ev, sIb, XX }
1262 },
1263 /* GRP2b */
1264 {
1265 { "rolA", Eb, Ib, XX },
1266 { "rorA", Eb, Ib, XX },
1267 { "rclA", Eb, Ib, XX },
1268 { "rcrA", Eb, Ib, XX },
1269 { "shlA", Eb, Ib, XX },
1270 { "shrA", Eb, Ib, XX },
1271 { "(bad)", XX, XX, XX },
1272 { "sarA", Eb, Ib, XX },
1273 },
1274 /* GRP2S */
1275 {
1276 { "rolQ", Ev, Ib, XX },
1277 { "rorQ", Ev, Ib, XX },
1278 { "rclQ", Ev, Ib, XX },
1279 { "rcrQ", Ev, Ib, XX },
1280 { "shlQ", Ev, Ib, XX },
1281 { "shrQ", Ev, Ib, XX },
1282 { "(bad)", XX, XX, XX },
1283 { "sarQ", Ev, Ib, XX },
1284 },
1285 /* GRP2b_one */
1286 {
1287 { "rolA", Eb, I1, XX },
1288 { "rorA", Eb, I1, XX },
1289 { "rclA", Eb, I1, XX },
1290 { "rcrA", Eb, I1, XX },
1291 { "shlA", Eb, I1, XX },
1292 { "shrA", Eb, I1, XX },
1293 { "(bad)", XX, XX, XX },
1294 { "sarA", Eb, I1, XX },
1295 },
1296 /* GRP2S_one */
1297 {
1298 { "rolQ", Ev, I1, XX },
1299 { "rorQ", Ev, I1, XX },
1300 { "rclQ", Ev, I1, XX },
1301 { "rcrQ", Ev, I1, XX },
1302 { "shlQ", Ev, I1, XX },
1303 { "shrQ", Ev, I1, XX },
1304 { "(bad)", XX, XX, XX},
1305 { "sarQ", Ev, I1, XX },
1306 },
1307 /* GRP2b_cl */
1308 {
1309 { "rolA", Eb, CL, XX },
1310 { "rorA", Eb, CL, XX },
1311 { "rclA", Eb, CL, XX },
1312 { "rcrA", Eb, CL, XX },
1313 { "shlA", Eb, CL, XX },
1314 { "shrA", Eb, CL, XX },
1315 { "(bad)", XX, XX, XX },
1316 { "sarA", Eb, CL, XX },
1317 },
1318 /* GRP2S_cl */
1319 {
1320 { "rolQ", Ev, CL, XX },
1321 { "rorQ", Ev, CL, XX },
1322 { "rclQ", Ev, CL, XX },
1323 { "rcrQ", Ev, CL, XX },
1324 { "shlQ", Ev, CL, XX },
1325 { "shrQ", Ev, CL, XX },
1326 { "(bad)", XX, XX, XX },
1327 { "sarQ", Ev, CL, XX }
1328 },
1329 /* GRP3b */
1330 {
1331 { "testA", Eb, Ib, XX },
1332 { "(bad)", Eb, XX, XX },
1333 { "notA", Eb, XX, XX },
1334 { "negA", Eb, XX, XX },
1335 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1336 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1337 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1338 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1339 },
1340 /* GRP3S */
1341 {
1342 { "testQ", Ev, Iv, XX },
1343 { "(bad)", XX, XX, XX },
1344 { "notQ", Ev, XX, XX },
1345 { "negQ", Ev, XX, XX },
1346 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1347 { "imulQ", Ev, XX, XX },
1348 { "divQ", Ev, XX, XX },
1349 { "idivQ", Ev, XX, XX },
1350 },
1351 /* GRP4 */
1352 {
1353 { "incA", Eb, XX, XX },
1354 { "decA", Eb, XX, XX },
1355 { "(bad)", XX, XX, XX },
1356 { "(bad)", XX, XX, XX },
1357 { "(bad)", XX, XX, XX },
1358 { "(bad)", XX, XX, XX },
1359 { "(bad)", XX, XX, XX },
1360 { "(bad)", XX, XX, XX },
1361 },
1362 /* GRP5 */
1363 {
1364 { "incQ", Ev, XX, XX },
1365 { "decQ", Ev, XX, XX },
1366 { "callT", indirEv, XX, XX },
1367 { "JcallT", indirEp, XX, XX },
1368 { "jmpT", indirEv, XX, XX },
1369 { "JjmpT", indirEp, XX, XX },
1370 { "pushU", stackEv, XX, XX },
1371 { "(bad)", XX, XX, XX },
1372 },
1373 /* GRP6 */
1374 {
1375 { "sldtQ", Ev, XX, XX },
1376 { "strQ", Ev, XX, XX },
1377 { "lldt", Ew, XX, XX },
1378 { "ltr", Ew, XX, XX },
1379 { "verr", Ew, XX, XX },
1380 { "verw", Ew, XX, XX },
1381 { "(bad)", XX, XX, XX },
1382 { "(bad)", XX, XX, XX }
1383 },
1384 /* GRP7 */
1385 {
1386 { "sgdtIQ", VMX_Fixup, 0, XX, XX },
1387 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1388 { "lgdt{Q|Q||}", M, XX, XX },
1389 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
1390 { "smswQ", Ev, XX, XX },
1391 { "(bad)", XX, XX, XX },
1392 { "lmsw", Ew, XX, XX },
1393 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1394 },
1395 /* GRP8 */
1396 {
1397 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "(bad)", XX, XX, XX },
1401 { "btQ", Ev, Ib, XX },
1402 { "btsQ", Ev, Ib, XX },
1403 { "btrQ", Ev, Ib, XX },
1404 { "btcQ", Ev, Ib, XX },
1405 },
1406 /* GRP9 */
1407 {
1408 { "(bad)", XX, XX, XX },
1409 { "cmpxchg8b", Eq, XX, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "(bad)", XX, XX, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "(bad)", XX, XX, XX },
1414 { "", VM, XX, XX }, /* See OP_VMX. */
1415 { "vmptrst", Eq, XX, XX },
1416 },
1417 /* GRP10 */
1418 {
1419 { "(bad)", XX, XX, XX },
1420 { "(bad)", XX, XX, XX },
1421 { "psrlw", MS, Ib, XX },
1422 { "(bad)", XX, XX, XX },
1423 { "psraw", MS, Ib, XX },
1424 { "(bad)", XX, XX, XX },
1425 { "psllw", MS, Ib, XX },
1426 { "(bad)", XX, XX, XX },
1427 },
1428 /* GRP11 */
1429 {
1430 { "(bad)", XX, XX, XX },
1431 { "(bad)", XX, XX, XX },
1432 { "psrld", MS, Ib, XX },
1433 { "(bad)", XX, XX, XX },
1434 { "psrad", MS, Ib, XX },
1435 { "(bad)", XX, XX, XX },
1436 { "pslld", MS, Ib, XX },
1437 { "(bad)", XX, XX, XX },
1438 },
1439 /* GRP12 */
1440 {
1441 { "(bad)", XX, XX, XX },
1442 { "(bad)", XX, XX, XX },
1443 { "psrlq", MS, Ib, XX },
1444 { "psrldq", MS, Ib, XX },
1445 { "(bad)", XX, XX, XX },
1446 { "(bad)", XX, XX, XX },
1447 { "psllq", MS, Ib, XX },
1448 { "pslldq", MS, Ib, XX },
1449 },
1450 /* GRP13 */
1451 {
1452 { "fxsave", Ev, XX, XX },
1453 { "fxrstor", Ev, XX, XX },
1454 { "ldmxcsr", Ev, XX, XX },
1455 { "stmxcsr", Ev, XX, XX },
1456 { "(bad)", XX, XX, XX },
1457 { "lfence", OP_0fae, 0, XX, XX },
1458 { "mfence", OP_0fae, 0, XX, XX },
1459 { "clflush", OP_0fae, 0, XX, XX },
1460 },
1461 /* GRP14 */
1462 {
1463 { "prefetchnta", Ev, XX, XX },
1464 { "prefetcht0", Ev, XX, XX },
1465 { "prefetcht1", Ev, XX, XX },
1466 { "prefetcht2", Ev, XX, XX },
1467 { "(bad)", XX, XX, XX },
1468 { "(bad)", XX, XX, XX },
1469 { "(bad)", XX, XX, XX },
1470 { "(bad)", XX, XX, XX },
1471 },
1472 /* GRPAMD */
1473 {
1474 { "prefetch", Eb, XX, XX },
1475 { "prefetchw", Eb, XX, XX },
1476 { "(bad)", XX, XX, XX },
1477 { "(bad)", XX, XX, XX },
1478 { "(bad)", XX, XX, XX },
1479 { "(bad)", XX, XX, XX },
1480 { "(bad)", XX, XX, XX },
1481 { "(bad)", XX, XX, XX },
1482 },
1483 /* GRPPADLCK1 */
1484 {
1485 { "xstore-rng", OP_0f07, 0, XX, XX },
1486 { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1487 { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1488 { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1489 { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1490 { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1491 { "(bad)", OP_0f07, 0, XX, XX },
1492 { "(bad)", OP_0f07, 0, XX, XX },
1493 },
1494 /* GRPPADLCK2 */
1495 {
1496 { "montmul", OP_0f07, 0, XX, XX },
1497 { "xsha1", OP_0f07, 0, XX, XX },
1498 { "xsha256", OP_0f07, 0, XX, XX },
1499 { "(bad)", OP_0f07, 0, XX, XX },
1500 { "(bad)", OP_0f07, 0, XX, XX },
1501 { "(bad)", OP_0f07, 0, XX, XX },
1502 { "(bad)", OP_0f07, 0, XX, XX },
1503 { "(bad)", OP_0f07, 0, XX, XX },
1504 }
1505 };
1506
1507 static const struct dis386 prefix_user_table[][4] = {
1508 /* PREGRP0 */
1509 {
1510 { "addps", XM, EX, XX },
1511 { "addss", XM, EX, XX },
1512 { "addpd", XM, EX, XX },
1513 { "addsd", XM, EX, XX },
1514 },
1515 /* PREGRP1 */
1516 {
1517 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1518 { "", XM, EX, OPSIMD },
1519 { "", XM, EX, OPSIMD },
1520 { "", XM, EX, OPSIMD },
1521 },
1522 /* PREGRP2 */
1523 {
1524 { "cvtpi2ps", XM, EM, XX },
1525 { "cvtsi2ssY", XM, Ev, XX },
1526 { "cvtpi2pd", XM, EM, XX },
1527 { "cvtsi2sdY", XM, Ev, XX },
1528 },
1529 /* PREGRP3 */
1530 {
1531 { "cvtps2pi", MX, EX, XX },
1532 { "cvtss2siY", Gv, EX, XX },
1533 { "cvtpd2pi", MX, EX, XX },
1534 { "cvtsd2siY", Gv, EX, XX },
1535 },
1536 /* PREGRP4 */
1537 {
1538 { "cvttps2pi", MX, EX, XX },
1539 { "cvttss2siY", Gv, EX, XX },
1540 { "cvttpd2pi", MX, EX, XX },
1541 { "cvttsd2siY", Gv, EX, XX },
1542 },
1543 /* PREGRP5 */
1544 {
1545 { "divps", XM, EX, XX },
1546 { "divss", XM, EX, XX },
1547 { "divpd", XM, EX, XX },
1548 { "divsd", XM, EX, XX },
1549 },
1550 /* PREGRP6 */
1551 {
1552 { "maxps", XM, EX, XX },
1553 { "maxss", XM, EX, XX },
1554 { "maxpd", XM, EX, XX },
1555 { "maxsd", XM, EX, XX },
1556 },
1557 /* PREGRP7 */
1558 {
1559 { "minps", XM, EX, XX },
1560 { "minss", XM, EX, XX },
1561 { "minpd", XM, EX, XX },
1562 { "minsd", XM, EX, XX },
1563 },
1564 /* PREGRP8 */
1565 {
1566 { "movups", XM, EX, XX },
1567 { "movss", XM, EX, XX },
1568 { "movupd", XM, EX, XX },
1569 { "movsd", XM, EX, XX },
1570 },
1571 /* PREGRP9 */
1572 {
1573 { "movups", EX, XM, XX },
1574 { "movss", EX, XM, XX },
1575 { "movupd", EX, XM, XX },
1576 { "movsd", EX, XM, XX },
1577 },
1578 /* PREGRP10 */
1579 {
1580 { "mulps", XM, EX, XX },
1581 { "mulss", XM, EX, XX },
1582 { "mulpd", XM, EX, XX },
1583 { "mulsd", XM, EX, XX },
1584 },
1585 /* PREGRP11 */
1586 {
1587 { "rcpps", XM, EX, XX },
1588 { "rcpss", XM, EX, XX },
1589 { "(bad)", XM, EX, XX },
1590 { "(bad)", XM, EX, XX },
1591 },
1592 /* PREGRP12 */
1593 {
1594 { "rsqrtps", XM, EX, XX },
1595 { "rsqrtss", XM, EX, XX },
1596 { "(bad)", XM, EX, XX },
1597 { "(bad)", XM, EX, XX },
1598 },
1599 /* PREGRP13 */
1600 {
1601 { "sqrtps", XM, EX, XX },
1602 { "sqrtss", XM, EX, XX },
1603 { "sqrtpd", XM, EX, XX },
1604 { "sqrtsd", XM, EX, XX },
1605 },
1606 /* PREGRP14 */
1607 {
1608 { "subps", XM, EX, XX },
1609 { "subss", XM, EX, XX },
1610 { "subpd", XM, EX, XX },
1611 { "subsd", XM, EX, XX },
1612 },
1613 /* PREGRP15 */
1614 {
1615 { "(bad)", XM, EX, XX },
1616 { "cvtdq2pd", XM, EX, XX },
1617 { "cvttpd2dq", XM, EX, XX },
1618 { "cvtpd2dq", XM, EX, XX },
1619 },
1620 /* PREGRP16 */
1621 {
1622 { "cvtdq2ps", XM, EX, XX },
1623 { "cvttps2dq",XM, EX, XX },
1624 { "cvtps2dq",XM, EX, XX },
1625 { "(bad)", XM, EX, XX },
1626 },
1627 /* PREGRP17 */
1628 {
1629 { "cvtps2pd", XM, EX, XX },
1630 { "cvtss2sd", XM, EX, XX },
1631 { "cvtpd2ps", XM, EX, XX },
1632 { "cvtsd2ss", XM, EX, XX },
1633 },
1634 /* PREGRP18 */
1635 {
1636 { "maskmovq", MX, MS, XX },
1637 { "(bad)", XM, EX, XX },
1638 { "maskmovdqu", XM, EX, XX },
1639 { "(bad)", XM, EX, XX },
1640 },
1641 /* PREGRP19 */
1642 {
1643 { "movq", MX, EM, XX },
1644 { "movdqu", XM, EX, XX },
1645 { "movdqa", XM, EX, XX },
1646 { "(bad)", XM, EX, XX },
1647 },
1648 /* PREGRP20 */
1649 {
1650 { "movq", EM, MX, XX },
1651 { "movdqu", EX, XM, XX },
1652 { "movdqa", EX, XM, XX },
1653 { "(bad)", EX, XM, XX },
1654 },
1655 /* PREGRP21 */
1656 {
1657 { "(bad)", EX, XM, XX },
1658 { "movq2dq", XM, MS, XX },
1659 { "movq", EX, XM, XX },
1660 { "movdq2q", MX, XS, XX },
1661 },
1662 /* PREGRP22 */
1663 {
1664 { "pshufw", MX, EM, Ib },
1665 { "pshufhw", XM, EX, Ib },
1666 { "pshufd", XM, EX, Ib },
1667 { "pshuflw", XM, EX, Ib },
1668 },
1669 /* PREGRP23 */
1670 {
1671 { "movd", Edq, MX, XX },
1672 { "movq", XM, EX, XX },
1673 { "movd", Edq, XM, XX },
1674 { "(bad)", Ed, XM, XX },
1675 },
1676 /* PREGRP24 */
1677 {
1678 { "(bad)", MX, EX, XX },
1679 { "(bad)", XM, EX, XX },
1680 { "punpckhqdq", XM, EX, XX },
1681 { "(bad)", XM, EX, XX },
1682 },
1683 /* PREGRP25 */
1684 {
1685 { "movntq", EM, MX, XX },
1686 { "(bad)", EM, XM, XX },
1687 { "movntdq", EM, XM, XX },
1688 { "(bad)", EM, XM, XX },
1689 },
1690 /* PREGRP26 */
1691 {
1692 { "(bad)", MX, EX, XX },
1693 { "(bad)", XM, EX, XX },
1694 { "punpcklqdq", XM, EX, XX },
1695 { "(bad)", XM, EX, XX },
1696 },
1697 /* PREGRP27 */
1698 {
1699 { "(bad)", MX, EX, XX },
1700 { "(bad)", XM, EX, XX },
1701 { "addsubpd", XM, EX, XX },
1702 { "addsubps", XM, EX, XX },
1703 },
1704 /* PREGRP28 */
1705 {
1706 { "(bad)", MX, EX, XX },
1707 { "(bad)", XM, EX, XX },
1708 { "haddpd", XM, EX, XX },
1709 { "haddps", XM, EX, XX },
1710 },
1711 /* PREGRP29 */
1712 {
1713 { "(bad)", MX, EX, XX },
1714 { "(bad)", XM, EX, XX },
1715 { "hsubpd", XM, EX, XX },
1716 { "hsubps", XM, EX, XX },
1717 },
1718 /* PREGRP30 */
1719 {
1720 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1721 { "movsldup", XM, EX, XX },
1722 { "movlpd", XM, EX, XX },
1723 { "movddup", XM, EX, XX },
1724 },
1725 /* PREGRP31 */
1726 {
1727 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1728 { "movshdup", XM, EX, XX },
1729 { "movhpd", XM, EX, XX },
1730 { "(bad)", XM, EX, XX },
1731 },
1732 /* PREGRP32 */
1733 {
1734 { "(bad)", XM, EX, XX },
1735 { "(bad)", XM, EX, XX },
1736 { "(bad)", XM, EX, XX },
1737 { "lddqu", XM, M, XX },
1738 },
1739 };
1740
1741 static const struct dis386 x86_64_table[][2] = {
1742 {
1743 { "arpl", Ew, Gw, XX },
1744 { "movs{||lq|xd}", Gv, Ed, XX },
1745 },
1746 };
1747
1748 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1749
1750 static void
1751 ckprefix (void)
1752 {
1753 int newrex;
1754 rex = 0;
1755 prefixes = 0;
1756 used_prefixes = 0;
1757 rex_used = 0;
1758 while (1)
1759 {
1760 FETCH_DATA (the_info, codep + 1);
1761 newrex = 0;
1762 switch (*codep)
1763 {
1764 /* REX prefixes family. */
1765 case 0x40:
1766 case 0x41:
1767 case 0x42:
1768 case 0x43:
1769 case 0x44:
1770 case 0x45:
1771 case 0x46:
1772 case 0x47:
1773 case 0x48:
1774 case 0x49:
1775 case 0x4a:
1776 case 0x4b:
1777 case 0x4c:
1778 case 0x4d:
1779 case 0x4e:
1780 case 0x4f:
1781 if (address_mode == mode_64bit)
1782 newrex = *codep;
1783 else
1784 return;
1785 break;
1786 case 0xf3:
1787 prefixes |= PREFIX_REPZ;
1788 break;
1789 case 0xf2:
1790 prefixes |= PREFIX_REPNZ;
1791 break;
1792 case 0xf0:
1793 prefixes |= PREFIX_LOCK;
1794 break;
1795 case 0x2e:
1796 prefixes |= PREFIX_CS;
1797 break;
1798 case 0x36:
1799 prefixes |= PREFIX_SS;
1800 break;
1801 case 0x3e:
1802 prefixes |= PREFIX_DS;
1803 break;
1804 case 0x26:
1805 prefixes |= PREFIX_ES;
1806 break;
1807 case 0x64:
1808 prefixes |= PREFIX_FS;
1809 break;
1810 case 0x65:
1811 prefixes |= PREFIX_GS;
1812 break;
1813 case 0x66:
1814 prefixes |= PREFIX_DATA;
1815 break;
1816 case 0x67:
1817 prefixes |= PREFIX_ADDR;
1818 break;
1819 case FWAIT_OPCODE:
1820 /* fwait is really an instruction. If there are prefixes
1821 before the fwait, they belong to the fwait, *not* to the
1822 following instruction. */
1823 if (prefixes || rex)
1824 {
1825 prefixes |= PREFIX_FWAIT;
1826 codep++;
1827 return;
1828 }
1829 prefixes = PREFIX_FWAIT;
1830 break;
1831 default:
1832 return;
1833 }
1834 /* Rex is ignored when followed by another prefix. */
1835 if (rex)
1836 {
1837 rex_used = rex;
1838 return;
1839 }
1840 rex = newrex;
1841 codep++;
1842 }
1843 }
1844
1845 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1846 prefix byte. */
1847
1848 static const char *
1849 prefix_name (int pref, int sizeflag)
1850 {
1851 switch (pref)
1852 {
1853 /* REX prefixes family. */
1854 case 0x40:
1855 return "rex";
1856 case 0x41:
1857 return "rexZ";
1858 case 0x42:
1859 return "rexY";
1860 case 0x43:
1861 return "rexYZ";
1862 case 0x44:
1863 return "rexX";
1864 case 0x45:
1865 return "rexXZ";
1866 case 0x46:
1867 return "rexXY";
1868 case 0x47:
1869 return "rexXYZ";
1870 case 0x48:
1871 return "rex64";
1872 case 0x49:
1873 return "rex64Z";
1874 case 0x4a:
1875 return "rex64Y";
1876 case 0x4b:
1877 return "rex64YZ";
1878 case 0x4c:
1879 return "rex64X";
1880 case 0x4d:
1881 return "rex64XZ";
1882 case 0x4e:
1883 return "rex64XY";
1884 case 0x4f:
1885 return "rex64XYZ";
1886 case 0xf3:
1887 return "repz";
1888 case 0xf2:
1889 return "repnz";
1890 case 0xf0:
1891 return "lock";
1892 case 0x2e:
1893 return "cs";
1894 case 0x36:
1895 return "ss";
1896 case 0x3e:
1897 return "ds";
1898 case 0x26:
1899 return "es";
1900 case 0x64:
1901 return "fs";
1902 case 0x65:
1903 return "gs";
1904 case 0x66:
1905 return (sizeflag & DFLAG) ? "data16" : "data32";
1906 case 0x67:
1907 if (address_mode == mode_64bit)
1908 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1909 else
1910 return (sizeflag & AFLAG) ? "addr16" : "addr32";
1911 case FWAIT_OPCODE:
1912 return "fwait";
1913 default:
1914 return NULL;
1915 }
1916 }
1917
1918 static char op1out[100], op2out[100], op3out[100];
1919 static int op_ad, op_index[3];
1920 static int two_source_ops;
1921 static bfd_vma op_address[3];
1922 static bfd_vma op_riprel[3];
1923 static bfd_vma start_pc;
1924 \f
1925 /*
1926 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1927 * (see topic "Redundant prefixes" in the "Differences from 8086"
1928 * section of the "Virtual 8086 Mode" chapter.)
1929 * 'pc' should be the address of this instruction, it will
1930 * be used to print the target address if this is a relative jump or call
1931 * The function returns the length of this instruction in bytes.
1932 */
1933
1934 static char intel_syntax;
1935 static char open_char;
1936 static char close_char;
1937 static char separator_char;
1938 static char scale_char;
1939
1940 /* Here for backwards compatibility. When gdb stops using
1941 print_insn_i386_att and print_insn_i386_intel these functions can
1942 disappear, and print_insn_i386 be merged into print_insn. */
1943 int
1944 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1945 {
1946 intel_syntax = 0;
1947
1948 return print_insn (pc, info);
1949 }
1950
1951 int
1952 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1953 {
1954 intel_syntax = 1;
1955
1956 return print_insn (pc, info);
1957 }
1958
1959 int
1960 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1961 {
1962 intel_syntax = -1;
1963
1964 return print_insn (pc, info);
1965 }
1966
1967 static int
1968 print_insn (bfd_vma pc, disassemble_info *info)
1969 {
1970 const struct dis386 *dp;
1971 int i;
1972 char *first, *second, *third;
1973 int needcomma;
1974 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1975 int sizeflag;
1976 const char *p;
1977 struct dis_private priv;
1978
1979 if (info->mach == bfd_mach_x86_64_intel_syntax
1980 || info->mach == bfd_mach_x86_64)
1981 address_mode = mode_64bit;
1982 else
1983 address_mode = mode_32bit;
1984
1985 if (intel_syntax == (char) -1)
1986 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1987 || info->mach == bfd_mach_x86_64_intel_syntax);
1988
1989 if (info->mach == bfd_mach_i386_i386
1990 || info->mach == bfd_mach_x86_64
1991 || info->mach == bfd_mach_i386_i386_intel_syntax
1992 || info->mach == bfd_mach_x86_64_intel_syntax)
1993 priv.orig_sizeflag = AFLAG | DFLAG;
1994 else if (info->mach == bfd_mach_i386_i8086)
1995 priv.orig_sizeflag = 0;
1996 else
1997 abort ();
1998
1999 for (p = info->disassembler_options; p != NULL; )
2000 {
2001 if (strncmp (p, "x86-64", 6) == 0)
2002 {
2003 address_mode = mode_64bit;
2004 priv.orig_sizeflag = AFLAG | DFLAG;
2005 }
2006 else if (strncmp (p, "i386", 4) == 0)
2007 {
2008 address_mode = mode_32bit;
2009 priv.orig_sizeflag = AFLAG | DFLAG;
2010 }
2011 else if (strncmp (p, "i8086", 5) == 0)
2012 {
2013 address_mode = mode_16bit;
2014 priv.orig_sizeflag = 0;
2015 }
2016 else if (strncmp (p, "intel", 5) == 0)
2017 {
2018 intel_syntax = 1;
2019 }
2020 else if (strncmp (p, "att", 3) == 0)
2021 {
2022 intel_syntax = 0;
2023 }
2024 else if (strncmp (p, "addr", 4) == 0)
2025 {
2026 if (p[4] == '1' && p[5] == '6')
2027 priv.orig_sizeflag &= ~AFLAG;
2028 else if (p[4] == '3' && p[5] == '2')
2029 priv.orig_sizeflag |= AFLAG;
2030 }
2031 else if (strncmp (p, "data", 4) == 0)
2032 {
2033 if (p[4] == '1' && p[5] == '6')
2034 priv.orig_sizeflag &= ~DFLAG;
2035 else if (p[4] == '3' && p[5] == '2')
2036 priv.orig_sizeflag |= DFLAG;
2037 }
2038 else if (strncmp (p, "suffix", 6) == 0)
2039 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2040
2041 p = strchr (p, ',');
2042 if (p != NULL)
2043 p++;
2044 }
2045
2046 if (intel_syntax)
2047 {
2048 names64 = intel_names64;
2049 names32 = intel_names32;
2050 names16 = intel_names16;
2051 names8 = intel_names8;
2052 names8rex = intel_names8rex;
2053 names_seg = intel_names_seg;
2054 index16 = intel_index16;
2055 open_char = '[';
2056 close_char = ']';
2057 separator_char = '+';
2058 scale_char = '*';
2059 }
2060 else
2061 {
2062 names64 = att_names64;
2063 names32 = att_names32;
2064 names16 = att_names16;
2065 names8 = att_names8;
2066 names8rex = att_names8rex;
2067 names_seg = att_names_seg;
2068 index16 = att_index16;
2069 open_char = '(';
2070 close_char = ')';
2071 separator_char = ',';
2072 scale_char = ',';
2073 }
2074
2075 /* The output looks better if we put 7 bytes on a line, since that
2076 puts most long word instructions on a single line. */
2077 info->bytes_per_line = 7;
2078
2079 info->private_data = &priv;
2080 priv.max_fetched = priv.the_buffer;
2081 priv.insn_start = pc;
2082
2083 obuf[0] = 0;
2084 op1out[0] = 0;
2085 op2out[0] = 0;
2086 op3out[0] = 0;
2087
2088 op_index[0] = op_index[1] = op_index[2] = -1;
2089
2090 the_info = info;
2091 start_pc = pc;
2092 start_codep = priv.the_buffer;
2093 codep = priv.the_buffer;
2094
2095 if (setjmp (priv.bailout) != 0)
2096 {
2097 const char *name;
2098
2099 /* Getting here means we tried for data but didn't get it. That
2100 means we have an incomplete instruction of some sort. Just
2101 print the first byte as a prefix or a .byte pseudo-op. */
2102 if (codep > priv.the_buffer)
2103 {
2104 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2105 if (name != NULL)
2106 (*info->fprintf_func) (info->stream, "%s", name);
2107 else
2108 {
2109 /* Just print the first byte as a .byte instruction. */
2110 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2111 (unsigned int) priv.the_buffer[0]);
2112 }
2113
2114 return 1;
2115 }
2116
2117 return -1;
2118 }
2119
2120 obufp = obuf;
2121 ckprefix ();
2122
2123 insn_codep = codep;
2124 sizeflag = priv.orig_sizeflag;
2125
2126 FETCH_DATA (info, codep + 1);
2127 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2128
2129 if (((prefixes & PREFIX_FWAIT)
2130 && ((*codep < 0xd8) || (*codep > 0xdf)))
2131 || (rex && rex_used))
2132 {
2133 const char *name;
2134
2135 /* fwait not followed by floating point instruction, or rex followed
2136 by other prefixes. Print the first prefix. */
2137 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2138 if (name == NULL)
2139 name = INTERNAL_DISASSEMBLER_ERROR;
2140 (*info->fprintf_func) (info->stream, "%s", name);
2141 return 1;
2142 }
2143
2144 if (*codep == 0x0f)
2145 {
2146 FETCH_DATA (info, codep + 2);
2147 dp = &dis386_twobyte[*++codep];
2148 need_modrm = twobyte_has_modrm[*codep];
2149 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2150 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2151 }
2152 else
2153 {
2154 dp = &dis386[*codep];
2155 need_modrm = onebyte_has_modrm[*codep];
2156 uses_SSE_prefix = 0;
2157 uses_LOCK_prefix = 0;
2158 }
2159 codep++;
2160
2161 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2162 {
2163 oappend ("repz ");
2164 used_prefixes |= PREFIX_REPZ;
2165 }
2166 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2167 {
2168 oappend ("repnz ");
2169 used_prefixes |= PREFIX_REPNZ;
2170 }
2171 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2172 {
2173 oappend ("lock ");
2174 used_prefixes |= PREFIX_LOCK;
2175 }
2176
2177 if (prefixes & PREFIX_ADDR)
2178 {
2179 sizeflag ^= AFLAG;
2180 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2181 {
2182 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
2183 oappend ("addr32 ");
2184 else
2185 oappend ("addr16 ");
2186 used_prefixes |= PREFIX_ADDR;
2187 }
2188 }
2189
2190 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2191 {
2192 sizeflag ^= DFLAG;
2193 if (dp->bytemode3 == cond_jump_mode
2194 && dp->bytemode1 == v_mode
2195 && !intel_syntax)
2196 {
2197 if (sizeflag & DFLAG)
2198 oappend ("data32 ");
2199 else
2200 oappend ("data16 ");
2201 used_prefixes |= PREFIX_DATA;
2202 }
2203 }
2204
2205 if (need_modrm)
2206 {
2207 FETCH_DATA (info, codep + 1);
2208 mod = (*codep >> 6) & 3;
2209 reg = (*codep >> 3) & 7;
2210 rm = *codep & 7;
2211 }
2212
2213 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2214 {
2215 dofloat (sizeflag);
2216 }
2217 else
2218 {
2219 int index;
2220 if (dp->name == NULL)
2221 {
2222 switch (dp->bytemode1)
2223 {
2224 case USE_GROUPS:
2225 dp = &grps[dp->bytemode2][reg];
2226 break;
2227
2228 case USE_PREFIX_USER_TABLE:
2229 index = 0;
2230 used_prefixes |= (prefixes & PREFIX_REPZ);
2231 if (prefixes & PREFIX_REPZ)
2232 index = 1;
2233 else
2234 {
2235 used_prefixes |= (prefixes & PREFIX_DATA);
2236 if (prefixes & PREFIX_DATA)
2237 index = 2;
2238 else
2239 {
2240 used_prefixes |= (prefixes & PREFIX_REPNZ);
2241 if (prefixes & PREFIX_REPNZ)
2242 index = 3;
2243 }
2244 }
2245 dp = &prefix_user_table[dp->bytemode2][index];
2246 break;
2247
2248 case X86_64_SPECIAL:
2249 index = address_mode == mode_64bit ? 1 : 0;
2250 dp = &x86_64_table[dp->bytemode2][index];
2251 break;
2252
2253 default:
2254 oappend (INTERNAL_DISASSEMBLER_ERROR);
2255 break;
2256 }
2257 }
2258
2259 if (putop (dp->name, sizeflag) == 0)
2260 {
2261 obufp = op1out;
2262 op_ad = 2;
2263 if (dp->op1)
2264 (*dp->op1) (dp->bytemode1, sizeflag);
2265
2266 obufp = op2out;
2267 op_ad = 1;
2268 if (dp->op2)
2269 (*dp->op2) (dp->bytemode2, sizeflag);
2270
2271 obufp = op3out;
2272 op_ad = 0;
2273 if (dp->op3)
2274 (*dp->op3) (dp->bytemode3, sizeflag);
2275 }
2276 }
2277
2278 /* See if any prefixes were not used. If so, print the first one
2279 separately. If we don't do this, we'll wind up printing an
2280 instruction stream which does not precisely correspond to the
2281 bytes we are disassembling. */
2282 if ((prefixes & ~used_prefixes) != 0)
2283 {
2284 const char *name;
2285
2286 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2287 if (name == NULL)
2288 name = INTERNAL_DISASSEMBLER_ERROR;
2289 (*info->fprintf_func) (info->stream, "%s", name);
2290 return 1;
2291 }
2292 if (rex & ~rex_used)
2293 {
2294 const char *name;
2295 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2296 if (name == NULL)
2297 name = INTERNAL_DISASSEMBLER_ERROR;
2298 (*info->fprintf_func) (info->stream, "%s ", name);
2299 }
2300
2301 obufp = obuf + strlen (obuf);
2302 for (i = strlen (obuf); i < 6; i++)
2303 oappend (" ");
2304 oappend (" ");
2305 (*info->fprintf_func) (info->stream, "%s", obuf);
2306
2307 /* The enter and bound instructions are printed with operands in the same
2308 order as the intel book; everything else is printed in reverse order. */
2309 if (intel_syntax || two_source_ops)
2310 {
2311 first = op1out;
2312 second = op2out;
2313 third = op3out;
2314 op_ad = op_index[0];
2315 op_index[0] = op_index[2];
2316 op_index[2] = op_ad;
2317 }
2318 else
2319 {
2320 first = op3out;
2321 second = op2out;
2322 third = op1out;
2323 }
2324 needcomma = 0;
2325 if (*first)
2326 {
2327 if (op_index[0] != -1 && !op_riprel[0])
2328 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2329 else
2330 (*info->fprintf_func) (info->stream, "%s", first);
2331 needcomma = 1;
2332 }
2333 if (*second)
2334 {
2335 if (needcomma)
2336 (*info->fprintf_func) (info->stream, ",");
2337 if (op_index[1] != -1 && !op_riprel[1])
2338 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2339 else
2340 (*info->fprintf_func) (info->stream, "%s", second);
2341 needcomma = 1;
2342 }
2343 if (*third)
2344 {
2345 if (needcomma)
2346 (*info->fprintf_func) (info->stream, ",");
2347 if (op_index[2] != -1 && !op_riprel[2])
2348 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2349 else
2350 (*info->fprintf_func) (info->stream, "%s", third);
2351 }
2352 for (i = 0; i < 3; i++)
2353 if (op_index[i] != -1 && op_riprel[i])
2354 {
2355 (*info->fprintf_func) (info->stream, " # ");
2356 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2357 + op_address[op_index[i]]), info);
2358 }
2359 return codep - priv.the_buffer;
2360 }
2361
2362 static const char *float_mem[] = {
2363 /* d8 */
2364 "fadd{s||s|}",
2365 "fmul{s||s|}",
2366 "fcom{s||s|}",
2367 "fcomp{s||s|}",
2368 "fsub{s||s|}",
2369 "fsubr{s||s|}",
2370 "fdiv{s||s|}",
2371 "fdivr{s||s|}",
2372 /* d9 */
2373 "fld{s||s|}",
2374 "(bad)",
2375 "fst{s||s|}",
2376 "fstp{s||s|}",
2377 "fldenvIC",
2378 "fldcw",
2379 "fNstenvIC",
2380 "fNstcw",
2381 /* da */
2382 "fiadd{l||l|}",
2383 "fimul{l||l|}",
2384 "ficom{l||l|}",
2385 "ficomp{l||l|}",
2386 "fisub{l||l|}",
2387 "fisubr{l||l|}",
2388 "fidiv{l||l|}",
2389 "fidivr{l||l|}",
2390 /* db */
2391 "fild{l||l|}",
2392 "fisttp{l||l|}",
2393 "fist{l||l|}",
2394 "fistp{l||l|}",
2395 "(bad)",
2396 "fld{t||t|}",
2397 "(bad)",
2398 "fstp{t||t|}",
2399 /* dc */
2400 "fadd{l||l|}",
2401 "fmul{l||l|}",
2402 "fcom{l||l|}",
2403 "fcomp{l||l|}",
2404 "fsub{l||l|}",
2405 "fsubr{l||l|}",
2406 "fdiv{l||l|}",
2407 "fdivr{l||l|}",
2408 /* dd */
2409 "fld{l||l|}",
2410 "fisttp{ll||ll|}",
2411 "fst{l||l|}",
2412 "fstp{l||l|}",
2413 "frstorIC",
2414 "(bad)",
2415 "fNsaveIC",
2416 "fNstsw",
2417 /* de */
2418 "fiadd",
2419 "fimul",
2420 "ficom",
2421 "ficomp",
2422 "fisub",
2423 "fisubr",
2424 "fidiv",
2425 "fidivr",
2426 /* df */
2427 "fild",
2428 "fisttp",
2429 "fist",
2430 "fistp",
2431 "fbld",
2432 "fild{ll||ll|}",
2433 "fbstp",
2434 "fistp{ll||ll|}",
2435 };
2436
2437 static const unsigned char float_mem_mode[] = {
2438 /* d8 */
2439 d_mode,
2440 d_mode,
2441 d_mode,
2442 d_mode,
2443 d_mode,
2444 d_mode,
2445 d_mode,
2446 d_mode,
2447 /* d9 */
2448 d_mode,
2449 0,
2450 d_mode,
2451 d_mode,
2452 0,
2453 w_mode,
2454 0,
2455 w_mode,
2456 /* da */
2457 d_mode,
2458 d_mode,
2459 d_mode,
2460 d_mode,
2461 d_mode,
2462 d_mode,
2463 d_mode,
2464 d_mode,
2465 /* db */
2466 d_mode,
2467 d_mode,
2468 d_mode,
2469 d_mode,
2470 0,
2471 t_mode,
2472 0,
2473 t_mode,
2474 /* dc */
2475 q_mode,
2476 q_mode,
2477 q_mode,
2478 q_mode,
2479 q_mode,
2480 q_mode,
2481 q_mode,
2482 q_mode,
2483 /* dd */
2484 q_mode,
2485 q_mode,
2486 q_mode,
2487 q_mode,
2488 0,
2489 0,
2490 0,
2491 w_mode,
2492 /* de */
2493 w_mode,
2494 w_mode,
2495 w_mode,
2496 w_mode,
2497 w_mode,
2498 w_mode,
2499 w_mode,
2500 w_mode,
2501 /* df */
2502 w_mode,
2503 w_mode,
2504 w_mode,
2505 w_mode,
2506 t_mode,
2507 q_mode,
2508 t_mode,
2509 q_mode
2510 };
2511
2512 #define ST OP_ST, 0
2513 #define STi OP_STi, 0
2514
2515 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2516 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2517 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2518 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2519 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2520 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2521 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2522 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2523 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2524
2525 static const struct dis386 float_reg[][8] = {
2526 /* d8 */
2527 {
2528 { "fadd", ST, STi, XX },
2529 { "fmul", ST, STi, XX },
2530 { "fcom", STi, XX, XX },
2531 { "fcomp", STi, XX, XX },
2532 { "fsub", ST, STi, XX },
2533 { "fsubr", ST, STi, XX },
2534 { "fdiv", ST, STi, XX },
2535 { "fdivr", ST, STi, XX },
2536 },
2537 /* d9 */
2538 {
2539 { "fld", STi, XX, XX },
2540 { "fxch", STi, XX, XX },
2541 { FGRPd9_2 },
2542 { "(bad)", XX, XX, XX },
2543 { FGRPd9_4 },
2544 { FGRPd9_5 },
2545 { FGRPd9_6 },
2546 { FGRPd9_7 },
2547 },
2548 /* da */
2549 {
2550 { "fcmovb", ST, STi, XX },
2551 { "fcmove", ST, STi, XX },
2552 { "fcmovbe",ST, STi, XX },
2553 { "fcmovu", ST, STi, XX },
2554 { "(bad)", XX, XX, XX },
2555 { FGRPda_5 },
2556 { "(bad)", XX, XX, XX },
2557 { "(bad)", XX, XX, XX },
2558 },
2559 /* db */
2560 {
2561 { "fcmovnb",ST, STi, XX },
2562 { "fcmovne",ST, STi, XX },
2563 { "fcmovnbe",ST, STi, XX },
2564 { "fcmovnu",ST, STi, XX },
2565 { FGRPdb_4 },
2566 { "fucomi", ST, STi, XX },
2567 { "fcomi", ST, STi, XX },
2568 { "(bad)", XX, XX, XX },
2569 },
2570 /* dc */
2571 {
2572 { "fadd", STi, ST, XX },
2573 { "fmul", STi, ST, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "(bad)", XX, XX, XX },
2576 #if UNIXWARE_COMPAT
2577 { "fsub", STi, ST, XX },
2578 { "fsubr", STi, ST, XX },
2579 { "fdiv", STi, ST, XX },
2580 { "fdivr", STi, ST, XX },
2581 #else
2582 { "fsubr", STi, ST, XX },
2583 { "fsub", STi, ST, XX },
2584 { "fdivr", STi, ST, XX },
2585 { "fdiv", STi, ST, XX },
2586 #endif
2587 },
2588 /* dd */
2589 {
2590 { "ffree", STi, XX, XX },
2591 { "(bad)", XX, XX, XX },
2592 { "fst", STi, XX, XX },
2593 { "fstp", STi, XX, XX },
2594 { "fucom", STi, XX, XX },
2595 { "fucomp", STi, XX, XX },
2596 { "(bad)", XX, XX, XX },
2597 { "(bad)", XX, XX, XX },
2598 },
2599 /* de */
2600 {
2601 { "faddp", STi, ST, XX },
2602 { "fmulp", STi, ST, XX },
2603 { "(bad)", XX, XX, XX },
2604 { FGRPde_3 },
2605 #if UNIXWARE_COMPAT
2606 { "fsubp", STi, ST, XX },
2607 { "fsubrp", STi, ST, XX },
2608 { "fdivp", STi, ST, XX },
2609 { "fdivrp", STi, ST, XX },
2610 #else
2611 { "fsubrp", STi, ST, XX },
2612 { "fsubp", STi, ST, XX },
2613 { "fdivrp", STi, ST, XX },
2614 { "fdivp", STi, ST, XX },
2615 #endif
2616 },
2617 /* df */
2618 {
2619 { "ffreep", STi, XX, XX },
2620 { "(bad)", XX, XX, XX },
2621 { "(bad)", XX, XX, XX },
2622 { "(bad)", XX, XX, XX },
2623 { FGRPdf_4 },
2624 { "fucomip",ST, STi, XX },
2625 { "fcomip", ST, STi, XX },
2626 { "(bad)", XX, XX, XX },
2627 },
2628 };
2629
2630 static char *fgrps[][8] = {
2631 /* d9_2 0 */
2632 {
2633 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2634 },
2635
2636 /* d9_4 1 */
2637 {
2638 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2639 },
2640
2641 /* d9_5 2 */
2642 {
2643 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2644 },
2645
2646 /* d9_6 3 */
2647 {
2648 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2649 },
2650
2651 /* d9_7 4 */
2652 {
2653 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2654 },
2655
2656 /* da_5 5 */
2657 {
2658 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2659 },
2660
2661 /* db_4 6 */
2662 {
2663 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2664 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2665 },
2666
2667 /* de_3 7 */
2668 {
2669 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2670 },
2671
2672 /* df_4 8 */
2673 {
2674 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2675 },
2676 };
2677
2678 static void
2679 dofloat (int sizeflag)
2680 {
2681 const struct dis386 *dp;
2682 unsigned char floatop;
2683
2684 floatop = codep[-1];
2685
2686 if (mod != 3)
2687 {
2688 int fp_indx = (floatop - 0xd8) * 8 + reg;
2689
2690 putop (float_mem[fp_indx], sizeflag);
2691 obufp = op1out;
2692 OP_E (float_mem_mode[fp_indx], sizeflag);
2693 return;
2694 }
2695 /* Skip mod/rm byte. */
2696 MODRM_CHECK;
2697 codep++;
2698
2699 dp = &float_reg[floatop - 0xd8][reg];
2700 if (dp->name == NULL)
2701 {
2702 putop (fgrps[dp->bytemode1][rm], sizeflag);
2703
2704 /* Instruction fnstsw is only one with strange arg. */
2705 if (floatop == 0xdf && codep[-1] == 0xe0)
2706 strcpy (op1out, names16[0]);
2707 }
2708 else
2709 {
2710 putop (dp->name, sizeflag);
2711
2712 obufp = op1out;
2713 if (dp->op1)
2714 (*dp->op1) (dp->bytemode1, sizeflag);
2715 obufp = op2out;
2716 if (dp->op2)
2717 (*dp->op2) (dp->bytemode2, sizeflag);
2718 }
2719 }
2720
2721 static void
2722 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2723 {
2724 oappend ("%st");
2725 }
2726
2727 static void
2728 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2729 {
2730 sprintf (scratchbuf, "%%st(%d)", rm);
2731 oappend (scratchbuf + intel_syntax);
2732 }
2733
2734 /* Capital letters in template are macros. */
2735 static int
2736 putop (const char *template, int sizeflag)
2737 {
2738 const char *p;
2739 int alt = 0;
2740
2741 for (p = template; *p; p++)
2742 {
2743 switch (*p)
2744 {
2745 default:
2746 *obufp++ = *p;
2747 break;
2748 case '{':
2749 alt = 0;
2750 if (intel_syntax)
2751 alt += 1;
2752 if (address_mode == mode_64bit)
2753 alt += 2;
2754 while (alt != 0)
2755 {
2756 while (*++p != '|')
2757 {
2758 if (*p == '}')
2759 {
2760 /* Alternative not valid. */
2761 strcpy (obuf, "(bad)");
2762 obufp = obuf + 5;
2763 return 1;
2764 }
2765 else if (*p == '\0')
2766 abort ();
2767 }
2768 alt--;
2769 }
2770 /* Fall through. */
2771 case 'I':
2772 alt = 1;
2773 continue;
2774 case '|':
2775 while (*++p != '}')
2776 {
2777 if (*p == '\0')
2778 abort ();
2779 }
2780 break;
2781 case '}':
2782 break;
2783 case 'A':
2784 if (intel_syntax)
2785 break;
2786 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2787 *obufp++ = 'b';
2788 break;
2789 case 'B':
2790 if (intel_syntax)
2791 break;
2792 if (sizeflag & SUFFIX_ALWAYS)
2793 *obufp++ = 'b';
2794 break;
2795 case 'C':
2796 if (intel_syntax && !alt)
2797 break;
2798 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2799 {
2800 if (sizeflag & DFLAG)
2801 *obufp++ = intel_syntax ? 'd' : 'l';
2802 else
2803 *obufp++ = intel_syntax ? 'w' : 's';
2804 used_prefixes |= (prefixes & PREFIX_DATA);
2805 }
2806 break;
2807 case 'E': /* For jcxz/jecxz */
2808 if (address_mode == mode_64bit)
2809 {
2810 if (sizeflag & AFLAG)
2811 *obufp++ = 'r';
2812 else
2813 *obufp++ = 'e';
2814 }
2815 else
2816 if (sizeflag & AFLAG)
2817 *obufp++ = 'e';
2818 used_prefixes |= (prefixes & PREFIX_ADDR);
2819 break;
2820 case 'F':
2821 if (intel_syntax)
2822 break;
2823 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2824 {
2825 if (sizeflag & AFLAG)
2826 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
2827 else
2828 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
2829 used_prefixes |= (prefixes & PREFIX_ADDR);
2830 }
2831 break;
2832 case 'H':
2833 if (intel_syntax)
2834 break;
2835 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2836 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2837 {
2838 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2839 *obufp++ = ',';
2840 *obufp++ = 'p';
2841 if (prefixes & PREFIX_DS)
2842 *obufp++ = 't';
2843 else
2844 *obufp++ = 'n';
2845 }
2846 break;
2847 case 'J':
2848 if (intel_syntax)
2849 break;
2850 *obufp++ = 'l';
2851 break;
2852 case 'L':
2853 if (intel_syntax)
2854 break;
2855 if (sizeflag & SUFFIX_ALWAYS)
2856 *obufp++ = 'l';
2857 break;
2858 case 'N':
2859 if ((prefixes & PREFIX_FWAIT) == 0)
2860 *obufp++ = 'n';
2861 else
2862 used_prefixes |= PREFIX_FWAIT;
2863 break;
2864 case 'O':
2865 USED_REX (REX_MODE64);
2866 if (rex & REX_MODE64)
2867 *obufp++ = 'o';
2868 else
2869 *obufp++ = 'd';
2870 break;
2871 case 'T':
2872 if (intel_syntax)
2873 break;
2874 if (address_mode == mode_64bit && (sizeflag & DFLAG))
2875 {
2876 *obufp++ = 'q';
2877 break;
2878 }
2879 /* Fall through. */
2880 case 'P':
2881 if (intel_syntax)
2882 break;
2883 if ((prefixes & PREFIX_DATA)
2884 || (rex & REX_MODE64)
2885 || (sizeflag & SUFFIX_ALWAYS))
2886 {
2887 USED_REX (REX_MODE64);
2888 if (rex & REX_MODE64)
2889 *obufp++ = 'q';
2890 else
2891 {
2892 if (sizeflag & DFLAG)
2893 *obufp++ = 'l';
2894 else
2895 *obufp++ = 'w';
2896 }
2897 used_prefixes |= (prefixes & PREFIX_DATA);
2898 }
2899 break;
2900 case 'U':
2901 if (intel_syntax)
2902 break;
2903 if (address_mode == mode_64bit && (sizeflag & DFLAG))
2904 {
2905 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2906 *obufp++ = 'q';
2907 break;
2908 }
2909 /* Fall through. */
2910 case 'Q':
2911 if (intel_syntax && !alt)
2912 break;
2913 USED_REX (REX_MODE64);
2914 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2915 {
2916 if (rex & REX_MODE64)
2917 *obufp++ = 'q';
2918 else
2919 {
2920 if (sizeflag & DFLAG)
2921 *obufp++ = intel_syntax ? 'd' : 'l';
2922 else
2923 *obufp++ = 'w';
2924 }
2925 used_prefixes |= (prefixes & PREFIX_DATA);
2926 }
2927 break;
2928 case 'R':
2929 USED_REX (REX_MODE64);
2930 if (intel_syntax)
2931 {
2932 if (rex & REX_MODE64)
2933 {
2934 *obufp++ = 'q';
2935 *obufp++ = 't';
2936 }
2937 else if (sizeflag & DFLAG)
2938 {
2939 *obufp++ = 'd';
2940 *obufp++ = 'q';
2941 }
2942 else
2943 {
2944 *obufp++ = 'w';
2945 *obufp++ = 'd';
2946 }
2947 }
2948 else
2949 {
2950 if (rex & REX_MODE64)
2951 *obufp++ = 'q';
2952 else if (sizeflag & DFLAG)
2953 *obufp++ = 'l';
2954 else
2955 *obufp++ = 'w';
2956 }
2957 if (!(rex & REX_MODE64))
2958 used_prefixes |= (prefixes & PREFIX_DATA);
2959 break;
2960 case 'V':
2961 if (intel_syntax)
2962 break;
2963 if (address_mode == mode_64bit && (sizeflag & DFLAG))
2964 {
2965 if (sizeflag & SUFFIX_ALWAYS)
2966 *obufp++ = 'q';
2967 break;
2968 }
2969 /* Fall through. */
2970 case 'S':
2971 if (intel_syntax)
2972 break;
2973 if (sizeflag & SUFFIX_ALWAYS)
2974 {
2975 if (rex & REX_MODE64)
2976 *obufp++ = 'q';
2977 else
2978 {
2979 if (sizeflag & DFLAG)
2980 *obufp++ = 'l';
2981 else
2982 *obufp++ = 'w';
2983 used_prefixes |= (prefixes & PREFIX_DATA);
2984 }
2985 }
2986 break;
2987 case 'X':
2988 if (prefixes & PREFIX_DATA)
2989 *obufp++ = 'd';
2990 else
2991 *obufp++ = 's';
2992 used_prefixes |= (prefixes & PREFIX_DATA);
2993 break;
2994 case 'Y':
2995 if (intel_syntax)
2996 break;
2997 if (rex & REX_MODE64)
2998 {
2999 USED_REX (REX_MODE64);
3000 *obufp++ = 'q';
3001 }
3002 break;
3003 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3004 case 'W':
3005 /* operand size flag for cwtl, cbtw */
3006 USED_REX (0);
3007 if (rex)
3008 *obufp++ = 'l';
3009 else if (sizeflag & DFLAG)
3010 *obufp++ = 'w';
3011 else
3012 *obufp++ = 'b';
3013 if (intel_syntax)
3014 {
3015 if (rex)
3016 {
3017 *obufp++ = 'q';
3018 *obufp++ = 'e';
3019 }
3020 if (sizeflag & DFLAG)
3021 {
3022 *obufp++ = 'd';
3023 *obufp++ = 'e';
3024 }
3025 else
3026 {
3027 *obufp++ = 'w';
3028 }
3029 }
3030 if (!rex)
3031 used_prefixes |= (prefixes & PREFIX_DATA);
3032 break;
3033 }
3034 alt = 0;
3035 }
3036 *obufp = 0;
3037 return 0;
3038 }
3039
3040 static void
3041 oappend (const char *s)
3042 {
3043 strcpy (obufp, s);
3044 obufp += strlen (s);
3045 }
3046
3047 static void
3048 append_seg (void)
3049 {
3050 if (prefixes & PREFIX_CS)
3051 {
3052 used_prefixes |= PREFIX_CS;
3053 oappend ("%cs:" + intel_syntax);
3054 }
3055 if (prefixes & PREFIX_DS)
3056 {
3057 used_prefixes |= PREFIX_DS;
3058 oappend ("%ds:" + intel_syntax);
3059 }
3060 if (prefixes & PREFIX_SS)
3061 {
3062 used_prefixes |= PREFIX_SS;
3063 oappend ("%ss:" + intel_syntax);
3064 }
3065 if (prefixes & PREFIX_ES)
3066 {
3067 used_prefixes |= PREFIX_ES;
3068 oappend ("%es:" + intel_syntax);
3069 }
3070 if (prefixes & PREFIX_FS)
3071 {
3072 used_prefixes |= PREFIX_FS;
3073 oappend ("%fs:" + intel_syntax);
3074 }
3075 if (prefixes & PREFIX_GS)
3076 {
3077 used_prefixes |= PREFIX_GS;
3078 oappend ("%gs:" + intel_syntax);
3079 }
3080 }
3081
3082 static void
3083 OP_indirE (int bytemode, int sizeflag)
3084 {
3085 if (!intel_syntax)
3086 oappend ("*");
3087 OP_E (bytemode, sizeflag);
3088 }
3089
3090 static void
3091 print_operand_value (char *buf, int hex, bfd_vma disp)
3092 {
3093 if (address_mode == mode_64bit)
3094 {
3095 if (hex)
3096 {
3097 char tmp[30];
3098 int i;
3099 buf[0] = '0';
3100 buf[1] = 'x';
3101 sprintf_vma (tmp, disp);
3102 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3103 strcpy (buf + 2, tmp + i);
3104 }
3105 else
3106 {
3107 bfd_signed_vma v = disp;
3108 char tmp[30];
3109 int i;
3110 if (v < 0)
3111 {
3112 *(buf++) = '-';
3113 v = -disp;
3114 /* Check for possible overflow on 0x8000000000000000. */
3115 if (v < 0)
3116 {
3117 strcpy (buf, "9223372036854775808");
3118 return;
3119 }
3120 }
3121 if (!v)
3122 {
3123 strcpy (buf, "0");
3124 return;
3125 }
3126
3127 i = 0;
3128 tmp[29] = 0;
3129 while (v)
3130 {
3131 tmp[28 - i] = (v % 10) + '0';
3132 v /= 10;
3133 i++;
3134 }
3135 strcpy (buf, tmp + 29 - i);
3136 }
3137 }
3138 else
3139 {
3140 if (hex)
3141 sprintf (buf, "0x%x", (unsigned int) disp);
3142 else
3143 sprintf (buf, "%d", (int) disp);
3144 }
3145 }
3146
3147 static void
3148 intel_operand_size (int bytemode, int sizeflag)
3149 {
3150 switch (bytemode)
3151 {
3152 case b_mode:
3153 oappend ("BYTE PTR ");
3154 break;
3155 case w_mode:
3156 case dqw_mode:
3157 oappend ("WORD PTR ");
3158 break;
3159 case stack_v_mode:
3160 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3161 {
3162 oappend ("QWORD PTR ");
3163 used_prefixes |= (prefixes & PREFIX_DATA);
3164 break;
3165 }
3166 /* FALLTHRU */
3167 case v_mode:
3168 case dq_mode:
3169 USED_REX (REX_MODE64);
3170 if (rex & REX_MODE64)
3171 oappend ("QWORD PTR ");
3172 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3173 oappend ("DWORD PTR ");
3174 else
3175 oappend ("WORD PTR ");
3176 used_prefixes |= (prefixes & PREFIX_DATA);
3177 break;
3178 case d_mode:
3179 oappend ("DWORD PTR ");
3180 break;
3181 case q_mode:
3182 oappend ("QWORD PTR ");
3183 break;
3184 case m_mode:
3185 if (address_mode == mode_64bit)
3186 oappend ("QWORD PTR ");
3187 else
3188 oappend ("DWORD PTR ");
3189 break;
3190 case f_mode:
3191 if (sizeflag & DFLAG)
3192 oappend ("FWORD PTR ");
3193 else
3194 oappend ("DWORD PTR ");
3195 used_prefixes |= (prefixes & PREFIX_DATA);
3196 break;
3197 case t_mode:
3198 oappend ("TBYTE PTR ");
3199 break;
3200 case x_mode:
3201 oappend ("XMMWORD PTR ");
3202 break;
3203 default:
3204 break;
3205 }
3206 }
3207
3208 static void
3209 OP_E (int bytemode, int sizeflag)
3210 {
3211 bfd_vma disp;
3212 int add = 0;
3213 int riprel = 0;
3214 USED_REX (REX_EXTZ);
3215 if (rex & REX_EXTZ)
3216 add += 8;
3217
3218 /* Skip mod/rm byte. */
3219 MODRM_CHECK;
3220 codep++;
3221
3222 if (mod == 3)
3223 {
3224 switch (bytemode)
3225 {
3226 case b_mode:
3227 USED_REX (0);
3228 if (rex)
3229 oappend (names8rex[rm + add]);
3230 else
3231 oappend (names8[rm + add]);
3232 break;
3233 case w_mode:
3234 oappend (names16[rm + add]);
3235 break;
3236 case d_mode:
3237 oappend (names32[rm + add]);
3238 break;
3239 case q_mode:
3240 oappend (names64[rm + add]);
3241 break;
3242 case m_mode:
3243 if (address_mode == mode_64bit)
3244 oappend (names64[rm + add]);
3245 else
3246 oappend (names32[rm + add]);
3247 break;
3248 case stack_v_mode:
3249 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3250 {
3251 oappend (names64[rm + add]);
3252 used_prefixes |= (prefixes & PREFIX_DATA);
3253 break;
3254 }
3255 bytemode = v_mode;
3256 /* FALLTHRU */
3257 case v_mode:
3258 case dq_mode:
3259 case dqw_mode:
3260 USED_REX (REX_MODE64);
3261 if (rex & REX_MODE64)
3262 oappend (names64[rm + add]);
3263 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3264 oappend (names32[rm + add]);
3265 else
3266 oappend (names16[rm + add]);
3267 used_prefixes |= (prefixes & PREFIX_DATA);
3268 break;
3269 case 0:
3270 break;
3271 default:
3272 oappend (INTERNAL_DISASSEMBLER_ERROR);
3273 break;
3274 }
3275 return;
3276 }
3277
3278 disp = 0;
3279 if (intel_syntax)
3280 intel_operand_size (bytemode, sizeflag);
3281 append_seg ();
3282
3283 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
3284 {
3285 int havesib;
3286 int havebase;
3287 int base;
3288 int index = 0;
3289 int scale = 0;
3290
3291 havesib = 0;
3292 havebase = 1;
3293 base = rm;
3294
3295 if (base == 4)
3296 {
3297 havesib = 1;
3298 FETCH_DATA (the_info, codep + 1);
3299 index = (*codep >> 3) & 7;
3300 if (address_mode == mode_64bit || index != 0x4)
3301 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3302 scale = (*codep >> 6) & 3;
3303 base = *codep & 7;
3304 USED_REX (REX_EXTY);
3305 if (rex & REX_EXTY)
3306 index += 8;
3307 codep++;
3308 }
3309 base += add;
3310
3311 switch (mod)
3312 {
3313 case 0:
3314 if ((base & 7) == 5)
3315 {
3316 havebase = 0;
3317 if (address_mode == mode_64bit && !havesib)
3318 riprel = 1;
3319 disp = get32s ();
3320 }
3321 break;
3322 case 1:
3323 FETCH_DATA (the_info, codep + 1);
3324 disp = *codep++;
3325 if ((disp & 0x80) != 0)
3326 disp -= 0x100;
3327 break;
3328 case 2:
3329 disp = get32s ();
3330 break;
3331 }
3332
3333 if (!intel_syntax)
3334 if (mod != 0 || (base & 7) == 5)
3335 {
3336 print_operand_value (scratchbuf, !riprel, disp);
3337 oappend (scratchbuf);
3338 if (riprel)
3339 {
3340 set_op (disp, 1);
3341 oappend ("(%rip)");
3342 }
3343 }
3344
3345 if (havebase || (havesib && (index != 4 || scale != 0)))
3346 {
3347 *obufp++ = open_char;
3348 if (intel_syntax && riprel)
3349 oappend ("rip + ");
3350 *obufp = '\0';
3351 if (havebase)
3352 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
3353 ? names64[base] : names32[base]);
3354 if (havesib)
3355 {
3356 if (index != 4)
3357 {
3358 if (!intel_syntax || havebase)
3359 {
3360 *obufp++ = separator_char;
3361 *obufp = '\0';
3362 }
3363 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
3364 ? names64[index] : names32[index]);
3365 }
3366 if (scale != 0 || (!intel_syntax && index != 4))
3367 {
3368 *obufp++ = scale_char;
3369 *obufp = '\0';
3370 sprintf (scratchbuf, "%d", 1 << scale);
3371 oappend (scratchbuf);
3372 }
3373 }
3374 if (intel_syntax && disp)
3375 {
3376 if ((bfd_signed_vma) disp > 0)
3377 {
3378 *obufp++ = '+';
3379 *obufp = '\0';
3380 }
3381 else if (mod != 1)
3382 {
3383 *obufp++ = '-';
3384 *obufp = '\0';
3385 disp = - (bfd_signed_vma) disp;
3386 }
3387
3388 print_operand_value (scratchbuf, mod != 1, disp);
3389 oappend (scratchbuf);
3390 }
3391
3392 *obufp++ = close_char;
3393 *obufp = '\0';
3394 }
3395 else if (intel_syntax)
3396 {
3397 if (mod != 0 || (base & 7) == 5)
3398 {
3399 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3400 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3401 ;
3402 else
3403 {
3404 oappend (names_seg[ds_reg - es_reg]);
3405 oappend (":");
3406 }
3407 print_operand_value (scratchbuf, 1, disp);
3408 oappend (scratchbuf);
3409 }
3410 }
3411 }
3412 else
3413 { /* 16 bit address mode */
3414 switch (mod)
3415 {
3416 case 0:
3417 if (rm == 6)
3418 {
3419 disp = get16 ();
3420 if ((disp & 0x8000) != 0)
3421 disp -= 0x10000;
3422 }
3423 break;
3424 case 1:
3425 FETCH_DATA (the_info, codep + 1);
3426 disp = *codep++;
3427 if ((disp & 0x80) != 0)
3428 disp -= 0x100;
3429 break;
3430 case 2:
3431 disp = get16 ();
3432 if ((disp & 0x8000) != 0)
3433 disp -= 0x10000;
3434 break;
3435 }
3436
3437 if (!intel_syntax)
3438 if (mod != 0 || rm == 6)
3439 {
3440 print_operand_value (scratchbuf, 0, disp);
3441 oappend (scratchbuf);
3442 }
3443
3444 if (mod != 0 || rm != 6)
3445 {
3446 *obufp++ = open_char;
3447 *obufp = '\0';
3448 oappend (index16[rm]);
3449 if (intel_syntax && disp)
3450 {
3451 if ((bfd_signed_vma) disp > 0)
3452 {
3453 *obufp++ = '+';
3454 *obufp = '\0';
3455 }
3456 else if (mod != 1)
3457 {
3458 *obufp++ = '-';
3459 *obufp = '\0';
3460 disp = - (bfd_signed_vma) disp;
3461 }
3462
3463 print_operand_value (scratchbuf, mod != 1, disp);
3464 oappend (scratchbuf);
3465 }
3466
3467 *obufp++ = close_char;
3468 *obufp = '\0';
3469 }
3470 else if (intel_syntax)
3471 {
3472 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3473 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3474 ;
3475 else
3476 {
3477 oappend (names_seg[ds_reg - es_reg]);
3478 oappend (":");
3479 }
3480 print_operand_value (scratchbuf, 1, disp & 0xffff);
3481 oappend (scratchbuf);
3482 }
3483 }
3484 }
3485
3486 static void
3487 OP_G (int bytemode, int sizeflag)
3488 {
3489 int add = 0;
3490 USED_REX (REX_EXTX);
3491 if (rex & REX_EXTX)
3492 add += 8;
3493 switch (bytemode)
3494 {
3495 case b_mode:
3496 USED_REX (0);
3497 if (rex)
3498 oappend (names8rex[reg + add]);
3499 else
3500 oappend (names8[reg + add]);
3501 break;
3502 case w_mode:
3503 oappend (names16[reg + add]);
3504 break;
3505 case d_mode:
3506 oappend (names32[reg + add]);
3507 break;
3508 case q_mode:
3509 oappend (names64[reg + add]);
3510 break;
3511 case v_mode:
3512 case dq_mode:
3513 case dqw_mode:
3514 USED_REX (REX_MODE64);
3515 if (rex & REX_MODE64)
3516 oappend (names64[reg + add]);
3517 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3518 oappend (names32[reg + add]);
3519 else
3520 oappend (names16[reg + add]);
3521 used_prefixes |= (prefixes & PREFIX_DATA);
3522 break;
3523 case m_mode:
3524 if (address_mode == mode_64bit)
3525 oappend (names64[reg + add]);
3526 else
3527 oappend (names32[reg + add]);
3528 break;
3529 default:
3530 oappend (INTERNAL_DISASSEMBLER_ERROR);
3531 break;
3532 }
3533 }
3534
3535 static bfd_vma
3536 get64 (void)
3537 {
3538 bfd_vma x;
3539 #ifdef BFD64
3540 unsigned int a;
3541 unsigned int b;
3542
3543 FETCH_DATA (the_info, codep + 8);
3544 a = *codep++ & 0xff;
3545 a |= (*codep++ & 0xff) << 8;
3546 a |= (*codep++ & 0xff) << 16;
3547 a |= (*codep++ & 0xff) << 24;
3548 b = *codep++ & 0xff;
3549 b |= (*codep++ & 0xff) << 8;
3550 b |= (*codep++ & 0xff) << 16;
3551 b |= (*codep++ & 0xff) << 24;
3552 x = a + ((bfd_vma) b << 32);
3553 #else
3554 abort ();
3555 x = 0;
3556 #endif
3557 return x;
3558 }
3559
3560 static bfd_signed_vma
3561 get32 (void)
3562 {
3563 bfd_signed_vma x = 0;
3564
3565 FETCH_DATA (the_info, codep + 4);
3566 x = *codep++ & (bfd_signed_vma) 0xff;
3567 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3568 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3569 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3570 return x;
3571 }
3572
3573 static bfd_signed_vma
3574 get32s (void)
3575 {
3576 bfd_signed_vma x = 0;
3577
3578 FETCH_DATA (the_info, codep + 4);
3579 x = *codep++ & (bfd_signed_vma) 0xff;
3580 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3581 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3582 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3583
3584 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3585
3586 return x;
3587 }
3588
3589 static int
3590 get16 (void)
3591 {
3592 int x = 0;
3593
3594 FETCH_DATA (the_info, codep + 2);
3595 x = *codep++ & 0xff;
3596 x |= (*codep++ & 0xff) << 8;
3597 return x;
3598 }
3599
3600 static void
3601 set_op (bfd_vma op, int riprel)
3602 {
3603 op_index[op_ad] = op_ad;
3604 if (address_mode == mode_64bit)
3605 {
3606 op_address[op_ad] = op;
3607 op_riprel[op_ad] = riprel;
3608 }
3609 else
3610 {
3611 /* Mask to get a 32-bit address. */
3612 op_address[op_ad] = op & 0xffffffff;
3613 op_riprel[op_ad] = riprel & 0xffffffff;
3614 }
3615 }
3616
3617 static void
3618 OP_REG (int code, int sizeflag)
3619 {
3620 const char *s;
3621 int add = 0;
3622 USED_REX (REX_EXTZ);
3623 if (rex & REX_EXTZ)
3624 add = 8;
3625
3626 switch (code)
3627 {
3628 case indir_dx_reg:
3629 if (intel_syntax)
3630 s = "[dx]";
3631 else
3632 s = "(%dx)";
3633 break;
3634 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3635 case sp_reg: case bp_reg: case si_reg: case di_reg:
3636 s = names16[code - ax_reg + add];
3637 break;
3638 case es_reg: case ss_reg: case cs_reg:
3639 case ds_reg: case fs_reg: case gs_reg:
3640 s = names_seg[code - es_reg + add];
3641 break;
3642 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3643 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3644 USED_REX (0);
3645 if (rex)
3646 s = names8rex[code - al_reg + add];
3647 else
3648 s = names8[code - al_reg];
3649 break;
3650 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3651 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3652 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3653 {
3654 s = names64[code - rAX_reg + add];
3655 break;
3656 }
3657 code += eAX_reg - rAX_reg;
3658 /* Fall through. */
3659 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3660 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3661 USED_REX (REX_MODE64);
3662 if (rex & REX_MODE64)
3663 s = names64[code - eAX_reg + add];
3664 else if (sizeflag & DFLAG)
3665 s = names32[code - eAX_reg + add];
3666 else
3667 s = names16[code - eAX_reg + add];
3668 used_prefixes |= (prefixes & PREFIX_DATA);
3669 break;
3670 default:
3671 s = INTERNAL_DISASSEMBLER_ERROR;
3672 break;
3673 }
3674 oappend (s);
3675 }
3676
3677 static void
3678 OP_IMREG (int code, int sizeflag)
3679 {
3680 const char *s;
3681
3682 switch (code)
3683 {
3684 case indir_dx_reg:
3685 if (intel_syntax)
3686 s = "[dx]";
3687 else
3688 s = "(%dx)";
3689 break;
3690 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3691 case sp_reg: case bp_reg: case si_reg: case di_reg:
3692 s = names16[code - ax_reg];
3693 break;
3694 case es_reg: case ss_reg: case cs_reg:
3695 case ds_reg: case fs_reg: case gs_reg:
3696 s = names_seg[code - es_reg];
3697 break;
3698 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3699 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3700 USED_REX (0);
3701 if (rex)
3702 s = names8rex[code - al_reg];
3703 else
3704 s = names8[code - al_reg];
3705 break;
3706 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3707 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3708 USED_REX (REX_MODE64);
3709 if (rex & REX_MODE64)
3710 s = names64[code - eAX_reg];
3711 else if (sizeflag & DFLAG)
3712 s = names32[code - eAX_reg];
3713 else
3714 s = names16[code - eAX_reg];
3715 used_prefixes |= (prefixes & PREFIX_DATA);
3716 break;
3717 default:
3718 s = INTERNAL_DISASSEMBLER_ERROR;
3719 break;
3720 }
3721 oappend (s);
3722 }
3723
3724 static void
3725 OP_I (int bytemode, int sizeflag)
3726 {
3727 bfd_signed_vma op;
3728 bfd_signed_vma mask = -1;
3729
3730 switch (bytemode)
3731 {
3732 case b_mode:
3733 FETCH_DATA (the_info, codep + 1);
3734 op = *codep++;
3735 mask = 0xff;
3736 break;
3737 case q_mode:
3738 if (address_mode == mode_64bit)
3739 {
3740 op = get32s ();
3741 break;
3742 }
3743 /* Fall through. */
3744 case v_mode:
3745 USED_REX (REX_MODE64);
3746 if (rex & REX_MODE64)
3747 op = get32s ();
3748 else if (sizeflag & DFLAG)
3749 {
3750 op = get32 ();
3751 mask = 0xffffffff;
3752 }
3753 else
3754 {
3755 op = get16 ();
3756 mask = 0xfffff;
3757 }
3758 used_prefixes |= (prefixes & PREFIX_DATA);
3759 break;
3760 case w_mode:
3761 mask = 0xfffff;
3762 op = get16 ();
3763 break;
3764 case const_1_mode:
3765 if (intel_syntax)
3766 oappend ("1");
3767 return;
3768 default:
3769 oappend (INTERNAL_DISASSEMBLER_ERROR);
3770 return;
3771 }
3772
3773 op &= mask;
3774 scratchbuf[0] = '$';
3775 print_operand_value (scratchbuf + 1, 1, op);
3776 oappend (scratchbuf + intel_syntax);
3777 scratchbuf[0] = '\0';
3778 }
3779
3780 static void
3781 OP_I64 (int bytemode, int sizeflag)
3782 {
3783 bfd_signed_vma op;
3784 bfd_signed_vma mask = -1;
3785
3786 if (address_mode != mode_64bit)
3787 {
3788 OP_I (bytemode, sizeflag);
3789 return;
3790 }
3791
3792 switch (bytemode)
3793 {
3794 case b_mode:
3795 FETCH_DATA (the_info, codep + 1);
3796 op = *codep++;
3797 mask = 0xff;
3798 break;
3799 case v_mode:
3800 USED_REX (REX_MODE64);
3801 if (rex & REX_MODE64)
3802 op = get64 ();
3803 else if (sizeflag & DFLAG)
3804 {
3805 op = get32 ();
3806 mask = 0xffffffff;
3807 }
3808 else
3809 {
3810 op = get16 ();
3811 mask = 0xfffff;
3812 }
3813 used_prefixes |= (prefixes & PREFIX_DATA);
3814 break;
3815 case w_mode:
3816 mask = 0xfffff;
3817 op = get16 ();
3818 break;
3819 default:
3820 oappend (INTERNAL_DISASSEMBLER_ERROR);
3821 return;
3822 }
3823
3824 op &= mask;
3825 scratchbuf[0] = '$';
3826 print_operand_value (scratchbuf + 1, 1, op);
3827 oappend (scratchbuf + intel_syntax);
3828 scratchbuf[0] = '\0';
3829 }
3830
3831 static void
3832 OP_sI (int bytemode, int sizeflag)
3833 {
3834 bfd_signed_vma op;
3835 bfd_signed_vma mask = -1;
3836
3837 switch (bytemode)
3838 {
3839 case b_mode:
3840 FETCH_DATA (the_info, codep + 1);
3841 op = *codep++;
3842 if ((op & 0x80) != 0)
3843 op -= 0x100;
3844 mask = 0xffffffff;
3845 break;
3846 case v_mode:
3847 USED_REX (REX_MODE64);
3848 if (rex & REX_MODE64)
3849 op = get32s ();
3850 else if (sizeflag & DFLAG)
3851 {
3852 op = get32s ();
3853 mask = 0xffffffff;
3854 }
3855 else
3856 {
3857 mask = 0xffffffff;
3858 op = get16 ();
3859 if ((op & 0x8000) != 0)
3860 op -= 0x10000;
3861 }
3862 used_prefixes |= (prefixes & PREFIX_DATA);
3863 break;
3864 case w_mode:
3865 op = get16 ();
3866 mask = 0xffffffff;
3867 if ((op & 0x8000) != 0)
3868 op -= 0x10000;
3869 break;
3870 default:
3871 oappend (INTERNAL_DISASSEMBLER_ERROR);
3872 return;
3873 }
3874
3875 scratchbuf[0] = '$';
3876 print_operand_value (scratchbuf + 1, 1, op);
3877 oappend (scratchbuf + intel_syntax);
3878 }
3879
3880 static void
3881 OP_J (int bytemode, int sizeflag)
3882 {
3883 bfd_vma disp;
3884 bfd_vma mask = -1;
3885
3886 switch (bytemode)
3887 {
3888 case b_mode:
3889 FETCH_DATA (the_info, codep + 1);
3890 disp = *codep++;
3891 if ((disp & 0x80) != 0)
3892 disp -= 0x100;
3893 break;
3894 case v_mode:
3895 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
3896 disp = get32s ();
3897 else
3898 {
3899 disp = get16 ();
3900 /* For some reason, a data16 prefix on a jump instruction
3901 means that the pc is masked to 16 bits after the
3902 displacement is added! */
3903 mask = 0xffff;
3904 }
3905 break;
3906 default:
3907 oappend (INTERNAL_DISASSEMBLER_ERROR);
3908 return;
3909 }
3910 disp = (start_pc + codep - start_codep + disp) & mask;
3911 set_op (disp, 0);
3912 print_operand_value (scratchbuf, 1, disp);
3913 oappend (scratchbuf);
3914 }
3915
3916 static void
3917 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3918 {
3919 oappend (names_seg[reg]);
3920 }
3921
3922 static void
3923 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3924 {
3925 int seg, offset;
3926
3927 if (sizeflag & DFLAG)
3928 {
3929 offset = get32 ();
3930 seg = get16 ();
3931 }
3932 else
3933 {
3934 offset = get16 ();
3935 seg = get16 ();
3936 }
3937 used_prefixes |= (prefixes & PREFIX_DATA);
3938 if (intel_syntax)
3939 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
3940 else
3941 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3942 oappend (scratchbuf);
3943 }
3944
3945 static void
3946 OP_OFF (int bytemode, int sizeflag)
3947 {
3948 bfd_vma off;
3949
3950 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
3951 intel_operand_size (bytemode, sizeflag);
3952 append_seg ();
3953
3954 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3955 off = get32 ();
3956 else
3957 off = get16 ();
3958
3959 if (intel_syntax)
3960 {
3961 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3962 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3963 {
3964 oappend (names_seg[ds_reg - es_reg]);
3965 oappend (":");
3966 }
3967 }
3968 print_operand_value (scratchbuf, 1, off);
3969 oappend (scratchbuf);
3970 }
3971
3972 static void
3973 OP_OFF64 (int bytemode, int sizeflag)
3974 {
3975 bfd_vma off;
3976
3977 if (address_mode != mode_64bit)
3978 {
3979 OP_OFF (bytemode, sizeflag);
3980 return;
3981 }
3982
3983 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
3984 intel_operand_size (bytemode, sizeflag);
3985 append_seg ();
3986
3987 off = get64 ();
3988
3989 if (intel_syntax)
3990 {
3991 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3992 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3993 {
3994 oappend (names_seg[ds_reg - es_reg]);
3995 oappend (":");
3996 }
3997 }
3998 print_operand_value (scratchbuf, 1, off);
3999 oappend (scratchbuf);
4000 }
4001
4002 static void
4003 ptr_reg (int code, int sizeflag)
4004 {
4005 const char *s;
4006
4007 *obufp++ = open_char;
4008 used_prefixes |= (prefixes & PREFIX_ADDR);
4009 if (address_mode == mode_64bit)
4010 {
4011 if (!(sizeflag & AFLAG))
4012 s = names32[code - eAX_reg];
4013 else
4014 s = names64[code - eAX_reg];
4015 }
4016 else if (sizeflag & AFLAG)
4017 s = names32[code - eAX_reg];
4018 else
4019 s = names16[code - eAX_reg];
4020 oappend (s);
4021 *obufp++ = close_char;
4022 *obufp = 0;
4023 }
4024
4025 static void
4026 OP_ESreg (int code, int sizeflag)
4027 {
4028 if (intel_syntax)
4029 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
4030 oappend ("%es:" + intel_syntax);
4031 ptr_reg (code, sizeflag);
4032 }
4033
4034 static void
4035 OP_DSreg (int code, int sizeflag)
4036 {
4037 if (intel_syntax)
4038 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4039 ? v_mode
4040 : b_mode,
4041 sizeflag);
4042 if ((prefixes
4043 & (PREFIX_CS
4044 | PREFIX_DS
4045 | PREFIX_SS
4046 | PREFIX_ES
4047 | PREFIX_FS
4048 | PREFIX_GS)) == 0)
4049 prefixes |= PREFIX_DS;
4050 append_seg ();
4051 ptr_reg (code, sizeflag);
4052 }
4053
4054 static void
4055 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4056 {
4057 int add = 0;
4058 if (rex & REX_EXTX)
4059 {
4060 USED_REX (REX_EXTX);
4061 add = 8;
4062 }
4063 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
4064 {
4065 used_prefixes |= PREFIX_LOCK;
4066 add = 8;
4067 }
4068 sprintf (scratchbuf, "%%cr%d", reg + add);
4069 oappend (scratchbuf + intel_syntax);
4070 }
4071
4072 static void
4073 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4074 {
4075 int add = 0;
4076 USED_REX (REX_EXTX);
4077 if (rex & REX_EXTX)
4078 add = 8;
4079 if (intel_syntax)
4080 sprintf (scratchbuf, "db%d", reg + add);
4081 else
4082 sprintf (scratchbuf, "%%db%d", reg + add);
4083 oappend (scratchbuf);
4084 }
4085
4086 static void
4087 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4088 {
4089 sprintf (scratchbuf, "%%tr%d", reg);
4090 oappend (scratchbuf + intel_syntax);
4091 }
4092
4093 static void
4094 OP_Rd (int bytemode, int sizeflag)
4095 {
4096 if (mod == 3)
4097 OP_E (bytemode, sizeflag);
4098 else
4099 BadOp ();
4100 }
4101
4102 static void
4103 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4104 {
4105 used_prefixes |= (prefixes & PREFIX_DATA);
4106 if (prefixes & PREFIX_DATA)
4107 {
4108 int add = 0;
4109 USED_REX (REX_EXTX);
4110 if (rex & REX_EXTX)
4111 add = 8;
4112 sprintf (scratchbuf, "%%xmm%d", reg + add);
4113 }
4114 else
4115 sprintf (scratchbuf, "%%mm%d", reg);
4116 oappend (scratchbuf + intel_syntax);
4117 }
4118
4119 static void
4120 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4121 {
4122 int add = 0;
4123 USED_REX (REX_EXTX);
4124 if (rex & REX_EXTX)
4125 add = 8;
4126 sprintf (scratchbuf, "%%xmm%d", reg + add);
4127 oappend (scratchbuf + intel_syntax);
4128 }
4129
4130 static void
4131 OP_EM (int bytemode, int sizeflag)
4132 {
4133 if (mod != 3)
4134 {
4135 if (intel_syntax && bytemode == v_mode)
4136 {
4137 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4138 used_prefixes |= (prefixes & PREFIX_DATA);
4139 }
4140 OP_E (bytemode, sizeflag);
4141 return;
4142 }
4143
4144 /* Skip mod/rm byte. */
4145 MODRM_CHECK;
4146 codep++;
4147 used_prefixes |= (prefixes & PREFIX_DATA);
4148 if (prefixes & PREFIX_DATA)
4149 {
4150 int add = 0;
4151
4152 USED_REX (REX_EXTZ);
4153 if (rex & REX_EXTZ)
4154 add = 8;
4155 sprintf (scratchbuf, "%%xmm%d", rm + add);
4156 }
4157 else
4158 sprintf (scratchbuf, "%%mm%d", rm);
4159 oappend (scratchbuf + intel_syntax);
4160 }
4161
4162 static void
4163 OP_EX (int bytemode, int sizeflag)
4164 {
4165 int add = 0;
4166 if (mod != 3)
4167 {
4168 if (intel_syntax && bytemode == v_mode)
4169 {
4170 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4171 {
4172 case 0: bytemode = x_mode; break;
4173 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4174 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4175 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4176 default: bytemode = 0; break;
4177 }
4178 }
4179 OP_E (bytemode, sizeflag);
4180 return;
4181 }
4182 USED_REX (REX_EXTZ);
4183 if (rex & REX_EXTZ)
4184 add = 8;
4185
4186 /* Skip mod/rm byte. */
4187 MODRM_CHECK;
4188 codep++;
4189 sprintf (scratchbuf, "%%xmm%d", rm + add);
4190 oappend (scratchbuf + intel_syntax);
4191 }
4192
4193 static void
4194 OP_MS (int bytemode, int sizeflag)
4195 {
4196 if (mod == 3)
4197 OP_EM (bytemode, sizeflag);
4198 else
4199 BadOp ();
4200 }
4201
4202 static void
4203 OP_XS (int bytemode, int sizeflag)
4204 {
4205 if (mod == 3)
4206 OP_EX (bytemode, sizeflag);
4207 else
4208 BadOp ();
4209 }
4210
4211 static void
4212 OP_M (int bytemode, int sizeflag)
4213 {
4214 if (mod == 3)
4215 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4216 else
4217 OP_E (bytemode, sizeflag);
4218 }
4219
4220 static void
4221 OP_0f07 (int bytemode, int sizeflag)
4222 {
4223 if (mod != 3 || rm != 0)
4224 BadOp ();
4225 else
4226 OP_E (bytemode, sizeflag);
4227 }
4228
4229 static void
4230 OP_0fae (int bytemode, int sizeflag)
4231 {
4232 if (mod == 3)
4233 {
4234 if (reg == 7)
4235 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4236
4237 if (reg < 5 || rm != 0)
4238 {
4239 BadOp (); /* bad sfence, mfence, or lfence */
4240 return;
4241 }
4242 }
4243 else if (reg != 7)
4244 {
4245 BadOp (); /* bad clflush */
4246 return;
4247 }
4248
4249 OP_E (bytemode, sizeflag);
4250 }
4251
4252 static void
4253 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4254 {
4255 /* NOP with REPZ prefix is called PAUSE. */
4256 if (prefixes == PREFIX_REPZ)
4257 strcpy (obuf, "pause");
4258 }
4259
4260 static const char *const Suffix3DNow[] = {
4261 /* 00 */ NULL, NULL, NULL, NULL,
4262 /* 04 */ NULL, NULL, NULL, NULL,
4263 /* 08 */ NULL, NULL, NULL, NULL,
4264 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4265 /* 10 */ NULL, NULL, NULL, NULL,
4266 /* 14 */ NULL, NULL, NULL, NULL,
4267 /* 18 */ NULL, NULL, NULL, NULL,
4268 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4269 /* 20 */ NULL, NULL, NULL, NULL,
4270 /* 24 */ NULL, NULL, NULL, NULL,
4271 /* 28 */ NULL, NULL, NULL, NULL,
4272 /* 2C */ NULL, NULL, NULL, NULL,
4273 /* 30 */ NULL, NULL, NULL, NULL,
4274 /* 34 */ NULL, NULL, NULL, NULL,
4275 /* 38 */ NULL, NULL, NULL, NULL,
4276 /* 3C */ NULL, NULL, NULL, NULL,
4277 /* 40 */ NULL, NULL, NULL, NULL,
4278 /* 44 */ NULL, NULL, NULL, NULL,
4279 /* 48 */ NULL, NULL, NULL, NULL,
4280 /* 4C */ NULL, NULL, NULL, NULL,
4281 /* 50 */ NULL, NULL, NULL, NULL,
4282 /* 54 */ NULL, NULL, NULL, NULL,
4283 /* 58 */ NULL, NULL, NULL, NULL,
4284 /* 5C */ NULL, NULL, NULL, NULL,
4285 /* 60 */ NULL, NULL, NULL, NULL,
4286 /* 64 */ NULL, NULL, NULL, NULL,
4287 /* 68 */ NULL, NULL, NULL, NULL,
4288 /* 6C */ NULL, NULL, NULL, NULL,
4289 /* 70 */ NULL, NULL, NULL, NULL,
4290 /* 74 */ NULL, NULL, NULL, NULL,
4291 /* 78 */ NULL, NULL, NULL, NULL,
4292 /* 7C */ NULL, NULL, NULL, NULL,
4293 /* 80 */ NULL, NULL, NULL, NULL,
4294 /* 84 */ NULL, NULL, NULL, NULL,
4295 /* 88 */ NULL, NULL, "pfnacc", NULL,
4296 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4297 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4298 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4299 /* 98 */ NULL, NULL, "pfsub", NULL,
4300 /* 9C */ NULL, NULL, "pfadd", NULL,
4301 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4302 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4303 /* A8 */ NULL, NULL, "pfsubr", NULL,
4304 /* AC */ NULL, NULL, "pfacc", NULL,
4305 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4306 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4307 /* B8 */ NULL, NULL, NULL, "pswapd",
4308 /* BC */ NULL, NULL, NULL, "pavgusb",
4309 /* C0 */ NULL, NULL, NULL, NULL,
4310 /* C4 */ NULL, NULL, NULL, NULL,
4311 /* C8 */ NULL, NULL, NULL, NULL,
4312 /* CC */ NULL, NULL, NULL, NULL,
4313 /* D0 */ NULL, NULL, NULL, NULL,
4314 /* D4 */ NULL, NULL, NULL, NULL,
4315 /* D8 */ NULL, NULL, NULL, NULL,
4316 /* DC */ NULL, NULL, NULL, NULL,
4317 /* E0 */ NULL, NULL, NULL, NULL,
4318 /* E4 */ NULL, NULL, NULL, NULL,
4319 /* E8 */ NULL, NULL, NULL, NULL,
4320 /* EC */ NULL, NULL, NULL, NULL,
4321 /* F0 */ NULL, NULL, NULL, NULL,
4322 /* F4 */ NULL, NULL, NULL, NULL,
4323 /* F8 */ NULL, NULL, NULL, NULL,
4324 /* FC */ NULL, NULL, NULL, NULL,
4325 };
4326
4327 static void
4328 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4329 {
4330 const char *mnemonic;
4331
4332 FETCH_DATA (the_info, codep + 1);
4333 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4334 place where an 8-bit immediate would normally go. ie. the last
4335 byte of the instruction. */
4336 obufp = obuf + strlen (obuf);
4337 mnemonic = Suffix3DNow[*codep++ & 0xff];
4338 if (mnemonic)
4339 oappend (mnemonic);
4340 else
4341 {
4342 /* Since a variable sized modrm/sib chunk is between the start
4343 of the opcode (0x0f0f) and the opcode suffix, we need to do
4344 all the modrm processing first, and don't know until now that
4345 we have a bad opcode. This necessitates some cleaning up. */
4346 op1out[0] = '\0';
4347 op2out[0] = '\0';
4348 BadOp ();
4349 }
4350 }
4351
4352 static const char *simd_cmp_op[] = {
4353 "eq",
4354 "lt",
4355 "le",
4356 "unord",
4357 "neq",
4358 "nlt",
4359 "nle",
4360 "ord"
4361 };
4362
4363 static void
4364 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4365 {
4366 unsigned int cmp_type;
4367
4368 FETCH_DATA (the_info, codep + 1);
4369 obufp = obuf + strlen (obuf);
4370 cmp_type = *codep++ & 0xff;
4371 if (cmp_type < 8)
4372 {
4373 char suffix1 = 'p', suffix2 = 's';
4374 used_prefixes |= (prefixes & PREFIX_REPZ);
4375 if (prefixes & PREFIX_REPZ)
4376 suffix1 = 's';
4377 else
4378 {
4379 used_prefixes |= (prefixes & PREFIX_DATA);
4380 if (prefixes & PREFIX_DATA)
4381 suffix2 = 'd';
4382 else
4383 {
4384 used_prefixes |= (prefixes & PREFIX_REPNZ);
4385 if (prefixes & PREFIX_REPNZ)
4386 suffix1 = 's', suffix2 = 'd';
4387 }
4388 }
4389 sprintf (scratchbuf, "cmp%s%c%c",
4390 simd_cmp_op[cmp_type], suffix1, suffix2);
4391 used_prefixes |= (prefixes & PREFIX_REPZ);
4392 oappend (scratchbuf);
4393 }
4394 else
4395 {
4396 /* We have a bad extension byte. Clean up. */
4397 op1out[0] = '\0';
4398 op2out[0] = '\0';
4399 BadOp ();
4400 }
4401 }
4402
4403 static void
4404 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4405 {
4406 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4407 forms of these instructions. */
4408 if (mod == 3)
4409 {
4410 char *p = obuf + strlen (obuf);
4411 *(p + 1) = '\0';
4412 *p = *(p - 1);
4413 *(p - 1) = *(p - 2);
4414 *(p - 2) = *(p - 3);
4415 *(p - 3) = extrachar;
4416 }
4417 }
4418
4419 static void
4420 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4421 {
4422 if (mod == 3 && reg == 1 && rm <= 1)
4423 {
4424 /* Override "sidt". */
4425 size_t olen = strlen (obuf);
4426 char *p = obuf + olen - 4;
4427 const char **names = (address_mode == mode_64bit
4428 ? names64 : names32);
4429
4430 /* We might have a suffix when disassembling with -Msuffix. */
4431 if (*p == 'i')
4432 --p;
4433
4434 /* Remove "addr16/addr32" if we aren't in Intel mode. */
4435 if (!intel_syntax
4436 && (prefixes & PREFIX_ADDR)
4437 && olen >= (4 + 7)
4438 && *(p - 1) == ' '
4439 && strncmp (p - 7, "addr", 4) == 0
4440 && (strncmp (p - 3, "16", 2) == 0
4441 || strncmp (p - 3, "32", 2) == 0))
4442 p -= 7;
4443
4444 if (rm)
4445 {
4446 /* mwait %eax,%ecx */
4447 strcpy (p, "mwait");
4448 if (!intel_syntax)
4449 strcpy (op1out, names[0]);
4450 }
4451 else
4452 {
4453 /* monitor %eax,%ecx,%edx" */
4454 strcpy (p, "monitor");
4455 if (!intel_syntax)
4456 {
4457 const char **op1_names;
4458 if (!(prefixes & PREFIX_ADDR))
4459 op1_names = (address_mode == mode_16bit
4460 ? names16 : names);
4461 else
4462 {
4463 op1_names = (address_mode != mode_32bit
4464 ? names32 : names16);
4465 used_prefixes |= PREFIX_ADDR;
4466 }
4467 strcpy (op1out, op1_names[0]);
4468 strcpy (op3out, names[2]);
4469 }
4470 }
4471 if (!intel_syntax)
4472 {
4473 strcpy (op2out, names[1]);
4474 two_source_ops = 1;
4475 }
4476
4477 codep++;
4478 }
4479 else
4480 OP_M (0, sizeflag);
4481 }
4482
4483 static void
4484 SVME_Fixup (int bytemode, int sizeflag)
4485 {
4486 const char *alt;
4487 char *p;
4488
4489 switch (*codep)
4490 {
4491 case 0xd8:
4492 alt = "vmrun";
4493 break;
4494 case 0xd9:
4495 alt = "vmmcall";
4496 break;
4497 case 0xda:
4498 alt = "vmload";
4499 break;
4500 case 0xdb:
4501 alt = "vmsave";
4502 break;
4503 case 0xdc:
4504 alt = "stgi";
4505 break;
4506 case 0xdd:
4507 alt = "clgi";
4508 break;
4509 case 0xde:
4510 alt = "skinit";
4511 break;
4512 case 0xdf:
4513 alt = "invlpga";
4514 break;
4515 default:
4516 OP_M (bytemode, sizeflag);
4517 return;
4518 }
4519 /* Override "lidt". */
4520 p = obuf + strlen (obuf) - 4;
4521 /* We might have a suffix. */
4522 if (*p == 'i')
4523 --p;
4524 strcpy (p, alt);
4525 if (!(prefixes & PREFIX_ADDR))
4526 {
4527 ++codep;
4528 return;
4529 }
4530 used_prefixes |= PREFIX_ADDR;
4531 switch (*codep++)
4532 {
4533 case 0xdf:
4534 strcpy (op2out, names32[1]);
4535 two_source_ops = 1;
4536 /* Fall through. */
4537 case 0xd8:
4538 case 0xda:
4539 case 0xdb:
4540 *obufp++ = open_char;
4541 if (address_mode == mode_64bit || (sizeflag & AFLAG))
4542 alt = names32[0];
4543 else
4544 alt = names16[0];
4545 strcpy (obufp, alt);
4546 obufp += strlen (alt);
4547 *obufp++ = close_char;
4548 *obufp = '\0';
4549 break;
4550 }
4551 }
4552
4553 static void
4554 INVLPG_Fixup (int bytemode, int sizeflag)
4555 {
4556 const char *alt;
4557
4558 switch (*codep)
4559 {
4560 case 0xf8:
4561 alt = "swapgs";
4562 break;
4563 case 0xf9:
4564 alt = "rdtscp";
4565 break;
4566 default:
4567 OP_M (bytemode, sizeflag);
4568 return;
4569 }
4570 /* Override "invlpg". */
4571 strcpy (obuf + strlen (obuf) - 6, alt);
4572 codep++;
4573 }
4574
4575 static void
4576 BadOp (void)
4577 {
4578 /* Throw away prefixes and 1st. opcode byte. */
4579 codep = insn_codep + 1;
4580 oappend ("(bad)");
4581 }
4582
4583 static void
4584 SEG_Fixup (int extrachar, int sizeflag)
4585 {
4586 if (mod == 3)
4587 {
4588 /* We need to add a proper suffix with
4589
4590 movw %ds,%ax
4591 movl %ds,%eax
4592 movq %ds,%rax
4593 movw %ax,%ds
4594 movl %eax,%ds
4595 movq %rax,%ds
4596 */
4597 const char *suffix;
4598
4599 if (prefixes & PREFIX_DATA)
4600 suffix = "w";
4601 else
4602 {
4603 USED_REX (REX_MODE64);
4604 if (rex & REX_MODE64)
4605 suffix = "q";
4606 else
4607 suffix = "l";
4608 }
4609 strcat (obuf, suffix);
4610 }
4611 else
4612 {
4613 /* We need to fix the suffix for
4614
4615 movw %ds,(%eax)
4616 movw %ds,(%rax)
4617 movw (%eax),%ds
4618 movw (%rax),%ds
4619
4620 Override "mov[l|q]". */
4621 char *p = obuf + strlen (obuf) - 1;
4622
4623 /* We might not have a suffix. */
4624 if (*p == 'v')
4625 ++p;
4626 *p = 'w';
4627 }
4628
4629 OP_E (extrachar, sizeflag);
4630 }
4631
4632 static void
4633 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4634 {
4635 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
4636 {
4637 /* Override "sgdt". */
4638 char *p = obuf + strlen (obuf) - 4;
4639
4640 /* We might have a suffix when disassembling with -Msuffix. */
4641 if (*p == 'g')
4642 --p;
4643
4644 switch (rm)
4645 {
4646 case 1:
4647 strcpy (p, "vmcall");
4648 break;
4649 case 2:
4650 strcpy (p, "vmlaunch");
4651 break;
4652 case 3:
4653 strcpy (p, "vmresume");
4654 break;
4655 case 4:
4656 strcpy (p, "vmxoff");
4657 break;
4658 }
4659
4660 codep++;
4661 }
4662 else
4663 OP_E (0, sizeflag);
4664 }
4665
4666 static void
4667 OP_VMX (int bytemode, int sizeflag)
4668 {
4669 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
4670 if (prefixes & PREFIX_DATA)
4671 strcpy (obuf, "vmclear");
4672 else if (prefixes & PREFIX_REPZ)
4673 strcpy (obuf, "vmxon");
4674 else
4675 strcpy (obuf, "vmptrld");
4676 OP_E (bytemode, sizeflag);
4677 }
GDB Binutils - Deliverables
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