1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
37 #include "opcode/i386.h"
41 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
42 static void ckprefix (void);
43 static const char *prefix_name (int, int);
44 static int print_insn (bfd_vma
, disassemble_info
*);
45 static void dofloat (int);
46 static void OP_ST (int, int);
47 static void OP_STi (int, int);
48 static int putop (const char *, int);
49 static void oappend (const char *);
50 static void append_seg (void);
51 static void OP_indirE (int, int);
52 static void print_operand_value (char *, int, bfd_vma
);
53 static void print_displacement (char *, bfd_vma
);
54 static void OP_E (int, int);
55 static void OP_G (int, int);
56 static bfd_vma
get64 (void);
57 static bfd_signed_vma
get32 (void);
58 static bfd_signed_vma
get32s (void);
59 static int get16 (void);
60 static void set_op (bfd_vma
, int);
61 static void OP_REG (int, int);
62 static void OP_IMREG (int, int);
63 static void OP_I (int, int);
64 static void OP_I64 (int, int);
65 static void OP_sI (int, int);
66 static void OP_J (int, int);
67 static void OP_SEG (int, int);
68 static void OP_DIR (int, int);
69 static void OP_OFF (int, int);
70 static void OP_OFF64 (int, int);
71 static void ptr_reg (int, int);
72 static void OP_ESreg (int, int);
73 static void OP_DSreg (int, int);
74 static void OP_C (int, int);
75 static void OP_D (int, int);
76 static void OP_T (int, int);
77 static void OP_R (int, int);
78 static void OP_MMX (int, int);
79 static void OP_XMM (int, int);
80 static void OP_EM (int, int);
81 static void OP_EX (int, int);
82 static void OP_EMC (int,int);
83 static void OP_MXC (int,int);
84 static void OP_MS (int, int);
85 static void OP_XS (int, int);
86 static void OP_M (int, int);
87 static void OP_VMX (int, int);
88 static void OP_0fae (int, int);
89 static void OP_0f07 (int, int);
90 static void NOP_Fixup1 (int, int);
91 static void NOP_Fixup2 (int, int);
92 static void OP_3DNowSuffix (int, int);
93 static void OP_SIMD_Suffix (int, int);
94 static void SIMD_Fixup (int, int);
95 static void PNI_Fixup (int, int);
96 static void SVME_Fixup (int, int);
97 static void INVLPG_Fixup (int, int);
98 static void BadOp (void);
99 static void VMX_Fixup (int, int);
100 static void REP_Fixup (int, int);
101 static void CMPXCHG8B_Fixup (int, int);
102 static void XMM_Fixup (int, int);
103 static void CRC32_Fixup (int, int);
106 /* Points to first byte not fetched. */
107 bfd_byte
*max_fetched
;
108 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
121 enum address_mode address_mode
;
123 /* Flags for the prefixes for the current instruction. See below. */
126 /* REX prefix the current instruction. See below. */
128 /* Bits of REX we've already used. */
130 /* Mark parts used in the REX prefix. When we are testing for
131 empty prefix (for 8bit register REX extension), just mask it
132 out. Otherwise test for REX bit is excuse for existence of REX
133 only in case value is nonzero. */
134 #define USED_REX(value) \
139 rex_used |= (value) | REX_OPCODE; \
142 rex_used |= REX_OPCODE; \
145 /* Flags for prefixes which we somehow handled when printing the
146 current instruction. */
147 static int used_prefixes
;
149 /* Flags stored in PREFIXES. */
150 #define PREFIX_REPZ 1
151 #define PREFIX_REPNZ 2
152 #define PREFIX_LOCK 4
154 #define PREFIX_SS 0x10
155 #define PREFIX_DS 0x20
156 #define PREFIX_ES 0x40
157 #define PREFIX_FS 0x80
158 #define PREFIX_GS 0x100
159 #define PREFIX_DATA 0x200
160 #define PREFIX_ADDR 0x400
161 #define PREFIX_FWAIT 0x800
163 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
164 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
166 #define FETCH_DATA(info, addr) \
167 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
168 ? 1 : fetch_data ((info), (addr)))
171 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
174 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
175 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
177 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
178 status
= (*info
->read_memory_func
) (start
,
180 addr
- priv
->max_fetched
,
186 /* If we did manage to read at least one byte, then
187 print_insn_i386 will do something sensible. Otherwise, print
188 an error. We do that here because this is where we know
190 if (priv
->max_fetched
== priv
->the_buffer
)
191 (*info
->memory_error_func
) (status
, start
, info
);
192 longjmp (priv
->bailout
, 1);
195 priv
->max_fetched
= addr
;
199 #define XX { NULL, 0 }
201 #define Eb { OP_E, b_mode }
202 #define Ev { OP_E, v_mode }
203 #define Ed { OP_E, d_mode }
204 #define Edq { OP_E, dq_mode }
205 #define Edqw { OP_E, dqw_mode }
206 #define Edqb { OP_E, dqb_mode }
207 #define Edqd { OP_E, dqd_mode }
208 #define indirEv { OP_indirE, stack_v_mode }
209 #define indirEp { OP_indirE, f_mode }
210 #define stackEv { OP_E, stack_v_mode }
211 #define Em { OP_E, m_mode }
212 #define Ew { OP_E, w_mode }
213 #define M { OP_M, 0 } /* lea, lgdt, etc. */
214 #define Ma { OP_M, v_mode }
215 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
216 #define Mq { OP_M, q_mode }
217 #define Gb { OP_G, b_mode }
218 #define Gv { OP_G, v_mode }
219 #define Gd { OP_G, d_mode }
220 #define Gdq { OP_G, dq_mode }
221 #define Gm { OP_G, m_mode }
222 #define Gw { OP_G, w_mode }
223 #define Rd { OP_R, d_mode }
224 #define Rm { OP_R, m_mode }
225 #define Ib { OP_I, b_mode }
226 #define sIb { OP_sI, b_mode } /* sign extened byte */
227 #define Iv { OP_I, v_mode }
228 #define Iq { OP_I, q_mode }
229 #define Iv64 { OP_I64, v_mode }
230 #define Iw { OP_I, w_mode }
231 #define I1 { OP_I, const_1_mode }
232 #define Jb { OP_J, b_mode }
233 #define Jv { OP_J, v_mode }
234 #define Cm { OP_C, m_mode }
235 #define Dm { OP_D, m_mode }
236 #define Td { OP_T, d_mode }
238 #define RMeAX { OP_REG, eAX_reg }
239 #define RMeBX { OP_REG, eBX_reg }
240 #define RMeCX { OP_REG, eCX_reg }
241 #define RMeDX { OP_REG, eDX_reg }
242 #define RMeSP { OP_REG, eSP_reg }
243 #define RMeBP { OP_REG, eBP_reg }
244 #define RMeSI { OP_REG, eSI_reg }
245 #define RMeDI { OP_REG, eDI_reg }
246 #define RMrAX { OP_REG, rAX_reg }
247 #define RMrBX { OP_REG, rBX_reg }
248 #define RMrCX { OP_REG, rCX_reg }
249 #define RMrDX { OP_REG, rDX_reg }
250 #define RMrSP { OP_REG, rSP_reg }
251 #define RMrBP { OP_REG, rBP_reg }
252 #define RMrSI { OP_REG, rSI_reg }
253 #define RMrDI { OP_REG, rDI_reg }
254 #define RMAL { OP_REG, al_reg }
255 #define RMAL { OP_REG, al_reg }
256 #define RMCL { OP_REG, cl_reg }
257 #define RMDL { OP_REG, dl_reg }
258 #define RMBL { OP_REG, bl_reg }
259 #define RMAH { OP_REG, ah_reg }
260 #define RMCH { OP_REG, ch_reg }
261 #define RMDH { OP_REG, dh_reg }
262 #define RMBH { OP_REG, bh_reg }
263 #define RMAX { OP_REG, ax_reg }
264 #define RMDX { OP_REG, dx_reg }
266 #define eAX { OP_IMREG, eAX_reg }
267 #define eBX { OP_IMREG, eBX_reg }
268 #define eCX { OP_IMREG, eCX_reg }
269 #define eDX { OP_IMREG, eDX_reg }
270 #define eSP { OP_IMREG, eSP_reg }
271 #define eBP { OP_IMREG, eBP_reg }
272 #define eSI { OP_IMREG, eSI_reg }
273 #define eDI { OP_IMREG, eDI_reg }
274 #define AL { OP_IMREG, al_reg }
275 #define CL { OP_IMREG, cl_reg }
276 #define DL { OP_IMREG, dl_reg }
277 #define BL { OP_IMREG, bl_reg }
278 #define AH { OP_IMREG, ah_reg }
279 #define CH { OP_IMREG, ch_reg }
280 #define DH { OP_IMREG, dh_reg }
281 #define BH { OP_IMREG, bh_reg }
282 #define AX { OP_IMREG, ax_reg }
283 #define DX { OP_IMREG, dx_reg }
284 #define zAX { OP_IMREG, z_mode_ax_reg }
285 #define indirDX { OP_IMREG, indir_dx_reg }
287 #define Sw { OP_SEG, w_mode }
288 #define Sv { OP_SEG, v_mode }
289 #define Ap { OP_DIR, 0 }
290 #define Ob { OP_OFF64, b_mode }
291 #define Ov { OP_OFF64, v_mode }
292 #define Xb { OP_DSreg, eSI_reg }
293 #define Xv { OP_DSreg, eSI_reg }
294 #define Xz { OP_DSreg, eSI_reg }
295 #define Yb { OP_ESreg, eDI_reg }
296 #define Yv { OP_ESreg, eDI_reg }
297 #define DSBX { OP_DSreg, eBX_reg }
299 #define es { OP_REG, es_reg }
300 #define ss { OP_REG, ss_reg }
301 #define cs { OP_REG, cs_reg }
302 #define ds { OP_REG, ds_reg }
303 #define fs { OP_REG, fs_reg }
304 #define gs { OP_REG, gs_reg }
306 #define MX { OP_MMX, 0 }
307 #define XM { OP_XMM, 0 }
308 #define EM { OP_EM, v_mode }
309 #define EMd { OP_EM, d_mode }
310 #define EMq { OP_EM, q_mode }
311 #define EXd { OP_EX, d_mode }
312 #define EXq { OP_EX, q_mode }
313 #define EXx { OP_EX, x_mode }
314 #define MS { OP_MS, v_mode }
315 #define XS { OP_XS, v_mode }
316 #define EMC { OP_EMC, v_mode }
317 #define MXC { OP_MXC, 0 }
318 #define VM { OP_VMX, q_mode }
319 #define OPSUF { OP_3DNowSuffix, 0 }
320 #define OPSIMD { OP_SIMD_Suffix, 0 }
321 #define XMM0 { XMM_Fixup, 0 }
323 /* Used handle "rep" prefix for string instructions. */
324 #define Xbr { REP_Fixup, eSI_reg }
325 #define Xvr { REP_Fixup, eSI_reg }
326 #define Ybr { REP_Fixup, eDI_reg }
327 #define Yvr { REP_Fixup, eDI_reg }
328 #define Yzr { REP_Fixup, eDI_reg }
329 #define indirDXr { REP_Fixup, indir_dx_reg }
330 #define ALr { REP_Fixup, al_reg }
331 #define eAXr { REP_Fixup, eAX_reg }
333 #define cond_jump_flag { NULL, cond_jump_mode }
334 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
336 /* bits in sizeflag */
337 #define SUFFIX_ALWAYS 4
341 #define b_mode 1 /* byte operand */
342 #define v_mode 2 /* operand size depends on prefixes */
343 #define w_mode 3 /* word operand */
344 #define d_mode 4 /* double word operand */
345 #define q_mode 5 /* quad word operand */
346 #define t_mode 6 /* ten-byte operand */
347 #define x_mode 7 /* 16-byte XMM operand */
348 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
349 #define cond_jump_mode 9
350 #define loop_jcxz_mode 10
351 #define dq_mode 11 /* operand size depends on REX prefixes. */
352 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
353 #define f_mode 13 /* 4- or 6-byte pointer operand */
354 #define const_1_mode 14
355 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
356 #define z_mode 16 /* non-quad operand size depends on prefixes */
357 #define o_mode 17 /* 16-byte operand */
358 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
359 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
404 #define z_mode_ax_reg 149
405 #define indir_dx_reg 150
409 #define USE_PREFIX_USER_TABLE 3
410 #define X86_64_SPECIAL 4
411 #define IS_3BYTE_OPCODE 5
413 #define FLOAT NULL, { { NULL, FLOATCODE } }
415 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
416 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
417 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
418 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
419 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
420 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
421 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
422 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
423 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
424 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
425 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
426 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
427 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
428 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
429 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
430 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
431 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
432 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
433 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
434 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
435 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
436 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
437 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
438 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
439 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
440 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
441 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
442 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
444 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
445 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
446 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
447 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
448 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
449 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
450 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
451 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
452 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
453 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
454 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
455 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
456 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
457 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
458 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
459 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
460 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
461 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
462 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
463 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
464 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
465 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
466 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
467 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
468 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
469 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
470 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
471 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
472 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
473 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
474 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
475 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
476 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
477 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
478 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
479 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
480 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
481 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
482 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
483 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
484 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
485 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
486 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
487 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
488 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
489 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
490 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
491 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
492 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
493 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
494 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
495 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
496 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
497 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
498 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
499 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
500 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
501 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
502 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
503 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
504 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
505 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
506 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
507 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
508 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
509 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
510 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
511 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
512 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
513 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
514 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
515 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
516 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
517 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
518 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
519 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
520 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
521 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
522 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
523 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
524 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
525 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
526 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
527 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
528 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
529 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
530 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
531 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
532 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
533 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
534 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
535 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
536 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
537 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
538 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
539 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
540 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
541 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
544 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
545 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
546 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
547 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
549 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
550 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
552 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
563 /* Upper case letters in the instruction names here are macros.
564 'A' => print 'b' if no register operands or suffix_always is true
565 'B' => print 'b' if suffix_always is true
566 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
568 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
569 . suffix_always is true
570 'E' => print 'e' if 32-bit form of jcxz
571 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
572 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
573 'H' => print ",pt" or ",pn" branch hint
574 'I' => honor following macro letter even in Intel mode (implemented only
575 . for some of the macro letters)
577 'K' => print 'd' or 'q' if rex prefix is present.
578 'L' => print 'l' if suffix_always is true
579 'N' => print 'n' if instruction has no wait "prefix"
580 'O' => print 'd' or 'o' (or 'q' in Intel mode)
581 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
582 . or suffix_always is true. print 'q' if rex prefix is present.
583 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
585 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
586 'S' => print 'w', 'l' or 'q' if suffix_always is true
587 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
588 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
589 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
590 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
591 'X' => print 's', 'd' depending on data16 prefix (for XMM)
592 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
593 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
595 Many of the above letters print nothing in Intel mode. See "putop"
598 Braces '{' and '}', and vertical bars '|', indicate alternative
599 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
600 modes. In cases where there are only two alternatives, the X86_64
601 instruction is reserved, and "(bad)" is printed.
604 static const struct dis386 dis386
[] = {
606 { "addB", { Eb
, Gb
} },
607 { "addS", { Ev
, Gv
} },
608 { "addB", { Gb
, Eb
} },
609 { "addS", { Gv
, Ev
} },
610 { "addB", { AL
, Ib
} },
611 { "addS", { eAX
, Iv
} },
612 { "push{T|}", { es
} },
613 { "pop{T|}", { es
} },
615 { "orB", { Eb
, Gb
} },
616 { "orS", { Ev
, Gv
} },
617 { "orB", { Gb
, Eb
} },
618 { "orS", { Gv
, Ev
} },
619 { "orB", { AL
, Ib
} },
620 { "orS", { eAX
, Iv
} },
621 { "push{T|}", { cs
} },
622 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
624 { "adcB", { Eb
, Gb
} },
625 { "adcS", { Ev
, Gv
} },
626 { "adcB", { Gb
, Eb
} },
627 { "adcS", { Gv
, Ev
} },
628 { "adcB", { AL
, Ib
} },
629 { "adcS", { eAX
, Iv
} },
630 { "push{T|}", { ss
} },
631 { "pop{T|}", { ss
} },
633 { "sbbB", { Eb
, Gb
} },
634 { "sbbS", { Ev
, Gv
} },
635 { "sbbB", { Gb
, Eb
} },
636 { "sbbS", { Gv
, Ev
} },
637 { "sbbB", { AL
, Ib
} },
638 { "sbbS", { eAX
, Iv
} },
639 { "push{T|}", { ds
} },
640 { "pop{T|}", { ds
} },
642 { "andB", { Eb
, Gb
} },
643 { "andS", { Ev
, Gv
} },
644 { "andB", { Gb
, Eb
} },
645 { "andS", { Gv
, Ev
} },
646 { "andB", { AL
, Ib
} },
647 { "andS", { eAX
, Iv
} },
648 { "(bad)", { XX
} }, /* SEG ES prefix */
649 { "daa{|}", { XX
} },
651 { "subB", { Eb
, Gb
} },
652 { "subS", { Ev
, Gv
} },
653 { "subB", { Gb
, Eb
} },
654 { "subS", { Gv
, Ev
} },
655 { "subB", { AL
, Ib
} },
656 { "subS", { eAX
, Iv
} },
657 { "(bad)", { XX
} }, /* SEG CS prefix */
658 { "das{|}", { XX
} },
660 { "xorB", { Eb
, Gb
} },
661 { "xorS", { Ev
, Gv
} },
662 { "xorB", { Gb
, Eb
} },
663 { "xorS", { Gv
, Ev
} },
664 { "xorB", { AL
, Ib
} },
665 { "xorS", { eAX
, Iv
} },
666 { "(bad)", { XX
} }, /* SEG SS prefix */
667 { "aaa{|}", { XX
} },
669 { "cmpB", { Eb
, Gb
} },
670 { "cmpS", { Ev
, Gv
} },
671 { "cmpB", { Gb
, Eb
} },
672 { "cmpS", { Gv
, Ev
} },
673 { "cmpB", { AL
, Ib
} },
674 { "cmpS", { eAX
, Iv
} },
675 { "(bad)", { XX
} }, /* SEG DS prefix */
676 { "aas{|}", { XX
} },
678 { "inc{S|}", { RMeAX
} },
679 { "inc{S|}", { RMeCX
} },
680 { "inc{S|}", { RMeDX
} },
681 { "inc{S|}", { RMeBX
} },
682 { "inc{S|}", { RMeSP
} },
683 { "inc{S|}", { RMeBP
} },
684 { "inc{S|}", { RMeSI
} },
685 { "inc{S|}", { RMeDI
} },
687 { "dec{S|}", { RMeAX
} },
688 { "dec{S|}", { RMeCX
} },
689 { "dec{S|}", { RMeDX
} },
690 { "dec{S|}", { RMeBX
} },
691 { "dec{S|}", { RMeSP
} },
692 { "dec{S|}", { RMeBP
} },
693 { "dec{S|}", { RMeSI
} },
694 { "dec{S|}", { RMeDI
} },
696 { "pushV", { RMrAX
} },
697 { "pushV", { RMrCX
} },
698 { "pushV", { RMrDX
} },
699 { "pushV", { RMrBX
} },
700 { "pushV", { RMrSP
} },
701 { "pushV", { RMrBP
} },
702 { "pushV", { RMrSI
} },
703 { "pushV", { RMrDI
} },
705 { "popV", { RMrAX
} },
706 { "popV", { RMrCX
} },
707 { "popV", { RMrDX
} },
708 { "popV", { RMrBX
} },
709 { "popV", { RMrSP
} },
710 { "popV", { RMrBP
} },
711 { "popV", { RMrSI
} },
712 { "popV", { RMrDI
} },
718 { "(bad)", { XX
} }, /* seg fs */
719 { "(bad)", { XX
} }, /* seg gs */
720 { "(bad)", { XX
} }, /* op size prefix */
721 { "(bad)", { XX
} }, /* adr size prefix */
724 { "imulS", { Gv
, Ev
, Iv
} },
725 { "pushT", { sIb
} },
726 { "imulS", { Gv
, Ev
, sIb
} },
727 { "ins{b||b|}", { Ybr
, indirDX
} },
728 { "ins{R||G|}", { Yzr
, indirDX
} },
729 { "outs{b||b|}", { indirDXr
, Xb
} },
730 { "outs{R||G|}", { indirDXr
, Xz
} },
732 { "joH", { Jb
, XX
, cond_jump_flag
} },
733 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
734 { "jbH", { Jb
, XX
, cond_jump_flag
} },
735 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
736 { "jeH", { Jb
, XX
, cond_jump_flag
} },
737 { "jneH", { Jb
, XX
, cond_jump_flag
} },
738 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
739 { "jaH", { Jb
, XX
, cond_jump_flag
} },
741 { "jsH", { Jb
, XX
, cond_jump_flag
} },
742 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
743 { "jpH", { Jb
, XX
, cond_jump_flag
} },
744 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
745 { "jlH", { Jb
, XX
, cond_jump_flag
} },
746 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
747 { "jleH", { Jb
, XX
, cond_jump_flag
} },
748 { "jgH", { Jb
, XX
, cond_jump_flag
} },
754 { "testB", { Eb
, Gb
} },
755 { "testS", { Ev
, Gv
} },
756 { "xchgB", { Eb
, Gb
} },
757 { "xchgS", { Ev
, Gv
} },
759 { "movB", { Eb
, Gb
} },
760 { "movS", { Ev
, Gv
} },
761 { "movB", { Gb
, Eb
} },
762 { "movS", { Gv
, Ev
} },
763 { "movD", { Sv
, Sw
} },
764 { "leaS", { Gv
, M
} },
765 { "movD", { Sw
, Sv
} },
769 { "xchgS", { RMeCX
, eAX
} },
770 { "xchgS", { RMeDX
, eAX
} },
771 { "xchgS", { RMeBX
, eAX
} },
772 { "xchgS", { RMeSP
, eAX
} },
773 { "xchgS", { RMeBP
, eAX
} },
774 { "xchgS", { RMeSI
, eAX
} },
775 { "xchgS", { RMeDI
, eAX
} },
777 { "cW{t||t|}R", { XX
} },
778 { "cR{t||t|}O", { XX
} },
779 { "Jcall{T|}", { Ap
} },
780 { "(bad)", { XX
} }, /* fwait */
781 { "pushfT", { XX
} },
783 { "sahf{|}", { XX
} },
784 { "lahf{|}", { XX
} },
786 { "movB", { AL
, Ob
} },
787 { "movS", { eAX
, Ov
} },
788 { "movB", { Ob
, AL
} },
789 { "movS", { Ov
, eAX
} },
790 { "movs{b||b|}", { Ybr
, Xb
} },
791 { "movs{R||R|}", { Yvr
, Xv
} },
792 { "cmps{b||b|}", { Xb
, Yb
} },
793 { "cmps{R||R|}", { Xv
, Yv
} },
795 { "testB", { AL
, Ib
} },
796 { "testS", { eAX
, Iv
} },
797 { "stosB", { Ybr
, AL
} },
798 { "stosS", { Yvr
, eAX
} },
799 { "lodsB", { ALr
, Xb
} },
800 { "lodsS", { eAXr
, Xv
} },
801 { "scasB", { AL
, Yb
} },
802 { "scasS", { eAX
, Yv
} },
804 { "movB", { RMAL
, Ib
} },
805 { "movB", { RMCL
, Ib
} },
806 { "movB", { RMDL
, Ib
} },
807 { "movB", { RMBL
, Ib
} },
808 { "movB", { RMAH
, Ib
} },
809 { "movB", { RMCH
, Ib
} },
810 { "movB", { RMDH
, Ib
} },
811 { "movB", { RMBH
, Ib
} },
813 { "movS", { RMeAX
, Iv64
} },
814 { "movS", { RMeCX
, Iv64
} },
815 { "movS", { RMeDX
, Iv64
} },
816 { "movS", { RMeBX
, Iv64
} },
817 { "movS", { RMeSP
, Iv64
} },
818 { "movS", { RMeBP
, Iv64
} },
819 { "movS", { RMeSI
, Iv64
} },
820 { "movS", { RMeDI
, Iv64
} },
826 { "les{S|}", { Gv
, Mp
} },
827 { "ldsS", { Gv
, Mp
} },
831 { "enterT", { Iw
, Ib
} },
832 { "leaveT", { XX
} },
837 { "into{|}", { XX
} },
844 { "aam{|}", { sIb
} },
845 { "aad{|}", { sIb
} },
847 { "xlat", { DSBX
} },
858 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
859 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
860 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
861 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
862 { "inB", { AL
, Ib
} },
863 { "inG", { zAX
, Ib
} },
864 { "outB", { Ib
, AL
} },
865 { "outG", { Ib
, zAX
} },
869 { "Jjmp{T|}", { Ap
} },
871 { "inB", { AL
, indirDX
} },
872 { "inG", { zAX
, indirDX
} },
873 { "outB", { indirDX
, AL
} },
874 { "outG", { indirDX
, zAX
} },
876 { "(bad)", { XX
} }, /* lock prefix */
878 { "(bad)", { XX
} }, /* repne */
879 { "(bad)", { XX
} }, /* repz */
895 static const struct dis386 dis386_twobyte
[] = {
899 { "larS", { Gv
, Ew
} },
900 { "lslS", { Gv
, Ew
} },
902 { "syscall", { XX
} },
904 { "sysretP", { XX
} },
907 { "wbinvd", { XX
} },
913 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
918 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
919 { "unpcklpX", { XM
, EXq
} },
920 { "unpckhpX", { XM
, EXq
} },
922 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
933 { "movZ", { Rm
, Cm
} },
934 { "movZ", { Rm
, Dm
} },
935 { "movZ", { Cm
, Rm
} },
936 { "movZ", { Dm
, Rm
} },
937 { "movL", { Rd
, Td
} },
939 { "movL", { Td
, Rd
} },
942 { "movapX", { XM
, EXx
} },
943 { "movapX", { EXx
, XM
} },
955 { "sysenter", { XX
} },
956 { "sysexit", { XX
} },
969 { "cmovo", { Gv
, Ev
} },
970 { "cmovno", { Gv
, Ev
} },
971 { "cmovb", { Gv
, Ev
} },
972 { "cmovae", { Gv
, Ev
} },
973 { "cmove", { Gv
, Ev
} },
974 { "cmovne", { Gv
, Ev
} },
975 { "cmovbe", { Gv
, Ev
} },
976 { "cmova", { Gv
, Ev
} },
978 { "cmovs", { Gv
, Ev
} },
979 { "cmovns", { Gv
, Ev
} },
980 { "cmovp", { Gv
, Ev
} },
981 { "cmovnp", { Gv
, Ev
} },
982 { "cmovl", { Gv
, Ev
} },
983 { "cmovge", { Gv
, Ev
} },
984 { "cmovle", { Gv
, Ev
} },
985 { "cmovg", { Gv
, Ev
} },
987 { "movmskpX", { Gdq
, XS
} },
991 { "andpX", { XM
, EXx
} },
992 { "andnpX", { XM
, EXx
} },
993 { "orpX", { XM
, EXx
} },
994 { "xorpX", { XM
, EXx
} },
1008 { "packsswb", { MX
, EM
} },
1009 { "pcmpgtb", { MX
, EM
} },
1010 { "pcmpgtw", { MX
, EM
} },
1011 { "pcmpgtd", { MX
, EM
} },
1012 { "packuswb", { MX
, EM
} },
1014 { "punpckhbw", { MX
, EM
} },
1015 { "punpckhwd", { MX
, EM
} },
1016 { "punpckhdq", { MX
, EM
} },
1017 { "packssdw", { MX
, EM
} },
1020 { "movd", { MX
, Edq
} },
1027 { "pcmpeqb", { MX
, EM
} },
1028 { "pcmpeqw", { MX
, EM
} },
1029 { "pcmpeqd", { MX
, EM
} },
1034 { "(bad)", { XX
} },
1035 { "(bad)", { XX
} },
1041 { "joH", { Jv
, XX
, cond_jump_flag
} },
1042 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1043 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1044 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1045 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1046 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1047 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1048 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1050 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1051 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1052 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1053 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1054 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1055 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1056 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1057 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1060 { "setno", { Eb
} },
1062 { "setae", { Eb
} },
1064 { "setne", { Eb
} },
1065 { "setbe", { Eb
} },
1069 { "setns", { Eb
} },
1071 { "setnp", { Eb
} },
1073 { "setge", { Eb
} },
1074 { "setle", { Eb
} },
1077 { "pushT", { fs
} },
1079 { "cpuid", { XX
} },
1080 { "btS", { Ev
, Gv
} },
1081 { "shldS", { Ev
, Gv
, Ib
} },
1082 { "shldS", { Ev
, Gv
, CL
} },
1086 { "pushT", { gs
} },
1089 { "btsS", { Ev
, Gv
} },
1090 { "shrdS", { Ev
, Gv
, Ib
} },
1091 { "shrdS", { Ev
, Gv
, CL
} },
1093 { "imulS", { Gv
, Ev
} },
1095 { "cmpxchgB", { Eb
, Gb
} },
1096 { "cmpxchgS", { Ev
, Gv
} },
1097 { "lssS", { Gv
, Mp
} },
1098 { "btrS", { Ev
, Gv
} },
1099 { "lfsS", { Gv
, Mp
} },
1100 { "lgsS", { Gv
, Mp
} },
1101 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1102 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1107 { "btcS", { Ev
, Gv
} },
1108 { "bsfS", { Gv
, Ev
} },
1110 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1111 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1113 { "xaddB", { Eb
, Gb
} },
1114 { "xaddS", { Ev
, Gv
} },
1116 { "movntiS", { Ev
, Gv
} },
1117 { "pinsrw", { MX
, Edqw
, Ib
} },
1118 { "pextrw", { Gdq
, MS
, Ib
} },
1119 { "shufpX", { XM
, EXx
, Ib
} },
1122 { "bswap", { RMeAX
} },
1123 { "bswap", { RMeCX
} },
1124 { "bswap", { RMeDX
} },
1125 { "bswap", { RMeBX
} },
1126 { "bswap", { RMeSP
} },
1127 { "bswap", { RMeBP
} },
1128 { "bswap", { RMeSI
} },
1129 { "bswap", { RMeDI
} },
1132 { "psrlw", { MX
, EM
} },
1133 { "psrld", { MX
, EM
} },
1134 { "psrlq", { MX
, EM
} },
1135 { "paddq", { MX
, EM
} },
1136 { "pmullw", { MX
, EM
} },
1138 { "pmovmskb", { Gdq
, MS
} },
1140 { "psubusb", { MX
, EM
} },
1141 { "psubusw", { MX
, EM
} },
1142 { "pminub", { MX
, EM
} },
1143 { "pand", { MX
, EM
} },
1144 { "paddusb", { MX
, EM
} },
1145 { "paddusw", { MX
, EM
} },
1146 { "pmaxub", { MX
, EM
} },
1147 { "pandn", { MX
, EM
} },
1149 { "pavgb", { MX
, EM
} },
1150 { "psraw", { MX
, EM
} },
1151 { "psrad", { MX
, EM
} },
1152 { "pavgw", { MX
, EM
} },
1153 { "pmulhuw", { MX
, EM
} },
1154 { "pmulhw", { MX
, EM
} },
1158 { "psubsb", { MX
, EM
} },
1159 { "psubsw", { MX
, EM
} },
1160 { "pminsw", { MX
, EM
} },
1161 { "por", { MX
, EM
} },
1162 { "paddsb", { MX
, EM
} },
1163 { "paddsw", { MX
, EM
} },
1164 { "pmaxsw", { MX
, EM
} },
1165 { "pxor", { MX
, EM
} },
1168 { "psllw", { MX
, EM
} },
1169 { "pslld", { MX
, EM
} },
1170 { "psllq", { MX
, EM
} },
1171 { "pmuludq", { MX
, EM
} },
1172 { "pmaddwd", { MX
, EM
} },
1173 { "psadbw", { MX
, EM
} },
1176 { "psubb", { MX
, EM
} },
1177 { "psubw", { MX
, EM
} },
1178 { "psubd", { MX
, EM
} },
1179 { "psubq", { MX
, EM
} },
1180 { "paddb", { MX
, EM
} },
1181 { "paddw", { MX
, EM
} },
1182 { "paddd", { MX
, EM
} },
1183 { "(bad)", { XX
} },
1186 static const unsigned char onebyte_has_modrm
[256] = {
1187 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1188 /* ------------------------------- */
1189 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1190 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1191 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1192 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1193 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1194 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1195 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1196 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1197 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1198 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1199 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1200 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1201 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1202 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1203 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1204 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1205 /* ------------------------------- */
1206 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1209 static const unsigned char twobyte_has_modrm
[256] = {
1210 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1211 /* ------------------------------- */
1212 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1213 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1214 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1215 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1216 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1217 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1218 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1219 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1220 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1221 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1222 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1223 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1224 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1225 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1226 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1227 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1228 /* ------------------------------- */
1229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1232 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1233 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1234 /* ------------------------------- */
1235 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1236 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1237 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1238 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1239 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1240 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1241 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1242 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1243 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1244 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1245 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1246 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1247 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1248 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1249 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1250 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1251 /* ------------------------------- */
1252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1255 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1256 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1257 /* ------------------------------- */
1258 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1259 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1260 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1261 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1262 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1263 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1264 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1265 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1266 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1267 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1268 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1269 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1270 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1271 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1272 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1273 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1274 /* ------------------------------- */
1275 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1278 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1279 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1280 /* ------------------------------- */
1281 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1282 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1283 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1284 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1285 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1286 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1287 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1288 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1289 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1290 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1291 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1292 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1293 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1294 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1295 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1296 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1297 /* ------------------------------- */
1298 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1301 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1302 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1303 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1304 /* ------------------------------- */
1305 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1306 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1307 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1308 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1309 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1310 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1311 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1312 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1313 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1314 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1315 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1316 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1317 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1318 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1319 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1320 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1321 /* ------------------------------- */
1322 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1325 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1326 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1327 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1328 /* ------------------------------- */
1329 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1330 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1331 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1332 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1333 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1334 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1335 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1336 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1337 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1338 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1339 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1340 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1341 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1342 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1343 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1344 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1345 /* ------------------------------- */
1346 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1349 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1350 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1351 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1352 /* ------------------------------- */
1353 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1354 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1355 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1356 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1357 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1358 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1359 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1360 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1361 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1362 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1363 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1364 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1365 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1366 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1367 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1368 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1369 /* ------------------------------- */
1370 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1373 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1374 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1375 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1376 /* ------------------------------- */
1377 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1378 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1379 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1380 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1381 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1382 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1383 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1384 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1385 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1386 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1387 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1388 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1389 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1390 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1391 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1392 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1393 /* ------------------------------- */
1394 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1397 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1398 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1399 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1400 /* ------------------------------- */
1401 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1402 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1403 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1404 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1405 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1406 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1407 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1408 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1409 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1410 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1411 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1412 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1413 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1414 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1415 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1416 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1417 /* ------------------------------- */
1418 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1421 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1422 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1424 /* ------------------------------- */
1425 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1426 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1427 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1428 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1429 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1430 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1431 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1432 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1433 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1434 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1435 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1436 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1437 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1438 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1439 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1440 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1441 /* ------------------------------- */
1442 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1445 static char obuf
[100];
1447 static char scratchbuf
[100];
1448 static unsigned char *start_codep
;
1449 static unsigned char *insn_codep
;
1450 static unsigned char *codep
;
1451 static disassemble_info
*the_info
;
1459 static unsigned char need_modrm
;
1461 /* If we are accessing mod/rm/reg without need_modrm set, then the
1462 values are stale. Hitting this abort likely indicates that you
1463 need to update onebyte_has_modrm or twobyte_has_modrm. */
1464 #define MODRM_CHECK if (!need_modrm) abort ()
1466 static const char **names64
;
1467 static const char **names32
;
1468 static const char **names16
;
1469 static const char **names8
;
1470 static const char **names8rex
;
1471 static const char **names_seg
;
1472 static const char **index16
;
1474 static const char *intel_names64
[] = {
1475 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1476 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1478 static const char *intel_names32
[] = {
1479 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1480 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1482 static const char *intel_names16
[] = {
1483 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1484 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1486 static const char *intel_names8
[] = {
1487 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1489 static const char *intel_names8rex
[] = {
1490 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1491 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1493 static const char *intel_names_seg
[] = {
1494 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1496 static const char *intel_index16
[] = {
1497 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1500 static const char *att_names64
[] = {
1501 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1502 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1504 static const char *att_names32
[] = {
1505 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1506 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1508 static const char *att_names16
[] = {
1509 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1510 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1512 static const char *att_names8
[] = {
1513 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1515 static const char *att_names8rex
[] = {
1516 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1517 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1519 static const char *att_names_seg
[] = {
1520 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1522 static const char *att_index16
[] = {
1523 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1526 static const struct dis386 grps
[][8] = {
1529 { "popU", { stackEv
} },
1530 { "(bad)", { XX
} },
1531 { "(bad)", { XX
} },
1532 { "(bad)", { XX
} },
1533 { "(bad)", { XX
} },
1534 { "(bad)", { XX
} },
1535 { "(bad)", { XX
} },
1536 { "(bad)", { XX
} },
1540 { "addA", { Eb
, Ib
} },
1541 { "orA", { Eb
, Ib
} },
1542 { "adcA", { Eb
, Ib
} },
1543 { "sbbA", { Eb
, Ib
} },
1544 { "andA", { Eb
, Ib
} },
1545 { "subA", { Eb
, Ib
} },
1546 { "xorA", { Eb
, Ib
} },
1547 { "cmpA", { Eb
, Ib
} },
1551 { "addQ", { Ev
, Iv
} },
1552 { "orQ", { Ev
, Iv
} },
1553 { "adcQ", { Ev
, Iv
} },
1554 { "sbbQ", { Ev
, Iv
} },
1555 { "andQ", { Ev
, Iv
} },
1556 { "subQ", { Ev
, Iv
} },
1557 { "xorQ", { Ev
, Iv
} },
1558 { "cmpQ", { Ev
, Iv
} },
1562 { "addQ", { Ev
, sIb
} },
1563 { "orQ", { Ev
, sIb
} },
1564 { "adcQ", { Ev
, sIb
} },
1565 { "sbbQ", { Ev
, sIb
} },
1566 { "andQ", { Ev
, sIb
} },
1567 { "subQ", { Ev
, sIb
} },
1568 { "xorQ", { Ev
, sIb
} },
1569 { "cmpQ", { Ev
, sIb
} },
1573 { "rolA", { Eb
, Ib
} },
1574 { "rorA", { Eb
, Ib
} },
1575 { "rclA", { Eb
, Ib
} },
1576 { "rcrA", { Eb
, Ib
} },
1577 { "shlA", { Eb
, Ib
} },
1578 { "shrA", { Eb
, Ib
} },
1579 { "(bad)", { XX
} },
1580 { "sarA", { Eb
, Ib
} },
1584 { "rolQ", { Ev
, Ib
} },
1585 { "rorQ", { Ev
, Ib
} },
1586 { "rclQ", { Ev
, Ib
} },
1587 { "rcrQ", { Ev
, Ib
} },
1588 { "shlQ", { Ev
, Ib
} },
1589 { "shrQ", { Ev
, Ib
} },
1590 { "(bad)", { XX
} },
1591 { "sarQ", { Ev
, Ib
} },
1595 { "rolA", { Eb
, I1
} },
1596 { "rorA", { Eb
, I1
} },
1597 { "rclA", { Eb
, I1
} },
1598 { "rcrA", { Eb
, I1
} },
1599 { "shlA", { Eb
, I1
} },
1600 { "shrA", { Eb
, I1
} },
1601 { "(bad)", { XX
} },
1602 { "sarA", { Eb
, I1
} },
1606 { "rolQ", { Ev
, I1
} },
1607 { "rorQ", { Ev
, I1
} },
1608 { "rclQ", { Ev
, I1
} },
1609 { "rcrQ", { Ev
, I1
} },
1610 { "shlQ", { Ev
, I1
} },
1611 { "shrQ", { Ev
, I1
} },
1612 { "(bad)", { XX
} },
1613 { "sarQ", { Ev
, I1
} },
1617 { "rolA", { Eb
, CL
} },
1618 { "rorA", { Eb
, CL
} },
1619 { "rclA", { Eb
, CL
} },
1620 { "rcrA", { Eb
, CL
} },
1621 { "shlA", { Eb
, CL
} },
1622 { "shrA", { Eb
, CL
} },
1623 { "(bad)", { XX
} },
1624 { "sarA", { Eb
, CL
} },
1628 { "rolQ", { Ev
, CL
} },
1629 { "rorQ", { Ev
, CL
} },
1630 { "rclQ", { Ev
, CL
} },
1631 { "rcrQ", { Ev
, CL
} },
1632 { "shlQ", { Ev
, CL
} },
1633 { "shrQ", { Ev
, CL
} },
1634 { "(bad)", { XX
} },
1635 { "sarQ", { Ev
, CL
} },
1639 { "testA", { Eb
, Ib
} },
1640 { "(bad)", { Eb
} },
1643 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1644 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1645 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1646 { "idivA", { Eb
} }, /* and idiv for consistency. */
1650 { "testQ", { Ev
, Iv
} },
1651 { "(bad)", { XX
} },
1654 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1655 { "imulQ", { Ev
} },
1657 { "idivQ", { Ev
} },
1663 { "(bad)", { XX
} },
1664 { "(bad)", { XX
} },
1665 { "(bad)", { XX
} },
1666 { "(bad)", { XX
} },
1667 { "(bad)", { XX
} },
1668 { "(bad)", { XX
} },
1674 { "callT", { indirEv
} },
1675 { "JcallT", { indirEp
} },
1676 { "jmpT", { indirEv
} },
1677 { "JjmpT", { indirEp
} },
1678 { "pushU", { stackEv
} },
1679 { "(bad)", { XX
} },
1683 { "sldtD", { Sv
} },
1689 { "(bad)", { XX
} },
1690 { "(bad)", { XX
} },
1694 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1695 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1696 { "lgdt{Q|Q||}", { M
} },
1697 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1698 { "smswD", { Sv
} },
1699 { "(bad)", { XX
} },
1701 { "invlpg", { { INVLPG_Fixup
, w_mode
} } },
1705 { "(bad)", { XX
} },
1706 { "(bad)", { XX
} },
1707 { "(bad)", { XX
} },
1708 { "(bad)", { XX
} },
1709 { "btQ", { Ev
, Ib
} },
1710 { "btsQ", { Ev
, Ib
} },
1711 { "btrQ", { Ev
, Ib
} },
1712 { "btcQ", { Ev
, Ib
} },
1716 { "(bad)", { XX
} },
1717 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1718 { "(bad)", { XX
} },
1719 { "(bad)", { XX
} },
1720 { "(bad)", { XX
} },
1721 { "(bad)", { XX
} },
1722 { "", { VM
} }, /* See OP_VMX. */
1723 { "vmptrst", { Mq
} },
1727 { "movA", { Eb
, Ib
} },
1728 { "(bad)", { XX
} },
1729 { "(bad)", { XX
} },
1730 { "(bad)", { XX
} },
1731 { "(bad)", { XX
} },
1732 { "(bad)", { XX
} },
1733 { "(bad)", { XX
} },
1734 { "(bad)", { XX
} },
1738 { "movQ", { Ev
, Iv
} },
1739 { "(bad)", { XX
} },
1740 { "(bad)", { XX
} },
1741 { "(bad)", { XX
} },
1742 { "(bad)", { XX
} },
1743 { "(bad)", { XX
} },
1744 { "(bad)", { XX
} },
1745 { "(bad)", { XX
} },
1749 { "(bad)", { XX
} },
1750 { "(bad)", { XX
} },
1751 { "psrlw", { MS
, Ib
} },
1752 { "(bad)", { XX
} },
1753 { "psraw", { MS
, Ib
} },
1754 { "(bad)", { XX
} },
1755 { "psllw", { MS
, Ib
} },
1756 { "(bad)", { XX
} },
1760 { "(bad)", { XX
} },
1761 { "(bad)", { XX
} },
1762 { "psrld", { MS
, Ib
} },
1763 { "(bad)", { XX
} },
1764 { "psrad", { MS
, Ib
} },
1765 { "(bad)", { XX
} },
1766 { "pslld", { MS
, Ib
} },
1767 { "(bad)", { XX
} },
1771 { "(bad)", { XX
} },
1772 { "(bad)", { XX
} },
1773 { "psrlq", { MS
, Ib
} },
1774 { "psrldq", { MS
, Ib
} },
1775 { "(bad)", { XX
} },
1776 { "(bad)", { XX
} },
1777 { "psllq", { MS
, Ib
} },
1778 { "pslldq", { MS
, Ib
} },
1782 { "fxsave", { Ev
} },
1783 { "fxrstor", { Ev
} },
1784 { "ldmxcsr", { Ev
} },
1785 { "stmxcsr", { Ev
} },
1786 { "(bad)", { XX
} },
1787 { "lfence", { { OP_0fae
, 0 } } },
1788 { "mfence", { { OP_0fae
, 0 } } },
1789 { "clflush", { { OP_0fae
, 0 } } },
1793 { "prefetchnta", { Ev
} },
1794 { "prefetcht0", { Ev
} },
1795 { "prefetcht1", { Ev
} },
1796 { "prefetcht2", { Ev
} },
1797 { "(bad)", { XX
} },
1798 { "(bad)", { XX
} },
1799 { "(bad)", { XX
} },
1800 { "(bad)", { XX
} },
1804 { "prefetch", { Eb
} },
1805 { "prefetchw", { Eb
} },
1806 { "(bad)", { XX
} },
1807 { "(bad)", { XX
} },
1808 { "(bad)", { XX
} },
1809 { "(bad)", { XX
} },
1810 { "(bad)", { XX
} },
1811 { "(bad)", { XX
} },
1815 { "xstore-rng", { { OP_0f07
, 0 } } },
1816 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1817 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1818 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1819 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1820 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1821 { "(bad)", { { OP_0f07
, 0 } } },
1822 { "(bad)", { { OP_0f07
, 0 } } },
1826 { "montmul", { { OP_0f07
, 0 } } },
1827 { "xsha1", { { OP_0f07
, 0 } } },
1828 { "xsha256", { { OP_0f07
, 0 } } },
1829 { "(bad)", { { OP_0f07
, 0 } } },
1830 { "(bad)", { { OP_0f07
, 0 } } },
1831 { "(bad)", { { OP_0f07
, 0 } } },
1832 { "(bad)", { { OP_0f07
, 0 } } },
1833 { "(bad)", { { OP_0f07
, 0 } } },
1837 static const struct dis386 prefix_user_table
[][4] = {
1840 { "addps", { XM
, EXx
} },
1841 { "addss", { XM
, EXd
} },
1842 { "addpd", { XM
, EXx
} },
1843 { "addsd", { XM
, EXq
} },
1847 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1848 { "", { XM
, EXx
, OPSIMD
} },
1849 { "", { XM
, EXx
, OPSIMD
} },
1850 { "", { XM
, EXx
, OPSIMD
} },
1854 { "cvtpi2ps", { XM
, EMC
} },
1855 { "cvtsi2ssY", { XM
, Ev
} },
1856 { "cvtpi2pd", { XM
, EMC
} },
1857 { "cvtsi2sdY", { XM
, Ev
} },
1861 { "cvtps2pi", { MXC
, EXx
} },
1862 { "cvtss2siY", { Gv
, EXx
} },
1863 { "cvtpd2pi", { MXC
, EXx
} },
1864 { "cvtsd2siY", { Gv
, EXx
} },
1868 { "cvttps2pi", { MXC
, EXx
} },
1869 { "cvttss2siY", { Gv
, EXx
} },
1870 { "cvttpd2pi", { MXC
, EXx
} },
1871 { "cvttsd2siY", { Gv
, EXx
} },
1875 { "divps", { XM
, EXx
} },
1876 { "divss", { XM
, EXx
} },
1877 { "divpd", { XM
, EXx
} },
1878 { "divsd", { XM
, EXx
} },
1882 { "maxps", { XM
, EXx
} },
1883 { "maxss", { XM
, EXx
} },
1884 { "maxpd", { XM
, EXx
} },
1885 { "maxsd", { XM
, EXx
} },
1889 { "minps", { XM
, EXx
} },
1890 { "minss", { XM
, EXx
} },
1891 { "minpd", { XM
, EXx
} },
1892 { "minsd", { XM
, EXx
} },
1896 { "movups", { XM
, EXx
} },
1897 { "movss", { XM
, EXx
} },
1898 { "movupd", { XM
, EXx
} },
1899 { "movsd", { XM
, EXx
} },
1903 { "movups", { EXx
, XM
} },
1904 { "movss", { EXx
, XM
} },
1905 { "movupd", { EXx
, XM
} },
1906 { "movsd", { EXx
, XM
} },
1910 { "mulps", { XM
, EXx
} },
1911 { "mulss", { XM
, EXx
} },
1912 { "mulpd", { XM
, EXx
} },
1913 { "mulsd", { XM
, EXx
} },
1917 { "rcpps", { XM
, EXx
} },
1918 { "rcpss", { XM
, EXx
} },
1919 { "(bad)", { XM
, EXx
} },
1920 { "(bad)", { XM
, EXx
} },
1924 { "rsqrtps",{ XM
, EXx
} },
1925 { "rsqrtss",{ XM
, EXx
} },
1926 { "(bad)", { XM
, EXx
} },
1927 { "(bad)", { XM
, EXx
} },
1931 { "sqrtps", { XM
, EXx
} },
1932 { "sqrtss", { XM
, EXx
} },
1933 { "sqrtpd", { XM
, EXx
} },
1934 { "sqrtsd", { XM
, EXx
} },
1938 { "subps", { XM
, EXx
} },
1939 { "subss", { XM
, EXx
} },
1940 { "subpd", { XM
, EXx
} },
1941 { "subsd", { XM
, EXx
} },
1945 { "(bad)", { XM
, EXx
} },
1946 { "cvtdq2pd", { XM
, EXq
} },
1947 { "cvttpd2dq", { XM
, EXx
} },
1948 { "cvtpd2dq", { XM
, EXx
} },
1952 { "cvtdq2ps", { XM
, EXx
} },
1953 { "cvttps2dq", { XM
, EXx
} },
1954 { "cvtps2dq", { XM
, EXx
} },
1955 { "(bad)", { XM
, EXx
} },
1959 { "cvtps2pd", { XM
, EXq
} },
1960 { "cvtss2sd", { XM
, EXx
} },
1961 { "cvtpd2ps", { XM
, EXx
} },
1962 { "cvtsd2ss", { XM
, EXx
} },
1966 { "maskmovq", { MX
, MS
} },
1967 { "(bad)", { XM
, EXx
} },
1968 { "maskmovdqu", { XM
, XS
} },
1969 { "(bad)", { XM
, EXx
} },
1973 { "movq", { MX
, EM
} },
1974 { "movdqu", { XM
, EXx
} },
1975 { "movdqa", { XM
, EXx
} },
1976 { "(bad)", { XM
, EXx
} },
1980 { "movq", { EM
, MX
} },
1981 { "movdqu", { EXx
, XM
} },
1982 { "movdqa", { EXx
, XM
} },
1983 { "(bad)", { EXx
, XM
} },
1987 { "(bad)", { EXx
, XM
} },
1988 { "movq2dq",{ XM
, MS
} },
1989 { "movq", { EXx
, XM
} },
1990 { "movdq2q",{ MX
, XS
} },
1994 { "pshufw", { MX
, EM
, Ib
} },
1995 { "pshufhw",{ XM
, EXx
, Ib
} },
1996 { "pshufd", { XM
, EXx
, Ib
} },
1997 { "pshuflw",{ XM
, EXx
, Ib
} },
2001 { "movd", { Edq
, MX
} },
2002 { "movq", { XM
, EXx
} },
2003 { "movd", { Edq
, XM
} },
2004 { "(bad)", { Ed
, XM
} },
2008 { "(bad)", { MX
, EXx
} },
2009 { "(bad)", { XM
, EXx
} },
2010 { "punpckhqdq", { XM
, EXx
} },
2011 { "(bad)", { XM
, EXx
} },
2015 { "movntq", { EM
, MX
} },
2016 { "(bad)", { EM
, XM
} },
2017 { "movntdq",{ EM
, XM
} },
2018 { "(bad)", { EM
, XM
} },
2022 { "(bad)", { MX
, EXx
} },
2023 { "(bad)", { XM
, EXx
} },
2024 { "punpcklqdq", { XM
, EXx
} },
2025 { "(bad)", { XM
, EXx
} },
2029 { "(bad)", { MX
, EXx
} },
2030 { "(bad)", { XM
, EXx
} },
2031 { "addsubpd", { XM
, EXx
} },
2032 { "addsubps", { XM
, EXx
} },
2036 { "(bad)", { MX
, EXx
} },
2037 { "(bad)", { XM
, EXx
} },
2038 { "haddpd", { XM
, EXx
} },
2039 { "haddps", { XM
, EXx
} },
2043 { "(bad)", { MX
, EXx
} },
2044 { "(bad)", { XM
, EXx
} },
2045 { "hsubpd", { XM
, EXx
} },
2046 { "hsubps", { XM
, EXx
} },
2050 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2051 { "movsldup", { XM
, EXx
} },
2052 { "movlpd", { XM
, EXq
} },
2053 { "movddup", { XM
, EXq
} },
2057 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
2058 { "movshdup", { XM
, EXx
} },
2059 { "movhpd", { XM
, EXq
} },
2060 { "(bad)", { XM
, EXq
} },
2064 { "(bad)", { XM
, EXx
} },
2065 { "(bad)", { XM
, EXx
} },
2066 { "(bad)", { XM
, EXx
} },
2067 { "lddqu", { XM
, M
} },
2071 {"movntps", { Ev
, XM
} },
2072 {"movntss", { Ev
, XM
} },
2073 {"movntpd", { Ev
, XM
} },
2074 {"movntsd", { Ev
, XM
} },
2079 {"vmread", { Em
, Gm
} },
2081 {"extrq", { XS
, Ib
, Ib
} },
2082 {"insertq", { XM
, XS
, Ib
, Ib
} },
2087 {"vmwrite", { Gm
, Em
} },
2089 {"extrq", { XM
, XS
} },
2090 {"insertq", { XM
, XS
} },
2095 { "bsrS", { Gv
, Ev
} },
2096 { "lzcntS", { Gv
, Ev
} },
2097 { "bsrS", { Gv
, Ev
} },
2098 { "(bad)", { XX
} },
2103 { "(bad)", { XX
} },
2104 { "popcntS", { Gv
, Ev
} },
2105 { "(bad)", { XX
} },
2106 { "(bad)", { XX
} },
2111 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2112 { "pause", { XX
} },
2113 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2114 { "(bad)", { XX
} },
2119 { "(bad)", { XX
} },
2120 { "(bad)", { XX
} },
2121 { "pblendvb", {XM
, EXx
, XMM0
} },
2122 { "(bad)", { XX
} },
2127 { "(bad)", { XX
} },
2128 { "(bad)", { XX
} },
2129 { "blendvps", {XM
, EXx
, XMM0
} },
2130 { "(bad)", { XX
} },
2135 { "(bad)", { XX
} },
2136 { "(bad)", { XX
} },
2137 { "blendvpd", { XM
, EXx
, XMM0
} },
2138 { "(bad)", { XX
} },
2143 { "(bad)", { XX
} },
2144 { "(bad)", { XX
} },
2145 { "ptest", { XM
, EXx
} },
2146 { "(bad)", { XX
} },
2151 { "(bad)", { XX
} },
2152 { "(bad)", { XX
} },
2153 { "pmovsxbw", { XM
, EXx
} },
2154 { "(bad)", { XX
} },
2159 { "(bad)", { XX
} },
2160 { "(bad)", { XX
} },
2161 { "pmovsxbd", { XM
, EXx
} },
2162 { "(bad)", { XX
} },
2167 { "(bad)", { XX
} },
2168 { "(bad)", { XX
} },
2169 { "pmovsxbq", { XM
, EXx
} },
2170 { "(bad)", { XX
} },
2175 { "(bad)", { XX
} },
2176 { "(bad)", { XX
} },
2177 { "pmovsxwd", { XM
, EXx
} },
2178 { "(bad)", { XX
} },
2183 { "(bad)", { XX
} },
2184 { "(bad)", { XX
} },
2185 { "pmovsxwq", { XM
, EXx
} },
2186 { "(bad)", { XX
} },
2191 { "(bad)", { XX
} },
2192 { "(bad)", { XX
} },
2193 { "pmovsxdq", { XM
, EXx
} },
2194 { "(bad)", { XX
} },
2199 { "(bad)", { XX
} },
2200 { "(bad)", { XX
} },
2201 { "pmuldq", { XM
, EXx
} },
2202 { "(bad)", { XX
} },
2207 { "(bad)", { XX
} },
2208 { "(bad)", { XX
} },
2209 { "pcmpeqq", { XM
, EXx
} },
2210 { "(bad)", { XX
} },
2215 { "(bad)", { XX
} },
2216 { "(bad)", { XX
} },
2217 { "movntdqa", { XM
, EM
} },
2218 { "(bad)", { XX
} },
2223 { "(bad)", { XX
} },
2224 { "(bad)", { XX
} },
2225 { "packusdw", { XM
, EXx
} },
2226 { "(bad)", { XX
} },
2231 { "(bad)", { XX
} },
2232 { "(bad)", { XX
} },
2233 { "pmovzxbw", { XM
, EXx
} },
2234 { "(bad)", { XX
} },
2239 { "(bad)", { XX
} },
2240 { "(bad)", { XX
} },
2241 { "pmovzxbd", { XM
, EXx
} },
2242 { "(bad)", { XX
} },
2247 { "(bad)", { XX
} },
2248 { "(bad)", { XX
} },
2249 { "pmovzxbq", { XM
, EXx
} },
2250 { "(bad)", { XX
} },
2255 { "(bad)", { XX
} },
2256 { "(bad)", { XX
} },
2257 { "pmovzxwd", { XM
, EXx
} },
2258 { "(bad)", { XX
} },
2263 { "(bad)", { XX
} },
2264 { "(bad)", { XX
} },
2265 { "pmovzxwq", { XM
, EXx
} },
2266 { "(bad)", { XX
} },
2271 { "(bad)", { XX
} },
2272 { "(bad)", { XX
} },
2273 { "pmovzxdq", { XM
, EXx
} },
2274 { "(bad)", { XX
} },
2279 { "(bad)", { XX
} },
2280 { "(bad)", { XX
} },
2281 { "pminsb", { XM
, EXx
} },
2282 { "(bad)", { XX
} },
2287 { "(bad)", { XX
} },
2288 { "(bad)", { XX
} },
2289 { "pminsd", { XM
, EXx
} },
2290 { "(bad)", { XX
} },
2295 { "(bad)", { XX
} },
2296 { "(bad)", { XX
} },
2297 { "pminuw", { XM
, EXx
} },
2298 { "(bad)", { XX
} },
2303 { "(bad)", { XX
} },
2304 { "(bad)", { XX
} },
2305 { "pminud", { XM
, EXx
} },
2306 { "(bad)", { XX
} },
2311 { "(bad)", { XX
} },
2312 { "(bad)", { XX
} },
2313 { "pmaxsb", { XM
, EXx
} },
2314 { "(bad)", { XX
} },
2319 { "(bad)", { XX
} },
2320 { "(bad)", { XX
} },
2321 { "pmaxsd", { XM
, EXx
} },
2322 { "(bad)", { XX
} },
2327 { "(bad)", { XX
} },
2328 { "(bad)", { XX
} },
2329 { "pmaxuw", { XM
, EXx
} },
2330 { "(bad)", { XX
} },
2335 { "(bad)", { XX
} },
2336 { "(bad)", { XX
} },
2337 { "pmaxud", { XM
, EXx
} },
2338 { "(bad)", { XX
} },
2343 { "(bad)", { XX
} },
2344 { "(bad)", { XX
} },
2345 { "pmulld", { XM
, EXx
} },
2346 { "(bad)", { XX
} },
2351 { "(bad)", { XX
} },
2352 { "(bad)", { XX
} },
2353 { "phminposuw", { XM
, EXx
} },
2354 { "(bad)", { XX
} },
2359 { "(bad)", { XX
} },
2360 { "(bad)", { XX
} },
2361 { "roundps", { XM
, EXx
, Ib
} },
2362 { "(bad)", { XX
} },
2367 { "(bad)", { XX
} },
2368 { "(bad)", { XX
} },
2369 { "roundpd", { XM
, EXx
, Ib
} },
2370 { "(bad)", { XX
} },
2375 { "(bad)", { XX
} },
2376 { "(bad)", { XX
} },
2377 { "roundss", { XM
, EXx
, Ib
} },
2378 { "(bad)", { XX
} },
2383 { "(bad)", { XX
} },
2384 { "(bad)", { XX
} },
2385 { "roundsd", { XM
, EXx
, Ib
} },
2386 { "(bad)", { XX
} },
2391 { "(bad)", { XX
} },
2392 { "(bad)", { XX
} },
2393 { "blendps", { XM
, EXx
, Ib
} },
2394 { "(bad)", { XX
} },
2399 { "(bad)", { XX
} },
2400 { "(bad)", { XX
} },
2401 { "blendpd", { XM
, EXx
, Ib
} },
2402 { "(bad)", { XX
} },
2407 { "(bad)", { XX
} },
2408 { "(bad)", { XX
} },
2409 { "pblendw", { XM
, EXx
, Ib
} },
2410 { "(bad)", { XX
} },
2415 { "(bad)", { XX
} },
2416 { "(bad)", { XX
} },
2417 { "pextrb", { Edqb
, XM
, Ib
} },
2418 { "(bad)", { XX
} },
2423 { "(bad)", { XX
} },
2424 { "(bad)", { XX
} },
2425 { "pextrw", { Edqw
, XM
, Ib
} },
2426 { "(bad)", { XX
} },
2431 { "(bad)", { XX
} },
2432 { "(bad)", { XX
} },
2433 { "pextrK", { Edq
, XM
, Ib
} },
2434 { "(bad)", { XX
} },
2439 { "(bad)", { XX
} },
2440 { "(bad)", { XX
} },
2441 { "extractps", { Edqd
, XM
, Ib
} },
2442 { "(bad)", { XX
} },
2447 { "(bad)", { XX
} },
2448 { "(bad)", { XX
} },
2449 { "pinsrb", { XM
, Edqb
, Ib
} },
2450 { "(bad)", { XX
} },
2455 { "(bad)", { XX
} },
2456 { "(bad)", { XX
} },
2457 { "insertps", { XM
, EXx
, Ib
} },
2458 { "(bad)", { XX
} },
2463 { "(bad)", { XX
} },
2464 { "(bad)", { XX
} },
2465 { "pinsrK", { XM
, Edq
, Ib
} },
2466 { "(bad)", { XX
} },
2471 { "(bad)", { XX
} },
2472 { "(bad)", { XX
} },
2473 { "dpps", { XM
, EXx
, Ib
} },
2474 { "(bad)", { XX
} },
2479 { "(bad)", { XX
} },
2480 { "(bad)", { XX
} },
2481 { "dppd", { XM
, EXx
, Ib
} },
2482 { "(bad)", { XX
} },
2487 { "(bad)", { XX
} },
2488 { "(bad)", { XX
} },
2489 { "mpsadbw", { XM
, EXx
, Ib
} },
2490 { "(bad)", { XX
} },
2495 { "(bad)", { XX
} },
2496 { "(bad)", { XX
} },
2497 { "pcmpgtq", { XM
, EXx
} },
2498 { "(bad)", { XX
} },
2503 { "(bad)", { XX
} },
2504 { "(bad)", { XX
} },
2505 { "(bad)", { XX
} },
2506 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2511 { "(bad)", { XX
} },
2512 { "(bad)", { XX
} },
2513 { "(bad)", { XX
} },
2514 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2519 { "(bad)", { XX
} },
2520 { "(bad)", { XX
} },
2521 { "pcmpestrm", { XM
, EXx
, Ib
} },
2522 { "(bad)", { XX
} },
2527 { "(bad)", { XX
} },
2528 { "(bad)", { XX
} },
2529 { "pcmpestri", { XM
, EXx
, Ib
} },
2530 { "(bad)", { XX
} },
2535 { "(bad)", { XX
} },
2536 { "(bad)", { XX
} },
2537 { "pcmpistrm", { XM
, EXx
, Ib
} },
2538 { "(bad)", { XX
} },
2543 { "(bad)", { XX
} },
2544 { "(bad)", { XX
} },
2545 { "pcmpistri", { XM
, EXx
, Ib
} },
2546 { "(bad)", { XX
} },
2551 { "ucomiss",{ XM
, EXd
} },
2552 { "(bad)", { XX
} },
2553 { "ucomisd",{ XM
, EXq
} },
2554 { "(bad)", { XX
} },
2559 { "comiss", { XM
, EXd
} },
2560 { "(bad)", { XX
} },
2561 { "comisd", { XM
, EXq
} },
2562 { "(bad)", { XX
} },
2567 { "punpcklbw",{ MX
, EMd
} },
2568 { "(bad)", { XX
} },
2569 { "punpcklbw",{ MX
, EMq
} },
2570 { "(bad)", { XX
} },
2575 { "punpcklwd",{ MX
, EMd
} },
2576 { "(bad)", { XX
} },
2577 { "punpcklwd",{ MX
, EMq
} },
2578 { "(bad)", { XX
} },
2583 { "punpckldq",{ MX
, EMd
} },
2584 { "(bad)", { XX
} },
2585 { "punpckldq",{ MX
, EMq
} },
2586 { "(bad)", { XX
} },
2590 static const struct dis386 x86_64_table
[][2] = {
2592 { "pusha{P|}", { XX
} },
2593 { "(bad)", { XX
} },
2596 { "popa{P|}", { XX
} },
2597 { "(bad)", { XX
} },
2600 { "bound{S|}", { Gv
, Ma
} },
2601 { "(bad)", { XX
} },
2604 { "arpl", { Ew
, Gw
} },
2605 { "movs{||lq|xd}", { Gv
, Ed
} },
2609 static const struct dis386 three_byte_table
[][256] = {
2613 { "pshufb", { MX
, EM
} },
2614 { "phaddw", { MX
, EM
} },
2615 { "phaddd", { MX
, EM
} },
2616 { "phaddsw", { MX
, EM
} },
2617 { "pmaddubsw", { MX
, EM
} },
2618 { "phsubw", { MX
, EM
} },
2619 { "phsubd", { MX
, EM
} },
2620 { "phsubsw", { MX
, EM
} },
2622 { "psignb", { MX
, EM
} },
2623 { "psignw", { MX
, EM
} },
2624 { "psignd", { MX
, EM
} },
2625 { "pmulhrsw", { MX
, EM
} },
2626 { "(bad)", { XX
} },
2627 { "(bad)", { XX
} },
2628 { "(bad)", { XX
} },
2629 { "(bad)", { XX
} },
2632 { "(bad)", { XX
} },
2633 { "(bad)", { XX
} },
2634 { "(bad)", { XX
} },
2637 { "(bad)", { XX
} },
2640 { "(bad)", { XX
} },
2641 { "(bad)", { XX
} },
2642 { "(bad)", { XX
} },
2643 { "(bad)", { XX
} },
2644 { "pabsb", { MX
, EM
} },
2645 { "pabsw", { MX
, EM
} },
2646 { "pabsd", { MX
, EM
} },
2647 { "(bad)", { XX
} },
2655 { "(bad)", { XX
} },
2656 { "(bad)", { XX
} },
2662 { "(bad)", { XX
} },
2663 { "(bad)", { XX
} },
2664 { "(bad)", { XX
} },
2665 { "(bad)", { XX
} },
2673 { "(bad)", { XX
} },
2687 { "(bad)", { XX
} },
2688 { "(bad)", { XX
} },
2689 { "(bad)", { XX
} },
2690 { "(bad)", { XX
} },
2691 { "(bad)", { XX
} },
2692 { "(bad)", { XX
} },
2694 { "(bad)", { XX
} },
2695 { "(bad)", { XX
} },
2696 { "(bad)", { XX
} },
2697 { "(bad)", { XX
} },
2698 { "(bad)", { XX
} },
2699 { "(bad)", { XX
} },
2700 { "(bad)", { XX
} },
2701 { "(bad)", { XX
} },
2703 { "(bad)", { XX
} },
2704 { "(bad)", { XX
} },
2705 { "(bad)", { XX
} },
2706 { "(bad)", { XX
} },
2707 { "(bad)", { XX
} },
2708 { "(bad)", { XX
} },
2709 { "(bad)", { XX
} },
2710 { "(bad)", { XX
} },
2712 { "(bad)", { XX
} },
2713 { "(bad)", { XX
} },
2714 { "(bad)", { XX
} },
2715 { "(bad)", { XX
} },
2716 { "(bad)", { XX
} },
2717 { "(bad)", { XX
} },
2718 { "(bad)", { XX
} },
2719 { "(bad)", { XX
} },
2721 { "(bad)", { XX
} },
2722 { "(bad)", { XX
} },
2723 { "(bad)", { XX
} },
2724 { "(bad)", { XX
} },
2725 { "(bad)", { XX
} },
2726 { "(bad)", { XX
} },
2727 { "(bad)", { XX
} },
2728 { "(bad)", { XX
} },
2730 { "(bad)", { XX
} },
2731 { "(bad)", { XX
} },
2732 { "(bad)", { XX
} },
2733 { "(bad)", { XX
} },
2734 { "(bad)", { XX
} },
2735 { "(bad)", { XX
} },
2736 { "(bad)", { XX
} },
2737 { "(bad)", { XX
} },
2739 { "(bad)", { XX
} },
2740 { "(bad)", { XX
} },
2741 { "(bad)", { XX
} },
2742 { "(bad)", { XX
} },
2743 { "(bad)", { XX
} },
2744 { "(bad)", { XX
} },
2745 { "(bad)", { XX
} },
2746 { "(bad)", { XX
} },
2748 { "(bad)", { XX
} },
2749 { "(bad)", { XX
} },
2750 { "(bad)", { XX
} },
2751 { "(bad)", { XX
} },
2752 { "(bad)", { XX
} },
2753 { "(bad)", { XX
} },
2754 { "(bad)", { XX
} },
2755 { "(bad)", { XX
} },
2757 { "(bad)", { XX
} },
2758 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2760 { "(bad)", { XX
} },
2761 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2763 { "(bad)", { XX
} },
2764 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "(bad)", { XX
} },
2770 { "(bad)", { XX
} },
2771 { "(bad)", { XX
} },
2772 { "(bad)", { XX
} },
2773 { "(bad)", { XX
} },
2775 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "(bad)", { XX
} },
2778 { "(bad)", { XX
} },
2779 { "(bad)", { XX
} },
2780 { "(bad)", { XX
} },
2781 { "(bad)", { XX
} },
2782 { "(bad)", { XX
} },
2784 { "(bad)", { XX
} },
2785 { "(bad)", { XX
} },
2786 { "(bad)", { XX
} },
2787 { "(bad)", { XX
} },
2788 { "(bad)", { XX
} },
2789 { "(bad)", { XX
} },
2790 { "(bad)", { XX
} },
2791 { "(bad)", { XX
} },
2793 { "(bad)", { XX
} },
2794 { "(bad)", { XX
} },
2795 { "(bad)", { XX
} },
2796 { "(bad)", { XX
} },
2797 { "(bad)", { XX
} },
2798 { "(bad)", { XX
} },
2799 { "(bad)", { XX
} },
2800 { "(bad)", { XX
} },
2802 { "(bad)", { XX
} },
2803 { "(bad)", { XX
} },
2804 { "(bad)", { XX
} },
2805 { "(bad)", { XX
} },
2806 { "(bad)", { XX
} },
2807 { "(bad)", { XX
} },
2808 { "(bad)", { XX
} },
2809 { "(bad)", { XX
} },
2811 { "(bad)", { XX
} },
2812 { "(bad)", { XX
} },
2813 { "(bad)", { XX
} },
2814 { "(bad)", { XX
} },
2815 { "(bad)", { XX
} },
2816 { "(bad)", { XX
} },
2817 { "(bad)", { XX
} },
2818 { "(bad)", { XX
} },
2820 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2824 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2827 { "(bad)", { XX
} },
2829 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2833 { "(bad)", { XX
} },
2834 { "(bad)", { XX
} },
2835 { "(bad)", { XX
} },
2836 { "(bad)", { XX
} },
2838 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2842 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2845 { "(bad)", { XX
} },
2847 { "(bad)", { XX
} },
2848 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2851 { "(bad)", { XX
} },
2852 { "(bad)", { XX
} },
2853 { "(bad)", { XX
} },
2854 { "(bad)", { XX
} },
2856 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2860 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2863 { "(bad)", { XX
} },
2865 { "(bad)", { XX
} },
2866 { "(bad)", { XX
} },
2867 { "(bad)", { XX
} },
2868 { "(bad)", { XX
} },
2869 { "(bad)", { XX
} },
2870 { "(bad)", { XX
} },
2871 { "(bad)", { XX
} },
2872 { "(bad)", { XX
} },
2874 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2877 { "(bad)", { XX
} },
2878 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2881 { "(bad)", { XX
} },
2885 { "(bad)", { XX
} },
2886 { "(bad)", { XX
} },
2887 { "(bad)", { XX
} },
2888 { "(bad)", { XX
} },
2889 { "(bad)", { XX
} },
2890 { "(bad)", { XX
} },
2892 { "(bad)", { XX
} },
2893 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2896 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2899 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2905 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2908 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2910 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2920 { "palignr", { MX
, EM
, Ib
} },
2922 { "(bad)", { XX
} },
2923 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2932 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2935 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2937 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2944 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2946 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2953 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2955 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2962 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2964 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2971 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2973 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2980 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2982 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2989 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2991 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2998 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3000 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3007 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3009 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3016 { "(bad)", { XX
} },
3017 { "(bad)", { XX
} },
3018 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3025 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3027 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3034 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3036 { "(bad)", { XX
} },
3037 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3040 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3043 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3045 { "(bad)", { XX
} },
3046 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3049 { "(bad)", { XX
} },
3050 { "(bad)", { XX
} },
3051 { "(bad)", { XX
} },
3052 { "(bad)", { XX
} },
3053 { "(bad)", { XX
} },
3054 { "(bad)", { XX
} },
3055 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3060 { "(bad)", { XX
} },
3061 { "(bad)", { XX
} },
3062 { "(bad)", { XX
} },
3063 { "(bad)", { XX
} },
3064 { "(bad)", { XX
} },
3066 { "(bad)", { XX
} },
3067 { "(bad)", { XX
} },
3068 { "(bad)", { XX
} },
3069 { "(bad)", { XX
} },
3070 { "(bad)", { XX
} },
3071 { "(bad)", { XX
} },
3072 { "(bad)", { XX
} },
3073 { "(bad)", { XX
} },
3075 { "(bad)", { XX
} },
3076 { "(bad)", { XX
} },
3077 { "(bad)", { XX
} },
3078 { "(bad)", { XX
} },
3079 { "(bad)", { XX
} },
3080 { "(bad)", { XX
} },
3081 { "(bad)", { XX
} },
3082 { "(bad)", { XX
} },
3084 { "(bad)", { XX
} },
3085 { "(bad)", { XX
} },
3086 { "(bad)", { XX
} },
3087 { "(bad)", { XX
} },
3088 { "(bad)", { XX
} },
3089 { "(bad)", { XX
} },
3090 { "(bad)", { XX
} },
3091 { "(bad)", { XX
} },
3093 { "(bad)", { XX
} },
3094 { "(bad)", { XX
} },
3095 { "(bad)", { XX
} },
3096 { "(bad)", { XX
} },
3097 { "(bad)", { XX
} },
3098 { "(bad)", { XX
} },
3099 { "(bad)", { XX
} },
3100 { "(bad)", { XX
} },
3102 { "(bad)", { XX
} },
3103 { "(bad)", { XX
} },
3104 { "(bad)", { XX
} },
3105 { "(bad)", { XX
} },
3106 { "(bad)", { XX
} },
3107 { "(bad)", { XX
} },
3108 { "(bad)", { XX
} },
3109 { "(bad)", { XX
} },
3111 { "(bad)", { XX
} },
3112 { "(bad)", { XX
} },
3113 { "(bad)", { XX
} },
3114 { "(bad)", { XX
} },
3115 { "(bad)", { XX
} },
3116 { "(bad)", { XX
} },
3117 { "(bad)", { XX
} },
3118 { "(bad)", { XX
} },
3120 { "(bad)", { XX
} },
3121 { "(bad)", { XX
} },
3122 { "(bad)", { XX
} },
3123 { "(bad)", { XX
} },
3124 { "(bad)", { XX
} },
3125 { "(bad)", { XX
} },
3126 { "(bad)", { XX
} },
3127 { "(bad)", { XX
} },
3129 { "(bad)", { XX
} },
3130 { "(bad)", { XX
} },
3131 { "(bad)", { XX
} },
3132 { "(bad)", { XX
} },
3133 { "(bad)", { XX
} },
3134 { "(bad)", { XX
} },
3135 { "(bad)", { XX
} },
3136 { "(bad)", { XX
} },
3138 { "(bad)", { XX
} },
3139 { "(bad)", { XX
} },
3140 { "(bad)", { XX
} },
3141 { "(bad)", { XX
} },
3142 { "(bad)", { XX
} },
3143 { "(bad)", { XX
} },
3144 { "(bad)", { XX
} },
3145 { "(bad)", { XX
} },
3147 { "(bad)", { XX
} },
3148 { "(bad)", { XX
} },
3149 { "(bad)", { XX
} },
3150 { "(bad)", { XX
} },
3151 { "(bad)", { XX
} },
3152 { "(bad)", { XX
} },
3153 { "(bad)", { XX
} },
3154 { "(bad)", { XX
} },
3156 { "(bad)", { XX
} },
3157 { "(bad)", { XX
} },
3158 { "(bad)", { XX
} },
3159 { "(bad)", { XX
} },
3160 { "(bad)", { XX
} },
3161 { "(bad)", { XX
} },
3162 { "(bad)", { XX
} },
3163 { "(bad)", { XX
} },
3165 { "(bad)", { XX
} },
3166 { "(bad)", { XX
} },
3167 { "(bad)", { XX
} },
3168 { "(bad)", { XX
} },
3169 { "(bad)", { XX
} },
3170 { "(bad)", { XX
} },
3171 { "(bad)", { XX
} },
3172 { "(bad)", { XX
} },
3174 { "(bad)", { XX
} },
3175 { "(bad)", { XX
} },
3176 { "(bad)", { XX
} },
3177 { "(bad)", { XX
} },
3178 { "(bad)", { XX
} },
3179 { "(bad)", { XX
} },
3180 { "(bad)", { XX
} },
3181 { "(bad)", { XX
} },
3183 { "(bad)", { XX
} },
3184 { "(bad)", { XX
} },
3185 { "(bad)", { XX
} },
3186 { "(bad)", { XX
} },
3187 { "(bad)", { XX
} },
3188 { "(bad)", { XX
} },
3189 { "(bad)", { XX
} },
3190 { "(bad)", { XX
} },
3194 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3206 FETCH_DATA (the_info
, codep
+ 1);
3210 /* REX prefixes family. */
3227 if (address_mode
== mode_64bit
)
3233 prefixes
|= PREFIX_REPZ
;
3236 prefixes
|= PREFIX_REPNZ
;
3239 prefixes
|= PREFIX_LOCK
;
3242 prefixes
|= PREFIX_CS
;
3245 prefixes
|= PREFIX_SS
;
3248 prefixes
|= PREFIX_DS
;
3251 prefixes
|= PREFIX_ES
;
3254 prefixes
|= PREFIX_FS
;
3257 prefixes
|= PREFIX_GS
;
3260 prefixes
|= PREFIX_DATA
;
3263 prefixes
|= PREFIX_ADDR
;
3266 /* fwait is really an instruction. If there are prefixes
3267 before the fwait, they belong to the fwait, *not* to the
3268 following instruction. */
3269 if (prefixes
|| rex
)
3271 prefixes
|= PREFIX_FWAIT
;
3275 prefixes
= PREFIX_FWAIT
;
3280 /* Rex is ignored when followed by another prefix. */
3291 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3295 prefix_name (int pref
, int sizeflag
)
3297 static const char *rexes
[16] =
3302 "rex.XB", /* 0x43 */
3304 "rex.RB", /* 0x45 */
3305 "rex.RX", /* 0x46 */
3306 "rex.RXB", /* 0x47 */
3308 "rex.WB", /* 0x49 */
3309 "rex.WX", /* 0x4a */
3310 "rex.WXB", /* 0x4b */
3311 "rex.WR", /* 0x4c */
3312 "rex.WRB", /* 0x4d */
3313 "rex.WRX", /* 0x4e */
3314 "rex.WRXB", /* 0x4f */
3319 /* REX prefixes family. */
3336 return rexes
[pref
- 0x40];
3356 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3358 if (address_mode
== mode_64bit
)
3359 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3361 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3369 static char op_out
[MAX_OPERANDS
][100];
3370 static int op_ad
, op_index
[MAX_OPERANDS
];
3371 static int two_source_ops
;
3372 static bfd_vma op_address
[MAX_OPERANDS
];
3373 static bfd_vma op_riprel
[MAX_OPERANDS
];
3374 static bfd_vma start_pc
;
3377 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3378 * (see topic "Redundant prefixes" in the "Differences from 8086"
3379 * section of the "Virtual 8086 Mode" chapter.)
3380 * 'pc' should be the address of this instruction, it will
3381 * be used to print the target address if this is a relative jump or call
3382 * The function returns the length of this instruction in bytes.
3385 static char intel_syntax
;
3386 static char open_char
;
3387 static char close_char
;
3388 static char separator_char
;
3389 static char scale_char
;
3391 /* Here for backwards compatibility. When gdb stops using
3392 print_insn_i386_att and print_insn_i386_intel these functions can
3393 disappear, and print_insn_i386 be merged into print_insn. */
3395 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
3399 return print_insn (pc
, info
);
3403 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
3407 return print_insn (pc
, info
);
3411 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3415 return print_insn (pc
, info
);
3419 print_i386_disassembler_options (FILE *stream
)
3421 fprintf (stream
, _("\n\
3422 The following i386/x86-64 specific disassembler options are supported for use\n\
3423 with the -M switch (multiple options should be separated by commas):\n"));
3425 fprintf (stream
, _(" x86-64 Disassemble in 64bit mode\n"));
3426 fprintf (stream
, _(" i386 Disassemble in 32bit mode\n"));
3427 fprintf (stream
, _(" i8086 Disassemble in 16bit mode\n"));
3428 fprintf (stream
, _(" att Display instruction in AT&T syntax\n"));
3429 fprintf (stream
, _(" intel Display instruction in Intel syntax\n"));
3430 fprintf (stream
, _(" addr64 Assume 64bit address size\n"));
3431 fprintf (stream
, _(" addr32 Assume 32bit address size\n"));
3432 fprintf (stream
, _(" addr16 Assume 16bit address size\n"));
3433 fprintf (stream
, _(" data32 Assume 32bit data size\n"));
3434 fprintf (stream
, _(" data16 Assume 16bit data size\n"));
3435 fprintf (stream
, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3439 print_insn (bfd_vma pc
, disassemble_info
*info
)
3441 const struct dis386
*dp
;
3443 char *op_txt
[MAX_OPERANDS
];
3445 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
3446 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
3449 struct dis_private priv
;
3452 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3453 || info
->mach
== bfd_mach_x86_64
)
3454 address_mode
= mode_64bit
;
3456 address_mode
= mode_32bit
;
3458 if (intel_syntax
== (char) -1)
3459 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3460 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3462 if (info
->mach
== bfd_mach_i386_i386
3463 || info
->mach
== bfd_mach_x86_64
3464 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3465 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3466 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3467 else if (info
->mach
== bfd_mach_i386_i8086
)
3468 priv
.orig_sizeflag
= 0;
3472 for (p
= info
->disassembler_options
; p
!= NULL
; )
3474 if (CONST_STRNEQ (p
, "x86-64"))
3476 address_mode
= mode_64bit
;
3477 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3479 else if (CONST_STRNEQ (p
, "i386"))
3481 address_mode
= mode_32bit
;
3482 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3484 else if (CONST_STRNEQ (p
, "i8086"))
3486 address_mode
= mode_16bit
;
3487 priv
.orig_sizeflag
= 0;
3489 else if (CONST_STRNEQ (p
, "intel"))
3493 else if (CONST_STRNEQ (p
, "att"))
3497 else if (CONST_STRNEQ (p
, "addr"))
3499 if (address_mode
== mode_64bit
)
3501 if (p
[4] == '3' && p
[5] == '2')
3502 priv
.orig_sizeflag
&= ~AFLAG
;
3503 else if (p
[4] == '6' && p
[5] == '4')
3504 priv
.orig_sizeflag
|= AFLAG
;
3508 if (p
[4] == '1' && p
[5] == '6')
3509 priv
.orig_sizeflag
&= ~AFLAG
;
3510 else if (p
[4] == '3' && p
[5] == '2')
3511 priv
.orig_sizeflag
|= AFLAG
;
3514 else if (CONST_STRNEQ (p
, "data"))
3516 if (p
[4] == '1' && p
[5] == '6')
3517 priv
.orig_sizeflag
&= ~DFLAG
;
3518 else if (p
[4] == '3' && p
[5] == '2')
3519 priv
.orig_sizeflag
|= DFLAG
;
3521 else if (CONST_STRNEQ (p
, "suffix"))
3522 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3524 p
= strchr (p
, ',');
3531 names64
= intel_names64
;
3532 names32
= intel_names32
;
3533 names16
= intel_names16
;
3534 names8
= intel_names8
;
3535 names8rex
= intel_names8rex
;
3536 names_seg
= intel_names_seg
;
3537 index16
= intel_index16
;
3540 separator_char
= '+';
3545 names64
= att_names64
;
3546 names32
= att_names32
;
3547 names16
= att_names16
;
3548 names8
= att_names8
;
3549 names8rex
= att_names8rex
;
3550 names_seg
= att_names_seg
;
3551 index16
= att_index16
;
3554 separator_char
= ',';
3558 /* The output looks better if we put 7 bytes on a line, since that
3559 puts most long word instructions on a single line. */
3560 info
->bytes_per_line
= 7;
3562 info
->private_data
= &priv
;
3563 priv
.max_fetched
= priv
.the_buffer
;
3564 priv
.insn_start
= pc
;
3567 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3575 start_codep
= priv
.the_buffer
;
3576 codep
= priv
.the_buffer
;
3578 if (setjmp (priv
.bailout
) != 0)
3582 /* Getting here means we tried for data but didn't get it. That
3583 means we have an incomplete instruction of some sort. Just
3584 print the first byte as a prefix or a .byte pseudo-op. */
3585 if (codep
> priv
.the_buffer
)
3587 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3589 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3592 /* Just print the first byte as a .byte instruction. */
3593 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3594 (unsigned int) priv
.the_buffer
[0]);
3607 sizeflag
= priv
.orig_sizeflag
;
3609 FETCH_DATA (info
, codep
+ 1);
3610 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3612 if (((prefixes
& PREFIX_FWAIT
)
3613 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3614 || (rex
&& rex_used
))
3618 /* fwait not followed by floating point instruction, or rex followed
3619 by other prefixes. Print the first prefix. */
3620 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3622 name
= INTERNAL_DISASSEMBLER_ERROR
;
3623 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3630 unsigned char threebyte
;
3631 FETCH_DATA (info
, codep
+ 2);
3632 threebyte
= *++codep
;
3633 dp
= &dis386_twobyte
[threebyte
];
3634 need_modrm
= twobyte_has_modrm
[*codep
];
3635 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[*codep
];
3636 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[*codep
];
3637 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[*codep
];
3638 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
3640 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3642 FETCH_DATA (info
, codep
+ 2);
3647 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3648 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3649 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3652 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3653 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3654 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3663 dp
= &dis386
[*codep
];
3664 need_modrm
= onebyte_has_modrm
[*codep
];
3665 uses_DATA_prefix
= 0;
3666 uses_REPNZ_prefix
= 0;
3667 /* pause is 0xf3 0x90. */
3668 uses_REPZ_prefix
= *codep
== 0x90;
3669 uses_LOCK_prefix
= 0;
3673 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3676 used_prefixes
|= PREFIX_REPZ
;
3678 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3681 used_prefixes
|= PREFIX_REPNZ
;
3684 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3687 used_prefixes
|= PREFIX_LOCK
;
3690 if (prefixes
& PREFIX_ADDR
)
3693 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3695 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3696 oappend ("addr32 ");
3698 oappend ("addr16 ");
3699 used_prefixes
|= PREFIX_ADDR
;
3703 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3706 if (dp
->op
[2].bytemode
== cond_jump_mode
3707 && dp
->op
[0].bytemode
== v_mode
3710 if (sizeflag
& DFLAG
)
3711 oappend ("data32 ");
3713 oappend ("data16 ");
3714 used_prefixes
|= PREFIX_DATA
;
3718 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3720 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3721 modrm
.mod
= (*codep
>> 6) & 3;
3722 modrm
.reg
= (*codep
>> 3) & 7;
3723 modrm
.rm
= *codep
& 7;
3725 else if (need_modrm
)
3727 FETCH_DATA (info
, codep
+ 1);
3728 modrm
.mod
= (*codep
>> 6) & 3;
3729 modrm
.reg
= (*codep
>> 3) & 7;
3730 modrm
.rm
= *codep
& 7;
3733 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3740 if (dp
->name
== NULL
)
3742 switch (dp
->op
[0].bytemode
)
3745 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3748 case USE_PREFIX_USER_TABLE
:
3750 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3751 if (prefixes
& PREFIX_REPZ
)
3755 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3756 before PREFIX_DATA. */
3757 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3758 if (prefixes
& PREFIX_REPNZ
)
3762 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3763 if (prefixes
& PREFIX_DATA
)
3767 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3770 case X86_64_SPECIAL
:
3771 index
= address_mode
== mode_64bit
? 1 : 0;
3772 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3776 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3781 if (putop (dp
->name
, sizeflag
) == 0)
3783 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3786 op_ad
= MAX_OPERANDS
- 1 - i
;
3788 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3793 /* See if any prefixes were not used. If so, print the first one
3794 separately. If we don't do this, we'll wind up printing an
3795 instruction stream which does not precisely correspond to the
3796 bytes we are disassembling. */
3797 if ((prefixes
& ~used_prefixes
) != 0)
3801 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3803 name
= INTERNAL_DISASSEMBLER_ERROR
;
3804 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3807 if (rex
& ~rex_used
)
3810 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3812 name
= INTERNAL_DISASSEMBLER_ERROR
;
3813 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3816 obufp
= obuf
+ strlen (obuf
);
3817 for (i
= strlen (obuf
); i
< 6; i
++)
3820 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3822 /* The enter and bound instructions are printed with operands in the same
3823 order as the intel book; everything else is printed in reverse order. */
3824 if (intel_syntax
|| two_source_ops
)
3828 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3829 op_txt
[i
] = op_out
[i
];
3831 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
3833 op_ad
= op_index
[i
];
3834 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
3835 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
3836 riprel
= op_riprel
[i
];
3837 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
3838 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
3843 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3844 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
3848 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3852 (*info
->fprintf_func
) (info
->stream
, ",");
3853 if (op_index
[i
] != -1 && !op_riprel
[i
])
3854 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
3856 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
3860 for (i
= 0; i
< MAX_OPERANDS
; i
++)
3861 if (op_index
[i
] != -1 && op_riprel
[i
])
3863 (*info
->fprintf_func
) (info
->stream
, " # ");
3864 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3865 + op_address
[op_index
[i
]]), info
);
3868 return codep
- priv
.the_buffer
;
3871 static const char *float_mem
[] = {
3946 static const unsigned char float_mem_mode
[] = {
4021 #define ST { OP_ST, 0 }
4022 #define STi { OP_STi, 0 }
4024 #define FGRPd9_2 NULL, { { NULL, 0 } }
4025 #define FGRPd9_4 NULL, { { NULL, 1 } }
4026 #define FGRPd9_5 NULL, { { NULL, 2 } }
4027 #define FGRPd9_6 NULL, { { NULL, 3 } }
4028 #define FGRPd9_7 NULL, { { NULL, 4 } }
4029 #define FGRPda_5 NULL, { { NULL, 5 } }
4030 #define FGRPdb_4 NULL, { { NULL, 6 } }
4031 #define FGRPde_3 NULL, { { NULL, 7 } }
4032 #define FGRPdf_4 NULL, { { NULL, 8 } }
4034 static const struct dis386 float_reg
[][8] = {
4037 { "fadd", { ST
, STi
} },
4038 { "fmul", { ST
, STi
} },
4039 { "fcom", { STi
} },
4040 { "fcomp", { STi
} },
4041 { "fsub", { ST
, STi
} },
4042 { "fsubr", { ST
, STi
} },
4043 { "fdiv", { ST
, STi
} },
4044 { "fdivr", { ST
, STi
} },
4049 { "fxch", { STi
} },
4051 { "(bad)", { XX
} },
4059 { "fcmovb", { ST
, STi
} },
4060 { "fcmove", { ST
, STi
} },
4061 { "fcmovbe",{ ST
, STi
} },
4062 { "fcmovu", { ST
, STi
} },
4063 { "(bad)", { XX
} },
4065 { "(bad)", { XX
} },
4066 { "(bad)", { XX
} },
4070 { "fcmovnb",{ ST
, STi
} },
4071 { "fcmovne",{ ST
, STi
} },
4072 { "fcmovnbe",{ ST
, STi
} },
4073 { "fcmovnu",{ ST
, STi
} },
4075 { "fucomi", { ST
, STi
} },
4076 { "fcomi", { ST
, STi
} },
4077 { "(bad)", { XX
} },
4081 { "fadd", { STi
, ST
} },
4082 { "fmul", { STi
, ST
} },
4083 { "(bad)", { XX
} },
4084 { "(bad)", { XX
} },
4086 { "fsub", { STi
, ST
} },
4087 { "fsubr", { STi
, ST
} },
4088 { "fdiv", { STi
, ST
} },
4089 { "fdivr", { STi
, ST
} },
4091 { "fsubr", { STi
, ST
} },
4092 { "fsub", { STi
, ST
} },
4093 { "fdivr", { STi
, ST
} },
4094 { "fdiv", { STi
, ST
} },
4099 { "ffree", { STi
} },
4100 { "(bad)", { XX
} },
4102 { "fstp", { STi
} },
4103 { "fucom", { STi
} },
4104 { "fucomp", { STi
} },
4105 { "(bad)", { XX
} },
4106 { "(bad)", { XX
} },
4110 { "faddp", { STi
, ST
} },
4111 { "fmulp", { STi
, ST
} },
4112 { "(bad)", { XX
} },
4115 { "fsubp", { STi
, ST
} },
4116 { "fsubrp", { STi
, ST
} },
4117 { "fdivp", { STi
, ST
} },
4118 { "fdivrp", { STi
, ST
} },
4120 { "fsubrp", { STi
, ST
} },
4121 { "fsubp", { STi
, ST
} },
4122 { "fdivrp", { STi
, ST
} },
4123 { "fdivp", { STi
, ST
} },
4128 { "ffreep", { STi
} },
4129 { "(bad)", { XX
} },
4130 { "(bad)", { XX
} },
4131 { "(bad)", { XX
} },
4133 { "fucomip", { ST
, STi
} },
4134 { "fcomip", { ST
, STi
} },
4135 { "(bad)", { XX
} },
4139 static char *fgrps
[][8] = {
4142 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4147 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4152 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4157 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4162 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4167 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4172 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4173 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4178 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4183 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4188 dofloat (int sizeflag
)
4190 const struct dis386
*dp
;
4191 unsigned char floatop
;
4193 floatop
= codep
[-1];
4197 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4199 putop (float_mem
[fp_indx
], sizeflag
);
4202 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4205 /* Skip mod/rm byte. */
4209 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4210 if (dp
->name
== NULL
)
4212 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4214 /* Instruction fnstsw is only one with strange arg. */
4215 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4216 strcpy (op_out
[0], names16
[0]);
4220 putop (dp
->name
, sizeflag
);
4225 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4230 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4235 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4237 oappend ("%st" + intel_syntax
);
4241 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4243 sprintf (scratchbuf
, "%%st(%d)", modrm
.rm
);
4244 oappend (scratchbuf
+ intel_syntax
);
4247 /* Capital letters in template are macros. */
4249 putop (const char *template, int sizeflag
)
4254 for (p
= template; *p
; p
++)
4265 if (address_mode
== mode_64bit
)
4273 /* Alternative not valid. */
4274 strcpy (obuf
, "(bad)");
4278 else if (*p
== '\0')
4299 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4305 if (sizeflag
& SUFFIX_ALWAYS
)
4309 if (intel_syntax
&& !alt
)
4311 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4313 if (sizeflag
& DFLAG
)
4314 *obufp
++ = intel_syntax
? 'd' : 'l';
4316 *obufp
++ = intel_syntax
? 'w' : 's';
4317 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4321 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4328 else if (sizeflag
& DFLAG
)
4329 *obufp
++ = intel_syntax
? 'd' : 'l';
4332 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4337 case 'E': /* For jcxz/jecxz */
4338 if (address_mode
== mode_64bit
)
4340 if (sizeflag
& AFLAG
)
4346 if (sizeflag
& AFLAG
)
4348 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4353 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4355 if (sizeflag
& AFLAG
)
4356 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4358 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4359 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4363 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4365 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4370 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4375 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4376 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4378 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4381 if (prefixes
& PREFIX_DS
)
4402 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4411 if (sizeflag
& SUFFIX_ALWAYS
)
4415 if ((prefixes
& PREFIX_FWAIT
) == 0)
4418 used_prefixes
|= PREFIX_FWAIT
;
4424 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4429 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4434 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4443 if ((prefixes
& PREFIX_DATA
)
4445 || (sizeflag
& SUFFIX_ALWAYS
))
4452 if (sizeflag
& DFLAG
)
4457 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4463 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4465 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4471 if (intel_syntax
&& !alt
)
4474 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4480 if (sizeflag
& DFLAG
)
4481 *obufp
++ = intel_syntax
? 'd' : 'l';
4485 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4492 else if (sizeflag
& DFLAG
)
4501 if (intel_syntax
&& !p
[1]
4502 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4505 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4510 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4512 if (sizeflag
& SUFFIX_ALWAYS
)
4520 if (sizeflag
& SUFFIX_ALWAYS
)
4526 if (sizeflag
& DFLAG
)
4530 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4535 if (prefixes
& PREFIX_DATA
)
4539 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4550 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4552 /* operand size flag for cwtl, cbtw */
4561 else if (sizeflag
& DFLAG
)
4566 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4576 oappend (const char *s
)
4579 obufp
+= strlen (s
);
4585 if (prefixes
& PREFIX_CS
)
4587 used_prefixes
|= PREFIX_CS
;
4588 oappend ("%cs:" + intel_syntax
);
4590 if (prefixes
& PREFIX_DS
)
4592 used_prefixes
|= PREFIX_DS
;
4593 oappend ("%ds:" + intel_syntax
);
4595 if (prefixes
& PREFIX_SS
)
4597 used_prefixes
|= PREFIX_SS
;
4598 oappend ("%ss:" + intel_syntax
);
4600 if (prefixes
& PREFIX_ES
)
4602 used_prefixes
|= PREFIX_ES
;
4603 oappend ("%es:" + intel_syntax
);
4605 if (prefixes
& PREFIX_FS
)
4607 used_prefixes
|= PREFIX_FS
;
4608 oappend ("%fs:" + intel_syntax
);
4610 if (prefixes
& PREFIX_GS
)
4612 used_prefixes
|= PREFIX_GS
;
4613 oappend ("%gs:" + intel_syntax
);
4618 OP_indirE (int bytemode
, int sizeflag
)
4622 OP_E (bytemode
, sizeflag
);
4626 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
4628 if (address_mode
== mode_64bit
)
4636 sprintf_vma (tmp
, disp
);
4637 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4638 strcpy (buf
+ 2, tmp
+ i
);
4642 bfd_signed_vma v
= disp
;
4649 /* Check for possible overflow on 0x8000000000000000. */
4652 strcpy (buf
, "9223372036854775808");
4666 tmp
[28 - i
] = (v
% 10) + '0';
4670 strcpy (buf
, tmp
+ 29 - i
);
4676 sprintf (buf
, "0x%x", (unsigned int) disp
);
4678 sprintf (buf
, "%d", (int) disp
);
4682 /* Put DISP in BUF as signed hex number. */
4685 print_displacement (char *buf
, bfd_vma disp
)
4687 bfd_signed_vma val
= disp
;
4696 /* Check for possible overflow. */
4699 switch (address_mode
)
4702 strcpy (buf
+ j
, "0x8000000000000000");
4705 strcpy (buf
+ j
, "0x80000000");
4708 strcpy (buf
+ j
, "0x8000");
4718 sprintf_vma (tmp
, val
);
4719 for (i
= 0; tmp
[i
] == '0'; i
++)
4723 strcpy (buf
+ j
, tmp
+ i
);
4727 intel_operand_size (int bytemode
, int sizeflag
)
4733 oappend ("BYTE PTR ");
4737 oappend ("WORD PTR ");
4740 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4742 oappend ("QWORD PTR ");
4743 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4751 oappend ("QWORD PTR ");
4752 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4753 oappend ("DWORD PTR ");
4755 oappend ("WORD PTR ");
4756 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4759 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4761 oappend ("WORD PTR ");
4763 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4767 oappend ("DWORD PTR ");
4770 oappend ("QWORD PTR ");
4773 if (address_mode
== mode_64bit
)
4774 oappend ("QWORD PTR ");
4776 oappend ("DWORD PTR ");
4779 if (sizeflag
& DFLAG
)
4780 oappend ("FWORD PTR ");
4782 oappend ("DWORD PTR ");
4783 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4786 oappend ("TBYTE PTR ");
4789 oappend ("XMMWORD PTR ");
4792 oappend ("OWORD PTR ");
4800 OP_E (int bytemode
, int sizeflag
)
4809 /* Skip mod/rm byte. */
4820 oappend (names8rex
[modrm
.rm
+ add
]);
4822 oappend (names8
[modrm
.rm
+ add
]);
4825 oappend (names16
[modrm
.rm
+ add
]);
4828 oappend (names32
[modrm
.rm
+ add
]);
4831 oappend (names64
[modrm
.rm
+ add
]);
4834 if (address_mode
== mode_64bit
)
4835 oappend (names64
[modrm
.rm
+ add
]);
4837 oappend (names32
[modrm
.rm
+ add
]);
4840 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4842 oappend (names64
[modrm
.rm
+ add
]);
4843 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4855 oappend (names64
[modrm
.rm
+ add
]);
4856 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4857 oappend (names32
[modrm
.rm
+ add
]);
4859 oappend (names16
[modrm
.rm
+ add
]);
4860 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4865 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4873 intel_operand_size (bytemode
, sizeflag
);
4876 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4878 /* 32/64 bit address mode */
4893 FETCH_DATA (the_info
, codep
+ 1);
4894 index
= (*codep
>> 3) & 7;
4895 if (address_mode
== mode_64bit
|| index
!= 0x4)
4896 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4897 scale
= (*codep
>> 6) & 3;
4909 if ((base
& 7) == 5)
4912 if (address_mode
== mode_64bit
&& !havesib
)
4918 FETCH_DATA (the_info
, codep
+ 1);
4920 if ((disp
& 0x80) != 0)
4928 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
4931 if (modrm
.mod
!= 0 || (base
& 7) == 5)
4933 if (havedisp
|| riprel
)
4934 print_displacement (scratchbuf
, disp
);
4936 print_operand_value (scratchbuf
, 1, disp
);
4937 oappend (scratchbuf
);
4945 if (havedisp
|| (intel_syntax
&& riprel
))
4947 *obufp
++ = open_char
;
4948 if (intel_syntax
&& riprel
)
4955 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4956 ? names64
[base
] : names32
[base
]);
4961 if (!intel_syntax
|| havebase
)
4963 *obufp
++ = separator_char
;
4966 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
4967 ? names64
[index
] : names32
[index
]);
4969 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
4971 *obufp
++ = scale_char
;
4973 sprintf (scratchbuf
, "%d", 1 << scale
);
4974 oappend (scratchbuf
);
4978 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
4980 if ((bfd_signed_vma
) disp
>= 0)
4985 else if (modrm
.mod
!= 1)
4989 disp
= - (bfd_signed_vma
) disp
;
4992 print_displacement (scratchbuf
, disp
);
4993 oappend (scratchbuf
);
4996 *obufp
++ = close_char
;
4999 else if (intel_syntax
)
5001 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5003 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5004 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5008 oappend (names_seg
[ds_reg
- es_reg
]);
5011 print_operand_value (scratchbuf
, 1, disp
);
5012 oappend (scratchbuf
);
5017 { /* 16 bit address mode */
5024 if ((disp
& 0x8000) != 0)
5029 FETCH_DATA (the_info
, codep
+ 1);
5031 if ((disp
& 0x80) != 0)
5036 if ((disp
& 0x8000) != 0)
5042 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5044 print_displacement (scratchbuf
, disp
);
5045 oappend (scratchbuf
);
5048 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5050 *obufp
++ = open_char
;
5052 oappend (index16
[modrm
.rm
]);
5054 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5056 if ((bfd_signed_vma
) disp
>= 0)
5061 else if (modrm
.mod
!= 1)
5065 disp
= - (bfd_signed_vma
) disp
;
5068 print_displacement (scratchbuf
, disp
);
5069 oappend (scratchbuf
);
5072 *obufp
++ = close_char
;
5075 else if (intel_syntax
)
5077 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5078 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5082 oappend (names_seg
[ds_reg
- es_reg
]);
5085 print_operand_value (scratchbuf
, 1, disp
& 0xffff);
5086 oappend (scratchbuf
);
5092 OP_G (int bytemode
, int sizeflag
)
5103 oappend (names8rex
[modrm
.reg
+ add
]);
5105 oappend (names8
[modrm
.reg
+ add
]);
5108 oappend (names16
[modrm
.reg
+ add
]);
5111 oappend (names32
[modrm
.reg
+ add
]);
5114 oappend (names64
[modrm
.reg
+ add
]);
5123 oappend (names64
[modrm
.reg
+ add
]);
5124 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5125 oappend (names32
[modrm
.reg
+ add
]);
5127 oappend (names16
[modrm
.reg
+ add
]);
5128 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5131 if (address_mode
== mode_64bit
)
5132 oappend (names64
[modrm
.reg
+ add
]);
5134 oappend (names32
[modrm
.reg
+ add
]);
5137 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5150 FETCH_DATA (the_info
, codep
+ 8);
5151 a
= *codep
++ & 0xff;
5152 a
|= (*codep
++ & 0xff) << 8;
5153 a
|= (*codep
++ & 0xff) << 16;
5154 a
|= (*codep
++ & 0xff) << 24;
5155 b
= *codep
++ & 0xff;
5156 b
|= (*codep
++ & 0xff) << 8;
5157 b
|= (*codep
++ & 0xff) << 16;
5158 b
|= (*codep
++ & 0xff) << 24;
5159 x
= a
+ ((bfd_vma
) b
<< 32);
5167 static bfd_signed_vma
5170 bfd_signed_vma x
= 0;
5172 FETCH_DATA (the_info
, codep
+ 4);
5173 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5174 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5175 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5176 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5180 static bfd_signed_vma
5183 bfd_signed_vma x
= 0;
5185 FETCH_DATA (the_info
, codep
+ 4);
5186 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5187 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5188 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5189 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5191 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5201 FETCH_DATA (the_info
, codep
+ 2);
5202 x
= *codep
++ & 0xff;
5203 x
|= (*codep
++ & 0xff) << 8;
5208 set_op (bfd_vma op
, int riprel
)
5210 op_index
[op_ad
] = op_ad
;
5211 if (address_mode
== mode_64bit
)
5213 op_address
[op_ad
] = op
;
5214 op_riprel
[op_ad
] = riprel
;
5218 /* Mask to get a 32-bit address. */
5219 op_address
[op_ad
] = op
& 0xffffffff;
5220 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5225 OP_REG (int code
, int sizeflag
)
5235 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5236 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5237 s
= names16
[code
- ax_reg
+ add
];
5239 case es_reg
: case ss_reg
: case cs_reg
:
5240 case ds_reg
: case fs_reg
: case gs_reg
:
5241 s
= names_seg
[code
- es_reg
+ add
];
5243 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5244 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5247 s
= names8rex
[code
- al_reg
+ add
];
5249 s
= names8
[code
- al_reg
];
5251 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5252 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5253 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5255 s
= names64
[code
- rAX_reg
+ add
];
5258 code
+= eAX_reg
- rAX_reg
;
5260 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5261 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5264 s
= names64
[code
- eAX_reg
+ add
];
5265 else if (sizeflag
& DFLAG
)
5266 s
= names32
[code
- eAX_reg
+ add
];
5268 s
= names16
[code
- eAX_reg
+ add
];
5269 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5272 s
= INTERNAL_DISASSEMBLER_ERROR
;
5279 OP_IMREG (int code
, int sizeflag
)
5291 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5292 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5293 s
= names16
[code
- ax_reg
];
5295 case es_reg
: case ss_reg
: case cs_reg
:
5296 case ds_reg
: case fs_reg
: case gs_reg
:
5297 s
= names_seg
[code
- es_reg
];
5299 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5300 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5303 s
= names8rex
[code
- al_reg
];
5305 s
= names8
[code
- al_reg
];
5307 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5308 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5311 s
= names64
[code
- eAX_reg
];
5312 else if (sizeflag
& DFLAG
)
5313 s
= names32
[code
- eAX_reg
];
5315 s
= names16
[code
- eAX_reg
];
5316 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5319 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5324 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5327 s
= INTERNAL_DISASSEMBLER_ERROR
;
5334 OP_I (int bytemode
, int sizeflag
)
5337 bfd_signed_vma mask
= -1;
5342 FETCH_DATA (the_info
, codep
+ 1);
5347 if (address_mode
== mode_64bit
)
5357 else if (sizeflag
& DFLAG
)
5367 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5378 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5383 scratchbuf
[0] = '$';
5384 print_operand_value (scratchbuf
+ 1, 1, op
);
5385 oappend (scratchbuf
+ intel_syntax
);
5386 scratchbuf
[0] = '\0';
5390 OP_I64 (int bytemode
, int sizeflag
)
5393 bfd_signed_vma mask
= -1;
5395 if (address_mode
!= mode_64bit
)
5397 OP_I (bytemode
, sizeflag
);
5404 FETCH_DATA (the_info
, codep
+ 1);
5412 else if (sizeflag
& DFLAG
)
5422 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5429 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5434 scratchbuf
[0] = '$';
5435 print_operand_value (scratchbuf
+ 1, 1, op
);
5436 oappend (scratchbuf
+ intel_syntax
);
5437 scratchbuf
[0] = '\0';
5441 OP_sI (int bytemode
, int sizeflag
)
5444 bfd_signed_vma mask
= -1;
5449 FETCH_DATA (the_info
, codep
+ 1);
5451 if ((op
& 0x80) != 0)
5459 else if (sizeflag
& DFLAG
)
5468 if ((op
& 0x8000) != 0)
5471 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5476 if ((op
& 0x8000) != 0)
5480 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5484 scratchbuf
[0] = '$';
5485 print_operand_value (scratchbuf
+ 1, 1, op
);
5486 oappend (scratchbuf
+ intel_syntax
);
5490 OP_J (int bytemode
, int sizeflag
)
5494 bfd_vma segment
= 0;
5499 FETCH_DATA (the_info
, codep
+ 1);
5501 if ((disp
& 0x80) != 0)
5505 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5510 if ((disp
& 0x8000) != 0)
5512 /* In 16bit mode, address is wrapped around at 64k within
5513 the same segment. Otherwise, a data16 prefix on a jump
5514 instruction means that the pc is masked to 16 bits after
5515 the displacement is added! */
5517 if ((prefixes
& PREFIX_DATA
) == 0)
5518 segment
= ((start_pc
+ codep
- start_codep
)
5519 & ~((bfd_vma
) 0xffff));
5521 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5524 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5527 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5529 print_operand_value (scratchbuf
, 1, disp
);
5530 oappend (scratchbuf
);
5534 OP_SEG (int bytemode
, int sizeflag
)
5536 if (bytemode
== w_mode
)
5537 oappend (names_seg
[modrm
.reg
]);
5539 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5543 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5547 if (sizeflag
& DFLAG
)
5557 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5559 sprintf (scratchbuf
, "0x%x:0x%x", seg
, offset
);
5561 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
5562 oappend (scratchbuf
);
5566 OP_OFF (int bytemode
, int sizeflag
)
5570 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5571 intel_operand_size (bytemode
, sizeflag
);
5574 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5581 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5582 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5584 oappend (names_seg
[ds_reg
- es_reg
]);
5588 print_operand_value (scratchbuf
, 1, off
);
5589 oappend (scratchbuf
);
5593 OP_OFF64 (int bytemode
, int sizeflag
)
5597 if (address_mode
!= mode_64bit
5598 || (prefixes
& PREFIX_ADDR
))
5600 OP_OFF (bytemode
, sizeflag
);
5604 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5605 intel_operand_size (bytemode
, sizeflag
);
5612 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5613 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5615 oappend (names_seg
[ds_reg
- es_reg
]);
5619 print_operand_value (scratchbuf
, 1, off
);
5620 oappend (scratchbuf
);
5624 ptr_reg (int code
, int sizeflag
)
5628 *obufp
++ = open_char
;
5629 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5630 if (address_mode
== mode_64bit
)
5632 if (!(sizeflag
& AFLAG
))
5633 s
= names32
[code
- eAX_reg
];
5635 s
= names64
[code
- eAX_reg
];
5637 else if (sizeflag
& AFLAG
)
5638 s
= names32
[code
- eAX_reg
];
5640 s
= names16
[code
- eAX_reg
];
5642 *obufp
++ = close_char
;
5647 OP_ESreg (int code
, int sizeflag
)
5653 case 0x6d: /* insw/insl */
5654 intel_operand_size (z_mode
, sizeflag
);
5656 case 0xa5: /* movsw/movsl/movsq */
5657 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5658 case 0xab: /* stosw/stosl */
5659 case 0xaf: /* scasw/scasl */
5660 intel_operand_size (v_mode
, sizeflag
);
5663 intel_operand_size (b_mode
, sizeflag
);
5666 oappend ("%es:" + intel_syntax
);
5667 ptr_reg (code
, sizeflag
);
5671 OP_DSreg (int code
, int sizeflag
)
5677 case 0x6f: /* outsw/outsl */
5678 intel_operand_size (z_mode
, sizeflag
);
5680 case 0xa5: /* movsw/movsl/movsq */
5681 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5682 case 0xad: /* lodsw/lodsl/lodsq */
5683 intel_operand_size (v_mode
, sizeflag
);
5686 intel_operand_size (b_mode
, sizeflag
);
5696 prefixes
|= PREFIX_DS
;
5698 ptr_reg (code
, sizeflag
);
5702 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5710 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5712 used_prefixes
|= PREFIX_LOCK
;
5715 sprintf (scratchbuf
, "%%cr%d", modrm
.reg
+ add
);
5716 oappend (scratchbuf
+ intel_syntax
);
5720 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5727 sprintf (scratchbuf
, "db%d", modrm
.reg
+ add
);
5729 sprintf (scratchbuf
, "%%db%d", modrm
.reg
+ add
);
5730 oappend (scratchbuf
);
5734 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5736 sprintf (scratchbuf
, "%%tr%d", modrm
.reg
);
5737 oappend (scratchbuf
+ intel_syntax
);
5741 OP_R (int bytemode
, int sizeflag
)
5744 OP_E (bytemode
, sizeflag
);
5750 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5752 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5753 if (prefixes
& PREFIX_DATA
)
5759 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5762 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5763 oappend (scratchbuf
+ intel_syntax
);
5767 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5773 sprintf (scratchbuf
, "%%xmm%d", modrm
.reg
+ add
);
5774 oappend (scratchbuf
+ intel_syntax
);
5778 OP_EM (int bytemode
, int sizeflag
)
5782 if (intel_syntax
&& bytemode
== v_mode
)
5784 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5785 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5787 OP_E (bytemode
, sizeflag
);
5791 /* Skip mod/rm byte. */
5794 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5795 if (prefixes
& PREFIX_DATA
)
5802 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5805 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5806 oappend (scratchbuf
+ intel_syntax
);
5809 /* cvt* are the only instructions in sse2 which have
5810 both SSE and MMX operands and also have 0x66 prefix
5811 in their opcode. 0x66 was originally used to differentiate
5812 between SSE and MMX instruction(operands). So we have to handle the
5813 cvt* separately using OP_EMC and OP_MXC */
5815 OP_EMC (int bytemode
, int sizeflag
)
5819 if (intel_syntax
&& bytemode
== v_mode
)
5821 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5822 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5824 OP_E (bytemode
, sizeflag
);
5828 /* Skip mod/rm byte. */
5831 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5832 sprintf (scratchbuf
, "%%mm%d", modrm
.rm
);
5833 oappend (scratchbuf
+ intel_syntax
);
5837 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5839 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5840 sprintf (scratchbuf
, "%%mm%d", modrm
.reg
);
5841 oappend (scratchbuf
+ intel_syntax
);
5845 OP_EX (int bytemode
, int sizeflag
)
5850 OP_E (bytemode
, sizeflag
);
5857 /* Skip mod/rm byte. */
5860 sprintf (scratchbuf
, "%%xmm%d", modrm
.rm
+ add
);
5861 oappend (scratchbuf
+ intel_syntax
);
5865 OP_MS (int bytemode
, int sizeflag
)
5868 OP_EM (bytemode
, sizeflag
);
5874 OP_XS (int bytemode
, int sizeflag
)
5877 OP_EX (bytemode
, sizeflag
);
5883 OP_M (int bytemode
, int sizeflag
)
5886 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5889 OP_E (bytemode
, sizeflag
);
5893 OP_0f07 (int bytemode
, int sizeflag
)
5895 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
5898 OP_E (bytemode
, sizeflag
);
5902 OP_0fae (int bytemode
, int sizeflag
)
5907 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
5909 if (modrm
.reg
< 5 || modrm
.rm
!= 0)
5911 BadOp (); /* bad sfence, mfence, or lfence */
5915 else if (modrm
.reg
!= 7)
5917 BadOp (); /* bad clflush */
5921 OP_E (bytemode
, sizeflag
);
5924 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5925 32bit mode and "xchg %rax,%rax" in 64bit mode. */
5928 NOP_Fixup1 (int bytemode
, int sizeflag
)
5930 if ((prefixes
& PREFIX_DATA
) != 0
5933 && address_mode
== mode_64bit
))
5934 OP_REG (bytemode
, sizeflag
);
5936 strcpy (obuf
, "nop");
5940 NOP_Fixup2 (int bytemode
, int sizeflag
)
5942 if ((prefixes
& PREFIX_DATA
) != 0
5945 && address_mode
== mode_64bit
))
5946 OP_IMREG (bytemode
, sizeflag
);
5949 static const char *const Suffix3DNow
[] = {
5950 /* 00 */ NULL
, NULL
, NULL
, NULL
,
5951 /* 04 */ NULL
, NULL
, NULL
, NULL
,
5952 /* 08 */ NULL
, NULL
, NULL
, NULL
,
5953 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
5954 /* 10 */ NULL
, NULL
, NULL
, NULL
,
5955 /* 14 */ NULL
, NULL
, NULL
, NULL
,
5956 /* 18 */ NULL
, NULL
, NULL
, NULL
,
5957 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
5958 /* 20 */ NULL
, NULL
, NULL
, NULL
,
5959 /* 24 */ NULL
, NULL
, NULL
, NULL
,
5960 /* 28 */ NULL
, NULL
, NULL
, NULL
,
5961 /* 2C */ NULL
, NULL
, NULL
, NULL
,
5962 /* 30 */ NULL
, NULL
, NULL
, NULL
,
5963 /* 34 */ NULL
, NULL
, NULL
, NULL
,
5964 /* 38 */ NULL
, NULL
, NULL
, NULL
,
5965 /* 3C */ NULL
, NULL
, NULL
, NULL
,
5966 /* 40 */ NULL
, NULL
, NULL
, NULL
,
5967 /* 44 */ NULL
, NULL
, NULL
, NULL
,
5968 /* 48 */ NULL
, NULL
, NULL
, NULL
,
5969 /* 4C */ NULL
, NULL
, NULL
, NULL
,
5970 /* 50 */ NULL
, NULL
, NULL
, NULL
,
5971 /* 54 */ NULL
, NULL
, NULL
, NULL
,
5972 /* 58 */ NULL
, NULL
, NULL
, NULL
,
5973 /* 5C */ NULL
, NULL
, NULL
, NULL
,
5974 /* 60 */ NULL
, NULL
, NULL
, NULL
,
5975 /* 64 */ NULL
, NULL
, NULL
, NULL
,
5976 /* 68 */ NULL
, NULL
, NULL
, NULL
,
5977 /* 6C */ NULL
, NULL
, NULL
, NULL
,
5978 /* 70 */ NULL
, NULL
, NULL
, NULL
,
5979 /* 74 */ NULL
, NULL
, NULL
, NULL
,
5980 /* 78 */ NULL
, NULL
, NULL
, NULL
,
5981 /* 7C */ NULL
, NULL
, NULL
, NULL
,
5982 /* 80 */ NULL
, NULL
, NULL
, NULL
,
5983 /* 84 */ NULL
, NULL
, NULL
, NULL
,
5984 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
5985 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
5986 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
5987 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
5988 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
5989 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
5990 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
5991 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
5992 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
5993 /* AC */ NULL
, NULL
, "pfacc", NULL
,
5994 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
5995 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
5996 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
5997 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
5998 /* C0 */ NULL
, NULL
, NULL
, NULL
,
5999 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6000 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6001 /* CC */ NULL
, NULL
, NULL
, NULL
,
6002 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6003 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6004 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6005 /* DC */ NULL
, NULL
, NULL
, NULL
,
6006 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6007 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6008 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6009 /* EC */ NULL
, NULL
, NULL
, NULL
,
6010 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6011 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6012 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6013 /* FC */ NULL
, NULL
, NULL
, NULL
,
6017 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6019 const char *mnemonic
;
6021 FETCH_DATA (the_info
, codep
+ 1);
6022 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6023 place where an 8-bit immediate would normally go. ie. the last
6024 byte of the instruction. */
6025 obufp
= obuf
+ strlen (obuf
);
6026 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6031 /* Since a variable sized modrm/sib chunk is between the start
6032 of the opcode (0x0f0f) and the opcode suffix, we need to do
6033 all the modrm processing first, and don't know until now that
6034 we have a bad opcode. This necessitates some cleaning up. */
6035 op_out
[0][0] = '\0';
6036 op_out
[1][0] = '\0';
6041 static const char *simd_cmp_op
[] = {
6053 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6055 unsigned int cmp_type
;
6057 FETCH_DATA (the_info
, codep
+ 1);
6058 obufp
= obuf
+ strlen (obuf
);
6059 cmp_type
= *codep
++ & 0xff;
6062 char suffix1
= 'p', suffix2
= 's';
6063 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6064 if (prefixes
& PREFIX_REPZ
)
6068 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6069 if (prefixes
& PREFIX_DATA
)
6073 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6074 if (prefixes
& PREFIX_REPNZ
)
6075 suffix1
= 's', suffix2
= 'd';
6078 sprintf (scratchbuf
, "cmp%s%c%c",
6079 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6080 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6081 oappend (scratchbuf
);
6085 /* We have a bad extension byte. Clean up. */
6086 op_out
[0][0] = '\0';
6087 op_out
[1][0] = '\0';
6093 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6095 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6096 forms of these instructions. */
6099 char *p
= obuf
+ strlen (obuf
);
6102 *(p
- 1) = *(p
- 2);
6103 *(p
- 2) = *(p
- 3);
6104 *(p
- 3) = extrachar
;
6109 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6111 if (modrm
.mod
== 3 && modrm
.reg
== 1 && modrm
.rm
<= 1)
6113 /* Override "sidt". */
6114 size_t olen
= strlen (obuf
);
6115 char *p
= obuf
+ olen
- 4;
6116 const char **names
= (address_mode
== mode_64bit
6117 ? names64
: names32
);
6119 /* We might have a suffix when disassembling with -Msuffix. */
6123 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6125 && (prefixes
& PREFIX_ADDR
)
6128 && CONST_STRNEQ (p
- 7, "addr")
6129 && (CONST_STRNEQ (p
- 3, "16")
6130 || CONST_STRNEQ (p
- 3, "32")))
6135 /* mwait %eax,%ecx */
6136 strcpy (p
, "mwait");
6138 strcpy (op_out
[0], names
[0]);
6142 /* monitor %eax,%ecx,%edx" */
6143 strcpy (p
, "monitor");
6146 const char **op1_names
;
6147 if (!(prefixes
& PREFIX_ADDR
))
6148 op1_names
= (address_mode
== mode_16bit
6152 op1_names
= (address_mode
!= mode_32bit
6153 ? names32
: names16
);
6154 used_prefixes
|= PREFIX_ADDR
;
6156 strcpy (op_out
[0], op1_names
[0]);
6157 strcpy (op_out
[2], names
[2]);
6162 strcpy (op_out
[1], names
[1]);
6173 SVME_Fixup (int bytemode
, int sizeflag
)
6205 OP_M (bytemode
, sizeflag
);
6208 /* Override "lidt". */
6209 p
= obuf
+ strlen (obuf
) - 4;
6210 /* We might have a suffix. */
6214 if (!(prefixes
& PREFIX_ADDR
))
6219 used_prefixes
|= PREFIX_ADDR
;
6223 strcpy (op_out
[1], names32
[1]);
6229 *obufp
++ = open_char
;
6230 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6234 strcpy (obufp
, alt
);
6235 obufp
+= strlen (alt
);
6236 *obufp
++ = close_char
;
6243 INVLPG_Fixup (int bytemode
, int sizeflag
)
6256 OP_M (bytemode
, sizeflag
);
6259 /* Override "invlpg". */
6260 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6267 /* Throw away prefixes and 1st. opcode byte. */
6268 codep
= insn_codep
+ 1;
6273 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6280 /* Override "sgdt". */
6281 char *p
= obuf
+ strlen (obuf
) - 4;
6283 /* We might have a suffix when disassembling with -Msuffix. */
6290 strcpy (p
, "vmcall");
6293 strcpy (p
, "vmlaunch");
6296 strcpy (p
, "vmresume");
6299 strcpy (p
, "vmxoff");
6310 OP_VMX (int bytemode
, int sizeflag
)
6312 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
6313 if (prefixes
& PREFIX_DATA
)
6314 strcpy (obuf
, "vmclear");
6315 else if (prefixes
& PREFIX_REPZ
)
6316 strcpy (obuf
, "vmxon");
6318 strcpy (obuf
, "vmptrld");
6319 OP_E (bytemode
, sizeflag
);
6323 REP_Fixup (int bytemode
, int sizeflag
)
6325 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6329 if (prefixes
& PREFIX_REPZ
)
6330 switch (*insn_codep
)
6332 case 0x6e: /* outsb */
6333 case 0x6f: /* outsw/outsl */
6334 case 0xa4: /* movsb */
6335 case 0xa5: /* movsw/movsl/movsq */
6341 case 0xaa: /* stosb */
6342 case 0xab: /* stosw/stosl/stosq */
6343 case 0xac: /* lodsb */
6344 case 0xad: /* lodsw/lodsl/lodsq */
6345 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
6350 case 0x6c: /* insb */
6351 case 0x6d: /* insl/insw */
6367 olen
= strlen (obuf
);
6368 p
= obuf
+ olen
- ilen
- 1 - 4;
6369 /* Handle "repz [addr16|addr32]". */
6370 if ((prefixes
& PREFIX_ADDR
))
6373 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
6381 OP_IMREG (bytemode
, sizeflag
);
6384 OP_ESreg (bytemode
, sizeflag
);
6387 OP_DSreg (bytemode
, sizeflag
);
6396 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6401 /* Change cmpxchg8b to cmpxchg16b. */
6402 char *p
= obuf
+ strlen (obuf
) - 2;
6406 OP_M (bytemode
, sizeflag
);
6410 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6412 sprintf (scratchbuf
, "%%xmm%d", reg
);
6413 oappend (scratchbuf
+ intel_syntax
);
6417 CRC32_Fixup (int bytemode
, int sizeflag
)
6419 /* Add proper suffix to "crc32". */
6420 char *p
= obuf
+ strlen (obuf
);
6437 else if (sizeflag
& DFLAG
)
6441 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6444 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6453 /* Skip mod/rm byte. */
6458 add
= (rex
& REX_B
) ? 8 : 0;
6459 if (bytemode
== b_mode
)
6463 oappend (names8rex
[modrm
.rm
+ add
]);
6465 oappend (names8
[modrm
.rm
+ add
]);
6471 oappend (names64
[modrm
.rm
+ add
]);
6472 else if ((prefixes
& PREFIX_DATA
))
6473 oappend (names16
[modrm
.rm
+ add
]);
6475 oappend (names32
[modrm
.rm
+ add
]);
6479 OP_E (bytemode
, sizeflag
);