opcodes/i960-dis.c

   1 /* Disassemble i80960 instructions.
   2    Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2003
   3    Free Software Foundation, Inc.
   4
   5 This program is free software; you can redistribute it and/or modify
   6 it under the terms of the GNU General Public License as published by
   7 the Free Software Foundation; either version 2, or (at your option)
   8 any later version.
   9
  10 This program is distributed in the hope that it will be useful,
  11 but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 GNU General Public License for more details.
  14
  15 You should have received a copy of the GNU General Public License
  16 along with this program; see the file COPYING.  If not, write to the
  17 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
  18 02110-1301, USA.  */
  19
  20 #include "sysdep.h"
  21 #include "dis-asm.h"
  22
  23 static const char *const reg_names[] = {
  24 /*  0 */        "pfp", "sp",  "rip", "r3",  "r4",  "r5",  "r6",  "r7",
  25 /*  8 */        "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
  26 /* 16 */        "g0",  "g1",  "g2",  "g3",  "g4",  "g5",  "g6",  "g7",
  27 /* 24 */        "g8",  "g9",  "g10", "g11", "g12", "g13", "g14", "fp",
  28 /* 32 */        "pc",  "ac",  "ip",  "tc",  "fp0", "fp1", "fp2", "fp3"
  29 };
  30
  31
  32 static FILE *stream;            /* Output goes here */
  33 static struct disassemble_info *info;
  34 static void print_addr (bfd_vma);
  35 static void ctrl (bfd_vma, unsigned long, unsigned long);
  36 static void cobr (bfd_vma, unsigned long, unsigned long);
  37 static void reg (unsigned long);
  38 static int mem (bfd_vma, unsigned long, unsigned long, int);
  39 static void ea (bfd_vma, int, const char *, const char *, int, unsigned int);
  40 static void dstop (int, int, int);
  41 static void regop (int, int, int, int);
  42 static void invalid (int);
  43 static int pinsn (bfd_vma, unsigned long, unsigned long);
  44 static void put_abs (unsigned long, unsigned long);
  45
  46
  47 /* Print the i960 instruction at address 'memaddr' in debugged memory,
  48    on INFO->STREAM.  Returns length of the instruction, in bytes.  */
  49
  50 int
  51 print_insn_i960 (bfd_vma memaddr, struct disassemble_info *info_arg)
  52 {
  53   unsigned int word1, word2 = 0xdeadbeef;
  54   bfd_byte buffer[8];
  55   int status;
  56
  57   info = info_arg;
  58   stream = info->stream;
  59
  60   /* Read word1.  Only read word2 if the instruction
  61      needs it, to prevent reading past the end of a section.  */
  62
  63   status = (*info->read_memory_func) (memaddr, (bfd_byte *) buffer, 4, info);
  64   if (status != 0)
  65     {
  66       (*info->memory_error_func) (status, memaddr, info);
  67       return -1;
  68     }
  69
  70   word1 = bfd_getl32 (buffer);
  71
  72   /* Divide instruction set into classes based on high 4 bits of opcode.  */
  73   switch ( (word1 >> 28) & 0xf )
  74     {
  75     default:
  76       break;
  77     case 0x8:
  78     case 0x9:
  79     case 0xa:
  80     case 0xb:
  81     case 0xc:
  82       /* Read word2.  */
  83       status = (*info->read_memory_func)
  84         (memaddr + 4, (bfd_byte *) (buffer + 4), 4, info);
  85       if (status != 0)
  86         {
  87           (*info->memory_error_func) (status, memaddr, info);
  88           return -1;
  89         }
  90       word2 = bfd_getl32 (buffer + 4);
  91       break;
  92     }
  93
  94   return pinsn( memaddr, word1, word2 );
  95 }
  96 \f
  97 #define IN_GDB
  98
  99 /*****************************************************************************
 100  *      All code below this point should be identical with that of
 101  *      the disassembler in gdmp960.
 102
 103  A noble sentiment, but at least in cosmetic ways (info->fprintf_func), it
 104  just ain't so. -kingdon, 31 Mar 93
 105  *****************************************************************************/
 106
 107 struct tabent {
 108   char *name;
 109   short numops;
 110 };
 111
 112 struct sparse_tabent {
 113   int opcode;
 114   char *name;
 115   short numops;
 116 };
 117
 118 static int
 119 pinsn (bfd_vma memaddr, unsigned long word1, unsigned long word2)
 120 {
 121   int instr_len;
 122
 123   instr_len = 4;
 124   put_abs (word1, word2);
 125
 126   /* Divide instruction set into classes based on high 4 bits of opcode.  */
 127   switch ((word1 >> 28) & 0xf)
 128     {
 129     case 0x0:
 130     case 0x1:
 131       ctrl (memaddr, word1, word2);
 132       break;
 133     case 0x2:
 134     case 0x3:
 135       cobr (memaddr, word1, word2);
 136       break;
 137     case 0x5:
 138     case 0x6:
 139     case 0x7:
 140       reg (word1);
 141       break;
 142     case 0x8:
 143     case 0x9:
 144     case 0xa:
 145     case 0xb:
 146     case 0xc:
 147       instr_len = mem (memaddr, word1, word2, 0);
 148       break;
 149     default:
 150       /* Invalid instruction, print as data word.  */
 151       invalid (word1);
 152       break;
 153     }
 154   return instr_len;
 155 }
 156
 157 /* CTRL format.. */
 158
 159 static void
 160 ctrl (bfd_vma memaddr, unsigned long word1, unsigned long word2 ATTRIBUTE_UNUSED)
 161 {
 162   int i;
 163   static const struct tabent ctrl_tab[] = {
 164     { NULL,             0, },   /* 0x00 */
 165     { NULL,             0, },   /* 0x01 */
 166     { NULL,             0, },   /* 0x02 */
 167     { NULL,             0, },   /* 0x03 */
 168     { NULL,             0, },   /* 0x04 */
 169     { NULL,             0, },   /* 0x05 */
 170     { NULL,             0, },   /* 0x06 */
 171     { NULL,             0, },   /* 0x07 */
 172     { "b",              1, },   /* 0x08 */
 173     { "call",           1, },   /* 0x09 */
 174     { "ret",            0, },   /* 0x0a */
 175     { "bal",            1, },   /* 0x0b */
 176     { NULL,             0, },   /* 0x0c */
 177     { NULL,             0, },   /* 0x0d */
 178     { NULL,             0, },   /* 0x0e */
 179     { NULL,             0, },   /* 0x0f */
 180     { "bno",            1, },   /* 0x10 */
 181     { "bg",             1, },   /* 0x11 */
 182     { "be",             1, },   /* 0x12 */
 183     { "bge",            1, },   /* 0x13 */
 184     { "bl",             1, },   /* 0x14 */
 185     { "bne",            1, },   /* 0x15 */
 186     { "ble",            1, },   /* 0x16 */
 187     { "bo",             1, },   /* 0x17 */
 188     { "faultno",        0, },   /* 0x18 */
 189     { "faultg",         0, },   /* 0x19 */
 190     { "faulte",         0, },   /* 0x1a */
 191     { "faultge",        0, },   /* 0x1b */
 192     { "faultl",         0, },   /* 0x1c */
 193     { "faultne",        0, },   /* 0x1d */
 194     { "faultle",        0, },   /* 0x1e */
 195     { "faulto",         0, },   /* 0x1f */
 196   };
 197
 198   i = (word1 >> 24) & 0xff;
 199   if ((ctrl_tab[i].name == NULL) || ((word1 & 1) != 0))
 200     {
 201       invalid (word1);
 202       return;
 203     }
 204
 205   (*info->fprintf_func) (stream, ctrl_tab[i].name);
 206   if (word1 & 2)
 207     /* Predicts branch not taken.  */
 208     (*info->fprintf_func) (stream, ".f");
 209
 210   if (ctrl_tab[i].numops == 1)
 211     {
 212       /* Extract displacement and convert to address.  */
 213       word1 &= 0x00ffffff;
 214
 215       if (word1 & 0x00800000)
 216         {
 217           /* Sign bit is set.  */
 218           word1 |= (-1 & ~0xffffff);    /* Sign extend.  */
 219         }
 220
 221       (*info->fprintf_func) (stream, "\t");
 222       print_addr (word1 + memaddr);
 223     }
 224 }
 225
 226 /* COBR format.  */
 227
 228 static void
 229 cobr (bfd_vma memaddr, unsigned long word1, unsigned long word2 ATTRIBUTE_UNUSED)
 230 {
 231   int src1;
 232   int src2;
 233   int i;
 234
 235   static const struct tabent cobr_tab[] = {
 236     { "testno", 1, },   /* 0x20 */
 237     { "testg",  1, },   /* 0x21 */
 238     { "teste",  1, },   /* 0x22 */
 239     { "testge", 1, },   /* 0x23 */
 240     { "testl",  1, },   /* 0x24 */
 241     { "testne", 1, },   /* 0x25 */
 242     { "testle", 1, },   /* 0x26 */
 243     { "testo",  1, },   /* 0x27 */
 244     { NULL,     0, },   /* 0x28 */
 245     { NULL,     0, },   /* 0x29 */
 246     { NULL,     0, },   /* 0x2a */
 247     { NULL,     0, },   /* 0x2b */
 248     { NULL,     0, },   /* 0x2c */
 249     { NULL,     0, },   /* 0x2d */
 250     { NULL,     0, },   /* 0x2e */
 251     { NULL,     0, },   /* 0x2f */
 252     { "bbc",    3, },   /* 0x30 */
 253     { "cmpobg", 3, },   /* 0x31 */
 254     { "cmpobe", 3, },   /* 0x32 */
 255     { "cmpobge",3, },   /* 0x33 */
 256     { "cmpobl", 3, },   /* 0x34 */
 257     { "cmpobne",3, },   /* 0x35 */
 258     { "cmpoble",3, },   /* 0x36 */
 259     { "bbs",    3, },   /* 0x37 */
 260     { "cmpibno",3, },   /* 0x38 */
 261     { "cmpibg", 3, },   /* 0x39 */
 262     { "cmpibe", 3, },   /* 0x3a */
 263     { "cmpibge",3, },   /* 0x3b */
 264     { "cmpibl", 3, },   /* 0x3c */
 265     { "cmpibne",3, },   /* 0x3d */
 266     { "cmpible",3, },   /* 0x3e */
 267     { "cmpibo", 3, },   /* 0x3f */
 268   };
 269
 270   i = ((word1 >> 24) & 0xff) - 0x20;
 271   if (cobr_tab[i].name == NULL)
 272     {
 273       invalid (word1);
 274       return;
 275     }
 276
 277   (*info->fprintf_func) (stream, cobr_tab[i].name);
 278
 279   /* Predicts branch not taken.  */
 280   if (word1 & 2)
 281     (*info->fprintf_func) (stream, ".f");
 282
 283   (*info->fprintf_func) (stream, "\t");
 284
 285   src1 = (word1 >> 19) & 0x1f;
 286   src2 = (word1 >> 14) & 0x1f;
 287
 288   if (word1 & 0x02000)
 289     /* M1 is 1 */
 290     (*info->fprintf_func) (stream, "%d", src1);
 291   else
 292     (*info->fprintf_func) (stream, reg_names[src1]);
 293
 294   if (cobr_tab[i].numops > 1)
 295     {
 296       if (word1 & 1)
 297         /* S2 is 1.  */
 298         (*info->fprintf_func) (stream, ",sf%d,", src2);
 299       else
 300         /* S1 is 0.  */
 301         (*info->fprintf_func) (stream, ",%s,", reg_names[src2]);
 302
 303       /* Extract displacement and convert to address.  */
 304       word1 &= 0x00001ffc;
 305       if (word1 & 0x00001000)
 306         /* Negative displacement.  */
 307         word1 |= (-1 & ~0x1fff);        /* Sign extend.  */
 308
 309       print_addr (memaddr + word1);
 310     }
 311 }
 312
 313 /* MEM format.  */
 314 /* Returns instruction length: 4 or 8.  */
 315
 316 static int
 317 mem (bfd_vma memaddr, unsigned long word1, unsigned long word2, int noprint)
 318 {
 319   int i, j;
 320   int len;
 321   int mode;
 322   int offset;
 323   const char *reg1, *reg2, *reg3;
 324
 325   /* This lookup table is too sparse to make it worth typing in, but not
 326      so large as to make a sparse array necessary.  We create the table
 327      at runtime.  */
 328
 329   /* NOTE: In this table, the meaning of 'numops' is:
 330       1: single operand
 331       2: 2 operands, load instruction
 332      -2: 2 operands, store instruction.  */
 333   static struct tabent *mem_tab;
 334   /* Opcodes of 0x8X, 9X, aX, bX, and cX must be in the table.  */
 335 #define MEM_MIN 0x80
 336 #define MEM_MAX 0xcf
 337 #define MEM_SIZ ( * sizeof(struct tabent))
 338
 339   static const struct sparse_tabent mem_init[] = {
 340     { 0x80,     "ldob",  2 },
 341     { 0x82,     "stob", -2 },
 342     { 0x84,     "bx",    1 },
 343     { 0x85,     "balx",  2 },
 344     { 0x86,     "callx", 1 },
 345     { 0x88,     "ldos",  2 },
 346     { 0x8a,     "stos", -2 },
 347     { 0x8c,     "lda",   2 },
 348     { 0x90,     "ld",    2 },
 349     { 0x92,     "st",   -2 },
 350     { 0x98,     "ldl",   2 },
 351     { 0x9a,     "stl",  -2 },
 352     { 0xa0,     "ldt",   2 },
 353     { 0xa2,     "stt",  -2 },
 354     { 0xac,     "dcinva", 1 },
 355     { 0xb0,     "ldq",   2 },
 356     { 0xb2,     "stq",  -2 },
 357     { 0xc0,     "ldib",  2 },
 358     { 0xc2,     "stib", -2 },
 359     { 0xc8,     "ldis",  2 },
 360     { 0xca,     "stis", -2 },
 361     { 0,        NULL,   0 }
 362   };
 363   static struct tabent mem_tab_buf[MEM_MAX - MEM_MIN + 1];
 364
 365   if (mem_tab == NULL)
 366     {
 367       mem_tab = mem_tab_buf;
 368
 369       for (i = 0; mem_init[i].opcode != 0; i++)
 370         {
 371           j = mem_init[i].opcode - MEM_MIN;
 372           mem_tab[j].name = mem_init[i].name;
 373           mem_tab[j].numops = mem_init[i].numops;
 374         }
 375     }
 376
 377   i = ((word1 >> 24) & 0xff) - MEM_MIN;
 378   mode = (word1 >> 10) & 0xf;
 379
 380   if ((mem_tab[i].name != NULL)         /* Valid instruction */
 381       && ((mode == 5) || (mode >= 12)))
 382     /* With 32-bit displacement.  */
 383     len = 8;
 384   else
 385     len = 4;
 386
 387   if (noprint)
 388     return len;
 389
 390   if ((mem_tab[i].name == NULL) || (mode == 6))
 391     {
 392       invalid (word1);
 393       return len;
 394     }
 395
 396   (*info->fprintf_func) (stream, "%s\t", mem_tab[i].name);
 397
 398   reg1 = reg_names[ (word1 >> 19) & 0x1f ];     /* MEMB only */
 399   reg2 = reg_names[ (word1 >> 14) & 0x1f ];
 400   reg3 = reg_names[ word1 & 0x1f ];             /* MEMB only */
 401   offset = word1 & 0xfff;                               /* MEMA only  */
 402
 403   switch (mem_tab[i].numops)
 404     {
 405     case 2: /* LOAD INSTRUCTION */
 406       if (mode & 4)
 407         {                       /* MEMB FORMAT */
 408           ea (memaddr, mode, reg2, reg3, word1, word2);
 409           (*info->fprintf_func) (stream, ",%s", reg1);
 410         }
 411       else
 412         {                               /* MEMA FORMAT */
 413           (*info->fprintf_func) (stream, "0x%x", (unsigned) offset);
 414
 415           if (mode & 8)
 416             (*info->fprintf_func) (stream, "(%s)", reg2);
 417
 418           (*info->fprintf_func)(stream, ",%s", reg1);
 419         }
 420       break;
 421
 422     case -2: /* STORE INSTRUCTION */
 423       if (mode & 4)
 424         {
 425           /* MEMB FORMAT */
 426           (*info->fprintf_func) (stream, "%s,", reg1);
 427           ea (memaddr, mode, reg2, reg3, word1, word2);
 428         }
 429       else
 430         {
 431           /* MEMA FORMAT */
 432           (*info->fprintf_func) (stream, "%s,0x%x", reg1, (unsigned) offset);
 433
 434           if (mode & 8)
 435             (*info->fprintf_func) (stream, "(%s)", reg2);
 436         }
 437       break;
 438
 439     case 1: /* BX/CALLX INSTRUCTION */
 440       if (mode & 4)
 441         {
 442           /* MEMB FORMAT */
 443           ea (memaddr, mode, reg2, reg3, word1, word2);
 444         }
 445       else
 446         {
 447           /* MEMA FORMAT */
 448           (*info->fprintf_func) (stream, "0x%x", (unsigned) offset);
 449           if (mode & 8)
 450             (*info->fprintf_func) (stream, "(%s)", reg2);
 451         }
 452       break;
 453     }
 454
 455   return len;
 456 }
 457
 458 /* REG format.  */
 459
 460 static void
 461 reg (unsigned long word1)
 462 {
 463   int i, j;
 464   int opcode;
 465   int fp;
 466   int m1, m2, m3;
 467   int s1, s2;
 468   int src, src2, dst;
 469   char *mnemp;
 470
 471   /* This lookup table is too sparse to make it worth typing in, but not
 472      so large as to make a sparse array necessary.  We create the table
 473      at runtime.  */
 474
 475   /* NOTE: In this table, the meaning of 'numops' is:
 476          1: single operand, which is NOT a destination.
 477         -1: single operand, which IS a destination.
 478          2: 2 operands, the 2nd of which is NOT a destination.
 479         -2: 2 operands, the 2nd of which IS a destination.
 480          3: 3 operands
 481
 482         If an opcode mnemonic begins with "F", it is a floating-point
 483         opcode (the "F" is not printed).  */
 484
 485   static struct tabent *reg_tab;
 486   static const struct sparse_tabent reg_init[] =
 487   {
 488 #define REG_MIN 0x580
 489     { 0x580,    "notbit",       3 },
 490     { 0x581,    "and",          3 },
 491     { 0x582,    "andnot",       3 },
 492     { 0x583,    "setbit",       3 },
 493     { 0x584,    "notand",       3 },
 494     { 0x586,    "xor",          3 },
 495     { 0x587,    "or",           3 },
 496     { 0x588,    "nor",          3 },
 497     { 0x589,    "xnor",         3 },
 498     { 0x58a,    "not",          -2 },
 499     { 0x58b,    "ornot",        3 },
 500     { 0x58c,    "clrbit",       3 },
 501     { 0x58d,    "notor",        3 },
 502     { 0x58e,    "nand",         3 },
 503     { 0x58f,    "alterbit",     3 },
 504     { 0x590,    "addo",         3 },
 505     { 0x591,    "addi",         3 },
 506     { 0x592,    "subo",         3 },
 507     { 0x593,    "subi",         3 },
 508     { 0x594,    "cmpob",        2 },
 509     { 0x595,    "cmpib",        2 },
 510     { 0x596,    "cmpos",        2 },
 511     { 0x597,    "cmpis",        2 },
 512     { 0x598,    "shro",         3 },
 513     { 0x59a,    "shrdi",        3 },
 514     { 0x59b,    "shri",         3 },
 515     { 0x59c,    "shlo",         3 },
 516     { 0x59d,    "rotate",       3 },
 517     { 0x59e,    "shli",         3 },
 518     { 0x5a0,    "cmpo",         2 },
 519     { 0x5a1,    "cmpi",         2 },
 520     { 0x5a2,    "concmpo",      2 },
 521     { 0x5a3,    "concmpi",      2 },
 522     { 0x5a4,    "cmpinco",      3 },
 523     { 0x5a5,    "cmpinci",      3 },
 524     { 0x5a6,    "cmpdeco",      3 },
 525     { 0x5a7,    "cmpdeci",      3 },
 526     { 0x5ac,    "scanbyte",     2 },
 527     { 0x5ad,    "bswap",        -2 },
 528     { 0x5ae,    "chkbit",       2 },
 529     { 0x5b0,    "addc",         3 },
 530     { 0x5b2,    "subc",         3 },
 531     { 0x5b4,    "intdis",       0 },
 532     { 0x5b5,    "inten",        0 },
 533     { 0x5cc,    "mov",          -2 },
 534     { 0x5d8,    "eshro",        3 },
 535     { 0x5dc,    "movl",         -2 },
 536     { 0x5ec,    "movt",         -2 },
 537     { 0x5fc,    "movq",         -2 },
 538     { 0x600,    "synmov",       2 },
 539     { 0x601,    "synmovl",      2 },
 540     { 0x602,    "synmovq",      2 },
 541     { 0x603,    "cmpstr",       3 },
 542     { 0x604,    "movqstr",      3 },
 543     { 0x605,    "movstr",       3 },
 544     { 0x610,    "atmod",        3 },
 545     { 0x612,    "atadd",        3 },
 546     { 0x613,    "inspacc",      -2 },
 547     { 0x614,    "ldphy",        -2 },
 548     { 0x615,    "synld",        -2 },
 549     { 0x617,    "fill",         3 },
 550     { 0x630,    "sdma",         3 },
 551     { 0x631,    "udma",         0 },
 552     { 0x640,    "spanbit",      -2 },
 553     { 0x641,    "scanbit",      -2 },
 554     { 0x642,    "daddc",        3 },
 555     { 0x643,    "dsubc",        3 },
 556     { 0x644,    "dmovt",        -2 },
 557     { 0x645,    "modac",        3 },
 558     { 0x646,    "condrec",      -2 },
 559     { 0x650,    "modify",       3 },
 560     { 0x651,    "extract",      3 },
 561     { 0x654,    "modtc",        3 },
 562     { 0x655,    "modpc",        3 },
 563     { 0x656,    "receive",      -2 },
 564     { 0x658,    "intctl",       -2 },
 565     { 0x659,    "sysctl",       3 },
 566     { 0x65b,    "icctl",        3 },
 567     { 0x65c,    "dcctl",        3 },
 568     { 0x65d,    "halt",         0 },
 569     { 0x660,    "calls",        1 },
 570     { 0x662,    "send",         3 },
 571     { 0x663,    "sendserv",     1 },
 572     { 0x664,    "resumprcs",    1 },
 573     { 0x665,    "schedprcs",    1 },
 574     { 0x666,    "saveprcs",     0 },
 575     { 0x668,    "condwait",     1 },
 576     { 0x669,    "wait",         1 },
 577     { 0x66a,    "signal",       1 },
 578     { 0x66b,    "mark",         0 },
 579     { 0x66c,    "fmark",        0 },
 580     { 0x66d,    "flushreg",     0 },
 581     { 0x66f,    "syncf",        0 },
 582     { 0x670,    "emul",         3 },
 583     { 0x671,    "ediv",         3 },
 584     { 0x673,    "ldtime",       -1 },
 585     { 0x674,    "Fcvtir",       -2 },
 586     { 0x675,    "Fcvtilr",      -2 },
 587     { 0x676,    "Fscalerl",     3 },
 588     { 0x677,    "Fscaler",      3 },
 589     { 0x680,    "Fatanr",       3 },
 590     { 0x681,    "Flogepr",      3 },
 591     { 0x682,    "Flogr",        3 },
 592     { 0x683,    "Fremr",        3 },
 593     { 0x684,    "Fcmpor",       2 },
 594     { 0x685,    "Fcmpr",        2 },
 595     { 0x688,    "Fsqrtr",       -2 },
 596     { 0x689,    "Fexpr",        -2 },
 597     { 0x68a,    "Flogbnr",      -2 },
 598     { 0x68b,    "Froundr",      -2 },
 599     { 0x68c,    "Fsinr",        -2 },
 600     { 0x68d,    "Fcosr",        -2 },
 601     { 0x68e,    "Ftanr",        -2 },
 602     { 0x68f,    "Fclassr",      1 },
 603     { 0x690,    "Fatanrl",      3 },
 604     { 0x691,    "Flogeprl",     3 },
 605     { 0x692,    "Flogrl",       3 },
 606     { 0x693,    "Fremrl",       3 },
 607     { 0x694,    "Fcmporl",      2 },
 608     { 0x695,    "Fcmprl",       2 },
 609     { 0x698,    "Fsqrtrl",      -2 },
 610     { 0x699,    "Fexprl",       -2 },
 611     { 0x69a,    "Flogbnrl",     -2 },
 612     { 0x69b,    "Froundrl",     -2 },
 613     { 0x69c,    "Fsinrl",       -2 },
 614     { 0x69d,    "Fcosrl",       -2 },
 615     { 0x69e,    "Ftanrl",       -2 },
 616     { 0x69f,    "Fclassrl",     1 },
 617     { 0x6c0,    "Fcvtri",       -2 },
 618     { 0x6c1,    "Fcvtril",      -2 },
 619     { 0x6c2,    "Fcvtzri",      -2 },
 620     { 0x6c3,    "Fcvtzril",     -2 },
 621     { 0x6c9,    "Fmovr",        -2 },
 622     { 0x6d9,    "Fmovrl",       -2 },
 623     { 0x6e1,    "Fmovre",       -2 },
 624     { 0x6e2,    "Fcpysre",      3 },
 625     { 0x6e3,    "Fcpyrsre",     3 },
 626     { 0x701,    "mulo",         3 },
 627     { 0x708,    "remo",         3 },
 628     { 0x70b,    "divo",         3 },
 629     { 0x741,    "muli",         3 },
 630     { 0x748,    "remi",         3 },
 631     { 0x749,    "modi",         3 },
 632     { 0x74b,    "divi",         3 },
 633     { 0x780,    "addono",       3 },
 634     { 0x781,    "addino",       3 },
 635     { 0x782,    "subono",       3 },
 636     { 0x783,    "subino",       3 },
 637     { 0x784,    "selno",        3 },
 638     { 0x78b,    "Fdivr",        3 },
 639     { 0x78c,    "Fmulr",        3 },
 640     { 0x78d,    "Fsubr",        3 },
 641     { 0x78f,    "Faddr",        3 },
 642     { 0x790,    "addog",        3 },
 643     { 0x791,    "addig",        3 },
 644     { 0x792,    "subog",        3 },
 645     { 0x793,    "subig",        3 },
 646     { 0x794,    "selg",         3 },
 647     { 0x79b,    "Fdivrl",       3 },
 648     { 0x79c,    "Fmulrl",       3 },
 649     { 0x79d,    "Fsubrl",       3 },
 650     { 0x79f,    "Faddrl",       3 },
 651     { 0x7a0,    "addoe",        3 },
 652     { 0x7a1,    "addie",        3 },
 653     { 0x7a2,    "suboe",        3 },
 654     { 0x7a3,    "subie",        3 },
 655     { 0x7a4,    "sele",         3 },
 656     { 0x7b0,    "addoge",       3 },
 657     { 0x7b1,    "addige",       3 },
 658     { 0x7b2,    "suboge",       3 },
 659     { 0x7b3,    "subige",       3 },
 660     { 0x7b4,    "selge",        3 },
 661     { 0x7c0,    "addol",        3 },
 662     { 0x7c1,    "addil",        3 },
 663     { 0x7c2,    "subol",        3 },
 664     { 0x7c3,    "subil",        3 },
 665     { 0x7c4,    "sell",         3 },
 666     { 0x7d0,    "addone",       3 },
 667     { 0x7d1,    "addine",       3 },
 668     { 0x7d2,    "subone",       3 },
 669     { 0x7d3,    "subine",       3 },
 670     { 0x7d4,    "selne",        3 },
 671     { 0x7e0,    "addole",       3 },
 672     { 0x7e1,    "addile",       3 },
 673     { 0x7e2,    "subole",       3 },
 674     { 0x7e3,    "subile",       3 },
 675     { 0x7e4,    "selle",        3 },
 676     { 0x7f0,    "addoo",        3 },
 677     { 0x7f1,    "addio",        3 },
 678     { 0x7f2,    "suboo",        3 },
 679     { 0x7f3,    "subio",        3 },
 680     { 0x7f4,    "selo",         3 },
 681 #define REG_MAX 0x7f4
 682     { 0,        NULL,           0 }
 683   };
 684   static struct tabent reg_tab_buf[REG_MAX - REG_MIN + 1];
 685
 686   if (reg_tab == NULL)
 687     {
 688       reg_tab = reg_tab_buf;
 689
 690       for (i = 0; reg_init[i].opcode != 0; i++)
 691         {
 692           j = reg_init[i].opcode - REG_MIN;
 693           reg_tab[j].name = reg_init[i].name;
 694           reg_tab[j].numops = reg_init[i].numops;
 695         }
 696     }
 697
 698   opcode = ((word1 >> 20) & 0xff0) | ((word1 >> 7) & 0xf);
 699   i = opcode - REG_MIN;
 700
 701   if ((opcode<REG_MIN) || (opcode>REG_MAX) || (reg_tab[i].name==NULL))
 702     {
 703       invalid (word1);
 704       return;
 705     }
 706
 707   mnemp = reg_tab[i].name;
 708   if (*mnemp == 'F')
 709     {
 710       fp = 1;
 711       mnemp++;
 712     }
 713   else
 714     {
 715       fp = 0;
 716     }
 717
 718   (*info->fprintf_func) (stream, mnemp);
 719
 720   s1   = (word1 >> 5)  & 1;
 721   s2   = (word1 >> 6)  & 1;
 722   m1   = (word1 >> 11) & 1;
 723   m2   = (word1 >> 12) & 1;
 724   m3   = (word1 >> 13) & 1;
 725   src  =  word1        & 0x1f;
 726   src2 = (word1 >> 14) & 0x1f;
 727   dst  = (word1 >> 19) & 0x1f;
 728
 729   if  (reg_tab[i].numops != 0)
 730     {
 731       (*info->fprintf_func) (stream, "\t");
 732
 733     switch (reg_tab[i].numops)
 734       {
 735       case 1:
 736         regop (m1, s1, src, fp);
 737         break;
 738       case -1:
 739         dstop (m3, dst, fp);
 740         break;
 741       case 2:
 742         regop (m1, s1, src, fp);
 743         (*info->fprintf_func) (stream, ",");
 744         regop (m2, s2, src2, fp);
 745         break;
 746       case -2:
 747         regop (m1, s1, src, fp);
 748         (*info->fprintf_func) (stream, ",");
 749         dstop (m3, dst, fp);
 750         break;
 751       case 3:
 752         regop (m1, s1, src, fp);
 753         (*info->fprintf_func) (stream, ",");
 754         regop (m2, s2, src2, fp);
 755         (*info->fprintf_func) (stream, ",");
 756         dstop (m3, dst, fp);
 757         break;
 758       }
 759     }
 760 }
 761
 762 /* Print out effective address for memb instructions.  */
 763
 764 static void
 765 ea (bfd_vma memaddr, int mode, const char *reg2, const char *reg3, int word1,
 766     unsigned int word2)
 767 {
 768   int scale;
 769   static const int scale_tab[] = { 1, 2, 4, 8, 16 };
 770
 771   scale = (word1 >> 7) & 0x07;
 772
 773   if ((scale > 4) || (((word1 >> 5) & 0x03) != 0))
 774     {
 775       invalid (word1);
 776       return;
 777     }
 778   scale = scale_tab[scale];
 779
 780   switch (mode)
 781     {
 782     case 4:                                             /* (reg) */
 783       (*info->fprintf_func)( stream, "(%s)", reg2 );
 784       break;
 785     case 5:                                             /* displ+8(ip) */
 786       print_addr (word2 + 8 + memaddr);
 787       break;
 788     case 7:                                             /* (reg)[index*scale] */
 789       if (scale == 1)
 790         (*info->fprintf_func) (stream, "(%s)[%s]", reg2, reg3);
 791       else
 792         (*info->fprintf_func) (stream, "(%s)[%s*%d]", reg2, reg3, scale);
 793       break;
 794     case 12:                                    /* displacement */
 795       print_addr ((bfd_vma) word2);
 796       break;
 797     case 13:                                    /* displ(reg) */
 798       print_addr ((bfd_vma) word2);
 799       (*info->fprintf_func) (stream, "(%s)", reg2);
 800       break;
 801     case 14:                                    /* displ[index*scale] */
 802       print_addr ((bfd_vma) word2);
 803       if (scale == 1)
 804         (*info->fprintf_func) (stream, "[%s]", reg3);
 805       else
 806         (*info->fprintf_func) (stream, "[%s*%d]", reg3, scale);
 807       break;
 808     case 15:                            /* displ(reg)[index*scale] */
 809       print_addr ((bfd_vma) word2);
 810       if (scale == 1)
 811         (*info->fprintf_func) (stream, "(%s)[%s]", reg2, reg3);
 812       else
 813         (*info->fprintf_func) (stream, "(%s)[%s*%d]", reg2, reg3, scale);
 814       break;
 815     default:
 816       invalid (word1);
 817       return;
 818     }
 819 }
 820
 821
 822 /* Register Instruction Operand.  */
 823
 824 static void
 825 regop (int mode, int spec, int reg, int fp)
 826 {
 827   if (fp)
 828     {
 829       /* Floating point instruction.  */
 830       if (mode == 1)
 831         {
 832           /* FP operand.  */
 833           switch (reg)
 834             {
 835             case 0:  (*info->fprintf_func) (stream, "fp0");
 836               break;
 837             case 1:  (*info->fprintf_func) (stream, "fp1");
 838               break;
 839             case 2:  (*info->fprintf_func) (stream, "fp2");
 840               break;
 841             case 3:  (*info->fprintf_func) (stream, "fp3");
 842               break;
 843             case 16: (*info->fprintf_func) (stream, "0f0.0");
 844               break;
 845             case 22: (*info->fprintf_func) (stream, "0f1.0");
 846               break;
 847             default: (*info->fprintf_func) (stream, "?");
 848               break;
 849             }
 850         }
 851       else
 852         {
 853           /* Non-FP register.  */
 854           (*info->fprintf_func) (stream, reg_names[reg]);
 855         }
 856     }
 857   else
 858     {
 859       /* Not floating point.  */
 860       if (mode == 1)
 861         {
 862           /* Literal.  */
 863           (*info->fprintf_func) (stream, "%d", reg);
 864         }
 865       else
 866         {
 867           /* Register.  */
 868           if (spec == 0)
 869             (*info->fprintf_func) (stream, reg_names[reg]);
 870           else
 871             (*info->fprintf_func) (stream, "sf%d", reg);
 872         }
 873     }
 874 }
 875
 876 /* Register Instruction Destination Operand.  */
 877
 878 static void
 879 dstop (int mode, int reg, int fp)
 880 {
 881   /* 'dst' operand can't be a literal. On non-FP instructions,  register
 882      mode is assumed and "m3" acts as if were "s3";  on FP-instructions,
 883      sf registers are not allowed so m3 acts normally.  */
 884   if (fp)
 885     regop (mode, 0, reg, fp);
 886   else
 887     regop (0, mode, reg, fp);
 888 }
 889
 890 static void
 891 invalid (int word1)
 892 {
 893   (*info->fprintf_func) (stream, ".word\t0x%08x", (unsigned) word1);
 894 }
 895
 896 static void
 897 print_addr (bfd_vma a)
 898 {
 899   (*info->print_address_func) (a, info);
 900 }
 901
 902 static void
 903 put_abs (unsigned long word1 ATTRIBUTE_UNUSED,
 904          unsigned long word2 ATTRIBUTE_UNUSED)
 905 {
 906 #ifdef IN_GDB
 907   return;
 908 #else
 909   int len;
 910
 911   switch ((word1 >> 28) & 0xf)
 912     {
 913     case 0x8:
 914     case 0x9:
 915     case 0xa:
 916     case 0xb:
 917     case 0xc:
 918       /* MEM format instruction.  */
 919       len = mem (0, word1, word2, 1);
 920       break;
 921     default:
 922       len = 4;
 923       break;
 924     }
 925
 926   if (len == 8)
 927     (*info->fprintf_func) (stream, "%08x %08x\t", word1, word2);
 928   else
 929     (*info->fprintf_func) (stream, "%08x         \t", word1);
 930 #endif
 931 }