1 /* Instruction opcode table for ip2k.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2005 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
29 #include "ip2k-desc.h"
31 #include "libiberty.h"
35 #include "safe-ctype.h"
37 /* A better hash function for instruction mnemonics. */
45 for (hash
= 0; *m
&& !ISSPACE(*m
); m
++)
46 hash
= (hash
* 23) ^ (0x1F & TOLOWER(*m
));
48 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
50 return hash
% CGEN_ASM_HASH_SIZE
;
54 /* Special check to ensure that instruction exists for given machine. */
56 ip2k_cgen_insn_supported (cd
, insn
)
58 const CGEN_INSN
*insn
;
60 int machs
= CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_MACH
);
62 /* No mach attribute? Assume it's supported for all machs. */
66 return ((machs
& cd
->machs
) != 0);
71 /* The hash functions are recorded here to help keep assembler code out of
72 the disassembler and vice versa. */
74 static int asm_hash_insn_p
PARAMS ((const CGEN_INSN
*));
75 static unsigned int asm_hash_insn
PARAMS ((const char *));
76 static int dis_hash_insn_p
PARAMS ((const CGEN_INSN
*));
77 static unsigned int dis_hash_insn
PARAMS ((const char *, CGEN_INSN_INT
));
79 /* Instruction formats. */
81 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
82 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
84 #define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
86 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
90 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED
= {
91 16, 16, 0xe000, { { F (F_OP3
) }, { F (F_ADDR16CJP
) }, { 0 } }
94 static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED
= {
95 16, 16, 0xf000, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
98 static const CGEN_IFMT ifmt_xorw_l ATTRIBUTE_UNUSED
= {
99 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
102 static const CGEN_IFMT ifmt_loadl_a ATTRIBUTE_UNUSED
= {
103 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
106 static const CGEN_IFMT ifmt_loadh_a ATTRIBUTE_UNUSED
= {
107 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
110 static const CGEN_IFMT ifmt_addcfr_w ATTRIBUTE_UNUSED
= {
111 16, 16, 0xfe00, { { F (F_OP6
) }, { F (F_DIR
) }, { F (F_REG
) }, { 0 } }
114 static const CGEN_IFMT ifmt_speed ATTRIBUTE_UNUSED
= {
115 16, 16, 0xff00, { { F (F_OP8
) }, { F (F_IMM8
) }, { 0 } }
118 static const CGEN_IFMT ifmt_ireadi ATTRIBUTE_UNUSED
= {
119 16, 16, 0xffff, { { F (F_OP6
) }, { F (F_OP6_10LOW
) }, { 0 } }
122 static const CGEN_IFMT ifmt_page ATTRIBUTE_UNUSED
= {
123 16, 16, 0xfff8, { { F (F_OP6
) }, { F (F_OP6_7LOW
) }, { F (F_PAGE3
) }, { 0 } }
126 static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED
= {
127 16, 16, 0xfff8, { { F (F_OP6
) }, { F (F_OP6_7LOW
) }, { F (F_RETI3
) }, { 0 } }
132 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
133 #define A(a) (1 << CGEN_INSN_##a)
135 #define A(a) (1 << CGEN_INSN_/**/a)
137 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
138 #define OPERAND(op) IP2K_OPERAND_##op
140 #define OPERAND(op) IP2K_OPERAND_/**/op
142 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
143 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
145 /* The instruction table. */
147 static const CGEN_OPCODE ip2k_cgen_insn_opcode_table
[MAX_INSNS
] =
149 /* Special null first entry.
150 A `num' value of zero is thus invalid.
151 Also, the special `invalid' insn resides here. */
152 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
156 { { MNEM
, ' ', OP (ADDR16CJP
), 0 } },
157 & ifmt_jmp
, { 0xe000 }
159 /* call $addr16cjp */
162 { { MNEM
, ' ', OP (ADDR16CJP
), 0 } },
163 & ifmt_jmp
, { 0xc000 }
168 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
169 & ifmt_sb
, { 0xb000 }
174 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
175 & ifmt_sb
, { 0xa000 }
177 /* setb $fr,$bitno */
180 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
181 & ifmt_sb
, { 0x9000 }
183 /* clrb $fr,$bitno */
186 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
187 & ifmt_sb
, { 0x8000 }
192 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
193 & ifmt_xorw_l
, { 0x7f00 }
198 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
199 & ifmt_xorw_l
, { 0x7e00 }
204 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
205 & ifmt_xorw_l
, { 0x7d00 }
210 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
211 & ifmt_xorw_l
, { 0x7b00 }
216 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
217 & ifmt_xorw_l
, { 0x7a00 }
222 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
223 & ifmt_xorw_l
, { 0x7900 }
228 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
229 & ifmt_xorw_l
, { 0x7800 }
234 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
235 & ifmt_xorw_l
, { 0x7700 }
240 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
241 & ifmt_xorw_l
, { 0x7600 }
246 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
247 & ifmt_xorw_l
, { 0x7400 }
252 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
253 & ifmt_xorw_l
, { 0x7300 }
258 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
259 & ifmt_xorw_l
, { 0x7200 }
264 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
265 & ifmt_xorw_l
, { 0x7100 }
270 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
271 & ifmt_xorw_l
, { 0x7000 }
276 { { MNEM
, ' ', OP (ADDR16L
), 0 } },
277 & ifmt_loadl_a
, { 0x7100 }
282 { { MNEM
, ' ', OP (ADDR16H
), 0 } },
283 & ifmt_loadh_a
, { 0x7000 }
288 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
289 & ifmt_addcfr_w
, { 0x5e00 }
294 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
295 & ifmt_addcfr_w
, { 0x5c00 }
300 { { MNEM
, ' ', OP (FR
), 0 } },
301 & ifmt_addcfr_w
, { 0x5a00 }
306 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
307 & ifmt_addcfr_w
, { 0x5800 }
312 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
313 & ifmt_addcfr_w
, { 0x5400 }
318 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
319 & ifmt_addcfr_w
, { 0x5000 }
324 { { MNEM
, ' ', OP (FR
), 0 } },
325 & ifmt_addcfr_w
, { 0x4e00 }
330 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
331 & ifmt_addcfr_w
, { 0x4c00 }
336 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
337 & ifmt_addcfr_w
, { 0x4800 }
342 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
343 & ifmt_addcfr_w
, { 0x4a00 }
348 { { MNEM
, ' ', OP (FR
), 0 } },
349 & ifmt_addcfr_w
, { 0x4600 }
354 { { MNEM
, ' ', OP (FR
), 0 } },
355 & ifmt_addcfr_w
, { 0x4400 }
360 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
361 & ifmt_addcfr_w
, { 0x4200 }
366 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
367 & ifmt_addcfr_w
, { 0x4000 }
372 { { MNEM
, ' ', OP (FR
), 0 } },
373 & ifmt_addcfr_w
, { 0x3e00 }
378 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
379 & ifmt_addcfr_w
, { 0x3c00 }
384 { { MNEM
, ' ', OP (FR
), 0 } },
385 & ifmt_addcfr_w
, { 0x3a00 }
390 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
391 & ifmt_addcfr_w
, { 0x3800 }
396 { { MNEM
, ' ', OP (FR
), 0 } },
397 & ifmt_addcfr_w
, { 0x3600 }
402 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
403 & ifmt_addcfr_w
, { 0x3400 }
408 { { MNEM
, ' ', OP (FR
), 0 } },
409 & ifmt_addcfr_w
, { 0x3200 }
414 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
415 & ifmt_addcfr_w
, { 0x3000 }
420 { { MNEM
, ' ', OP (FR
), 0 } },
421 & ifmt_addcfr_w
, { 0x2e00 }
426 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
427 & ifmt_addcfr_w
, { 0x2c00 }
432 { { MNEM
, ' ', OP (FR
), 0 } },
433 & ifmt_addcfr_w
, { 0x2a00 }
438 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
439 & ifmt_addcfr_w
, { 0x2800 }
444 { { MNEM
, ' ', OP (FR
), 0 } },
445 & ifmt_addcfr_w
, { 0x2600 }
450 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
451 & ifmt_addcfr_w
, { 0x2400 }
456 { { MNEM
, ' ', OP (FR
), 0 } },
457 & ifmt_addcfr_w
, { 0x2200 }
462 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
463 & ifmt_xorw_l
, { 0x7c00 }
468 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
469 & ifmt_addcfr_w
, { 0x200 }
474 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
475 & ifmt_addcfr_w
, { 0x2000 }
480 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
481 & ifmt_addcfr_w
, { 0x1e00 }
486 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
487 & ifmt_addcfr_w
, { 0x1c00 }
492 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
493 & ifmt_addcfr_w
, { 0x1a00 }
498 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
499 & ifmt_addcfr_w
, { 0x1800 }
504 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
505 & ifmt_addcfr_w
, { 0x1600 }
510 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
511 & ifmt_addcfr_w
, { 0x1400 }
516 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
517 & ifmt_addcfr_w
, { 0x1200 }
522 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
523 & ifmt_addcfr_w
, { 0x1000 }
528 { { MNEM
, ' ', OP (FR
), 0 } },
529 & ifmt_addcfr_w
, { 0xe00 }
534 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
535 & ifmt_addcfr_w
, { 0xc00 }
540 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
541 & ifmt_addcfr_w
, { 0xa00 }
546 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
547 & ifmt_addcfr_w
, { 0x800 }
552 { { MNEM
, ' ', OP (FR
), 0 } },
553 & ifmt_addcfr_w
, { 0x600 }
558 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
559 & ifmt_addcfr_w
, { 0x400 }
564 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
565 & ifmt_speed
, { 0x100 }
571 & ifmt_ireadi
, { 0x1d }
577 & ifmt_ireadi
, { 0x1c }
583 & ifmt_ireadi
, { 0x1b }
589 & ifmt_ireadi
, { 0x1a }
595 & ifmt_ireadi
, { 0x19 }
601 & ifmt_ireadi
, { 0x18 }
606 { { MNEM
, ' ', OP (ADDR16P
), 0 } },
607 & ifmt_page
, { 0x10 }
613 & ifmt_ireadi
, { 0xff }
618 { { MNEM
, ' ', '#', OP (RETI3
), 0 } },
625 & ifmt_ireadi
, { 0x7 }
631 & ifmt_ireadi
, { 0x6 }
637 & ifmt_ireadi
, { 0x5 }
643 & ifmt_ireadi
, { 0x4 }
649 & ifmt_ireadi
, { 0x3 }
655 & ifmt_ireadi
, { 0x2 }
661 & ifmt_ireadi
, { 0x1 }
667 & ifmt_ireadi
, { 0x0 }
676 /* Formats for ALIAS macro-insns. */
678 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
679 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
681 #define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
683 static const CGEN_IFMT ifmt_sc ATTRIBUTE_UNUSED
= {
684 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
687 static const CGEN_IFMT ifmt_snc ATTRIBUTE_UNUSED
= {
688 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
691 static const CGEN_IFMT ifmt_sz ATTRIBUTE_UNUSED
= {
692 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
695 static const CGEN_IFMT ifmt_snz ATTRIBUTE_UNUSED
= {
696 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
699 static const CGEN_IFMT ifmt_skip ATTRIBUTE_UNUSED
= {
700 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
703 static const CGEN_IFMT ifmt_skipb ATTRIBUTE_UNUSED
= {
704 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
709 /* Each non-simple macro entry points to an array of expansion possibilities. */
711 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
712 #define A(a) (1 << CGEN_INSN_##a)
714 #define A(a) (1 << CGEN_INSN_/**/a)
716 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
717 #define OPERAND(op) IP2K_OPERAND_##op
719 #define OPERAND(op) IP2K_OPERAND_/**/op
721 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
722 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
724 /* The macro instruction table. */
726 static const CGEN_IBASE ip2k_cgen_macro_insn_table
[] =
731 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
735 -1, "snc", "snc", 16,
736 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
741 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
745 -1, "snz", "snz", 16,
746 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
750 -1, "skip", "skip", 16,
751 { 0|A(SKIPA
)|A(ALIAS
), { (1<<MACH_BASE
) } }
755 -1, "skipb", "skip", 16,
756 { 0|A(SKIPA
)|A(ALIAS
), { (1<<MACH_BASE
) } }
760 /* The macro instruction opcode table. */
762 static const CGEN_OPCODE ip2k_cgen_macro_insn_opcode_table
[] =
768 & ifmt_sc
, { 0xb00b }
774 & ifmt_snc
, { 0xa00b }
780 & ifmt_sz
, { 0xb40b }
786 & ifmt_snz
, { 0xa40b }
792 & ifmt_skip
, { 0xa009 }
798 & ifmt_skipb
, { 0xb009 }
807 #ifndef CGEN_ASM_HASH_P
808 #define CGEN_ASM_HASH_P(insn) 1
811 #ifndef CGEN_DIS_HASH_P
812 #define CGEN_DIS_HASH_P(insn) 1
815 /* Return non-zero if INSN is to be added to the hash table.
816 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
819 asm_hash_insn_p (insn
)
820 const CGEN_INSN
*insn ATTRIBUTE_UNUSED
;
822 return CGEN_ASM_HASH_P (insn
);
826 dis_hash_insn_p (insn
)
827 const CGEN_INSN
*insn
;
829 /* If building the hash table and the NO-DIS attribute is present,
831 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
833 return CGEN_DIS_HASH_P (insn
);
836 #ifndef CGEN_ASM_HASH
837 #define CGEN_ASM_HASH_SIZE 127
838 #ifdef CGEN_MNEMONIC_OPERANDS
839 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
841 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
845 /* It doesn't make much sense to provide a default here,
846 but while this is under development we do.
847 BUFFER is a pointer to the bytes of the insn, target order.
848 VALUE is the first base_insn_bitsize bits as an int in host order. */
850 #ifndef CGEN_DIS_HASH
851 #define CGEN_DIS_HASH_SIZE 256
852 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
855 /* The result is the hash value of the insn.
856 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
862 return CGEN_ASM_HASH (mnem
);
865 /* BUF is a pointer to the bytes of the insn, target order.
866 VALUE is the first base_insn_bitsize bits as an int in host order. */
869 dis_hash_insn (buf
, value
)
870 const char * buf ATTRIBUTE_UNUSED
;
871 CGEN_INSN_INT value ATTRIBUTE_UNUSED
;
873 return CGEN_DIS_HASH (buf
, value
);
876 static void set_fields_bitsize
PARAMS ((CGEN_FIELDS
*, int));
878 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
881 set_fields_bitsize (fields
, size
)
885 CGEN_FIELDS_BITSIZE (fields
) = size
;
888 /* Function to call before using the operand instance table.
889 This plugs the opcode entries and macro instructions into the cpu table. */
892 ip2k_cgen_init_opcode_table (cd
)
896 int num_macros
= (sizeof (ip2k_cgen_macro_insn_table
) /
897 sizeof (ip2k_cgen_macro_insn_table
[0]));
898 const CGEN_IBASE
*ib
= & ip2k_cgen_macro_insn_table
[0];
899 const CGEN_OPCODE
*oc
= & ip2k_cgen_macro_insn_opcode_table
[0];
900 CGEN_INSN
*insns
= (CGEN_INSN
*) xmalloc (num_macros
* sizeof (CGEN_INSN
));
901 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
902 for (i
= 0; i
< num_macros
; ++i
)
904 insns
[i
].base
= &ib
[i
];
905 insns
[i
].opcode
= &oc
[i
];
906 ip2k_cgen_build_insn_regex (& insns
[i
]);
908 cd
->macro_insn_table
.init_entries
= insns
;
909 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
910 cd
->macro_insn_table
.num_init_entries
= num_macros
;
912 oc
= & ip2k_cgen_insn_opcode_table
[0];
913 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
914 for (i
= 0; i
< MAX_INSNS
; ++i
)
916 insns
[i
].opcode
= &oc
[i
];
917 ip2k_cgen_build_insn_regex (& insns
[i
]);
920 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
921 cd
->set_fields_bitsize
= set_fields_bitsize
;
923 cd
->asm_hash_p
= asm_hash_insn_p
;
924 cd
->asm_hash
= asm_hash_insn
;
925 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
927 cd
->dis_hash_p
= dis_hash_insn_p
;
928 cd
->dis_hash
= dis_hash_insn
;
929 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;