1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for lm32. -*- C -*-
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
7 Copyright (C) 1996-2020 Free Software Foundation, Inc.
9 This file is part of libopcodes.
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "lm32-desc.h"
36 #include "cgen/basic-modes.h"
38 #include "safe-ctype.h"
41 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #define max(a,b) ((a) > (b) ? (a) : (b))
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
48 static const char * insert_normal
49 (CGEN_CPU_DESC
, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR
);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC
, const CGEN_INSN
*,
53 CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
);
54 static int extract_normal
55 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma
, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC
, const CGEN_INSN
*, CGEN_EXTRACT_INFO
*,
60 CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
);
62 static void put_insn_int_value
63 (CGEN_CPU_DESC
, CGEN_INSN_BYTES_PTR
, int, int, CGEN_INSN_INT
);
66 static CGEN_INLINE
void insert_1
67 (CGEN_CPU_DESC
, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE
int fill_cache
69 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, int, int, bfd_vma
);
70 static CGEN_INLINE
long extract_1
71 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, int, int, int, unsigned char *, bfd_vma
);
74 /* Operand insertion. */
78 /* Subroutine of insert_normal. */
80 static CGEN_INLINE
void
81 insert_1 (CGEN_CPU_DESC cd
,
91 x
= cgen_get_insn_value (cd
, bufp
, word_length
, cd
->endian
);
93 /* Written this way to avoid undefined behaviour. */
94 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
96 shift
= (start
+ 1) - length
;
98 shift
= (word_length
- (start
+ length
));
99 x
= (x
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
101 cgen_put_insn_value (cd
, bufp
, word_length
, (bfd_vma
) x
, cd
->endian
);
104 #endif /* ! CGEN_INT_INSN_P */
106 /* Default insertion routine.
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
115 The result is an error message or NULL if success. */
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
123 insert_normal (CGEN_CPU_DESC cd
,
126 unsigned int word_offset
,
129 unsigned int word_length
,
130 unsigned int total_length
,
131 CGEN_INSN_BYTES_PTR buffer
)
133 static char errbuf
[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
141 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
)
149 && word_length
> total_length
)
150 word_length
= total_length
;
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGN_OPT
))
156 long minval
= - (1L << (length
- 1));
157 unsigned long maxval
= mask
;
159 if ((value
> 0 && (unsigned long) value
> maxval
)
162 /* xgettext:c-format */
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value
, minval
, maxval
);
169 else if (! CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGNED
))
171 unsigned long maxval
= mask
;
172 unsigned long val
= (unsigned long) value
;
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value
>> 32) == -1))
183 /* xgettext:c-format */
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
192 if (! cgen_signed_overflow_ok_p (cd
))
194 long minval
= - (1L << (length
- 1));
195 long maxval
= (1L << (length
- 1)) - 1;
197 if (value
< minval
|| value
> maxval
)
200 /* xgettext:c-format */
201 (errbuf
, _("operand out of range (%ld not between %ld and %ld)"),
202 value
, minval
, maxval
);
211 int shift_within_word
, shift_to_word
, shift
;
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word
= total_length
- (word_offset
+ word_length
);
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P
)
218 shift_within_word
= start
+ 1 - length
;
220 shift_within_word
= word_length
- start
- length
;
222 /* The total SHIFT, then mask in the value. */
223 shift
= shift_to_word
+ shift_within_word
;
224 *buffer
= (*buffer
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
227 #else /* ! CGEN_INT_INSN_P */
230 unsigned char *bufp
= (unsigned char *) buffer
+ word_offset
/ 8;
232 insert_1 (cd
, value
, start
, length
, word_length
, bufp
);
235 #endif /* ! CGEN_INT_INSN_P */
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
248 insert_insn_normal (CGEN_CPU_DESC cd
,
249 const CGEN_INSN
* insn
,
250 CGEN_FIELDS
* fields
,
251 CGEN_INSN_BYTES_PTR buffer
,
254 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
256 const CGEN_SYNTAX_CHAR_TYPE
* syn
;
258 CGEN_INIT_INSERT (cd
);
259 value
= CGEN_INSN_BASE_VALUE (insn
);
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
266 put_insn_int_value (cd
, buffer
, cd
->base_insn_bitsize
,
267 CGEN_FIELDS_BITSIZE (fields
), value
);
271 cgen_put_insn_value (cd
, buffer
, min ((unsigned) cd
->base_insn_bitsize
,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields
)),
273 value
, cd
->insn_endian
);
275 #endif /* ! CGEN_INT_INSN_P */
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
282 for (syn
= CGEN_SYNTAX_STRING (syntax
); * syn
; ++ syn
)
286 if (CGEN_SYNTAX_CHAR_P (* syn
))
289 errmsg
= (* cd
->insert_operand
) (cd
, CGEN_SYNTAX_FIELD (*syn
),
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
304 CGEN_INSN_BYTES_PTR buf
,
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length
> insn_length
)
315 int shift
= insn_length
- length
;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
319 *buf
= (*buf
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
324 /* Operand extraction. */
326 #if ! CGEN_INT_INSN_P
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
334 static CGEN_INLINE
int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
336 CGEN_EXTRACT_INFO
*ex_info
,
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
344 disassemble_info
*info
= (disassemble_info
*) ex_info
->dis_info
;
346 /* First do a quick check. */
347 mask
= (1 << bytes
) - 1;
348 if (((ex_info
->valid
>> offset
) & mask
) == mask
)
351 /* Search for the first byte we need to read. */
352 for (mask
= 1 << offset
; bytes
> 0; --bytes
, ++offset
, mask
<<= 1)
353 if (! (mask
& ex_info
->valid
))
361 status
= (*info
->read_memory_func
)
362 (pc
, ex_info
->insn_bytes
+ offset
, bytes
, info
);
366 (*info
->memory_error_func
) (status
, pc
, info
);
370 ex_info
->valid
|= ((1 << bytes
) - 1) << offset
;
376 /* Subroutine of extract_normal. */
378 static CGEN_INLINE
long
379 extract_1 (CGEN_CPU_DESC cd
,
380 CGEN_EXTRACT_INFO
*ex_info ATTRIBUTE_UNUSED
,
385 bfd_vma pc ATTRIBUTE_UNUSED
)
390 x
= cgen_get_insn_value (cd
, bufp
, word_length
, cd
->endian
);
392 if (CGEN_INSN_LSB0_P
)
393 shift
= (start
+ 1) - length
;
395 shift
= (word_length
- (start
+ length
));
399 #endif /* ! CGEN_INT_INSN_P */
401 /* Default extraction routine.
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
414 Returns 1 for success, 0 for failure. */
416 /* ??? The return code isn't properly used. wip. */
418 /* ??? This doesn't handle bfd_vma's. Create another function when
422 extract_normal (CGEN_CPU_DESC cd
,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO
*ex_info
,
426 CGEN_EXTRACT_INFO
*ex_info ATTRIBUTE_UNUSED
,
428 CGEN_INSN_INT insn_value
,
430 unsigned int word_offset
,
433 unsigned int word_length
,
434 unsigned int total_length
,
435 #if ! CGEN_INT_INSN_P
438 bfd_vma pc ATTRIBUTE_UNUSED
,
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
452 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
)
459 if (word_offset
+ word_length
> total_length
)
460 word_length
= total_length
- word_offset
;
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
465 if (CGEN_INT_INSN_P
|| (word_offset
== 0 && word_length
== total_length
))
467 if (CGEN_INSN_LSB0_P
)
468 value
= insn_value
>> ((word_offset
+ start
+ 1) - length
);
470 value
= insn_value
>> (total_length
- ( word_offset
+ start
+ length
));
473 #if ! CGEN_INT_INSN_P
477 unsigned char *bufp
= ex_info
->insn_bytes
+ word_offset
/ 8;
479 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
482 if (fill_cache (cd
, ex_info
, word_offset
/ 8, word_length
/ 8, pc
) == 0)
488 value
= extract_1 (cd
, ex_info
, start
, length
, word_length
, bufp
, pc
);
491 #endif /* ! CGEN_INT_INSN_P */
493 /* Written this way to avoid undefined behaviour. */
494 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
498 if (CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGNED
)
499 && (value
& (1L << (length
- 1))))
507 /* Default insn extractor.
509 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
510 The extracted fields are stored in FIELDS.
511 EX_INFO is used to handle reading variable length insns.
512 Return the length of the insn in bits, or 0 if no match,
513 or -1 if an error occurs fetching data (memory_error_func will have
517 extract_insn_normal (CGEN_CPU_DESC cd
,
518 const CGEN_INSN
*insn
,
519 CGEN_EXTRACT_INFO
*ex_info
,
520 CGEN_INSN_INT insn_value
,
524 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
525 const CGEN_SYNTAX_CHAR_TYPE
*syn
;
527 CGEN_FIELDS_BITSIZE (fields
) = CGEN_INSN_BITSIZE (insn
);
529 CGEN_INIT_EXTRACT (cd
);
531 for (syn
= CGEN_SYNTAX_STRING (syntax
); *syn
; ++syn
)
535 if (CGEN_SYNTAX_CHAR_P (*syn
))
538 length
= (* cd
->extract_operand
) (cd
, CGEN_SYNTAX_FIELD (*syn
),
539 ex_info
, insn_value
, fields
, pc
);
544 /* We recognized and successfully extracted this insn. */
545 return CGEN_INSN_BITSIZE (insn
);
548 /* Machine generated code added here. */
550 const char * lm32_cgen_insert_operand
551 (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
);
553 /* Main entry point for operand insertion.
555 This function is basically just a big switch statement. Earlier versions
556 used tables to look up the function to use, but
557 - if the table contains both assembler and disassembler functions then
558 the disassembler contains much of the assembler and vice-versa,
559 - there's a lot of inlining possibilities as things grow,
560 - using a switch statement avoids the function call overhead.
562 This function could be moved into `parse_insn_normal', but keeping it
563 separate makes clear the interface between `parse_insn_normal' and each of
564 the handlers. It's also needed by GAS to insert operands that couldn't be
565 resolved during parsing. */
568 lm32_cgen_insert_operand (CGEN_CPU_DESC cd
,
570 CGEN_FIELDS
* fields
,
571 CGEN_INSN_BYTES_PTR buffer
,
572 bfd_vma pc ATTRIBUTE_UNUSED
)
574 const char * errmsg
= NULL
;
575 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
579 case LM32_OPERAND_BRANCH
:
581 long value
= fields
->f_branch
;
582 value
= ((SI
) (((value
) - (pc
))) >> (2));
583 errmsg
= insert_normal (cd
, value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 15, 16, 32, total_length
, buffer
);
586 case LM32_OPERAND_CALL
:
588 long value
= fields
->f_call
;
589 value
= ((SI
) (((value
) - (pc
))) >> (2));
590 errmsg
= insert_normal (cd
, value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 25, 26, 32, total_length
, buffer
);
593 case LM32_OPERAND_CSR
:
594 errmsg
= insert_normal (cd
, fields
->f_csr
, 0, 0, 25, 5, 32, total_length
, buffer
);
596 case LM32_OPERAND_EXCEPTION
:
597 errmsg
= insert_normal (cd
, fields
->f_exception
, 0, 0, 25, 26, 32, total_length
, buffer
);
599 case LM32_OPERAND_GOT16
:
600 errmsg
= insert_normal (cd
, fields
->f_imm
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, buffer
);
602 case LM32_OPERAND_GOTOFFHI16
:
603 errmsg
= insert_normal (cd
, fields
->f_imm
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, buffer
);
605 case LM32_OPERAND_GOTOFFLO16
:
606 errmsg
= insert_normal (cd
, fields
->f_imm
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, buffer
);
608 case LM32_OPERAND_GP16
:
609 errmsg
= insert_normal (cd
, fields
->f_imm
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, buffer
);
611 case LM32_OPERAND_HI16
:
612 errmsg
= insert_normal (cd
, fields
->f_uimm
, 0, 0, 15, 16, 32, total_length
, buffer
);
614 case LM32_OPERAND_IMM
:
615 errmsg
= insert_normal (cd
, fields
->f_imm
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, buffer
);
617 case LM32_OPERAND_LO16
:
618 errmsg
= insert_normal (cd
, fields
->f_uimm
, 0, 0, 15, 16, 32, total_length
, buffer
);
620 case LM32_OPERAND_R0
:
621 errmsg
= insert_normal (cd
, fields
->f_r0
, 0, 0, 25, 5, 32, total_length
, buffer
);
623 case LM32_OPERAND_R1
:
624 errmsg
= insert_normal (cd
, fields
->f_r1
, 0, 0, 20, 5, 32, total_length
, buffer
);
626 case LM32_OPERAND_R2
:
627 errmsg
= insert_normal (cd
, fields
->f_r2
, 0, 0, 15, 5, 32, total_length
, buffer
);
629 case LM32_OPERAND_SHIFT
:
630 errmsg
= insert_normal (cd
, fields
->f_shift
, 0, 0, 4, 5, 32, total_length
, buffer
);
632 case LM32_OPERAND_UIMM
:
633 errmsg
= insert_normal (cd
, fields
->f_uimm
, 0, 0, 15, 16, 32, total_length
, buffer
);
635 case LM32_OPERAND_USER
:
636 errmsg
= insert_normal (cd
, fields
->f_user
, 0, 0, 10, 11, 32, total_length
, buffer
);
640 /* xgettext:c-format */
641 opcodes_error_handler
642 (_("internal error: unrecognized field %d while building insn"),
650 int lm32_cgen_extract_operand
651 (CGEN_CPU_DESC
, int, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
);
653 /* Main entry point for operand extraction.
654 The result is <= 0 for error, >0 for success.
655 ??? Actual values aren't well defined right now.
657 This function is basically just a big switch statement. Earlier versions
658 used tables to look up the function to use, but
659 - if the table contains both assembler and disassembler functions then
660 the disassembler contains much of the assembler and vice-versa,
661 - there's a lot of inlining possibilities as things grow,
662 - using a switch statement avoids the function call overhead.
664 This function could be moved into `print_insn_normal', but keeping it
665 separate makes clear the interface between `print_insn_normal' and each of
669 lm32_cgen_extract_operand (CGEN_CPU_DESC cd
,
671 CGEN_EXTRACT_INFO
*ex_info
,
672 CGEN_INSN_INT insn_value
,
673 CGEN_FIELDS
* fields
,
676 /* Assume success (for those operands that are nops). */
678 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
682 case LM32_OPERAND_BRANCH
:
685 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 15, 16, 32, total_length
, pc
, & value
);
686 value
= ((pc
) + (((((((((value
) & (65535))) << (2))) ^ (131072))) - (131072))));
687 fields
->f_branch
= value
;
690 case LM32_OPERAND_CALL
:
693 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 25, 26, 32, total_length
, pc
, & value
);
694 value
= ((pc
) + (((((((((value
) & (67108863))) << (2))) ^ (134217728))) - (134217728))));
695 fields
->f_call
= value
;
698 case LM32_OPERAND_CSR
:
699 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_csr
);
701 case LM32_OPERAND_EXCEPTION
:
702 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 26, 32, total_length
, pc
, & fields
->f_exception
);
704 case LM32_OPERAND_GOT16
:
705 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, pc
, & fields
->f_imm
);
707 case LM32_OPERAND_GOTOFFHI16
:
708 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, pc
, & fields
->f_imm
);
710 case LM32_OPERAND_GOTOFFLO16
:
711 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, pc
, & fields
->f_imm
);
713 case LM32_OPERAND_GP16
:
714 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, pc
, & fields
->f_imm
);
716 case LM32_OPERAND_HI16
:
717 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 16, 32, total_length
, pc
, & fields
->f_uimm
);
719 case LM32_OPERAND_IMM
:
720 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 15, 16, 32, total_length
, pc
, & fields
->f_imm
);
722 case LM32_OPERAND_LO16
:
723 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 16, 32, total_length
, pc
, & fields
->f_uimm
);
725 case LM32_OPERAND_R0
:
726 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_r0
);
728 case LM32_OPERAND_R1
:
729 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 20, 5, 32, total_length
, pc
, & fields
->f_r1
);
731 case LM32_OPERAND_R2
:
732 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 5, 32, total_length
, pc
, & fields
->f_r2
);
734 case LM32_OPERAND_SHIFT
:
735 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 4, 5, 32, total_length
, pc
, & fields
->f_shift
);
737 case LM32_OPERAND_UIMM
:
738 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 16, 32, total_length
, pc
, & fields
->f_uimm
);
740 case LM32_OPERAND_USER
:
741 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 10, 11, 32, total_length
, pc
, & fields
->f_user
);
745 /* xgettext:c-format */
746 opcodes_error_handler
747 (_("internal error: unrecognized field %d while decoding insn"),
755 cgen_insert_fn
* const lm32_cgen_insert_handlers
[] =
760 cgen_extract_fn
* const lm32_cgen_extract_handlers
[] =
765 int lm32_cgen_get_int_operand (CGEN_CPU_DESC
, int, const CGEN_FIELDS
*);
766 bfd_vma
lm32_cgen_get_vma_operand (CGEN_CPU_DESC
, int, const CGEN_FIELDS
*);
768 /* Getting values from cgen_fields is handled by a collection of functions.
769 They are distinguished by the type of the VALUE argument they return.
770 TODO: floating point, inlining support, remove cases where result type
774 lm32_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
776 const CGEN_FIELDS
* fields
)
782 case LM32_OPERAND_BRANCH
:
783 value
= fields
->f_branch
;
785 case LM32_OPERAND_CALL
:
786 value
= fields
->f_call
;
788 case LM32_OPERAND_CSR
:
789 value
= fields
->f_csr
;
791 case LM32_OPERAND_EXCEPTION
:
792 value
= fields
->f_exception
;
794 case LM32_OPERAND_GOT16
:
795 value
= fields
->f_imm
;
797 case LM32_OPERAND_GOTOFFHI16
:
798 value
= fields
->f_imm
;
800 case LM32_OPERAND_GOTOFFLO16
:
801 value
= fields
->f_imm
;
803 case LM32_OPERAND_GP16
:
804 value
= fields
->f_imm
;
806 case LM32_OPERAND_HI16
:
807 value
= fields
->f_uimm
;
809 case LM32_OPERAND_IMM
:
810 value
= fields
->f_imm
;
812 case LM32_OPERAND_LO16
:
813 value
= fields
->f_uimm
;
815 case LM32_OPERAND_R0
:
816 value
= fields
->f_r0
;
818 case LM32_OPERAND_R1
:
819 value
= fields
->f_r1
;
821 case LM32_OPERAND_R2
:
822 value
= fields
->f_r2
;
824 case LM32_OPERAND_SHIFT
:
825 value
= fields
->f_shift
;
827 case LM32_OPERAND_UIMM
:
828 value
= fields
->f_uimm
;
830 case LM32_OPERAND_USER
:
831 value
= fields
->f_user
;
835 /* xgettext:c-format */
836 opcodes_error_handler
837 (_("internal error: unrecognized field %d while getting int operand"),
846 lm32_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
848 const CGEN_FIELDS
* fields
)
854 case LM32_OPERAND_BRANCH
:
855 value
= fields
->f_branch
;
857 case LM32_OPERAND_CALL
:
858 value
= fields
->f_call
;
860 case LM32_OPERAND_CSR
:
861 value
= fields
->f_csr
;
863 case LM32_OPERAND_EXCEPTION
:
864 value
= fields
->f_exception
;
866 case LM32_OPERAND_GOT16
:
867 value
= fields
->f_imm
;
869 case LM32_OPERAND_GOTOFFHI16
:
870 value
= fields
->f_imm
;
872 case LM32_OPERAND_GOTOFFLO16
:
873 value
= fields
->f_imm
;
875 case LM32_OPERAND_GP16
:
876 value
= fields
->f_imm
;
878 case LM32_OPERAND_HI16
:
879 value
= fields
->f_uimm
;
881 case LM32_OPERAND_IMM
:
882 value
= fields
->f_imm
;
884 case LM32_OPERAND_LO16
:
885 value
= fields
->f_uimm
;
887 case LM32_OPERAND_R0
:
888 value
= fields
->f_r0
;
890 case LM32_OPERAND_R1
:
891 value
= fields
->f_r1
;
893 case LM32_OPERAND_R2
:
894 value
= fields
->f_r2
;
896 case LM32_OPERAND_SHIFT
:
897 value
= fields
->f_shift
;
899 case LM32_OPERAND_UIMM
:
900 value
= fields
->f_uimm
;
902 case LM32_OPERAND_USER
:
903 value
= fields
->f_user
;
907 /* xgettext:c-format */
908 opcodes_error_handler
909 (_("internal error: unrecognized field %d while getting vma operand"),
917 void lm32_cgen_set_int_operand (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, int);
918 void lm32_cgen_set_vma_operand (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, bfd_vma
);
920 /* Stuffing values in cgen_fields is handled by a collection of functions.
921 They are distinguished by the type of the VALUE argument they accept.
922 TODO: floating point, inlining support, remove cases where argument type
926 lm32_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
928 CGEN_FIELDS
* fields
,
933 case LM32_OPERAND_BRANCH
:
934 fields
->f_branch
= value
;
936 case LM32_OPERAND_CALL
:
937 fields
->f_call
= value
;
939 case LM32_OPERAND_CSR
:
940 fields
->f_csr
= value
;
942 case LM32_OPERAND_EXCEPTION
:
943 fields
->f_exception
= value
;
945 case LM32_OPERAND_GOT16
:
946 fields
->f_imm
= value
;
948 case LM32_OPERAND_GOTOFFHI16
:
949 fields
->f_imm
= value
;
951 case LM32_OPERAND_GOTOFFLO16
:
952 fields
->f_imm
= value
;
954 case LM32_OPERAND_GP16
:
955 fields
->f_imm
= value
;
957 case LM32_OPERAND_HI16
:
958 fields
->f_uimm
= value
;
960 case LM32_OPERAND_IMM
:
961 fields
->f_imm
= value
;
963 case LM32_OPERAND_LO16
:
964 fields
->f_uimm
= value
;
966 case LM32_OPERAND_R0
:
967 fields
->f_r0
= value
;
969 case LM32_OPERAND_R1
:
970 fields
->f_r1
= value
;
972 case LM32_OPERAND_R2
:
973 fields
->f_r2
= value
;
975 case LM32_OPERAND_SHIFT
:
976 fields
->f_shift
= value
;
978 case LM32_OPERAND_UIMM
:
979 fields
->f_uimm
= value
;
981 case LM32_OPERAND_USER
:
982 fields
->f_user
= value
;
986 /* xgettext:c-format */
987 opcodes_error_handler
988 (_("internal error: unrecognized field %d while setting int operand"),
995 lm32_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
997 CGEN_FIELDS
* fields
,
1002 case LM32_OPERAND_BRANCH
:
1003 fields
->f_branch
= value
;
1005 case LM32_OPERAND_CALL
:
1006 fields
->f_call
= value
;
1008 case LM32_OPERAND_CSR
:
1009 fields
->f_csr
= value
;
1011 case LM32_OPERAND_EXCEPTION
:
1012 fields
->f_exception
= value
;
1014 case LM32_OPERAND_GOT16
:
1015 fields
->f_imm
= value
;
1017 case LM32_OPERAND_GOTOFFHI16
:
1018 fields
->f_imm
= value
;
1020 case LM32_OPERAND_GOTOFFLO16
:
1021 fields
->f_imm
= value
;
1023 case LM32_OPERAND_GP16
:
1024 fields
->f_imm
= value
;
1026 case LM32_OPERAND_HI16
:
1027 fields
->f_uimm
= value
;
1029 case LM32_OPERAND_IMM
:
1030 fields
->f_imm
= value
;
1032 case LM32_OPERAND_LO16
:
1033 fields
->f_uimm
= value
;
1035 case LM32_OPERAND_R0
:
1036 fields
->f_r0
= value
;
1038 case LM32_OPERAND_R1
:
1039 fields
->f_r1
= value
;
1041 case LM32_OPERAND_R2
:
1042 fields
->f_r2
= value
;
1044 case LM32_OPERAND_SHIFT
:
1045 fields
->f_shift
= value
;
1047 case LM32_OPERAND_UIMM
:
1048 fields
->f_uimm
= value
;
1050 case LM32_OPERAND_USER
:
1051 fields
->f_user
= value
;
1055 /* xgettext:c-format */
1056 opcodes_error_handler
1057 (_("internal error: unrecognized field %d while setting vma operand"),
1063 /* Function to call before using the instruction builder tables. */
1066 lm32_cgen_init_ibld_table (CGEN_CPU_DESC cd
)
1068 cd
->insert_handlers
= & lm32_cgen_insert_handlers
[0];
1069 cd
->extract_handlers
= & lm32_cgen_extract_handlers
[0];
1071 cd
->insert_operand
= lm32_cgen_insert_operand
;
1072 cd
->extract_operand
= lm32_cgen_extract_operand
;
1074 cd
->get_int_operand
= lm32_cgen_get_int_operand
;
1075 cd
->set_int_operand
= lm32_cgen_set_int_operand
;
1076 cd
->get_vma_operand
= lm32_cgen_get_vma_operand
;
1077 cd
->set_vma_operand
= lm32_cgen_set_vma_operand
;