1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode header for m32r.
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 Copyright (C) 1996-2018 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
35 #undef CGEN_DIS_HASH_SIZE
36 #define CGEN_DIS_HASH_SIZE 256
39 #define X(b) (((unsigned char *) (b))[0] & 0xf0)
40 #define CGEN_DIS_HASH(buffer, value) \
42 (X (buffer) == 0x40 || X (buffer) == 0xe0 || X (buffer) == 0x60 || X (buffer) == 0x50 ? 0 \
43 : X (buffer) == 0x70 || X (buffer) == 0xf0 ? (((unsigned char *) (buffer))[0] & 0xf) \
44 : X (buffer) == 0x30 ? ((((unsigned char *) (buffer))[1] & 0x70) >> 4) \
45 : ((((unsigned char *) (buffer))[1] & 0xf0) >> 4)))
47 #define CGEN_DIS_HASH(buffer, value) m32r_cgen_dis_hash (buffer, value)
48 extern unsigned int m32r_cgen_dis_hash (const char *, CGEN_INSN_INT
);
52 /* Enum declaration for m32r instruction types. */
53 typedef enum cgen_insn_type
{
54 M32R_INSN_INVALID
, M32R_INSN_ADD
, M32R_INSN_ADD3
, M32R_INSN_AND
55 , M32R_INSN_AND3
, M32R_INSN_OR
, M32R_INSN_OR3
, M32R_INSN_XOR
56 , M32R_INSN_XOR3
, M32R_INSN_ADDI
, M32R_INSN_ADDV
, M32R_INSN_ADDV3
57 , M32R_INSN_ADDX
, M32R_INSN_BC8
, M32R_INSN_BC24
, M32R_INSN_BEQ
58 , M32R_INSN_BEQZ
, M32R_INSN_BGEZ
, M32R_INSN_BGTZ
, M32R_INSN_BLEZ
59 , M32R_INSN_BLTZ
, M32R_INSN_BNEZ
, M32R_INSN_BL8
, M32R_INSN_BL24
60 , M32R_INSN_BCL8
, M32R_INSN_BCL24
, M32R_INSN_BNC8
, M32R_INSN_BNC24
61 , M32R_INSN_BNE
, M32R_INSN_BRA8
, M32R_INSN_BRA24
, M32R_INSN_BNCL8
62 , M32R_INSN_BNCL24
, M32R_INSN_CMP
, M32R_INSN_CMPI
, M32R_INSN_CMPU
63 , M32R_INSN_CMPUI
, M32R_INSN_CMPEQ
, M32R_INSN_CMPZ
, M32R_INSN_DIV
64 , M32R_INSN_DIVU
, M32R_INSN_REM
, M32R_INSN_REMU
, M32R_INSN_REMH
65 , M32R_INSN_REMUH
, M32R_INSN_REMB
, M32R_INSN_REMUB
, M32R_INSN_DIVUH
66 , M32R_INSN_DIVB
, M32R_INSN_DIVUB
, M32R_INSN_DIVH
, M32R_INSN_JC
67 , M32R_INSN_JNC
, M32R_INSN_JL
, M32R_INSN_JMP
, M32R_INSN_LD
68 , M32R_INSN_LD_D
, M32R_INSN_LDB
, M32R_INSN_LDB_D
, M32R_INSN_LDH
69 , M32R_INSN_LDH_D
, M32R_INSN_LDUB
, M32R_INSN_LDUB_D
, M32R_INSN_LDUH
70 , M32R_INSN_LDUH_D
, M32R_INSN_LD_PLUS
, M32R_INSN_LD24
, M32R_INSN_LDI8
71 , M32R_INSN_LDI16
, M32R_INSN_LOCK
, M32R_INSN_MACHI
, M32R_INSN_MACHI_A
72 , M32R_INSN_MACLO
, M32R_INSN_MACLO_A
, M32R_INSN_MACWHI
, M32R_INSN_MACWHI_A
73 , M32R_INSN_MACWLO
, M32R_INSN_MACWLO_A
, M32R_INSN_MUL
, M32R_INSN_MULHI
74 , M32R_INSN_MULHI_A
, M32R_INSN_MULLO
, M32R_INSN_MULLO_A
, M32R_INSN_MULWHI
75 , M32R_INSN_MULWHI_A
, M32R_INSN_MULWLO
, M32R_INSN_MULWLO_A
, M32R_INSN_MV
76 , M32R_INSN_MVFACHI
, M32R_INSN_MVFACHI_A
, M32R_INSN_MVFACLO
, M32R_INSN_MVFACLO_A
77 , M32R_INSN_MVFACMI
, M32R_INSN_MVFACMI_A
, M32R_INSN_MVFC
, M32R_INSN_MVTACHI
78 , M32R_INSN_MVTACHI_A
, M32R_INSN_MVTACLO
, M32R_INSN_MVTACLO_A
, M32R_INSN_MVTC
79 , M32R_INSN_NEG
, M32R_INSN_NOP
, M32R_INSN_NOT
, M32R_INSN_RAC
80 , M32R_INSN_RAC_DSI
, M32R_INSN_RACH
, M32R_INSN_RACH_DSI
, M32R_INSN_RTE
81 , M32R_INSN_SETH
, M32R_INSN_SLL
, M32R_INSN_SLL3
, M32R_INSN_SLLI
82 , M32R_INSN_SRA
, M32R_INSN_SRA3
, M32R_INSN_SRAI
, M32R_INSN_SRL
83 , M32R_INSN_SRL3
, M32R_INSN_SRLI
, M32R_INSN_ST
, M32R_INSN_ST_D
84 , M32R_INSN_STB
, M32R_INSN_STB_D
, M32R_INSN_STH
, M32R_INSN_STH_D
85 , M32R_INSN_ST_PLUS
, M32R_INSN_STH_PLUS
, M32R_INSN_STB_PLUS
, M32R_INSN_ST_MINUS
86 , M32R_INSN_SUB
, M32R_INSN_SUBV
, M32R_INSN_SUBX
, M32R_INSN_TRAP
87 , M32R_INSN_UNLOCK
, M32R_INSN_SATB
, M32R_INSN_SATH
, M32R_INSN_SAT
88 , M32R_INSN_PCMPBZ
, M32R_INSN_SADD
, M32R_INSN_MACWU1
, M32R_INSN_MSBLO
89 , M32R_INSN_MULWU1
, M32R_INSN_MACLH1
, M32R_INSN_SC
, M32R_INSN_SNC
90 , M32R_INSN_CLRPSW
, M32R_INSN_SETPSW
, M32R_INSN_BSET
, M32R_INSN_BCLR
94 /* Index of `invalid' insn place holder. */
95 #define CGEN_INSN_INVALID M32R_INSN_INVALID
97 /* Total number of insns in table. */
98 #define MAX_INSNS ((int) M32R_INSN_BTST + 1)
100 /* This struct records data prior to insertion or after extraction. */
135 #define CGEN_INIT_PARSE(od) \
138 #define CGEN_INIT_INSERT(od) \
141 #define CGEN_INIT_EXTRACT(od) \
144 #define CGEN_INIT_PRINT(od) \
153 #endif /* M32R_OPC_H */
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