1 /* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
2 Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2012
3 Free Software Foundation, Inc.
4 Written by Stephane Carrez (stcarrez@nerim.fr)
5 XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
27 #include "opcode/m68hc11.h"
32 static const char *const reg_name
[] =
37 static const char *const reg_src_table
[] =
39 "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
42 static const char *const reg_dst_table
[] =
44 "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
47 #define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
49 /* Prototypes for local functions. */
50 static int read_memory (bfd_vma
, bfd_byte
*, int, struct disassemble_info
*);
51 static int print_indexed_operand (bfd_vma
, struct disassemble_info
*,
52 int*, int, int, bfd_vma
, int);
53 static int print_insn (bfd_vma
, struct disassemble_info
*, int);
56 read_memory (bfd_vma memaddr
, bfd_byte
* buffer
, int size
,
57 struct disassemble_info
* info
)
61 /* Get first byte. Only one at a time because we don't know the
63 status
= (*info
->read_memory_func
) (memaddr
, buffer
, size
, info
);
66 (*info
->memory_error_func
) (status
, memaddr
, info
);
73 /* Read the 68HC12 indexed operand byte and print the corresponding mode.
74 Returns the number of bytes read or -1 if failure. */
76 print_indexed_operand (bfd_vma memaddr
, struct disassemble_info
* info
,
77 int* indirect
, int mov_insn
, int pc_offset
,
78 bfd_vma endaddr
, int arch
)
89 status
= read_memory (memaddr
, &buffer
[0], 1, info
);
95 /* n,r with 5-bits signed constant. */
96 if ((buffer
[0] & 0x20) == 0)
98 reg
= (buffer
[0] >> 6) & 3;
99 sval
= (buffer
[0] & 0x1f);
102 /* 68HC12 requires an adjustment for movb/movw pc relative modes. */
103 if (reg
== PC_REGNUM
&& info
->mach
== bfd_mach_m6812
&& mov_insn
)
105 (*info
->fprintf_func
) (info
->stream
, "0x%x,%s",
106 (unsigned short) sval
, reg_name
[reg
]);
108 if (reg
== PC_REGNUM
)
110 (* info
->fprintf_func
) (info
->stream
, " {");
111 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
112 (*info
->fprintf_func
) (info
->stream
, "0x");
113 (* info
->print_address_func
) (endaddr
+ sval
, info
);
114 (* info
->fprintf_func
) (info
->stream
, "}");
118 /* Auto pre/post increment/decrement. */
119 else if ((buffer
[0] & 0xc0) != 0xc0)
123 reg
= (buffer
[0] >> 6) & 3;
124 sval
= (buffer
[0] & 0x0f);
136 (*info
->fprintf_func
) (info
->stream
, "%d,%s%s%s",
137 (unsigned short) sval
,
138 (buffer
[0] & 0x10 ? "" : mode
),
139 reg_name
[reg
], (buffer
[0] & 0x10 ? mode
: ""));
142 /* [n,r] 16-bits offset indexed indirect. */
143 else if ((buffer
[0] & 0x07) == 3)
145 if ((mov_insn
) && (!(arch
& cpu9s12x
)))
147 (*info
->fprintf_func
) (info
->stream
, "<invalid op: 0x%x>",
151 reg
= (buffer
[0] >> 3) & 0x03;
152 status
= read_memory (memaddr
+ pos
, &buffer
[0], 2, info
);
159 sval
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
160 (*info
->fprintf_func
) (info
->stream
, "[0x%x,%s]",
161 sval
& 0x0ffff, reg_name
[reg
]);
166 /* n,r with 9 and 16 bit signed constant. */
167 else if ((buffer
[0] & 0x4) == 0)
169 if ((mov_insn
) && (!(arch
& cpu9s12x
)))
171 (*info
->fprintf_func
) (info
->stream
, "<invalid op: 0x%x>",
176 reg
= (buffer
[0] >> 3) & 0x03;
177 status
= read_memory (memaddr
+ pos
,
178 &buffer
[1], (buffer
[0] & 0x2 ? 2 : 1), info
);
185 sval
= ((buffer
[1] << 8) | (buffer
[2] & 0x0FF));
192 sval
= buffer
[1] & 0x00ff;
193 if (buffer
[0] & 0x01)
198 (*info
->fprintf_func
) (info
->stream
, "0x%x,%s",
199 (unsigned short) sval
, reg_name
[reg
]);
200 if (reg
== PC_REGNUM
)
202 (* info
->fprintf_func
) (info
->stream
, " {0x");
203 (* info
->print_address_func
) (endaddr
+ sval
, info
);
204 (* info
->fprintf_func
) (info
->stream
, "}");
209 reg
= (buffer
[0] >> 3) & 0x03;
210 switch (buffer
[0] & 3)
213 (*info
->fprintf_func
) (info
->stream
, "A,%s", reg_name
[reg
]);
216 (*info
->fprintf_func
) (info
->stream
, "B,%s", reg_name
[reg
]);
219 (*info
->fprintf_func
) (info
->stream
, "D,%s", reg_name
[reg
]);
223 (*info
->fprintf_func
) (info
->stream
, "[D,%s]", reg_name
[reg
]);
233 /* Disassemble one instruction at address 'memaddr'. Returns the number
234 of bytes used by that instruction. */
236 print_insn (bfd_vma memaddr
, struct disassemble_info
* info
, int arch
)
243 const struct m68hc11_opcode
*opcode
;
248 /* Get two bytes as all XGATE instructions are 16bit. */
249 status
= read_memory (memaddr
, buffer
, 2, info
);
254 code
= (buffer
[0] << 8) + buffer
[1];
256 /* Scan the opcode table until we find the opcode
257 with the corresponding page. */
258 opcode
= m68hc11_opcodes
;
259 for (i
= 0; i
< m68hc11_num_opcodes
; i
++, opcode
++)
261 if ((opcode
->opcode
!= (code
& opcode
->xg_mask
)) || (opcode
->arch
!= cpuxgate
))
263 /* We have found the opcode. Extract the operand and print it. */
264 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
265 format
= opcode
->format
;
266 if (format
& (M68XG_OP_NONE
))
268 /* Nothing to print. */
270 else if (format
& M68XG_OP_IMM3
)
271 (*info
->fprintf_func
) (info
->stream
, " #0x%x", (code
>> 8) & 0x7);
272 else if (format
& M68XG_OP_R_R
)
273 (*info
->fprintf_func
) (info
->stream
, " R%x, R%x",
274 (code
>> 8) & 0x7, (code
>> 5) & 0x7);
275 else if (format
& M68XG_OP_R_R_R
)
276 (*info
->fprintf_func
) (info
->stream
, " R%x, R%x, R%x",
277 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
278 else if (format
& M68XG_OP_RD_RB_RI
)
279 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, R%x)",
280 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
281 else if (format
& M68XG_OP_RD_RB_RIp
)
282 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, R%x+)",
283 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
284 else if (format
& M68XG_OP_RD_RB_mRI
)
285 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, -R%x)",
286 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
287 else if (format
& M68XG_OP_R_R_OFFS5
)
288 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, #0x%x)",
289 (code
>> 8) & 0x7, (code
>> 5) & 0x7, code
& 0x1f);
290 else if (format
& M68XG_OP_R_IMM8
)
291 (*info
->fprintf_func
) (info
->stream
, " R%x, #0x%02x",
292 (code
>> 8) & 0x7, code
& 0xff);
293 else if (format
& M68XG_OP_R_IMM4
)
294 (*info
->fprintf_func
) (info
->stream
, " R%x, #0x%x",
295 (code
>> 8) & 0x7, (code
& 0xf0) >> 4);
296 else if (format
& M68XG_OP_REL9
)
298 (*info
->fprintf_func
) (info
->stream
, " 0x");
299 val
= (buffer
[0] & 0x1) ? buffer
[1] | 0xFFFFFF00 : buffer
[1];
300 (*info
->print_address_func
) (memaddr
+ (val
<< 1) + 2, info
);
302 else if (format
& M68XG_OP_REL10
)
304 (*info
->fprintf_func
) (info
->stream
, " 0x");
305 val
= (buffer
[0] << 8) | (unsigned int) buffer
[1];
310 (*info
->print_address_func
) (memaddr
+ (val
<< 1) + 2, info
);
312 else if ((code
& 0x00ff) == 0x00f8)
313 (*info
->fprintf_func
) (info
->stream
, " R%x, CCR", (code
>> 8) & 0x7);
314 else if ((code
& 0x00ff) == 0x00f9)
315 (*info
->fprintf_func
) (info
->stream
, " CCR, R%x", (code
>> 8) & 0x7);
316 else if ((code
& 0x00ff) == 0x0)
317 (*info
->fprintf_func
) (info
->stream
, " R%x, PC", (code
>> 8) & 0x7);
318 else if (format
& M68XG_OP_R
)
320 /* Special cases for TFR. */
321 if ((code
& 0xf8ff) == 0x00f8)
322 (*info
->fprintf_func
) (info
->stream
, " R%x, CCR", (code
>> 8) & 0x7);
323 else if ((code
& 0xf8ff) == 0x00f9)
324 (*info
->fprintf_func
) (info
->stream
, " CCR, R%x", (code
>> 8) & 0x7);
325 else if ((code
& 0xf8ff) == 0x00fa)
326 (*info
->fprintf_func
) (info
->stream
, " R%x, PC", (code
>> 8) & 0x7);
328 (*info
->fprintf_func
) (info
->stream
, " R%x", (code
>> 8) & 0x7);
331 /* Opcode not recognized. */
332 (*info
->fprintf_func
) (info
->stream
, "Not yet handled TEST .byte\t0x%04x", code
);
336 /* Opcode not recognized. */
337 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%04x", code
);
338 return 2; /* Everything is two bytes. */
343 /* Get first byte. Only one at a time because we don't know the
345 status
= read_memory (memaddr
, buffer
, 1, info
);
353 /* Look for page2,3,4 opcodes. */
354 if (code
== M6811_OPCODE_PAGE2
)
357 format
= M6811_OP_PAGE2
;
359 else if (code
== M6811_OPCODE_PAGE3
&& arch
== cpu6811
)
362 format
= M6811_OP_PAGE3
;
364 else if (code
== M6811_OPCODE_PAGE4
&& arch
== cpu6811
)
367 format
= M6811_OP_PAGE4
;
370 /* We are in page2,3,4; get the real opcode. */
373 status
= read_memory (memaddr
+ pos
, &buffer
[1], 1, info
);
380 /* Look first for a 68HC12 alias. All of them are 2-bytes long and
381 in page 1. There is no operand to print. We read the second byte
382 only when we have a possible match. */
383 if ((arch
& cpu6812
) && format
== 0)
387 /* Walk the alias table to find a code1+code2 match. */
388 for (i
= 0; i
< m68hc12_num_alias
; i
++)
390 if (m68hc12_alias
[i
].code1
== code
)
394 status
= read_memory (memaddr
+ pos
+ 1,
395 &buffer
[1], 1, info
);
401 if (m68hc12_alias
[i
].code2
== (unsigned char) buffer
[1])
403 (*info
->fprintf_func
) (info
->stream
, "%s",
404 m68hc12_alias
[i
].name
);
413 /* Scan the opcode table until we find the opcode
414 with the corresponding page. */
415 opcode
= m68hc11_opcodes
;
416 for (i
= 0; i
< m68hc11_num_opcodes
; i
++, opcode
++)
420 int pc_dst_offset
= 0;
422 if ((opcode
->arch
& arch
) == 0)
424 if (opcode
->opcode
!= code
)
426 if ((opcode
->format
& OP_PAGE_MASK
) != format
)
429 if (opcode
->format
& M6812_OP_REG
)
434 if (opcode
->format
& M6811_OP_JUMP_REL
)
439 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
444 for (j
= 0; i
+ j
< m68hc11_num_opcodes
; j
++)
446 if ((opcode
[j
].arch
& arch
) == 0)
448 if (opcode
[j
].opcode
!= code
)
452 if (!(opcode
[j
].format
& M6811_OP_JUMP_REL
))
455 if ((opcode
[j
].format
& M6812_OP_IBCC_MARKER
)
456 && (buffer
[0] & 0xc0) != 0x80)
458 if ((opcode
[j
].format
& M6812_OP_TBCC_MARKER
)
459 && (buffer
[0] & 0xc0) != 0x40)
461 if ((opcode
[j
].format
& M6812_OP_DBCC_MARKER
)
462 && (buffer
[0] & 0xc0) != 0)
464 if ((opcode
[j
].format
& M6812_OP_EQ_MARKER
)
465 && (buffer
[0] & 0x20) == 0)
467 if (!(opcode
[j
].format
& M6812_OP_EQ_MARKER
)
468 && (buffer
[0] & 0x20) != 0)
472 if (opcode
[j
].format
& M6812_OP_EXG_MARKER
&& buffer
[0] & 0x80)
474 if ((opcode
[j
].format
& M6812_OP_SEX_MARKER
)
475 && (((buffer
[0] & 0x07) >= 3 && (buffer
[0] & 7) <= 7))
476 && ((buffer
[0] & 0x0f0) <= 0x20))
478 if ((opcode
[j
].format
& M6812_OP_SEX_MARKER
)
480 && ((buffer
[0] == 0x4d) || (buffer
[0] == 0x4e)))
482 if (opcode
[j
].format
& M6812_OP_TFR_MARKER
483 && !(buffer
[0] & 0x80))
486 if (i
+ j
< m68hc11_num_opcodes
)
490 /* We have found the opcode. Extract the operand and print it. */
491 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
493 format
= opcode
->format
;
494 if (format
& (M6811_OP_MASK
| M6811_OP_BITMASK
495 | M6811_OP_JUMP_REL
| M6812_OP_JUMP_REL16
))
497 (*info
->fprintf_func
) (info
->stream
, "\t");
500 /* The movb and movw must be handled in a special way...
501 The source constant 'ii' is not always at the same place.
502 This is the same for the destination for the post-indexed byte.
503 The 'offset' is used to do the appropriate correction.
506 for constant for destination
507 movb 18 OB ii hh ll 0 0
509 18 08 xb ff ii 2 1 9 bit
510 18 08 xb ee ff ii 3 1 16 bit
511 18 0C hh ll hh ll 0 0
516 movw 18 03 jj kk hh ll 0 0
518 18 04 hh ll hh ll 0 0
523 After the source operand is read, the position 'pos' is incremented
524 this explains the negative offset for destination.
526 movb/movw above are the only instructions with this matching
528 offset
= ((format
& M6812_OP_IDX_P2
)
529 && (format
& (M6811_OP_IMM8
| M6811_OP_IMM16
|
534 /* Check xb to see position of data. */
535 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
541 if (((buffer
[0] & 0xe0) == 0xe0) && ((buffer
[0] & 0x04) == 0))
544 if ((buffer
[0] & 0x02) == 0)
557 /* Operand with one more byte: - immediate, offset,
558 direct-low address. */
560 (M6811_OP_IMM8
| M6811_OP_IX
| M6811_OP_IY
| M6811_OP_DIRECT
))
562 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 1, info
);
566 /* This movb/movw is special (see above). */
579 if (format
& M6811_OP_IMM8
)
581 (*info
->fprintf_func
) (info
->stream
, "#0x%x", (int) buffer
[0]);
582 format
&= ~M6811_OP_IMM8
;
583 /* Set PC destination offset. */
586 else if (format
& M6811_OP_IX
)
588 /* Offsets are in range 0..255, print them unsigned. */
589 (*info
->fprintf_func
) (info
->stream
, "0x%x,x", buffer
[0] & 0x0FF);
590 format
&= ~M6811_OP_IX
;
592 else if (format
& M6811_OP_IY
)
594 (*info
->fprintf_func
) (info
->stream
, "0x%x,y", buffer
[0] & 0x0FF);
595 format
&= ~M6811_OP_IY
;
597 else if (format
& M6811_OP_DIRECT
)
599 (*info
->fprintf_func
) (info
->stream
, "*");
600 if (info
->symtab_size
> 0) /* Avoid duplicate 0x. */
601 (*info
->fprintf_func
) (info
->stream
, "0x");
602 (*info
->print_address_func
) (buffer
[0] & 0x0FF, info
);
603 format
&= ~M6811_OP_DIRECT
;
607 #define M6812_DST_MOVE (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)
608 #define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
609 /* Analyze the 68HC12 indexed byte. */
610 if (format
& M6812_INDEXED_FLAGS
)
615 endaddr
= memaddr
+ pos
+ 1;
616 if (format
& M6811_OP_IND16
)
620 status
= print_indexed_operand (memaddr
+ pos
, info
, &indirect
,
621 (format
& M6812_DST_MOVE
),
622 pc_src_offset
, endaddr
, arch
);
628 /* The indirect addressing mode of the call instruction does
629 not need the page code. */
630 if ((format
& M6812_OP_PAGE
) && indirect
)
631 format
&= ~M6812_OP_PAGE
;
634 /* 68HC12 dbcc/ibcc/tbcc operands. */
635 if ((format
& M6812_OP_REG
) && (format
& M6811_OP_JUMP_REL
))
637 status
= read_memory (memaddr
+ pos
, &buffer
[0], 2, info
);
641 (*info
->fprintf_func
) (info
->stream
, "%s,",
642 reg_src_table
[buffer
[0] & 0x07]);
643 sval
= buffer
[1] & 0x0ff;
644 if (buffer
[0] & 0x10)
648 (*info
->fprintf_func
) (info
->stream
, "0x");
649 (*info
->print_address_func
) (memaddr
+ pos
+ sval
, info
);
650 format
&= ~(M6812_OP_REG
| M6811_OP_JUMP_REL
);
652 else if (format
& (M6812_OP_REG
| M6812_OP_REG_2
))
654 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
659 (*info
->fprintf_func
) (info
->stream
, "%s,%s",
660 reg_src_table
[(buffer
[0] >> 4) & 7],
661 reg_dst_table
[(buffer
[0] & 7)]);
664 if (format
& (M6811_OP_IMM16
| M6811_OP_IND16
))
670 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 2, info
);
674 if (format
& M6812_OP_IDX_P2
)
680 val
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
684 if (format
& M6812_OP_PAGE
)
686 status
= read_memory (memaddr
+ pos
+ offset
, buffer
, 1, info
);
690 page
= (unsigned) buffer
[0];
691 if (addr
>= M68HC12_BANK_BASE
&& addr
< 0x0c000)
692 addr
= ((val
- M68HC12_BANK_BASE
)
693 | (page
<< M68HC12_BANK_SHIFT
))
696 else if ((arch
& cpu6812
)
697 && addr
>= M68HC12_BANK_BASE
&& addr
< 0x0c000)
702 if (memaddr
>= M68HC12_BANK_VIRT
)
703 cur_page
= ((memaddr
- M68HC12_BANK_VIRT
)
704 >> M68HC12_BANK_SHIFT
);
708 vaddr
= ((addr
- M68HC12_BANK_BASE
)
709 + (cur_page
<< M68HC12_BANK_SHIFT
))
711 if (!info
->symbol_at_address_func (addr
, info
)
712 && info
->symbol_at_address_func (vaddr
, info
))
715 if (format
& M6811_OP_IMM16
)
717 format
&= ~M6811_OP_IMM16
;
718 (*info
->fprintf_func
) (info
->stream
, "#");
722 format
&= ~M6811_OP_IND16
;
725 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
726 (*info
->fprintf_func
) (info
->stream
, "0x");
728 (*info
->print_address_func
) (addr
, info
);
729 if (format
& M6812_OP_PAGE
)
731 (* info
->fprintf_func
) (info
->stream
, " {");
732 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
733 (*info
->fprintf_func
) (info
->stream
, "0x");
734 (* info
->print_address_func
) (val
, info
);
735 (* info
->fprintf_func
) (info
->stream
, ", 0x%x}", page
);
736 format
&= ~M6812_OP_PAGE
;
741 if (format
& M6812_OP_IDX_P2
)
743 (*info
->fprintf_func
) (info
->stream
, ", ");
744 status
= print_indexed_operand (memaddr
+ pos
+ offset
, info
,
746 memaddr
+ pos
+ offset
+ 1, arch
);
752 if (format
& M6812_OP_IND16_P2
)
756 (*info
->fprintf_func
) (info
->stream
, ", ");
758 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 2, info
);
764 val
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
766 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
767 (*info
->fprintf_func
) (info
->stream
, "0x");
768 (*info
->print_address_func
) (val
, info
);
771 /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
772 and in that order. The brset/brclr insn have a bitmask and then
773 a relative branch offset. */
774 if (format
& M6811_OP_BITMASK
)
776 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
781 (*info
->fprintf_func
) (info
->stream
, ", #0x%02x%s",
783 (format
& M6811_OP_JUMP_REL
? ", " : ""));
784 format
&= ~M6811_OP_BITMASK
;
786 if (format
& M6811_OP_JUMP_REL
)
790 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
794 (*info
->fprintf_func
) (info
->stream
, "0x");
796 val
= (buffer
[0] & 0x80) ? buffer
[0] | 0xFFFFFF00 : buffer
[0];
797 (*info
->print_address_func
) (memaddr
+ pos
+ val
, info
);
798 format
&= ~M6811_OP_JUMP_REL
;
800 else if (format
& M6812_OP_JUMP_REL16
)
804 status
= read_memory (memaddr
+ pos
, &buffer
[0], 2, info
);
809 val
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
813 (*info
->fprintf_func
) (info
->stream
, "0x");
814 (*info
->print_address_func
) (memaddr
+ pos
+ val
, info
);
815 format
&= ~M6812_OP_JUMP_REL16
;
818 if (format
& M6812_OP_PAGE
)
822 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 1, info
);
828 val
= buffer
[0] & 0x0ff;
829 (*info
->fprintf_func
) (info
->stream
, ", 0x%x", val
);
833 /* Consistency check. 'format' must be 0, so that we have handled
834 all formats; and the computed size of the insn must match the
835 opcode table content. */
836 if (format
& ~(M6811_OP_PAGE4
| M6811_OP_PAGE3
| M6811_OP_PAGE2
))
837 (*info
->fprintf_func
) (info
->stream
, "; Error, format: %lx", format
);
839 if (pos
!= opcode
->size
)
840 (*info
->fprintf_func
) (info
->stream
, "; Error, size: %ld expect %d",
846 /* Opcode not recognized. */
847 if (format
== M6811_OP_PAGE2
&& arch
& cpu6812
848 && ((code
>= 0x30 && code
<= 0x39) || (code
>= 0x40)))
849 (*info
->fprintf_func
) (info
->stream
, "trap\t#0x%02x", code
& 0x0ff);
851 else if (format
== M6811_OP_PAGE2
)
852 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x, 0x%02x",
853 M6811_OPCODE_PAGE2
, code
);
854 else if (format
== M6811_OP_PAGE3
)
855 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x, 0x%02x",
856 M6811_OPCODE_PAGE3
, code
);
857 else if (format
== M6811_OP_PAGE4
)
858 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x, 0x%02x",
859 M6811_OPCODE_PAGE4
, code
);
861 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x", code
);
866 /* Disassemble one instruction at address 'memaddr'. Returns the number
867 of bytes used by that instruction. */
869 print_insn_m68hc11 (bfd_vma memaddr
, struct disassemble_info
* info
)
871 return print_insn (memaddr
, info
, cpu6811
);
875 print_insn_m68hc12 (bfd_vma memaddr
, struct disassemble_info
* info
)
877 return print_insn (memaddr
, info
, cpu6812
);
881 print_insn_m9s12x (bfd_vma memaddr
, struct disassemble_info
* info
)
883 return print_insn (memaddr
, info
, cpu6812
|cpu9s12x
);
887 print_insn_m9s12xg (bfd_vma memaddr
, struct disassemble_info
* info
)
889 return print_insn (memaddr
, info
, cpuxgate
);
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