1 /* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
2 Copyright (C) 1999-2017 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@nerim.fr)
4 XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
26 #include "opcode/m68hc11.h"
27 #include "disassemble.h"
31 static const char *const reg_name
[] =
36 static const char *const reg_src_table
[] =
38 "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
41 static const char *const reg_dst_table
[] =
43 "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
46 #define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
48 /* Prototypes for local functions. */
49 static int read_memory (bfd_vma
, bfd_byte
*, int, struct disassemble_info
*);
50 static int print_indexed_operand (bfd_vma
, struct disassemble_info
*,
51 int*, int, int, bfd_vma
, int);
52 static int print_insn (bfd_vma
, struct disassemble_info
*, int);
55 read_memory (bfd_vma memaddr
, bfd_byte
* buffer
, int size
,
56 struct disassemble_info
* info
)
60 /* Get first byte. Only one at a time because we don't know the
62 status
= (*info
->read_memory_func
) (memaddr
, buffer
, size
, info
);
65 (*info
->memory_error_func
) (status
, memaddr
, info
);
72 /* Read the 68HC12 indexed operand byte and print the corresponding mode.
73 Returns the number of bytes read or -1 if failure. */
75 print_indexed_operand (bfd_vma memaddr
, struct disassemble_info
* info
,
76 int* indirect
, int mov_insn
, int pc_offset
,
77 bfd_vma endaddr
, int arch
)
88 status
= read_memory (memaddr
, &buffer
[0], 1, info
);
94 /* n,r with 5-bits signed constant. */
95 if ((buffer
[0] & 0x20) == 0)
97 reg
= (buffer
[0] >> 6) & 3;
98 sval
= (buffer
[0] & 0x1f);
101 /* 68HC12 requires an adjustment for movb/movw pc relative modes. */
102 if (reg
== PC_REGNUM
&& info
->mach
== bfd_mach_m6812
&& mov_insn
)
104 (*info
->fprintf_func
) (info
->stream
, "0x%x,%s",
105 (unsigned short) sval
, reg_name
[reg
]);
107 if (reg
== PC_REGNUM
)
109 (* info
->fprintf_func
) (info
->stream
, " {");
110 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
111 (*info
->fprintf_func
) (info
->stream
, "0x");
112 (* info
->print_address_func
) (endaddr
+ sval
, info
);
113 (* info
->fprintf_func
) (info
->stream
, "}");
117 /* Auto pre/post increment/decrement. */
118 else if ((buffer
[0] & 0xc0) != 0xc0)
122 reg
= (buffer
[0] >> 6) & 3;
123 sval
= (buffer
[0] & 0x0f);
135 (*info
->fprintf_func
) (info
->stream
, "%d,%s%s%s",
136 (unsigned short) sval
,
137 (buffer
[0] & 0x10 ? "" : mode
),
138 reg_name
[reg
], (buffer
[0] & 0x10 ? mode
: ""));
141 /* [n,r] 16-bits offset indexed indirect. */
142 else if ((buffer
[0] & 0x07) == 3)
144 if ((mov_insn
) && (!(arch
& cpu9s12x
)))
146 (*info
->fprintf_func
) (info
->stream
, "<invalid op: 0x%x>",
150 reg
= (buffer
[0] >> 3) & 0x03;
151 status
= read_memory (memaddr
+ pos
, &buffer
[0], 2, info
);
158 sval
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
159 (*info
->fprintf_func
) (info
->stream
, "[0x%x,%s]",
160 sval
& 0x0ffff, reg_name
[reg
]);
165 /* n,r with 9 and 16 bit signed constant. */
166 else if ((buffer
[0] & 0x4) == 0)
168 if ((mov_insn
) && (!(arch
& cpu9s12x
)))
170 (*info
->fprintf_func
) (info
->stream
, "<invalid op: 0x%x>",
175 reg
= (buffer
[0] >> 3) & 0x03;
176 status
= read_memory (memaddr
+ pos
,
177 &buffer
[1], (buffer
[0] & 0x2 ? 2 : 1), info
);
184 sval
= ((buffer
[1] << 8) | (buffer
[2] & 0x0FF));
191 sval
= buffer
[1] & 0x00ff;
192 if (buffer
[0] & 0x01)
197 (*info
->fprintf_func
) (info
->stream
, "0x%x,%s",
198 (unsigned short) sval
, reg_name
[reg
]);
199 if (reg
== PC_REGNUM
)
201 (* info
->fprintf_func
) (info
->stream
, " {0x");
202 (* info
->print_address_func
) (endaddr
+ sval
, info
);
203 (* info
->fprintf_func
) (info
->stream
, "}");
208 reg
= (buffer
[0] >> 3) & 0x03;
209 switch (buffer
[0] & 3)
212 (*info
->fprintf_func
) (info
->stream
, "A,%s", reg_name
[reg
]);
215 (*info
->fprintf_func
) (info
->stream
, "B,%s", reg_name
[reg
]);
218 (*info
->fprintf_func
) (info
->stream
, "D,%s", reg_name
[reg
]);
222 (*info
->fprintf_func
) (info
->stream
, "[D,%s]", reg_name
[reg
]);
232 /* Disassemble one instruction at address 'memaddr'. Returns the number
233 of bytes used by that instruction. */
235 print_insn (bfd_vma memaddr
, struct disassemble_info
* info
, int arch
)
242 const struct m68hc11_opcode
*opcode
;
247 /* Get two bytes as all XGATE instructions are 16bit. */
248 status
= read_memory (memaddr
, buffer
, 2, info
);
253 code
= (buffer
[0] << 8) + buffer
[1];
255 /* Scan the opcode table until we find the opcode
256 with the corresponding page. */
257 opcode
= m68hc11_opcodes
;
258 for (i
= 0; i
< m68hc11_num_opcodes
; i
++, opcode
++)
260 if ((opcode
->opcode
!= (code
& opcode
->xg_mask
)) || (opcode
->arch
!= cpuxgate
))
262 /* We have found the opcode. Extract the operand and print it. */
263 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
264 format
= opcode
->format
;
265 if (format
& (M68XG_OP_NONE
))
267 /* Nothing to print. */
269 else if (format
& M68XG_OP_IMM3
)
270 (*info
->fprintf_func
) (info
->stream
, " #0x%x", (code
>> 8) & 0x7);
271 else if (format
& M68XG_OP_R_R
)
272 (*info
->fprintf_func
) (info
->stream
, " R%x, R%x",
273 (code
>> 8) & 0x7, (code
>> 5) & 0x7);
274 else if (format
& M68XG_OP_R_R_R
)
275 (*info
->fprintf_func
) (info
->stream
, " R%x, R%x, R%x",
276 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
277 else if (format
& M68XG_OP_RD_RB_RI
)
278 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, R%x)",
279 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
280 else if (format
& M68XG_OP_RD_RB_RIp
)
281 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, R%x+)",
282 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
283 else if (format
& M68XG_OP_RD_RB_mRI
)
284 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, -R%x)",
285 (code
>> 8) & 0x7, (code
>> 5) & 0x7, (code
>> 2) & 0x7);
286 else if (format
& M68XG_OP_R_R_OFFS5
)
287 (*info
->fprintf_func
) (info
->stream
, " R%x, (R%x, #0x%x)",
288 (code
>> 8) & 0x7, (code
>> 5) & 0x7, code
& 0x1f);
289 else if (format
& M68XG_OP_R_IMM8
)
290 (*info
->fprintf_func
) (info
->stream
, " R%x, #0x%02x",
291 (code
>> 8) & 0x7, code
& 0xff);
292 else if (format
& M68XG_OP_R_IMM4
)
293 (*info
->fprintf_func
) (info
->stream
, " R%x, #0x%x",
294 (code
>> 8) & 0x7, (code
& 0xf0) >> 4);
295 else if (format
& M68XG_OP_REL9
)
297 (*info
->fprintf_func
) (info
->stream
, " 0x");
298 val
= (buffer
[0] & 0x1) ? buffer
[1] | 0xFFFFFF00 : buffer
[1];
299 (*info
->print_address_func
) (memaddr
+ (val
<< 1) + 2, info
);
301 else if (format
& M68XG_OP_REL10
)
303 (*info
->fprintf_func
) (info
->stream
, " 0x");
304 val
= (buffer
[0] << 8) | (unsigned int) buffer
[1];
309 (*info
->print_address_func
) (memaddr
+ (val
<< 1) + 2, info
);
311 else if ((code
& 0x00ff) == 0x00f8)
312 (*info
->fprintf_func
) (info
->stream
, " R%x, CCR", (code
>> 8) & 0x7);
313 else if ((code
& 0x00ff) == 0x00f9)
314 (*info
->fprintf_func
) (info
->stream
, " CCR, R%x", (code
>> 8) & 0x7);
315 else if ((code
& 0x00ff) == 0x0)
316 (*info
->fprintf_func
) (info
->stream
, " R%x, PC", (code
>> 8) & 0x7);
317 else if (format
& M68XG_OP_R
)
319 /* Special cases for TFR. */
320 if ((code
& 0xf8ff) == 0x00f8)
321 (*info
->fprintf_func
) (info
->stream
, " R%x, CCR", (code
>> 8) & 0x7);
322 else if ((code
& 0xf8ff) == 0x00f9)
323 (*info
->fprintf_func
) (info
->stream
, " CCR, R%x", (code
>> 8) & 0x7);
324 else if ((code
& 0xf8ff) == 0x00fa)
325 (*info
->fprintf_func
) (info
->stream
, " R%x, PC", (code
>> 8) & 0x7);
327 (*info
->fprintf_func
) (info
->stream
, " R%x", (code
>> 8) & 0x7);
330 /* Opcode not recognized. */
331 (*info
->fprintf_func
) (info
->stream
, "Not yet handled TEST .byte\t0x%04x", code
);
335 /* Opcode not recognized. */
336 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%04x", code
);
337 return 2; /* Everything is two bytes. */
342 /* Get first byte. Only one at a time because we don't know the
344 status
= read_memory (memaddr
, buffer
, 1, info
);
352 /* Look for page2,3,4 opcodes. */
353 if (code
== M6811_OPCODE_PAGE2
)
356 format
= M6811_OP_PAGE2
;
358 else if (code
== M6811_OPCODE_PAGE3
&& arch
== cpu6811
)
361 format
= M6811_OP_PAGE3
;
363 else if (code
== M6811_OPCODE_PAGE4
&& arch
== cpu6811
)
366 format
= M6811_OP_PAGE4
;
369 /* We are in page2,3,4; get the real opcode. */
372 status
= read_memory (memaddr
+ pos
, &buffer
[1], 1, info
);
379 /* Look first for a 68HC12 alias. All of them are 2-bytes long and
380 in page 1. There is no operand to print. We read the second byte
381 only when we have a possible match. */
382 if ((arch
& cpu6812
) && format
== 0)
386 /* Walk the alias table to find a code1+code2 match. */
387 for (i
= 0; i
< m68hc12_num_alias
; i
++)
389 if (m68hc12_alias
[i
].code1
== code
)
393 status
= read_memory (memaddr
+ pos
+ 1,
394 &buffer
[1], 1, info
);
400 if (m68hc12_alias
[i
].code2
== (unsigned char) buffer
[1])
402 (*info
->fprintf_func
) (info
->stream
, "%s",
403 m68hc12_alias
[i
].name
);
412 /* Scan the opcode table until we find the opcode
413 with the corresponding page. */
414 opcode
= m68hc11_opcodes
;
415 for (i
= 0; i
< m68hc11_num_opcodes
; i
++, opcode
++)
419 int pc_dst_offset
= 0;
421 if ((opcode
->arch
& arch
) == 0)
423 if (opcode
->opcode
!= code
)
425 if ((opcode
->format
& OP_PAGE_MASK
) != format
)
428 if (opcode
->format
& M6812_OP_REG
)
433 if (opcode
->format
& M6811_OP_JUMP_REL
)
438 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
443 for (j
= 0; i
+ j
< m68hc11_num_opcodes
; j
++)
445 if ((opcode
[j
].arch
& arch
) == 0)
447 if (opcode
[j
].opcode
!= code
)
451 if (!(opcode
[j
].format
& M6811_OP_JUMP_REL
))
454 if ((opcode
[j
].format
& M6812_OP_IBCC_MARKER
)
455 && (buffer
[0] & 0xc0) != 0x80)
457 if ((opcode
[j
].format
& M6812_OP_TBCC_MARKER
)
458 && (buffer
[0] & 0xc0) != 0x40)
460 if ((opcode
[j
].format
& M6812_OP_DBCC_MARKER
)
461 && (buffer
[0] & 0xc0) != 0)
463 if ((opcode
[j
].format
& M6812_OP_EQ_MARKER
)
464 && (buffer
[0] & 0x20) == 0)
466 if (!(opcode
[j
].format
& M6812_OP_EQ_MARKER
)
467 && (buffer
[0] & 0x20) != 0)
471 if (opcode
[j
].format
& M6812_OP_EXG_MARKER
&& buffer
[0] & 0x80)
473 if ((opcode
[j
].format
& M6812_OP_SEX_MARKER
)
474 && (((buffer
[0] & 0x07) >= 3 && (buffer
[0] & 7) <= 7))
475 && ((buffer
[0] & 0x0f0) <= 0x20))
477 if ((opcode
[j
].format
& M6812_OP_SEX_MARKER
)
479 && ((buffer
[0] == 0x4d) || (buffer
[0] == 0x4e)))
481 if (opcode
[j
].format
& M6812_OP_TFR_MARKER
482 && !(buffer
[0] & 0x80))
485 if (i
+ j
< m68hc11_num_opcodes
)
489 /* We have found the opcode. Extract the operand and print it. */
490 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
492 format
= opcode
->format
;
493 if (format
& (M6811_OP_MASK
| M6811_OP_BITMASK
494 | M6811_OP_JUMP_REL
| M6812_OP_JUMP_REL16
))
496 (*info
->fprintf_func
) (info
->stream
, "\t");
499 /* The movb and movw must be handled in a special way...
500 The source constant 'ii' is not always at the same place.
501 This is the same for the destination for the post-indexed byte.
502 The 'offset' is used to do the appropriate correction.
505 for constant for destination
506 movb 18 OB ii hh ll 0 0
508 18 08 xb ff ii 2 1 9 bit
509 18 08 xb ee ff ii 3 1 16 bit
510 18 0C hh ll hh ll 0 0
515 movw 18 03 jj kk hh ll 0 0
517 18 04 hh ll hh ll 0 0
522 After the source operand is read, the position 'pos' is incremented
523 this explains the negative offset for destination.
525 movb/movw above are the only instructions with this matching
527 offset
= ((format
& M6812_OP_IDX_P2
)
528 && (format
& (M6811_OP_IMM8
| M6811_OP_IMM16
|
533 /* Check xb to see position of data. */
534 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
540 if (((buffer
[0] & 0xe0) == 0xe0) && ((buffer
[0] & 0x04) == 0))
543 if ((buffer
[0] & 0x02) == 0)
556 /* Operand with one more byte: - immediate, offset,
557 direct-low address. */
559 (M6811_OP_IMM8
| M6811_OP_IX
| M6811_OP_IY
| M6811_OP_DIRECT
))
561 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 1, info
);
565 /* This movb/movw is special (see above). */
578 if (format
& M6811_OP_IMM8
)
580 (*info
->fprintf_func
) (info
->stream
, "#0x%x", (int) buffer
[0]);
581 format
&= ~M6811_OP_IMM8
;
582 /* Set PC destination offset. */
585 else if (format
& M6811_OP_IX
)
587 /* Offsets are in range 0..255, print them unsigned. */
588 (*info
->fprintf_func
) (info
->stream
, "0x%x,x", buffer
[0] & 0x0FF);
589 format
&= ~M6811_OP_IX
;
591 else if (format
& M6811_OP_IY
)
593 (*info
->fprintf_func
) (info
->stream
, "0x%x,y", buffer
[0] & 0x0FF);
594 format
&= ~M6811_OP_IY
;
596 else if (format
& M6811_OP_DIRECT
)
598 (*info
->fprintf_func
) (info
->stream
, "*");
599 if (info
->symtab_size
> 0) /* Avoid duplicate 0x. */
600 (*info
->fprintf_func
) (info
->stream
, "0x");
601 (*info
->print_address_func
) (buffer
[0] & 0x0FF, info
);
602 format
&= ~M6811_OP_DIRECT
;
606 #define M6812_DST_MOVE (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)
607 #define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
608 /* Analyze the 68HC12 indexed byte. */
609 if (format
& M6812_INDEXED_FLAGS
)
614 endaddr
= memaddr
+ pos
+ 1;
615 if (format
& M6811_OP_IND16
)
619 status
= print_indexed_operand (memaddr
+ pos
, info
, &indirect
,
620 (format
& M6812_DST_MOVE
),
621 pc_src_offset
, endaddr
, arch
);
627 /* The indirect addressing mode of the call instruction does
628 not need the page code. */
629 if ((format
& M6812_OP_PAGE
) && indirect
)
630 format
&= ~M6812_OP_PAGE
;
633 /* 68HC12 dbcc/ibcc/tbcc operands. */
634 if ((format
& M6812_OP_REG
) && (format
& M6811_OP_JUMP_REL
))
636 status
= read_memory (memaddr
+ pos
, &buffer
[0], 2, info
);
640 (*info
->fprintf_func
) (info
->stream
, "%s,",
641 reg_src_table
[buffer
[0] & 0x07]);
642 sval
= buffer
[1] & 0x0ff;
643 if (buffer
[0] & 0x10)
647 (*info
->fprintf_func
) (info
->stream
, "0x");
648 (*info
->print_address_func
) (memaddr
+ pos
+ sval
, info
);
649 format
&= ~(M6812_OP_REG
| M6811_OP_JUMP_REL
);
651 else if (format
& (M6812_OP_REG
| M6812_OP_REG_2
))
653 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
658 (*info
->fprintf_func
) (info
->stream
, "%s,%s",
659 reg_src_table
[(buffer
[0] >> 4) & 7],
660 reg_dst_table
[(buffer
[0] & 7)]);
663 if (format
& (M6811_OP_IMM16
| M6811_OP_IND16
))
669 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 2, info
);
673 if (format
& M6812_OP_IDX_P2
)
679 val
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
683 if (format
& M6812_OP_PAGE
)
685 status
= read_memory (memaddr
+ pos
+ offset
, buffer
, 1, info
);
689 page
= (unsigned) buffer
[0];
690 if (addr
>= M68HC12_BANK_BASE
&& addr
< 0x0c000)
691 addr
= ((val
- M68HC12_BANK_BASE
)
692 | (page
<< M68HC12_BANK_SHIFT
))
695 else if ((arch
& cpu6812
)
696 && addr
>= M68HC12_BANK_BASE
&& addr
< 0x0c000)
701 if (memaddr
>= M68HC12_BANK_VIRT
)
702 cur_page
= ((memaddr
- M68HC12_BANK_VIRT
)
703 >> M68HC12_BANK_SHIFT
);
707 vaddr
= ((addr
- M68HC12_BANK_BASE
)
708 + (cur_page
<< M68HC12_BANK_SHIFT
))
710 if (!info
->symbol_at_address_func (addr
, info
)
711 && info
->symbol_at_address_func (vaddr
, info
))
714 if (format
& M6811_OP_IMM16
)
716 format
&= ~M6811_OP_IMM16
;
717 (*info
->fprintf_func
) (info
->stream
, "#");
721 format
&= ~M6811_OP_IND16
;
724 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
725 (*info
->fprintf_func
) (info
->stream
, "0x");
727 (*info
->print_address_func
) (addr
, info
);
728 if (format
& M6812_OP_PAGE
)
730 (* info
->fprintf_func
) (info
->stream
, " {");
731 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
732 (*info
->fprintf_func
) (info
->stream
, "0x");
733 (* info
->print_address_func
) (val
, info
);
734 (* info
->fprintf_func
) (info
->stream
, ", 0x%x}", page
);
735 format
&= ~M6812_OP_PAGE
;
740 if (format
& M6812_OP_IDX_P2
)
742 (*info
->fprintf_func
) (info
->stream
, ", ");
743 status
= print_indexed_operand (memaddr
+ pos
+ offset
, info
,
745 memaddr
+ pos
+ offset
+ 1, arch
);
751 if (format
& M6812_OP_IND16_P2
)
755 (*info
->fprintf_func
) (info
->stream
, ", ");
757 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 2, info
);
763 val
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
765 if (info
->symtab_size
> 0) /* Avoid duplicate 0x from core binutils. */
766 (*info
->fprintf_func
) (info
->stream
, "0x");
767 (*info
->print_address_func
) (val
, info
);
770 /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
771 and in that order. The brset/brclr insn have a bitmask and then
772 a relative branch offset. */
773 if (format
& M6811_OP_BITMASK
)
775 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
780 (*info
->fprintf_func
) (info
->stream
, ", #0x%02x%s",
782 (format
& M6811_OP_JUMP_REL
? ", " : ""));
783 format
&= ~M6811_OP_BITMASK
;
785 if (format
& M6811_OP_JUMP_REL
)
789 status
= read_memory (memaddr
+ pos
, &buffer
[0], 1, info
);
793 (*info
->fprintf_func
) (info
->stream
, "0x");
795 val
= (buffer
[0] & 0x80) ? buffer
[0] | 0xFFFFFF00 : buffer
[0];
796 (*info
->print_address_func
) (memaddr
+ pos
+ val
, info
);
797 format
&= ~M6811_OP_JUMP_REL
;
799 else if (format
& M6812_OP_JUMP_REL16
)
803 status
= read_memory (memaddr
+ pos
, &buffer
[0], 2, info
);
808 val
= ((buffer
[0] << 8) | (buffer
[1] & 0x0FF));
812 (*info
->fprintf_func
) (info
->stream
, "0x");
813 (*info
->print_address_func
) (memaddr
+ pos
+ val
, info
);
814 format
&= ~M6812_OP_JUMP_REL16
;
817 if (format
& M6812_OP_PAGE
)
821 status
= read_memory (memaddr
+ pos
+ offset
, &buffer
[0], 1, info
);
827 val
= buffer
[0] & 0x0ff;
828 (*info
->fprintf_func
) (info
->stream
, ", 0x%x", val
);
832 /* Consistency check. 'format' must be 0, so that we have handled
833 all formats; and the computed size of the insn must match the
834 opcode table content. */
835 if (format
& ~(M6811_OP_PAGE4
| M6811_OP_PAGE3
| M6811_OP_PAGE2
))
836 (*info
->fprintf_func
) (info
->stream
, "; Error, format: %lx", format
);
838 if (pos
!= opcode
->size
)
839 (*info
->fprintf_func
) (info
->stream
, "; Error, size: %ld expect %d",
845 /* Opcode not recognized. */
846 if (format
== M6811_OP_PAGE2
&& arch
& cpu6812
847 && ((code
>= 0x30 && code
<= 0x39) || (code
>= 0x40)))
848 (*info
->fprintf_func
) (info
->stream
, "trap\t#0x%02x", code
& 0x0ff);
850 else if (format
== M6811_OP_PAGE2
)
851 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x, 0x%02x",
852 M6811_OPCODE_PAGE2
, code
);
853 else if (format
== M6811_OP_PAGE3
)
854 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x, 0x%02x",
855 M6811_OPCODE_PAGE3
, code
);
856 else if (format
== M6811_OP_PAGE4
)
857 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x, 0x%02x",
858 M6811_OPCODE_PAGE4
, code
);
860 (*info
->fprintf_func
) (info
->stream
, ".byte\t0x%02x", code
);
865 /* Disassemble one instruction at address 'memaddr'. Returns the number
866 of bytes used by that instruction. */
868 print_insn_m68hc11 (bfd_vma memaddr
, struct disassemble_info
* info
)
870 return print_insn (memaddr
, info
, cpu6811
);
874 print_insn_m68hc12 (bfd_vma memaddr
, struct disassemble_info
* info
)
876 return print_insn (memaddr
, info
, cpu6812
);
880 print_insn_m9s12x (bfd_vma memaddr
, struct disassemble_info
* info
)
882 return print_insn (memaddr
, info
, cpu6812
|cpu9s12x
);
886 print_insn_m9s12xg (bfd_vma memaddr
, struct disassemble_info
* info
)
888 return print_insn (memaddr
, info
, cpuxgate
);
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