1 /* Print Motorola 68k instructions.
2 Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 1997
3 Free Software Foundation, Inc.
5 This file is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20 #include "floatformat.h"
21 #include <libiberty.h>
23 #include "opcode/m68k.h"
25 /* Local function prototypes */
28 fetch_arg
PARAMS ((unsigned char *, int, int, disassemble_info
*));
31 print_base
PARAMS ((int, bfd_vma
, disassemble_info
*));
33 static unsigned char *
34 print_indexed
PARAMS ((int, unsigned char *, bfd_vma
, disassemble_info
*));
37 print_insn_arg
PARAMS ((const char *, unsigned char *, unsigned char *,
38 bfd_vma
, disassemble_info
*));
40 CONST
char * CONST fpcr_names
[] = {
41 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
42 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"};
44 static char *const reg_names
[] = {
45 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
46 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
49 /* Sign-extend an (unsigned char). */
51 #define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
53 #define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
56 /* Get a 1 byte signed integer. */
57 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
59 /* Get a 2 byte signed integer. */
60 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
62 (p += 2, FETCH_DATA (info, p), \
63 COERCE16 ((p[-2] << 8) + p[-1]))
65 /* Get a 4 byte signed integer. */
66 #define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
68 (p += 4, FETCH_DATA (info, p), \
69 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
71 /* NEXTSINGLE and NEXTDOUBLE handle alignment problems, but not
72 * byte-swapping or other float format differences. FIXME! */
80 #define NEXTSINGLE(val, p) \
81 { unsigned int i; union number u;\
82 FETCH_DATA (info, p + sizeof (float));\
83 for (i = 0; i < sizeof(float); i++) u.c[i] = *p++; \
86 #define NEXTDOUBLE(val, p) \
87 { unsigned int i; union number u;\
88 FETCH_DATA (info, p + sizeof (double));\
89 for (i = 0; i < sizeof(double); i++) u.c[i] = *p++; \
92 /* Need a function to convert from extended to double precision... */
93 #define NEXTEXTEND(p) \
94 (p += 12, FETCH_DATA (info, p), 0.0)
96 /* Need a function to convert from packed to double
97 precision. Actually, it's easier to print a
98 packed number than a double anyway, so maybe
99 there should be a special case to handle this... */
100 #define NEXTPACKED(p) \
101 (p += 12, FETCH_DATA (info, p), 0.0)
104 /* Maximum length of an instruction. */
111 /* Points to first byte not fetched. */
112 bfd_byte
*max_fetched
;
113 bfd_byte the_buffer
[MAXLEN
];
118 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
119 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
121 #define FETCH_DATA(info, addr) \
122 ((addr) <= ((struct private *)(info->private_data))->max_fetched \
123 ? 1 : fetch_data ((info), (addr)))
126 fetch_data (info
, addr
)
127 struct disassemble_info
*info
;
131 struct private *priv
= (struct private *)info
->private_data
;
132 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
134 status
= (*info
->read_memory_func
) (start
,
136 addr
- priv
->max_fetched
,
140 (*info
->memory_error_func
) (status
, start
, info
);
141 longjmp (priv
->bailout
, 1);
144 priv
->max_fetched
= addr
;
148 /* This function is used to print to the bit-bucket. */
151 dummy_printer (FILE * file
, const char * format
, ...)
153 dummy_printer (file
) FILE *file
;
158 dummy_print_address (vma
, info
)
160 struct disassemble_info
*info
;
164 /* Print the m68k instruction at address MEMADDR in debugged memory,
165 on INFO->STREAM. Returns length of the instruction, in bytes. */
168 print_insn_m68k (memaddr
, info
)
170 disassemble_info
*info
;
173 register unsigned char *p
;
174 unsigned char *save_p
;
175 register const char *d
;
176 register unsigned long bestmask
;
177 const struct m68k_opcode
*best
= 0;
179 bfd_byte
*buffer
= priv
.the_buffer
;
180 fprintf_ftype save_printer
= info
->fprintf_func
;
181 void (*save_print_address
) PARAMS((bfd_vma
, struct disassemble_info
*))
182 = info
->print_address_func
;
184 static int numopcodes
[16];
185 static const struct m68k_opcode
**opcodes
[16];
189 /* Speed up the matching by sorting the opcode table on the upper
190 four bits of the opcode. */
191 const struct m68k_opcode
**opc_pointer
[16];
193 /* First count how many opcodes are in each of the sixteen buckets. */
194 for (i
= 0; i
< m68k_numopcodes
; i
++)
195 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
197 /* Then create a sorted table of pointers that point into the
199 opc_pointer
[0] = ((const struct m68k_opcode
**)
200 xmalloc (sizeof (struct m68k_opcode
*)
202 opcodes
[0] = opc_pointer
[0];
203 for (i
= 1; i
< 16; i
++)
205 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
206 opcodes
[i
] = opc_pointer
[i
];
209 for (i
= 0; i
< m68k_numopcodes
; i
++)
210 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
214 info
->private_data
= (PTR
) &priv
;
215 priv
.max_fetched
= priv
.the_buffer
;
216 priv
.insn_start
= memaddr
;
217 if (setjmp (priv
.bailout
) != 0)
222 FETCH_DATA (info
, buffer
+ 2);
223 major_opcode
= (buffer
[0] >> 4) & 15;
224 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
226 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
227 unsigned long opcode
= opc
->opcode
;
228 unsigned long match
= opc
->match
;
230 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
231 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
232 /* Only fetch the next two bytes if we need to. */
233 && (((0xffff & match
) == 0)
235 (FETCH_DATA (info
, buffer
+ 4)
236 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
237 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
240 /* Don't use for printout the variants of divul and divsl
241 that have the same register number in two places.
242 The more general variants will match instead. */
243 for (d
= opc
->args
; *d
; d
+= 2)
247 /* Don't use for printout the variants of most floating
248 point coprocessor instructions which use the same
249 register number in two places, as above. */
251 for (d
= opc
->args
; *d
; d
+= 2)
255 /* Don't match fmovel with more than one register; wait for
259 for (d
= opc
->args
; *d
; d
+= 2)
261 if (d
[0] == 's' && d
[1] == '8')
265 val
= fetch_arg (buffer
, d
[1], 3, info
);
266 if ((val
& (val
- 1)) != 0)
272 if (*d
== '\0' && match
> bestmask
)
283 /* Point at first word of argument data,
284 and at descriptor for first argument. */
287 /* Figure out how long the fixed-size portion of the instruction is.
288 The only place this is stored in the opcode table is
289 in the arguments--look for arguments which specify fields in the 2nd
290 or 3rd words of the instruction. */
291 for (d
= best
->args
; *d
; d
+= 2)
293 /* I don't think it is necessary to be checking d[0] here; I suspect
294 all this could be moved to the case statement below. */
297 if (d
[1] == 'l' && p
- buffer
< 6)
299 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8' )
302 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
326 /* Some opcodes like pflusha and lpstop are exceptions; they take no
327 arguments but are two words long. Recognize them by looking at
328 the lower 16 bits of the mask. */
329 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
332 FETCH_DATA (info
, p
);
336 /* We can the operands twice. The first time we don't print anything,
337 but look for errors. */
340 info
->print_address_func
= dummy_print_address
;
341 info
->fprintf_func
= (fprintf_ftype
)dummy_printer
;
344 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ p
- buffer
, info
);
347 else if (eaten
== -1)
351 (*info
->fprintf_func
)(info
->stream
,
352 "<internal error in opcode table: %s %s>\n",
360 info
->fprintf_func
= save_printer
;
361 info
->print_address_func
= save_print_address
;
365 (*info
->fprintf_func
) (info
->stream
, "%s", best
->name
);
368 (*info
->fprintf_func
) (info
->stream
, " ");
372 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ p
- buffer
, info
);
374 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
375 (*info
->fprintf_func
) (info
->stream
, ",");
380 /* Handle undefined instructions. */
381 info
->fprintf_func
= save_printer
;
382 info
->print_address_func
= save_print_address
;
383 (*info
->fprintf_func
) (info
->stream
, "0%o",
384 (buffer
[0] << 8) + buffer
[1]);
388 /* Returns number of bytes "eaten" by the operand, or
389 return -1 if an invalid operand was found, or -2 if
390 an opcode tabe error was found. */
393 print_insn_arg (d
, buffer
, p0
, addr
, info
)
395 unsigned char *buffer
;
397 bfd_vma addr
; /* PC for this arg to be relative to */
398 disassemble_info
*info
;
400 register int val
= 0;
401 register int place
= d
[1];
402 register unsigned char *p
= p0
;
404 register CONST
char *regname
;
405 register unsigned char *p1
;
411 case 'c': /* cache identifier */
413 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
414 val
= fetch_arg (buffer
, place
, 2, info
);
415 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
419 case 'a': /* address register indirect only. Cf. case '+'. */
421 (*info
->fprintf_func
)
424 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
428 case '_': /* 32-bit absolute address for move16. */
431 (*info
->print_address_func
) (val
, info
);
436 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
440 (*info
->fprintf_func
) (info
->stream
, "%%sr");
444 (*info
->fprintf_func
) (info
->stream
, "%%usp");
449 static const struct { char *name
; int value
; } names
[]
450 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
451 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
452 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
453 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
454 {"%msp", 0x803}, {"%ibsp", 0x804},
456 /* Should we be calling this psr like we do in case 'Y'? */
459 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
461 val
= fetch_arg (buffer
, place
, 12, info
);
462 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
463 if (names
[regno
].value
== val
)
465 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
469 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
474 val
= fetch_arg (buffer
, place
, 3, info
);
475 /* 0 means 8, except for the bkpt instruction... */
476 if (val
== 0 && d
[1] != 's')
478 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
482 val
= fetch_arg (buffer
, place
, 8, info
);
485 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
489 val
= fetch_arg (buffer
, place
, 4, info
);
490 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
494 (*info
->fprintf_func
) (info
->stream
, "%s",
495 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
499 (*info
->fprintf_func
)
501 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
505 (*info
->fprintf_func
)
507 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
511 regno
= fetch_arg (buffer
, place
, 4, info
);
513 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
515 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
519 (*info
->fprintf_func
)
520 (info
->stream
, "%%fp%d",
521 fetch_arg (buffer
, place
, 3, info
));
525 val
= fetch_arg (buffer
, place
, 6, info
);
527 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
529 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
533 (*info
->fprintf_func
)
534 (info
->stream
, "%s@+",
535 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
539 (*info
->fprintf_func
)
540 (info
->stream
, "%s@-",
541 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
546 (*info
->fprintf_func
)
547 (info
->stream
, "{%s}",
548 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
549 else if (place
== 'C')
551 val
= fetch_arg (buffer
, place
, 7, info
);
552 if ( val
> 63 ) /* This is a signed constant. */
554 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
562 p1
= buffer
+ (*d
== '#' ? 2 : 4);
564 val
= fetch_arg (buffer
, place
, 4, info
);
565 else if (place
== 'C')
566 val
= fetch_arg (buffer
, place
, 7, info
);
567 else if (place
== '8')
568 val
= fetch_arg (buffer
, place
, 3, info
);
569 else if (place
== '3')
570 val
= fetch_arg (buffer
, place
, 8, info
);
571 else if (place
== 'b')
573 else if (place
== 'w' || place
== 'W')
575 else if (place
== 'l')
579 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
585 else if (place
== 'B')
586 val
= COERCE_SIGNED_CHAR(buffer
[1]);
587 else if (place
== 'w' || place
== 'W')
589 else if (place
== 'l' || place
== 'L' || place
== 'C')
591 else if (place
== 'g')
593 val
= NEXTBYTE (buffer
);
599 else if (place
== 'c')
601 if (buffer
[1] & 0x40) /* If bit six is one, long offset */
609 (*info
->print_address_func
) (addr
+ val
, info
);
614 (*info
->fprintf_func
)
615 (info
->stream
, "%s@(%d)",
616 reg_names
[fetch_arg (buffer
, place
, 3, info
)], val
);
620 (*info
->fprintf_func
) (info
->stream
, "%s",
621 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
625 /* Get coprocessor ID... */
626 val
= fetch_arg (buffer
, 'd', 3, info
);
628 if (val
!= 1) /* Unusual coprocessor ID? */
629 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
649 val
= fetch_arg (buffer
, 'x', 6, info
);
650 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
653 val
= fetch_arg (buffer
, 's', 6, info
);
655 /* Get register number assuming address register. */
656 regno
= (val
& 7) + 8;
657 regname
= reg_names
[regno
];
661 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
665 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
669 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
673 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
677 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
682 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
686 p
= print_indexed (regno
, p
, addr
, info
);
694 (*info
->print_address_func
) (val
, info
);
699 (*info
->print_address_func
) (val
, info
);
704 (*info
->print_address_func
) (addr
+ val
, info
);
708 p
= print_indexed (-1, p
, addr
, info
);
712 flt_p
= 1; /* Assume it's a float... */
731 NEXTSINGLE(flval
, p
);
735 NEXTDOUBLE(flval
, p
);
739 FETCH_DATA (info
, p
+ 12);
740 floatformat_to_double (&floatformat_m68881_ext
,
746 flval
= NEXTPACKED(p
);
752 if ( flt_p
) /* Print a float? */
753 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
755 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
771 /* Move the pointer ahead if this point is farther ahead
776 (*info
->fprintf_func
) (info
->stream
, "#0");
781 register int newval
= 0;
782 for (regno
= 0; regno
< 16; ++regno
)
783 if (val
& (0x8000 >> regno
))
784 newval
|= 1 << regno
;
789 for (regno
= 0; regno
< 16; ++regno
)
790 if (val
& (1 << regno
))
794 (*info
->fprintf_func
) (info
->stream
, "/");
796 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
798 while (val
& (1 << (regno
+ 1)))
800 if (regno
> first_regno
)
801 (*info
->fprintf_func
) (info
->stream
, "-%s",
805 else if (place
== '3')
809 val
= fetch_arg (buffer
, place
, 8, info
);
812 (*info
->fprintf_func
) (info
->stream
, "#0");
817 register int newval
= 0;
818 for (regno
= 0; regno
< 8; ++regno
)
819 if (val
& (0x80 >> regno
))
820 newval
|= 1 << regno
;
825 for (regno
= 0; regno
< 8; ++regno
)
826 if (val
& (1 << regno
))
830 (*info
->fprintf_func
) (info
->stream
, "/");
832 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
834 while (val
& (1 << (regno
+ 1)))
836 if (regno
> first_regno
)
837 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
840 else if (place
== '8')
842 /* fmoveml for FP status registers */
843 (*info
->fprintf_func
) (info
->stream
, "%s",
844 fpcr_names
[fetch_arg (buffer
, place
, 3,
861 int val
= fetch_arg (buffer
, place
, 5, info
);
865 case 2: name
= "%tt0"; break;
866 case 3: name
= "%tt1"; break;
867 case 0x10: name
= "%tc"; break;
868 case 0x11: name
= "%drp"; break;
869 case 0x12: name
= "%srp"; break;
870 case 0x13: name
= "%crp"; break;
871 case 0x14: name
= "%cal"; break;
872 case 0x15: name
= "%val"; break;
873 case 0x16: name
= "%scc"; break;
874 case 0x17: name
= "%ac"; break;
875 case 0x18: name
= "%psr"; break;
876 case 0x19: name
= "%pcsr"; break;
880 int break_reg
= ((buffer
[3] >> 2) & 7);
881 (*info
->fprintf_func
)
882 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
887 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
890 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
896 int fc
= fetch_arg (buffer
, place
, 5, info
);
898 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
900 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
902 (*info
->fprintf_func
) (info
->stream
, "<function code %d>", fc
);
907 (*info
->fprintf_func
) (info
->stream
, "%%val");
912 int level
= fetch_arg (buffer
, place
, 3, info
);
913 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
924 /* Fetch BITS bits from a position in the instruction specified by CODE.
925 CODE is a "place to put an argument", or 'x' for a destination
926 that is a general address (mode and register).
927 BUFFER contains the instruction. */
930 fetch_arg (buffer
, code
, bits
, info
)
931 unsigned char *buffer
;
934 disassemble_info
*info
;
936 register int val
= 0;
943 case 'd': /* Destination, for register or quick. */
944 val
= (buffer
[0] << 8) + buffer
[1];
948 case 'x': /* Destination, for general arg */
949 val
= (buffer
[0] << 8) + buffer
[1];
954 FETCH_DATA (info
, buffer
+ 3);
955 val
= (buffer
[3] >> 4);
959 FETCH_DATA (info
, buffer
+ 3);
964 FETCH_DATA (info
, buffer
+ 3);
965 val
= (buffer
[2] << 8) + buffer
[3];
970 FETCH_DATA (info
, buffer
+ 3);
971 val
= (buffer
[2] << 8) + buffer
[3];
977 FETCH_DATA (info
, buffer
+ 3);
978 val
= (buffer
[2] << 8) + buffer
[3];
982 FETCH_DATA (info
, buffer
+ 5);
983 val
= (buffer
[4] << 8) + buffer
[5];
988 FETCH_DATA (info
, buffer
+ 5);
989 val
= (buffer
[4] << 8) + buffer
[5];
994 FETCH_DATA (info
, buffer
+ 5);
995 val
= (buffer
[4] << 8) + buffer
[5];
999 FETCH_DATA (info
, buffer
+ 3);
1000 val
= (buffer
[2] << 8) + buffer
[3];
1005 FETCH_DATA (info
, buffer
+ 3);
1006 val
= (buffer
[2] << 8) + buffer
[3];
1011 FETCH_DATA (info
, buffer
+ 3);
1012 val
= (buffer
[2] << 8) + buffer
[3];
1017 val
= (buffer
[1] >> 6);
1047 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
1048 P points to extension word, in buffer.
1049 ADDR is the nominal core address of that extension word. */
1051 static unsigned char *
1052 print_indexed (basereg
, p
, addr
, info
)
1056 disassemble_info
*info
;
1059 static char *const scales
[] = {"", ":2", ":4", ":8"};
1065 word
= NEXTWORD (p
);
1067 /* Generate the text for the index register.
1068 Where this will be output is not yet determined. */
1069 sprintf (buf
, "%s:%c%s",
1070 reg_names
[(word
>> 12) & 0xf],
1071 (word
& 0x800) ? 'l' : 'w',
1072 scales
[(word
>> 9) & 3]);
1074 /* Handle the 68000 style of indexing. */
1076 if ((word
& 0x100) == 0)
1079 if ((word
& 0x80) != 0)
1083 print_base (basereg
, word
, info
);
1084 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
1088 /* Handle the generalized kind. */
1089 /* First, compute the displacement to add to the base register. */
1101 switch ((word
>> 4) & 3)
1104 base_disp
= NEXTWORD (p
);
1107 base_disp
= NEXTLONG (p
);
1112 /* Handle single-level case (not indirect) */
1114 if ((word
& 7) == 0)
1116 print_base (basereg
, base_disp
, info
);
1118 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1119 (*info
->fprintf_func
) (info
->stream
, ")");
1123 /* Two level. Compute displacement to add after indirection. */
1129 outer_disp
= NEXTWORD (p
);
1132 outer_disp
= NEXTLONG (p
);
1135 print_base (basereg
, base_disp
, info
);
1136 if ((word
& 4) == 0 && buf
[0] != '\0')
1138 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1141 sprintf_vma (vmabuf
, outer_disp
);
1142 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
1144 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1145 (*info
->fprintf_func
) (info
->stream
, ")");
1150 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1151 REGNO = -1 for pc, -2 for none (suppressed). */
1154 print_base (regno
, disp
, info
)
1157 disassemble_info
*info
;
1161 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1162 (*info
->print_address_func
) (disp
, info
);
1169 (*info
->fprintf_func
) (info
->stream
, "@(");
1170 else if (regno
== -3)
1171 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
1173 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
1175 sprintf_vma (buf
, disp
);
1176 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);