1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
6 This file is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
23 #include "floatformat.h"
24 #include "libiberty.h"
27 #include "opcode/m68k.h"
29 /* Local function prototypes. */
31 const char * const fpcr_names
[] =
33 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
34 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
37 static char *const reg_names
[] =
39 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
40 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
44 /* Name of register halves for MAC/EMAC.
45 Seperate from reg_names since 'spu', 'fpl' look weird. */
46 static char *const reg_half_names
[] =
48 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
49 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
53 /* Sign-extend an (unsigned char). */
55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 /* Get a 1 byte signed integer. */
61 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
63 /* Get a 2 byte signed integer. */
64 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
66 (p += 2, FETCH_DATA (info, p), \
67 COERCE16 ((p[-2] << 8) + p[-1]))
69 /* Get a 4 byte signed integer. */
70 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
72 (p += 4, FETCH_DATA (info, p), \
73 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
75 /* Get a 4 byte unsigned integer. */
76 #define NEXTULONG(p) \
77 (p += 4, FETCH_DATA (info, p), \
78 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
80 /* Get a single precision float. */
81 #define NEXTSINGLE(val, p) \
82 (p += 4, FETCH_DATA (info, p), \
83 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
85 /* Get a double precision float. */
86 #define NEXTDOUBLE(val, p) \
87 (p += 8, FETCH_DATA (info, p), \
88 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
90 /* Get an extended precision float. */
91 #define NEXTEXTEND(val, p) \
92 (p += 12, FETCH_DATA (info, p), \
93 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
95 /* Need a function to convert from packed to double
96 precision. Actually, it's easier to print a
97 packed number than a double anyway, so maybe
98 there should be a special case to handle this... */
99 #define NEXTPACKED(p) \
100 (p += 12, FETCH_DATA (info, p), 0.0)
102 /* Maximum length of an instruction. */
109 /* Points to first byte not fetched. */
110 bfd_byte
*max_fetched
;
111 bfd_byte the_buffer
[MAXLEN
];
116 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
117 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
119 #define FETCH_DATA(info, addr) \
120 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
121 ? 1 : fetch_data ((info), (addr)))
124 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
127 struct private *priv
= (struct private *)info
->private_data
;
128 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
130 status
= (*info
->read_memory_func
) (start
,
132 addr
- priv
->max_fetched
,
136 (*info
->memory_error_func
) (status
, start
, info
);
137 longjmp (priv
->bailout
, 1);
140 priv
->max_fetched
= addr
;
144 /* This function is used to print to the bit-bucket. */
146 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
147 const char *format ATTRIBUTE_UNUSED
,
154 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
155 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
159 /* Fetch BITS bits from a position in the instruction specified by CODE.
160 CODE is a "place to put an argument", or 'x' for a destination
161 that is a general address (mode and register).
162 BUFFER contains the instruction. */
165 fetch_arg (unsigned char *buffer
,
168 disassemble_info
*info
)
174 case '/': /* MAC/EMAC mask bit. */
175 val
= buffer
[3] >> 5;
178 case 'G': /* EMAC ACC load. */
179 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
182 case 'H': /* EMAC ACC !load. */
183 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
186 case ']': /* EMAC ACCEXT bit. */
187 val
= buffer
[0] >> 2;
190 case 'I': /* MAC/EMAC scale factor. */
191 val
= buffer
[2] >> 1;
194 case 'F': /* EMAC ACCx. */
195 val
= buffer
[0] >> 1;
206 case 'd': /* Destination, for register or quick. */
207 val
= (buffer
[0] << 8) + buffer
[1];
211 case 'x': /* Destination, for general arg. */
212 val
= (buffer
[0] << 8) + buffer
[1];
217 FETCH_DATA (info
, buffer
+ 3);
218 val
= (buffer
[3] >> 4);
222 FETCH_DATA (info
, buffer
+ 3);
227 FETCH_DATA (info
, buffer
+ 3);
228 val
= (buffer
[2] << 8) + buffer
[3];
233 FETCH_DATA (info
, buffer
+ 3);
234 val
= (buffer
[2] << 8) + buffer
[3];
240 FETCH_DATA (info
, buffer
+ 3);
241 val
= (buffer
[2] << 8) + buffer
[3];
245 FETCH_DATA (info
, buffer
+ 5);
246 val
= (buffer
[4] << 8) + buffer
[5];
251 FETCH_DATA (info
, buffer
+ 5);
252 val
= (buffer
[4] << 8) + buffer
[5];
257 FETCH_DATA (info
, buffer
+ 5);
258 val
= (buffer
[4] << 8) + buffer
[5];
262 FETCH_DATA (info
, buffer
+ 3);
263 val
= (buffer
[2] << 8) + buffer
[3];
268 FETCH_DATA (info
, buffer
+ 3);
269 val
= (buffer
[2] << 8) + buffer
[3];
274 FETCH_DATA (info
, buffer
+ 3);
275 val
= (buffer
[2] << 8) + buffer
[3];
280 val
= (buffer
[1] >> 6);
284 FETCH_DATA (info
, buffer
+ 3);
285 val
= (buffer
[2] >> 1);
289 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
290 | ((buffer
[0] >> 1) & 0x7)
291 | (buffer
[3] & 0x80 ? 0x10 : 0);
295 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
299 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
303 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
307 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
311 val
= buffer
[2] >> 2;
318 /* bits is never too big. */
319 return val
& ((1 << bits
) - 1);
322 /* Check if an EA is valid for a particular code. This is required
323 for the EMAC instructions since the type of source address determines
324 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
325 is a non-load EMAC instruction and the bits mean register Ry.
326 A similar case exists for the movem instructions where the register
327 mask is interpreted differently for different EAs. */
330 m68k_valid_ea (char code
, int val
)
333 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
334 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
335 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
340 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
343 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
346 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
349 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
352 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
355 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
358 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
361 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
364 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
367 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
370 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
373 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
376 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
379 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
382 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
385 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
388 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
391 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
394 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
397 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
400 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
403 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
406 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
409 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
416 mode
= (val
>> 3) & 7;
419 return (mask
& (1 << mode
)) != 0;
422 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
423 REGNO = -1 for pc, -2 for none (suppressed). */
426 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
430 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
431 (*info
->print_address_func
) (disp
, info
);
438 (*info
->fprintf_func
) (info
->stream
, "@(");
439 else if (regno
== -3)
440 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
442 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
444 sprintf_vma (buf
, disp
);
445 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);
449 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
450 P points to extension word, in buffer.
451 ADDR is the nominal core address of that extension word. */
453 static unsigned char *
454 print_indexed (int basereg
,
457 disassemble_info
*info
)
460 static char *const scales
[] = { "", ":2", ":4", ":8" };
468 /* Generate the text for the index register.
469 Where this will be output is not yet determined. */
470 sprintf (buf
, "%s:%c%s",
471 reg_names
[(word
>> 12) & 0xf],
472 (word
& 0x800) ? 'l' : 'w',
473 scales
[(word
>> 9) & 3]);
475 /* Handle the 68000 style of indexing. */
477 if ((word
& 0x100) == 0)
479 base_disp
= word
& 0xff;
480 if ((base_disp
& 0x80) != 0)
484 print_base (basereg
, base_disp
, info
);
485 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
489 /* Handle the generalized kind. */
490 /* First, compute the displacement to add to the base register. */
501 switch ((word
>> 4) & 3)
504 base_disp
= NEXTWORD (p
);
507 base_disp
= NEXTLONG (p
);
512 /* Handle single-level case (not indirect). */
515 print_base (basereg
, base_disp
, info
);
517 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
518 (*info
->fprintf_func
) (info
->stream
, ")");
522 /* Two level. Compute displacement to add after indirection. */
527 outer_disp
= NEXTWORD (p
);
530 outer_disp
= NEXTLONG (p
);
533 print_base (basereg
, base_disp
, info
);
534 if ((word
& 4) == 0 && buf
[0] != '\0')
536 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
539 sprintf_vma (vmabuf
, outer_disp
);
540 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
542 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
543 (*info
->fprintf_func
) (info
->stream
, ")");
548 /* Returns number of bytes "eaten" by the operand, or
549 return -1 if an invalid operand was found, or -2 if
550 an opcode tabe error was found.
551 ADDR is the pc for this arg to be relative to. */
554 print_insn_arg (const char *d
,
555 unsigned char *buffer
,
558 disassemble_info
*info
)
562 unsigned char *p
= p0
;
573 case 'c': /* Cache identifier. */
575 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
576 val
= fetch_arg (buffer
, place
, 2, info
);
577 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
581 case 'a': /* Address register indirect only. Cf. case '+'. */
583 (*info
->fprintf_func
)
586 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
590 case '_': /* 32-bit absolute address for move16. */
592 uval
= NEXTULONG (p
);
593 (*info
->print_address_func
) (uval
, info
);
598 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
602 (*info
->fprintf_func
) (info
->stream
, "%%sr");
606 (*info
->fprintf_func
) (info
->stream
, "%%usp");
610 (*info
->fprintf_func
) (info
->stream
, "%%acc");
614 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
618 (*info
->fprintf_func
) (info
->stream
, "%%mask");
623 /* FIXME: There's a problem here, different m68k processors call the
624 same address different names. This table can't get it right
625 because it doesn't know which processor it's disassembling for. */
626 static const struct { char *name
; int value
; } names
[]
627 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
628 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
629 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
630 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
631 {"%msp", 0x803}, {"%isp", 0x804},
632 /* reg c04 is sometimes called flashbar or rambar.
633 rec c05 is also sometimes called rambar. */
634 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
636 /* Should we be calling this psr like we do in case 'Y'? */
639 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
641 /* Fido added these. */
642 {"%cac", 0xffe}, {"%mbb", 0xfff}};
644 val
= fetch_arg (buffer
, place
, 12, info
);
645 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
646 if (names
[regno
].value
== val
)
648 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
652 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
657 val
= fetch_arg (buffer
, place
, 3, info
);
658 /* 0 means 8, except for the bkpt instruction... */
659 if (val
== 0 && d
[1] != 's')
661 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
665 val
= fetch_arg (buffer
, place
, 3, info
);
669 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
673 val
= fetch_arg (buffer
, place
, 3, info
);
674 (*info
->fprintf_func
) (info
->stream
, "#%d", val
+1);
678 val
= fetch_arg (buffer
, place
, 9, info
);
679 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
685 static char *const scalefactor_name
[] = { "<<", ">>" };
686 val
= fetch_arg (buffer
, place
, 1, info
);
687 (*info
->fprintf_func
) (info
->stream
, scalefactor_name
[val
]);
691 val
= fetch_arg (buffer
, place
, 8, info
);
694 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
699 val
= fetch_arg (buffer
, place
, 4, info
);
700 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
704 (*info
->fprintf_func
) (info
->stream
, "%s",
705 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
709 (*info
->fprintf_func
)
711 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
715 (*info
->fprintf_func
)
717 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
721 regno
= fetch_arg (buffer
, place
, 4, info
);
723 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
725 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
729 (*info
->fprintf_func
)
730 (info
->stream
, "%%fp%d",
731 fetch_arg (buffer
, place
, 3, info
));
735 val
= fetch_arg (buffer
, place
, 6, info
);
737 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
739 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
743 (*info
->fprintf_func
)
744 (info
->stream
, "%s@+",
745 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
749 (*info
->fprintf_func
)
750 (info
->stream
, "%s@-",
751 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
756 (*info
->fprintf_func
)
757 (info
->stream
, "{%s}",
758 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
759 else if (place
== 'C')
761 val
= fetch_arg (buffer
, place
, 7, info
);
762 if (val
> 63) /* This is a signed constant. */
764 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
772 p1
= buffer
+ (*d
== '#' ? 2 : 4);
774 val
= fetch_arg (buffer
, place
, 4, info
);
775 else if (place
== 'C')
776 val
= fetch_arg (buffer
, place
, 7, info
);
777 else if (place
== '8')
778 val
= fetch_arg (buffer
, place
, 3, info
);
779 else if (place
== '3')
780 val
= fetch_arg (buffer
, place
, 8, info
);
781 else if (place
== 'b')
783 else if (place
== 'w' || place
== 'W')
785 else if (place
== 'l')
789 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
795 else if (place
== 'B')
796 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
797 else if (place
== 'w' || place
== 'W')
799 else if (place
== 'l' || place
== 'L' || place
== 'C')
801 else if (place
== 'g')
803 disp
= NEXTBYTE (buffer
);
809 else if (place
== 'c')
811 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
819 (*info
->print_address_func
) (addr
+ disp
, info
);
824 (*info
->fprintf_func
)
825 (info
->stream
, "%s@(%d)",
826 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8], val
);
830 (*info
->fprintf_func
) (info
->stream
, "%s",
831 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
835 val
= fetch_arg(buffer
, place
, 2, info
);
836 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
840 val
= fetch_arg(buffer
, place
, 1, info
);
841 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
==0 ? "01" : "23");
845 val
= fetch_arg(buffer
, place
, 2, info
);
847 (*info
->fprintf_func
) (info
->stream
, "<<");
849 (*info
->fprintf_func
) (info
->stream
, ">>");
855 /* Get coprocessor ID... */
856 val
= fetch_arg (buffer
, 'd', 3, info
);
858 if (val
!= 1) /* Unusual coprocessor ID? */
859 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
888 val
= fetch_arg (buffer
, 'x', 6, info
);
889 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
892 val
= fetch_arg (buffer
, 's', 6, info
);
894 /* If the <ea> is invalid for *d, then reject this match. */
895 if (!m68k_valid_ea (*d
, val
))
898 /* Get register number assuming address register. */
899 regno
= (val
& 7) + 8;
900 regname
= reg_names
[regno
];
904 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
908 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
912 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
916 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
920 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
925 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
929 p
= print_indexed (regno
, p
, addr
, info
);
937 (*info
->print_address_func
) (val
, info
);
941 uval
= NEXTULONG (p
);
942 (*info
->print_address_func
) (uval
, info
);
947 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
948 (*info
->print_address_func
) (addr
+ val
, info
);
949 (*info
->fprintf_func
) (info
->stream
, ")");
953 p
= print_indexed (-1, p
, addr
, info
);
957 flt_p
= 1; /* Assume it's a float... */
976 NEXTSINGLE (flval
, p
);
980 NEXTDOUBLE (flval
, p
);
984 NEXTEXTEND (flval
, p
);
988 flval
= NEXTPACKED (p
);
994 if (flt_p
) /* Print a float? */
995 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
997 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
1005 /* If place is '/', then this is the case of the mask bit for
1006 mac/emac loads. Now that the arg has been printed, grab the
1007 mask bit and if set, add a '&' to the arg. */
1010 val
= fetch_arg (buffer
, place
, 1, info
);
1012 info
->fprintf_func (info
->stream
, "&");
1022 val
= NEXTWORD (p1
);
1023 /* Move the pointer ahead if this point is farther ahead
1025 p
= p1
> p
? p1
: p
;
1028 (*info
->fprintf_func
) (info
->stream
, "#0");
1035 for (regno
= 0; regno
< 16; ++regno
)
1036 if (val
& (0x8000 >> regno
))
1037 newval
|= 1 << regno
;
1042 for (regno
= 0; regno
< 16; ++regno
)
1043 if (val
& (1 << regno
))
1048 (*info
->fprintf_func
) (info
->stream
, "/");
1050 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
1051 first_regno
= regno
;
1052 while (val
& (1 << (regno
+ 1)))
1054 if (regno
> first_regno
)
1055 (*info
->fprintf_func
) (info
->stream
, "-%s",
1059 else if (place
== '3')
1061 /* `fmovem' insn. */
1063 val
= fetch_arg (buffer
, place
, 8, info
);
1066 (*info
->fprintf_func
) (info
->stream
, "#0");
1073 for (regno
= 0; regno
< 8; ++regno
)
1074 if (val
& (0x80 >> regno
))
1075 newval
|= 1 << regno
;
1080 for (regno
= 0; regno
< 8; ++regno
)
1081 if (val
& (1 << regno
))
1085 (*info
->fprintf_func
) (info
->stream
, "/");
1087 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
1088 first_regno
= regno
;
1089 while (val
& (1 << (regno
+ 1)))
1091 if (regno
> first_regno
)
1092 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
1095 else if (place
== '8')
1097 /* fmoveml for FP status registers. */
1098 (*info
->fprintf_func
) (info
->stream
, "%s",
1099 fpcr_names
[fetch_arg (buffer
, place
, 3,
1116 int val
= fetch_arg (buffer
, place
, 5, info
);
1121 case 2: name
= "%tt0"; break;
1122 case 3: name
= "%tt1"; break;
1123 case 0x10: name
= "%tc"; break;
1124 case 0x11: name
= "%drp"; break;
1125 case 0x12: name
= "%srp"; break;
1126 case 0x13: name
= "%crp"; break;
1127 case 0x14: name
= "%cal"; break;
1128 case 0x15: name
= "%val"; break;
1129 case 0x16: name
= "%scc"; break;
1130 case 0x17: name
= "%ac"; break;
1131 case 0x18: name
= "%psr"; break;
1132 case 0x19: name
= "%pcsr"; break;
1136 int break_reg
= ((buffer
[3] >> 2) & 7);
1138 (*info
->fprintf_func
)
1139 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1144 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1147 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1153 int fc
= fetch_arg (buffer
, place
, 5, info
);
1156 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1158 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1160 /* xgettext:c-format */
1161 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1166 (*info
->fprintf_func
) (info
->stream
, "%%val");
1171 int level
= fetch_arg (buffer
, place
, 3, info
);
1173 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1180 int reg
= fetch_arg (buffer
, place
, 5, info
);
1187 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1188 reg_half_names
[reg
],
1189 is_upper
? "u" : "l");
1200 /* Try to match the current instruction to best and if so, return the
1201 number of bytes consumed from the instruction stream, else zero. */
1204 match_insn_m68k (bfd_vma memaddr
,
1205 disassemble_info
* info
,
1206 const struct m68k_opcode
* best
)
1208 unsigned char *save_p
;
1211 const char *args
= best
->args
;
1213 struct private *priv
= (struct private *) info
->private_data
;
1214 bfd_byte
*buffer
= priv
->the_buffer
;
1215 fprintf_ftype save_printer
= info
->fprintf_func
;
1216 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1217 = info
->print_address_func
;
1222 /* Point at first word of argument data,
1223 and at descriptor for first argument. */
1226 /* Figure out how long the fixed-size portion of the instruction is.
1227 The only place this is stored in the opcode table is
1228 in the arguments--look for arguments which specify fields in the 2nd
1229 or 3rd words of the instruction. */
1230 for (d
= args
; *d
; d
+= 2)
1232 /* I don't think it is necessary to be checking d[0] here;
1233 I suspect all this could be moved to the case statement below. */
1236 if (d
[1] == 'l' && p
- buffer
< 6)
1238 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1242 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1268 /* pflusha is an exceptions. It takes no arguments but is two words
1269 long. Recognize it by looking at the lower 16 bits of the mask. */
1270 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1273 /* lpstop is another exception. It takes a one word argument but is
1274 three words long. */
1276 && (best
->match
& 0xffff) == 0xffff
1280 /* Copy the one word argument into the usual location for a one
1281 word argument, to simplify printing it. We can get away with
1282 this because we know exactly what the second word is, and we
1283 aren't going to print anything based on it. */
1285 FETCH_DATA (info
, p
);
1286 buffer
[2] = buffer
[4];
1287 buffer
[3] = buffer
[5];
1290 FETCH_DATA (info
, p
);
1293 info
->print_address_func
= dummy_print_address
;
1294 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
1296 /* We scan the operands twice. The first time we don't print anything,
1297 but look for errors. */
1298 for (d
= args
; *d
; d
+= 2)
1300 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1304 else if (eaten
== -1)
1306 info
->fprintf_func
= save_printer
;
1307 info
->print_address_func
= save_print_address
;
1312 /* We must restore the print functions before trying to print the
1314 info
->fprintf_func
= save_printer
;
1315 info
->print_address_func
= save_print_address
;
1316 info
->fprintf_func (info
->stream
,
1317 /* xgettext:c-format */
1318 _("<internal error in opcode table: %s %s>\n"),
1319 best
->name
, best
->args
);
1325 info
->fprintf_func
= save_printer
;
1326 info
->print_address_func
= save_print_address
;
1330 info
->fprintf_func (info
->stream
, "%s", best
->name
);
1333 info
->fprintf_func (info
->stream
, " ");
1337 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1340 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1341 info
->fprintf_func (info
->stream
, ",");
1347 /* Try to interpret the instruction at address MEMADDR as one that
1348 can execute on a processor with the features given by ARCH_MASK.
1349 If successful, print the instruction to INFO->STREAM and return
1350 its length in bytes. Return 0 otherwise. */
1353 m68k_scan_mask (bfd_vma memaddr
, disassemble_info
*info
,
1354 unsigned int arch_mask
)
1358 static const struct m68k_opcode
**opcodes
[16];
1359 static int numopcodes
[16];
1363 struct private *priv
= (struct private *) info
->private_data
;
1364 bfd_byte
*buffer
= priv
->the_buffer
;
1368 /* Speed up the matching by sorting the opcode
1369 table on the upper four bits of the opcode. */
1370 const struct m68k_opcode
**opc_pointer
[16];
1372 /* First count how many opcodes are in each of the sixteen buckets. */
1373 for (i
= 0; i
< m68k_numopcodes
; i
++)
1374 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1376 /* Then create a sorted table of pointers
1377 that point into the unsorted table. */
1378 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1380 opcodes
[0] = opc_pointer
[0];
1382 for (i
= 1; i
< 16; i
++)
1384 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1385 opcodes
[i
] = opc_pointer
[i
];
1388 for (i
= 0; i
< m68k_numopcodes
; i
++)
1389 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1392 FETCH_DATA (info
, buffer
+ 2);
1393 major_opcode
= (buffer
[0] >> 4) & 15;
1395 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1397 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1398 unsigned long opcode
= opc
->opcode
;
1399 unsigned long match
= opc
->match
;
1400 const char *args
= opc
->args
;
1405 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1406 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1407 /* Only fetch the next two bytes if we need to. */
1408 && (((0xffff & match
) == 0)
1410 (FETCH_DATA (info
, buffer
+ 4)
1411 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1412 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1414 && (opc
->arch
& arch_mask
) != 0)
1416 /* Don't use for printout the variants of divul and divsl
1417 that have the same register number in two places.
1418 The more general variants will match instead. */
1419 for (d
= args
; *d
; d
+= 2)
1423 /* Don't use for printout the variants of most floating
1424 point coprocessor instructions which use the same
1425 register number in two places, as above. */
1427 for (d
= args
; *d
; d
+= 2)
1431 /* Don't match fmovel with more than one register;
1432 wait for fmoveml. */
1435 for (d
= args
; *d
; d
+= 2)
1437 if (d
[0] == 's' && d
[1] == '8')
1439 val
= fetch_arg (buffer
, d
[1], 3, info
);
1440 if ((val
& (val
- 1)) != 0)
1446 /* Don't match FPU insns with non-default coprocessor ID. */
1449 for (d
= args
; *d
; d
+= 2)
1453 val
= fetch_arg (buffer
, 'd', 3, info
);
1461 if ((val
= match_insn_m68k (memaddr
, info
, opc
)))
1468 /* Print the m68k instruction at address MEMADDR in debugged memory,
1469 on INFO->STREAM. Returns length of the instruction, in bytes. */
1472 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1474 unsigned int arch_mask
;
1475 struct private priv
;
1478 bfd_byte
*buffer
= priv
.the_buffer
;
1480 /* Save these printing functions in case we need to restore them
1482 fprintf_ftype save_printer
= info
->fprintf_func
;
1483 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1484 = info
->print_address_func
;
1486 info
->private_data
= (PTR
) &priv
;
1487 /* Tell objdump to use two bytes per chunk
1488 and six bytes per line for displaying raw data. */
1489 info
->bytes_per_chunk
= 2;
1490 info
->bytes_per_line
= 6;
1491 info
->display_endian
= BFD_ENDIAN_BIG
;
1492 priv
.max_fetched
= priv
.the_buffer
;
1493 priv
.insn_start
= memaddr
;
1495 if (setjmp (priv
.bailout
) != 0)
1497 /* longjmp may be called while these printing functions are
1498 temporarily replaced with dummy functions. Restore them
1501 Admittedly, this save-and-restore operation is somewhat ugly
1502 in that we are exposing the fact that match_insn_m68k
1503 temporarily replaces insn->fprintf_func and
1504 insn->print_address_func. Perhaps, a real fix is to report a
1505 FETCH_DATA failure with a return value of some sort, without
1506 using setjmp/longjmp. A better fix may be to teach the m68k
1507 disassembler do its job without temporarily replacing
1508 insn->fprintf_func and insn->print_address_func, but that's a
1509 task for another day. */
1510 info
->fprintf_func
= save_printer
;
1511 info
->print_address_func
= save_print_address
;
1517 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1520 /* First try printing an m680x0 instruction. Try printing a Coldfire
1521 one if that fails. */
1522 val
= m68k_scan_mask (memaddr
, info
, m68k_mask
);
1526 val
= m68k_scan_mask (memaddr
, info
, mcf_mask
);
1532 val
= m68k_scan_mask (memaddr
, info
, arch_mask
);
1537 /* Handle undefined instructions. */
1538 info
->fprintf_func (info
->stream
, "0%o", (buffer
[0] << 8) + buffer
[1]);