1 /* Print Motorola 68k instructions.
2 Copyright (C) 1986-2014 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
23 #include "floatformat.h"
24 #include "libiberty.h"
27 #include "opcode/m68k.h"
29 /* Local function prototypes. */
31 const char * const fpcr_names
[] =
33 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
34 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
37 static char *const reg_names
[] =
39 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
40 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
44 /* Name of register halves for MAC/EMAC.
45 Seperate from reg_names since 'spu', 'fpl' look weird. */
46 static char *const reg_half_names
[] =
48 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
49 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
53 /* Sign-extend an (unsigned char). */
55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 /* Get a 1 byte signed integer. */
61 #define NEXTBYTE(p, val) \
65 if (!FETCH_DATA (info, p)) \
67 val = COERCE_SIGNED_CHAR (p[-1]); \
71 /* Get a 2 byte signed integer. */
72 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
74 #define NEXTWORD(p, val, ret_val) \
78 if (!FETCH_DATA (info, p)) \
80 val = COERCE16 ((p[-2] << 8) + p[-1]); \
84 /* Get a 4 byte signed integer. */
85 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
87 #define NEXTLONG(p, val, ret_val) \
91 if (!FETCH_DATA (info, p)) \
93 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
97 /* Get a 4 byte unsigned integer. */
98 #define NEXTULONG(p, val) \
102 if (!FETCH_DATA (info, p)) \
104 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
108 /* Get a single precision float. */
109 #define NEXTSINGLE(val, p) \
113 if (!FETCH_DATA (info, p)) \
115 floatformat_to_double (& floatformat_ieee_single_big, \
116 (char *) p - 4, & val); \
120 /* Get a double precision float. */
121 #define NEXTDOUBLE(val, p) \
125 if (!FETCH_DATA (info, p)) \
127 floatformat_to_double (& floatformat_ieee_double_big, \
128 (char *) p - 8, & val); \
132 /* Get an extended precision float. */
133 #define NEXTEXTEND(val, p) \
137 if (!FETCH_DATA (info, p)) \
139 floatformat_to_double (& floatformat_m68881_ext, \
140 (char *) p - 12, & val); \
144 /* Need a function to convert from packed to double
145 precision. Actually, it's easier to print a
146 packed number than a double anyway, so maybe
147 there should be a special case to handle this... */
148 #define NEXTPACKED(p, val) \
152 if (!FETCH_DATA (info, p)) \
159 /* Maximum length of an instruction. */
166 /* Points to first byte not fetched. */
167 bfd_byte
*max_fetched
;
168 bfd_byte the_buffer
[MAXLEN
];
172 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
173 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */
174 #define FETCH_DATA(info, addr) \
175 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
176 ? 1 : fetch_data ((info), (addr)))
179 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
182 struct private *priv
= (struct private *)info
->private_data
;
183 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
185 status
= (*info
->read_memory_func
) (start
,
187 addr
- priv
->max_fetched
,
191 (*info
->memory_error_func
) (status
, start
, info
);
195 priv
->max_fetched
= addr
;
199 /* This function is used to print to the bit-bucket. */
201 dummy_printer (FILE *file ATTRIBUTE_UNUSED
,
202 const char *format ATTRIBUTE_UNUSED
,
209 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
210 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
214 /* Fetch BITS bits from a position in the instruction specified by CODE.
215 CODE is a "place to put an argument", or 'x' for a destination
216 that is a general address (mode and register).
217 BUFFER contains the instruction.
218 Returns -1 on failure. */
221 fetch_arg (unsigned char *buffer
,
224 disassemble_info
*info
)
230 case '/': /* MAC/EMAC mask bit. */
231 val
= buffer
[3] >> 5;
234 case 'G': /* EMAC ACC load. */
235 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
238 case 'H': /* EMAC ACC !load. */
239 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
242 case ']': /* EMAC ACCEXT bit. */
243 val
= buffer
[0] >> 2;
246 case 'I': /* MAC/EMAC scale factor. */
247 val
= buffer
[2] >> 1;
250 case 'F': /* EMAC ACCx. */
251 val
= buffer
[0] >> 1;
262 case 'd': /* Destination, for register or quick. */
263 val
= (buffer
[0] << 8) + buffer
[1];
267 case 'x': /* Destination, for general arg. */
268 val
= (buffer
[0] << 8) + buffer
[1];
273 if (! FETCH_DATA (info
, buffer
+ 3))
275 val
= (buffer
[3] >> 4);
279 if (! FETCH_DATA (info
, buffer
+ 3))
285 if (! FETCH_DATA (info
, buffer
+ 3))
287 val
= (buffer
[2] << 8) + buffer
[3];
292 if (! FETCH_DATA (info
, buffer
+ 3))
294 val
= (buffer
[2] << 8) + buffer
[3];
300 if (! FETCH_DATA (info
, buffer
+ 3))
302 val
= (buffer
[2] << 8) + buffer
[3];
306 if (! FETCH_DATA (info
, buffer
+ 5))
308 val
= (buffer
[4] << 8) + buffer
[5];
313 if (! FETCH_DATA (info
, buffer
+ 5))
315 val
= (buffer
[4] << 8) + buffer
[5];
320 if (! FETCH_DATA (info
, buffer
+ 5))
322 val
= (buffer
[4] << 8) + buffer
[5];
326 if (! FETCH_DATA (info
, buffer
+ 3))
328 val
= (buffer
[2] << 8) + buffer
[3];
333 if (! FETCH_DATA (info
, buffer
+ 3))
335 val
= (buffer
[2] << 8) + buffer
[3];
340 if (! FETCH_DATA (info
, buffer
+ 3))
342 val
= (buffer
[2] << 8) + buffer
[3];
347 val
= (buffer
[1] >> 6);
351 if (! FETCH_DATA (info
, buffer
+ 3))
353 val
= (buffer
[2] >> 1);
357 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
358 | ((buffer
[0] >> 1) & 0x7)
359 | (buffer
[3] & 0x80 ? 0x10 : 0);
363 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
367 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
371 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
375 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
379 val
= buffer
[2] >> 2;
386 /* bits is never too big. */
387 return val
& ((1 << bits
) - 1);
390 /* Check if an EA is valid for a particular code. This is required
391 for the EMAC instructions since the type of source address determines
392 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
393 is a non-load EMAC instruction and the bits mean register Ry.
394 A similar case exists for the movem instructions where the register
395 mask is interpreted differently for different EAs. */
398 m68k_valid_ea (char code
, int val
)
401 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
402 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
403 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
408 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
411 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
414 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
417 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
420 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
423 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
426 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
429 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
432 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
435 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
438 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
441 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
444 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
447 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
450 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
453 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
456 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
459 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
462 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
465 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
468 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
471 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
474 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
477 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
484 mode
= (val
>> 3) & 7;
487 return (mask
& (1 << mode
)) != 0;
490 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
491 REGNO = -1 for pc, -2 for none (suppressed). */
494 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
498 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
499 (*info
->print_address_func
) (disp
, info
);
506 (*info
->fprintf_func
) (info
->stream
, "@(");
507 else if (regno
== -3)
508 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
510 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
512 sprintf_vma (buf
, disp
);
513 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);
517 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
518 P points to extension word, in buffer.
519 ADDR is the nominal core address of that extension word.
520 Returns NULL upon error. */
522 static unsigned char *
523 print_indexed (int basereg
,
526 disassemble_info
*info
)
529 static char *const scales
[] = { "", ":2", ":4", ":8" };
535 NEXTWORD (p
, word
, NULL
);
537 /* Generate the text for the index register.
538 Where this will be output is not yet determined. */
539 sprintf (buf
, "%s:%c%s",
540 reg_names
[(word
>> 12) & 0xf],
541 (word
& 0x800) ? 'l' : 'w',
542 scales
[(word
>> 9) & 3]);
544 /* Handle the 68000 style of indexing. */
546 if ((word
& 0x100) == 0)
548 base_disp
= word
& 0xff;
549 if ((base_disp
& 0x80) != 0)
553 print_base (basereg
, base_disp
, info
);
554 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
558 /* Handle the generalized kind. */
559 /* First, compute the displacement to add to the base register. */
570 switch ((word
>> 4) & 3)
573 NEXTWORD (p
, base_disp
, NULL
);
576 NEXTLONG (p
, base_disp
, NULL
);
581 /* Handle single-level case (not indirect). */
584 print_base (basereg
, base_disp
, info
);
586 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
587 (*info
->fprintf_func
) (info
->stream
, ")");
591 /* Two level. Compute displacement to add after indirection. */
596 NEXTWORD (p
, outer_disp
, NULL
);
599 NEXTLONG (p
, outer_disp
, NULL
);
602 print_base (basereg
, base_disp
, info
);
603 if ((word
& 4) == 0 && buf
[0] != '\0')
605 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
608 sprintf_vma (vmabuf
, outer_disp
);
609 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
611 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
612 (*info
->fprintf_func
) (info
->stream
, ")");
617 #define FETCH_ARG(size, val) \
620 val = fetch_arg (buffer, place, size, info); \
626 /* Returns number of bytes "eaten" by the operand, or
627 return -1 if an invalid operand was found, or -2 if
628 an opcode tabe error was found or -3 to simply abort.
629 ADDR is the pc for this arg to be relative to. */
632 print_insn_arg (const char *d
,
633 unsigned char *buffer
,
636 disassemble_info
*info
)
640 unsigned char *p
= p0
;
651 case 'c': /* Cache identifier. */
653 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
655 (*info
->fprintf_func
) (info
->stream
, "%s", cacheFieldName
[val
]);
659 case 'a': /* Address register indirect only. Cf. case '+'. */
662 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[val
+ 8]);
666 case '_': /* 32-bit absolute address for move16. */
669 (*info
->print_address_func
) (uval
, info
);
674 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
678 (*info
->fprintf_func
) (info
->stream
, "%%sr");
682 (*info
->fprintf_func
) (info
->stream
, "%%usp");
686 (*info
->fprintf_func
) (info
->stream
, "%%acc");
690 (*info
->fprintf_func
) (info
->stream
, "%%macsr");
694 (*info
->fprintf_func
) (info
->stream
, "%%mask");
699 /* FIXME: There's a problem here, different m68k processors call the
700 same address different names. The tables below try to get it right
701 using info->mach, but only for v4e. */
702 struct regname
{ char * name
; int value
; };
703 static const struct regname names
[] =
705 {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
706 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
707 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
708 {"%rgpiobar", 0x009}, {"%acr4",0x00c},
709 {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
710 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
711 {"%msp", 0x803}, {"%isp", 0x804},
713 /* Reg c04 is sometimes called flashbar or rambar.
714 Reg c05 is also sometimes called rambar. */
715 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
717 /* reg c0e is sometimes called mbar2 or secmbar.
718 reg c0f is sometimes called mbar. */
719 {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
721 /* Should we be calling this psr like we do in case 'Y'? */
724 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
726 /* Fido added these. */
727 {"%cac", 0xffe}, {"%mbo", 0xfff}
729 /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */
730 static const struct regname names_v4e
[] =
732 {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
733 {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
735 unsigned int arch_mask
;
737 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
739 if (arch_mask
& (mcfisa_b
| mcfisa_c
))
741 for (regno
= ARRAY_SIZE (names_v4e
); --regno
>= 0;)
742 if (names_v4e
[regno
].value
== val
)
744 (*info
->fprintf_func
) (info
->stream
, "%s", names_v4e
[regno
].name
);
750 for (regno
= ARRAY_SIZE (names
) - 1; regno
>= 0; regno
--)
751 if (names
[regno
].value
== val
)
753 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
757 (*info
->fprintf_func
) (info
->stream
, "0x%x", val
);
763 /* 0 means 8, except for the bkpt instruction... */
764 if (val
== 0 && d
[1] != 's')
766 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
774 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
779 (*info
->fprintf_func
) (info
->stream
, "#%d", val
+1);
784 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
790 static char *const scalefactor_name
[] = { "<<", ">>" };
793 (*info
->fprintf_func
) (info
->stream
, "%s", scalefactor_name
[val
]);
800 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
806 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
811 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
816 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
+ 010]);
821 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
825 FETCH_ARG (4, regno
);
827 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
829 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
834 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", val
);
840 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
842 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
847 (*info
->fprintf_func
) (info
->stream
, "%s@+", reg_names
[val
+ 8]);
852 (*info
->fprintf_func
) (info
->stream
, "%s@-", reg_names
[val
+ 8]);
859 (*info
->fprintf_func
) (info
->stream
, "{%s}", reg_names
[val
]);
861 else if (place
== 'C')
864 if (val
> 63) /* This is a signed constant. */
866 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
874 p1
= buffer
+ (*d
== '#' ? 2 : 4);
877 else if (place
== 'C')
879 else if (place
== '8')
881 else if (place
== '3')
883 else if (place
== 'b')
885 else if (place
== 'w' || place
== 'W')
886 NEXTWORD (p1
, val
, -3);
887 else if (place
== 'l')
888 NEXTLONG (p1
, val
, -3);
892 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
898 else if (place
== 'B')
899 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
900 else if (place
== 'w' || place
== 'W')
901 NEXTWORD (p
, disp
, -3);
902 else if (place
== 'l' || place
== 'L' || place
== 'C')
903 NEXTLONG (p
, disp
, -3);
904 else if (place
== 'g')
906 NEXTBYTE (buffer
, disp
);
908 NEXTWORD (p
, disp
, -3);
910 NEXTLONG (p
, disp
, -3);
912 else if (place
== 'c')
914 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
915 NEXTLONG (p
, disp
, -3);
917 NEXTWORD (p
, disp
, -3);
922 (*info
->print_address_func
) (addr
+ disp
, info
);
929 NEXTWORD (p
, val
, -3);
931 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", reg_names
[val1
+ 8], val
);
937 (*info
->fprintf_func
) (info
->stream
, "%s", fpcr_names
[val
]);
942 (*info
->fprintf_func
) (info
->stream
, "%%acc%d", val
);
947 (*info
->fprintf_func
) (info
->stream
, "%%accext%s", val
== 0 ? "01" : "23");
953 (*info
->fprintf_func
) (info
->stream
, "<<");
955 (*info
->fprintf_func
) (info
->stream
, ">>");
961 /* Get coprocessor ID... */
962 val
= fetch_arg (buffer
, 'd', 3, info
);
965 if (val
!= 1) /* Unusual coprocessor ID? */
966 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
995 val
= fetch_arg (buffer
, 'x', 6, info
);
998 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
1002 val
= fetch_arg (buffer
, 's', 6, info
);
1007 /* If the <ea> is invalid for *d, then reject this match. */
1008 if (!m68k_valid_ea (*d
, val
))
1011 /* Get register number assuming address register. */
1012 regno
= (val
& 7) + 8;
1013 regname
= reg_names
[regno
];
1017 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
1021 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
1025 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
1029 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
1033 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
1037 NEXTWORD (p
, val
, -3);
1038 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
1042 p
= print_indexed (regno
, p
, addr
, info
);
1051 NEXTWORD (p
, val
, -3);
1052 (*info
->print_address_func
) (val
, info
);
1056 NEXTULONG (p
, uval
);
1057 (*info
->print_address_func
) (uval
, info
);
1061 NEXTWORD (p
, val
, -3);
1062 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1063 (*info
->print_address_func
) (addr
+ val
, info
);
1064 (*info
->fprintf_func
) (info
->stream
, ")");
1068 p
= print_indexed (-1, p
, addr
, info
);
1074 flt_p
= 1; /* Assume it's a float... */
1083 NEXTWORD (p
, val
, -3);
1088 NEXTLONG (p
, val
, -3);
1093 NEXTSINGLE (flval
, p
);
1097 NEXTDOUBLE (flval
, p
);
1101 NEXTEXTEND (flval
, p
);
1105 NEXTPACKED (p
, flval
);
1111 if (flt_p
) /* Print a float? */
1112 (*info
->fprintf_func
) (info
->stream
, "#0e%g", flval
);
1114 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
1122 /* If place is '/', then this is the case of the mask bit for
1123 mac/emac loads. Now that the arg has been printed, grab the
1124 mask bit and if set, add a '&' to the arg. */
1129 info
->fprintf_func (info
->stream
, "&");
1139 NEXTWORD (p1
, val
, -3);
1140 /* Move the pointer ahead if this point is farther ahead
1142 p
= p1
> p
? p1
: p
;
1145 (*info
->fprintf_func
) (info
->stream
, "#0");
1152 for (regno
= 0; regno
< 16; ++regno
)
1153 if (val
& (0x8000 >> regno
))
1154 newval
|= 1 << regno
;
1159 for (regno
= 0; regno
< 16; ++regno
)
1160 if (val
& (1 << regno
))
1165 (*info
->fprintf_func
) (info
->stream
, "/");
1167 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
1168 first_regno
= regno
;
1169 while (val
& (1 << (regno
+ 1)))
1171 if (regno
> first_regno
)
1172 (*info
->fprintf_func
) (info
->stream
, "-%s",
1176 else if (place
== '3')
1178 /* `fmovem' insn. */
1184 (*info
->fprintf_func
) (info
->stream
, "#0");
1191 for (regno
= 0; regno
< 8; ++regno
)
1192 if (val
& (0x80 >> regno
))
1193 newval
|= 1 << regno
;
1198 for (regno
= 0; regno
< 8; ++regno
)
1199 if (val
& (1 << regno
))
1203 (*info
->fprintf_func
) (info
->stream
, "/");
1205 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
1206 first_regno
= regno
;
1207 while (val
& (1 << (regno
+ 1)))
1209 if (regno
> first_regno
)
1210 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
1213 else if (place
== '8')
1216 /* fmoveml for FP status registers. */
1217 (*info
->fprintf_func
) (info
->stream
, "%s", fpcr_names
[val
]);
1238 case 2: name
= "%tt0"; break;
1239 case 3: name
= "%tt1"; break;
1240 case 0x10: name
= "%tc"; break;
1241 case 0x11: name
= "%drp"; break;
1242 case 0x12: name
= "%srp"; break;
1243 case 0x13: name
= "%crp"; break;
1244 case 0x14: name
= "%cal"; break;
1245 case 0x15: name
= "%val"; break;
1246 case 0x16: name
= "%scc"; break;
1247 case 0x17: name
= "%ac"; break;
1248 case 0x18: name
= "%psr"; break;
1249 case 0x19: name
= "%pcsr"; break;
1253 int break_reg
= ((buffer
[3] >> 2) & 7);
1255 (*info
->fprintf_func
)
1256 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
1261 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
1264 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
1274 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
1276 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
1278 /* xgettext:c-format */
1279 (*info
->fprintf_func
) (info
->stream
, _("<function code %d>"), fc
);
1284 (*info
->fprintf_func
) (info
->stream
, "%%val");
1291 FETCH_ARG (3, level
);
1292 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
1307 (*info
->fprintf_func
) (info
->stream
, "%s%s",
1308 reg_half_names
[reg
],
1309 is_upper
? "u" : "l");
1320 /* Try to match the current instruction to best and if so, return the
1321 number of bytes consumed from the instruction stream, else zero. */
1324 match_insn_m68k (bfd_vma memaddr
,
1325 disassemble_info
* info
,
1326 const struct m68k_opcode
* best
)
1328 unsigned char *save_p
;
1331 const char *args
= best
->args
;
1333 struct private *priv
= (struct private *) info
->private_data
;
1334 bfd_byte
*buffer
= priv
->the_buffer
;
1335 fprintf_ftype save_printer
= info
->fprintf_func
;
1336 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1337 = info
->print_address_func
;
1342 /* Point at first word of argument data,
1343 and at descriptor for first argument. */
1346 /* Figure out how long the fixed-size portion of the instruction is.
1347 The only place this is stored in the opcode table is
1348 in the arguments--look for arguments which specify fields in the 2nd
1349 or 3rd words of the instruction. */
1350 for (d
= args
; *d
; d
+= 2)
1352 /* I don't think it is necessary to be checking d[0] here;
1353 I suspect all this could be moved to the case statement below. */
1356 if (d
[1] == 'l' && p
- buffer
< 6)
1358 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1362 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1388 /* pflusha is an exceptions. It takes no arguments but is two words
1389 long. Recognize it by looking at the lower 16 bits of the mask. */
1390 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1393 /* lpstop is another exception. It takes a one word argument but is
1394 three words long. */
1396 && (best
->match
& 0xffff) == 0xffff
1400 /* Copy the one word argument into the usual location for a one
1401 word argument, to simplify printing it. We can get away with
1402 this because we know exactly what the second word is, and we
1403 aren't going to print anything based on it. */
1405 FETCH_DATA (info
, p
);
1406 buffer
[2] = buffer
[4];
1407 buffer
[3] = buffer
[5];
1410 FETCH_DATA (info
, p
);
1413 info
->print_address_func
= dummy_print_address
;
1414 info
->fprintf_func
= (fprintf_ftype
) dummy_printer
;
1416 /* We scan the operands twice. The first time we don't print anything,
1417 but look for errors. */
1418 for (d
= args
; *d
; d
+= 2)
1420 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1424 else if (eaten
== -1 || eaten
== -3)
1426 info
->fprintf_func
= save_printer
;
1427 info
->print_address_func
= save_print_address
;
1432 /* We must restore the print functions before trying to print the
1434 info
->fprintf_func
= save_printer
;
1435 info
->print_address_func
= save_print_address
;
1436 info
->fprintf_func (info
->stream
,
1437 /* xgettext:c-format */
1438 _("<internal error in opcode table: %s %s>\n"),
1439 best
->name
, best
->args
);
1445 info
->fprintf_func
= save_printer
;
1446 info
->print_address_func
= save_print_address
;
1450 info
->fprintf_func (info
->stream
, "%s", best
->name
);
1453 info
->fprintf_func (info
->stream
, " ");
1457 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1460 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1461 info
->fprintf_func (info
->stream
, ",");
1467 /* Try to interpret the instruction at address MEMADDR as one that
1468 can execute on a processor with the features given by ARCH_MASK.
1469 If successful, print the instruction to INFO->STREAM and return
1470 its length in bytes. Return 0 otherwise. */
1473 m68k_scan_mask (bfd_vma memaddr
, disassemble_info
*info
,
1474 unsigned int arch_mask
)
1478 static const struct m68k_opcode
**opcodes
[16];
1479 static int numopcodes
[16];
1483 struct private *priv
= (struct private *) info
->private_data
;
1484 bfd_byte
*buffer
= priv
->the_buffer
;
1488 /* Speed up the matching by sorting the opcode
1489 table on the upper four bits of the opcode. */
1490 const struct m68k_opcode
**opc_pointer
[16];
1492 /* First count how many opcodes are in each of the sixteen buckets. */
1493 for (i
= 0; i
< m68k_numopcodes
; i
++)
1494 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1496 /* Then create a sorted table of pointers
1497 that point into the unsorted table. */
1498 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1500 opcodes
[0] = opc_pointer
[0];
1502 for (i
= 1; i
< 16; i
++)
1504 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1505 opcodes
[i
] = opc_pointer
[i
];
1508 for (i
= 0; i
< m68k_numopcodes
; i
++)
1509 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1512 FETCH_DATA (info
, buffer
+ 2);
1513 major_opcode
= (buffer
[0] >> 4) & 15;
1515 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1517 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1518 unsigned long opcode
= opc
->opcode
;
1519 unsigned long match
= opc
->match
;
1520 const char *args
= opc
->args
;
1525 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1526 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1527 /* Only fetch the next two bytes if we need to. */
1528 && (((0xffff & match
) == 0)
1530 (FETCH_DATA (info
, buffer
+ 4)
1531 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1532 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1534 && (opc
->arch
& arch_mask
) != 0)
1536 /* Don't use for printout the variants of divul and divsl
1537 that have the same register number in two places.
1538 The more general variants will match instead. */
1539 for (d
= args
; *d
; d
+= 2)
1543 /* Don't use for printout the variants of most floating
1544 point coprocessor instructions which use the same
1545 register number in two places, as above. */
1547 for (d
= args
; *d
; d
+= 2)
1551 /* Don't match fmovel with more than one register;
1552 wait for fmoveml. */
1555 for (d
= args
; *d
; d
+= 2)
1557 if (d
[0] == 's' && d
[1] == '8')
1559 val
= fetch_arg (buffer
, d
[1], 3, info
);
1562 if ((val
& (val
- 1)) != 0)
1568 /* Don't match FPU insns with non-default coprocessor ID. */
1571 for (d
= args
; *d
; d
+= 2)
1575 val
= fetch_arg (buffer
, 'd', 3, info
);
1583 if ((val
= match_insn_m68k (memaddr
, info
, opc
)))
1590 /* Print the m68k instruction at address MEMADDR in debugged memory,
1591 on INFO->STREAM. Returns length of the instruction, in bytes. */
1594 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1596 unsigned int arch_mask
;
1597 struct private priv
;
1600 bfd_byte
*buffer
= priv
.the_buffer
;
1602 info
->private_data
= & priv
;
1603 /* Tell objdump to use two bytes per chunk
1604 and six bytes per line for displaying raw data. */
1605 info
->bytes_per_chunk
= 2;
1606 info
->bytes_per_line
= 6;
1607 info
->display_endian
= BFD_ENDIAN_BIG
;
1608 priv
.max_fetched
= priv
.the_buffer
;
1609 priv
.insn_start
= memaddr
;
1611 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1614 /* First try printing an m680x0 instruction. Try printing a Coldfire
1615 one if that fails. */
1616 val
= m68k_scan_mask (memaddr
, info
, m68k_mask
);
1618 val
= m68k_scan_mask (memaddr
, info
, mcf_mask
);
1622 val
= m68k_scan_mask (memaddr
, info
, arch_mask
);
1626 /* Handle undefined instructions. */
1627 info
->fprintf_func (info
->stream
, ".short 0x%04x", (buffer
[0] << 8) + buffer
[1]);
1629 return val
? val
: 2;