1 /* Instruction opcode table for mep.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
31 #include "libiberty.h"
36 /* A mask for all ISAs executed by the core. */
37 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask
= {0, 0};
40 init_mep_all_core_isas_mask (void)
42 if (mep_all_core_isas_mask
.length
!= 0)
44 cgen_bitset_init (& mep_all_core_isas_mask
, ISA_MAX
);
45 cgen_bitset_set (& mep_all_core_isas_mask
, ISA_MEP
);
46 /* begin-all-core-isas */
47 cgen_bitset_add (& mep_all_core_isas_mask
, ISA_EXT_CORE1
);
48 /* end-all-core-isas */
51 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask
= {0, 0};
54 init_mep_all_cop_isas_mask (void)
56 if (mep_all_cop_isas_mask
.length
!= 0)
58 cgen_bitset_init (& mep_all_cop_isas_mask
, ISA_MAX
);
59 /* begin-all-cop-isas */
60 /* end-all-cop-isas */
64 mep_insn_supported_by_isa (const CGEN_INSN
*insn
, CGEN_ATTR_VALUE_BITSET_TYPE
*isa_mask
)
66 CGEN_BITSET insn_isas
= CGEN_INSN_BITSET_ATTR_VALUE (insn
, CGEN_INSN_ISA
);
67 return cgen_bitset_intersect_p (& insn_isas
, isa_mask
);
71 ( (1 << CGEN_INSN_OPTIONAL_BIT_INSN) \
72 | (1 << CGEN_INSN_OPTIONAL_MUL_INSN) \
73 | (1 << CGEN_INSN_OPTIONAL_DIV_INSN) \
74 | (1 << CGEN_INSN_OPTIONAL_DEBUG_INSN) \
75 | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN) \
76 | (1 << CGEN_INSN_OPTIONAL_ABS_INSN) \
77 | (1 << CGEN_INSN_OPTIONAL_AVE_INSN) \
78 | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN) \
79 | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN) \
80 | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) \
81 | (1 << CGEN_INSN_OPTIONAL_UCI_INSN) \
82 | (1 << CGEN_INSN_OPTIONAL_DSP_INSN) \
83 | (1 << CGEN_INSN_OPTIONAL_CP_INSN) \
84 | (1 << CGEN_INSN_OPTIONAL_CP64_INSN) )
87 mep_config_map_struct mep_config_map
[] =
89 /* config-map-start */
90 /* Default entry: mep core only, all options enabled. */
91 { "", 0, EF_MEP_CPU_C5
, 1, 0, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x80"}, OPTION_MASK
},
92 { "default", CONFIG_DEFAULT
, EF_MEP_CPU_C5
, 0, 0, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\xc0" },
94 | (1 << CGEN_INSN_OPTIONAL_MUL_INSN
)
95 | (1 << CGEN_INSN_OPTIONAL_DIV_INSN
)
96 | (1 << CGEN_INSN_OPTIONAL_BIT_INSN
)
97 | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN
)
98 | (1 << CGEN_INSN_OPTIONAL_ABS_INSN
)
99 | (1 << CGEN_INSN_OPTIONAL_AVE_INSN
)
100 | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN
)
101 | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN
)
102 | (1 << CGEN_INSN_OPTIONAL_SAT_INSN
) },
104 { 0, 0, 0, 0, 0, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, 0 }
107 int mep_config_index
= 0;
110 check_configured_mach (int machs
)
112 /* All base insns are supported. */
113 int mach
= 1 << MACH_BASE
;
118 mach
|= (1 << MACH_MEP
);
121 mach
|= (1 << MACH_H1
);
124 mach
|= (1 << MACH_MEP
);
125 mach
|= (1 << MACH_C5
);
134 mep_cgen_insn_supported (CGEN_CPU_DESC cd
, const CGEN_INSN
*insn
)
136 int iconfig
= CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_CONFIG
);
137 int machs
= CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_MACH
);
138 CGEN_BITSET isas
= CGEN_INSN_BITSET_ATTR_VALUE (insn
, CGEN_INSN_ISA
);
143 /* If the insn has an option bit set that we don't want,
145 if (CGEN_INSN_ATTRS (insn
)->bool & OPTION_MASK
& ~MEP_OMASK
)
148 /* If attributes are absent, assume no restriction. */
152 ok1
= ((machs
& cd
->machs
) && cgen_bitset_intersect_p (& isas
, cd
->isas
));
153 /* If the insn is config-specific, make sure it matches. */
154 ok2
= (iconfig
== 0 || iconfig
== MEP_CONFIG
);
155 /* Make sure the insn is supported by the configured mach */
156 ok3
= check_configured_mach (machs
);
158 return (ok1
&& ok2
&& ok3
);
160 /* The hash functions are recorded here to help keep assembler code out of
161 the disassembler and vice versa. */
163 static int asm_hash_insn_p (const CGEN_INSN
*);
164 static unsigned int asm_hash_insn (const char *);
165 static int dis_hash_insn_p (const CGEN_INSN
*);
166 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
168 /* Instruction formats. */
170 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
171 #define F(f) & mep_cgen_ifld_table[MEP_##f]
173 #define F(f) & mep_cgen_ifld_table[MEP_/**/f]
175 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
179 static const CGEN_IFMT ifmt_stcb_r ATTRIBUTE_UNUSED
= {
180 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
183 static const CGEN_IFMT ifmt_pref ATTRIBUTE_UNUSED
= {
184 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
187 static const CGEN_IFMT ifmt_prefd ATTRIBUTE_UNUSED
= {
188 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
191 static const CGEN_IFMT ifmt_casb3 ATTRIBUTE_UNUSED
= {
192 32, 32, 0xf00ff0ff, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_C5N4
) }, { F (F_RL5
) }, { F (F_C5N6
) }, { F (F_C5N7
) }, { 0 } }
195 static const CGEN_IFMT ifmt_sbcp ATTRIBUTE_UNUSED
= {
196 32, 32, 0xf00ff000, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_EXT4
) }, { F (F_12S20
) }, { 0 } }
199 static const CGEN_IFMT ifmt_lbucpa ATTRIBUTE_UNUSED
= {
200 32, 32, 0xf00ffc00, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_EXT4
) }, { F (F_EXT62
) }, { F (F_CDISP10
) }, { 0 } }
203 static const CGEN_IFMT ifmt_lhucpa ATTRIBUTE_UNUSED
= {
204 32, 32, 0xf00ffc00, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_EXT4
) }, { F (F_EXT62
) }, { F (F_CDISP10
) }, { 0 } }
207 static const CGEN_IFMT ifmt_uci ATTRIBUTE_UNUSED
= {
208 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
211 static const CGEN_IFMT ifmt_dsp ATTRIBUTE_UNUSED
= {
212 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16U16
) }, { 0 } }
215 static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED
= {
216 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
219 static const CGEN_IFMT ifmt_sh ATTRIBUTE_UNUSED
= {
220 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
223 static const CGEN_IFMT ifmt_sw ATTRIBUTE_UNUSED
= {
224 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
227 static const CGEN_IFMT ifmt_lbu ATTRIBUTE_UNUSED
= {
228 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
231 static const CGEN_IFMT ifmt_lhu ATTRIBUTE_UNUSED
= {
232 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
235 static const CGEN_IFMT ifmt_sw_sp ATTRIBUTE_UNUSED
= {
236 16, 16, 0xf083, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_8
) }, { F (F_7U9A4
) }, { F (F_SUB2
) }, { 0 } }
239 static const CGEN_IFMT ifmt_sb_tp ATTRIBUTE_UNUSED
= {
240 16, 16, 0xf880, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_RN3
) }, { F (F_8
) }, { F (F_7U9
) }, { 0 } }
243 static const CGEN_IFMT ifmt_sh_tp ATTRIBUTE_UNUSED
= {
244 16, 16, 0xf881, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_RN3
) }, { F (F_8
) }, { F (F_7U9A2
) }, { F (F_15
) }, { 0 } }
247 static const CGEN_IFMT ifmt_sw_tp ATTRIBUTE_UNUSED
= {
248 16, 16, 0xf883, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_RN3
) }, { F (F_8
) }, { F (F_7U9A4
) }, { F (F_SUB2
) }, { 0 } }
251 static const CGEN_IFMT ifmt_lbu_tp ATTRIBUTE_UNUSED
= {
252 16, 16, 0xf880, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_RN3
) }, { F (F_8
) }, { F (F_7U9
) }, { 0 } }
255 static const CGEN_IFMT ifmt_lhu_tp ATTRIBUTE_UNUSED
= {
256 16, 16, 0xf881, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_RN3
) }, { F (F_8
) }, { F (F_7U9A2
) }, { F (F_15
) }, { 0 } }
259 static const CGEN_IFMT ifmt_sb16 ATTRIBUTE_UNUSED
= {
260 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
263 static const CGEN_IFMT ifmt_sh16 ATTRIBUTE_UNUSED
= {
264 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
267 static const CGEN_IFMT ifmt_sw16 ATTRIBUTE_UNUSED
= {
268 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
271 static const CGEN_IFMT ifmt_lbu16 ATTRIBUTE_UNUSED
= {
272 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
275 static const CGEN_IFMT ifmt_lhu16 ATTRIBUTE_UNUSED
= {
276 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
279 static const CGEN_IFMT ifmt_sw24 ATTRIBUTE_UNUSED
= {
280 32, 32, 0xf0030000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_24U8A4N
) }, { F (F_SUB2
) }, { 0 } }
283 static const CGEN_IFMT ifmt_extb ATTRIBUTE_UNUSED
= {
284 16, 16, 0xf0ff, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
287 static const CGEN_IFMT ifmt_ssarb ATTRIBUTE_UNUSED
= {
288 16, 16, 0xfc0f, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_5
) }, { F (F_2U6
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
291 static const CGEN_IFMT ifmt_mov ATTRIBUTE_UNUSED
= {
292 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
295 static const CGEN_IFMT ifmt_movi8 ATTRIBUTE_UNUSED
= {
296 16, 16, 0xf000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_8S8
) }, { 0 } }
299 static const CGEN_IFMT ifmt_movi16 ATTRIBUTE_UNUSED
= {
300 32, 32, 0xf0ff0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
303 static const CGEN_IFMT ifmt_movu24 ATTRIBUTE_UNUSED
= {
304 32, 32, 0xf8000000, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_RN3
) }, { F (F_24U8N
) }, { 0 } }
307 static const CGEN_IFMT ifmt_movu16 ATTRIBUTE_UNUSED
= {
308 32, 32, 0xf0ff0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16U16
) }, { 0 } }
311 static const CGEN_IFMT ifmt_add3 ATTRIBUTE_UNUSED
= {
312 16, 16, 0xf000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_RL
) }, { 0 } }
315 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED
= {
316 16, 16, 0xf003, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_6S8
) }, { F (F_SUB2
) }, { 0 } }
319 static const CGEN_IFMT ifmt_add3i ATTRIBUTE_UNUSED
= {
320 16, 16, 0xf083, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_8
) }, { F (F_7U9A4
) }, { F (F_SUB2
) }, { 0 } }
323 static const CGEN_IFMT ifmt_slt3i ATTRIBUTE_UNUSED
= {
324 16, 16, 0xf007, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_5U8
) }, { F (F_SUB3
) }, { 0 } }
327 static const CGEN_IFMT ifmt_bra ATTRIBUTE_UNUSED
= {
328 16, 16, 0xf001, { { F (F_MAJOR
) }, { F (F_12S4A2
) }, { F (F_15
) }, { 0 } }
331 static const CGEN_IFMT ifmt_beqz ATTRIBUTE_UNUSED
= {
332 16, 16, 0xf001, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_8S8A2
) }, { F (F_15
) }, { 0 } }
335 static const CGEN_IFMT ifmt_beqi ATTRIBUTE_UNUSED
= {
336 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_4U8
) }, { F (F_SUB4
) }, { F (F_17S16A2
) }, { 0 } }
339 static const CGEN_IFMT ifmt_beq ATTRIBUTE_UNUSED
= {
340 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_17S16A2
) }, { 0 } }
343 static const CGEN_IFMT ifmt_bsr24 ATTRIBUTE_UNUSED
= {
344 32, 32, 0xf80f0000, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_24S5A2N
) }, { F (F_SUB4
) }, { 0 } }
347 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED
= {
348 16, 16, 0xff0f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
351 static const CGEN_IFMT ifmt_jmp24 ATTRIBUTE_UNUSED
= {
352 32, 32, 0xf80f0000, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_24U5A2N
) }, { F (F_SUB4
) }, { 0 } }
355 static const CGEN_IFMT ifmt_ret ATTRIBUTE_UNUSED
= {
356 16, 16, 0xffff, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
359 static const CGEN_IFMT ifmt_repeat ATTRIBUTE_UNUSED
= {
360 32, 32, 0xf0ff0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_17S16A2
) }, { 0 } }
363 static const CGEN_IFMT ifmt_erepeat ATTRIBUTE_UNUSED
= {
364 32, 32, 0xffff0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_17S16A2
) }, { 0 } }
367 static const CGEN_IFMT ifmt_stc_lp ATTRIBUTE_UNUSED
= {
368 16, 16, 0xf0ff, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_CSRN_LO
) }, { F (F_12
) }, { F (F_13
) }, { F (F_14
) }, { F (F_CSRN_HI
) }, { 0 } }
371 static const CGEN_IFMT ifmt_stc ATTRIBUTE_UNUSED
= {
372 16, 16, 0xf00e, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_CSRN
) }, { F (F_12
) }, { F (F_13
) }, { F (F_14
) }, { 0 } }
375 static const CGEN_IFMT ifmt_swi ATTRIBUTE_UNUSED
= {
376 16, 16, 0xffcf, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_8
) }, { F (F_9
) }, { F (F_2U10
) }, { F (F_SUB4
) }, { 0 } }
379 static const CGEN_IFMT ifmt_bsetm ATTRIBUTE_UNUSED
= {
380 16, 16, 0xf80f, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_3U5
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
383 static const CGEN_IFMT ifmt_madd ATTRIBUTE_UNUSED
= {
384 32, 32, 0xf00fffff, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16U16
) }, { 0 } }
387 static const CGEN_IFMT ifmt_clip ATTRIBUTE_UNUSED
= {
388 32, 32, 0xf0ffff07, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_EXT
) }, { F (F_5U24
) }, { F (F_29
) }, { F (F_30
) }, { F (F_31
) }, { 0 } }
391 static const CGEN_IFMT ifmt_swcp ATTRIBUTE_UNUSED
= {
392 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
395 static const CGEN_IFMT ifmt_smcp ATTRIBUTE_UNUSED
= {
396 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
399 static const CGEN_IFMT ifmt_swcp16 ATTRIBUTE_UNUSED
= {
400 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
403 static const CGEN_IFMT ifmt_smcp16 ATTRIBUTE_UNUSED
= {
404 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16S16
) }, { 0 } }
407 static const CGEN_IFMT ifmt_swcpa ATTRIBUTE_UNUSED
= {
408 32, 32, 0xf00ffc00, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_EXT4
) }, { F (F_EXT62
) }, { F (F_CDISP10
) }, { 0 } }
411 static const CGEN_IFMT ifmt_smcpa ATTRIBUTE_UNUSED
= {
412 32, 32, 0xf00ffc00, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_EXT4
) }, { F (F_EXT62
) }, { F (F_CDISP10
) }, { 0 } }
415 static const CGEN_IFMT ifmt_bcpeq ATTRIBUTE_UNUSED
= {
416 32, 32, 0xff0f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_17S16A2
) }, { 0 } }
419 static const CGEN_IFMT ifmt_sim_syscall ATTRIBUTE_UNUSED
= {
420 16, 16, 0xf8ef, { { F (F_MAJOR
) }, { F (F_4
) }, { F (F_CALLNUM
) }, { F (F_8
) }, { F (F_9
) }, { F (F_10
) }, { F (F_SUB4
) }, { 0 } }
425 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
426 #define A(a) (1 << CGEN_INSN_##a)
428 #define A(a) (1 << CGEN_INSN_/**/a)
430 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
431 #define OPERAND(op) MEP_OPERAND_##op
433 #define OPERAND(op) MEP_OPERAND_/**/op
435 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
436 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
438 /* The instruction table. */
440 static const CGEN_OPCODE mep_cgen_insn_opcode_table
[MAX_INSNS
] =
442 /* Special null first entry.
443 A `num' value of zero is thus invalid.
444 Also, the special `invalid' insn resides here. */
445 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
446 /* stcb $rn,($rma) */
449 { { MNEM
, ' ', OP (RN
), ',', '(', OP (RMA
), ')', 0 } },
450 & ifmt_stcb_r
, { 0x700c }
452 /* ldcb $rn,($rma) */
455 { { MNEM
, ' ', OP (RN
), ',', '(', OP (RMA
), ')', 0 } },
456 & ifmt_stcb_r
, { 0x700d }
458 /* pref $cimm4,($rma) */
461 { { MNEM
, ' ', OP (CIMM4
), ',', '(', OP (RMA
), ')', 0 } },
462 & ifmt_pref
, { 0x7005 }
464 /* pref $cimm4,$sdisp16($rma) */
467 { { MNEM
, ' ', OP (CIMM4
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
468 & ifmt_prefd
, { 0xf0030000 }
470 /* casb3 $rl5,$rn,($rm) */
473 { { MNEM
, ' ', OP (RL5
), ',', OP (RN
), ',', '(', OP (RM
), ')', 0 } },
474 & ifmt_casb3
, { 0xf0012000 }
476 /* cash3 $rl5,$rn,($rm) */
479 { { MNEM
, ' ', OP (RL5
), ',', OP (RN
), ',', '(', OP (RM
), ')', 0 } },
480 & ifmt_casb3
, { 0xf0012001 }
482 /* casw3 $rl5,$rn,($rm) */
485 { { MNEM
, ' ', OP (RL5
), ',', OP (RN
), ',', '(', OP (RM
), ')', 0 } },
486 & ifmt_casb3
, { 0xf0012002 }
488 /* sbcp $crn,$cdisp12($rma) */
491 { { MNEM
, ' ', OP (CRN
), ',', OP (CDISP12
), '(', OP (RMA
), ')', 0 } },
492 & ifmt_sbcp
, { 0xf0060000 }
494 /* lbcp $crn,$cdisp12($rma) */
497 { { MNEM
, ' ', OP (CRN
), ',', OP (CDISP12
), '(', OP (RMA
), ')', 0 } },
498 & ifmt_sbcp
, { 0xf0064000 }
500 /* lbucp $crn,$cdisp12($rma) */
503 { { MNEM
, ' ', OP (CRN
), ',', OP (CDISP12
), '(', OP (RMA
), ')', 0 } },
504 & ifmt_sbcp
, { 0xf006c000 }
506 /* shcp $crn,$cdisp12($rma) */
509 { { MNEM
, ' ', OP (CRN
), ',', OP (CDISP12
), '(', OP (RMA
), ')', 0 } },
510 & ifmt_sbcp
, { 0xf0061000 }
512 /* lhcp $crn,$cdisp12($rma) */
515 { { MNEM
, ' ', OP (CRN
), ',', OP (CDISP12
), '(', OP (RMA
), ')', 0 } },
516 & ifmt_sbcp
, { 0xf0065000 }
518 /* lhucp $crn,$cdisp12($rma) */
521 { { MNEM
, ' ', OP (CRN
), ',', OP (CDISP12
), '(', OP (RMA
), ')', 0 } },
522 & ifmt_sbcp
, { 0xf006d000 }
524 /* lbucpa $crn,($rma+),$cdisp10 */
527 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
528 & ifmt_lbucpa
, { 0xf005c000 }
530 /* lhucpa $crn,($rma+),$cdisp10a2 */
533 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
534 & ifmt_lhucpa
, { 0xf005d000 }
536 /* lbucpm0 $crn,($rma+),$cdisp10 */
539 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
540 & ifmt_lbucpa
, { 0xf005c800 }
542 /* lhucpm0 $crn,($rma+),$cdisp10a2 */
545 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
546 & ifmt_lhucpa
, { 0xf005d800 }
548 /* lbucpm1 $crn,($rma+),$cdisp10 */
551 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
552 & ifmt_lbucpa
, { 0xf005cc00 }
554 /* lhucpm1 $crn,($rma+),$cdisp10a2 */
557 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
558 & ifmt_lhucpa
, { 0xf005dc00 }
560 /* uci $rn,$rm,$uimm16 */
563 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (UIMM16
), 0 } },
564 & ifmt_uci
, { 0xf0020000 }
566 /* dsp $rn,$rm,$uimm16 */
569 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (UIMM16
), 0 } },
570 & ifmt_dsp
, { 0xf0000000 }
575 { { MNEM
, ' ', OP (RNC
), ',', '(', OP (RMA
), ')', 0 } },
581 { { MNEM
, ' ', OP (RNS
), ',', '(', OP (RMA
), ')', 0 } },
587 { { MNEM
, ' ', OP (RNL
), ',', '(', OP (RMA
), ')', 0 } },
593 { { MNEM
, ' ', OP (RNC
), ',', '(', OP (RMA
), ')', 0 } },
599 { { MNEM
, ' ', OP (RNS
), ',', '(', OP (RMA
), ')', 0 } },
605 { { MNEM
, ' ', OP (RNL
), ',', '(', OP (RMA
), ')', 0 } },
608 /* lbu $rnuc,($rma) */
611 { { MNEM
, ' ', OP (RNUC
), ',', '(', OP (RMA
), ')', 0 } },
614 /* lhu $rnus,($rma) */
617 { { MNEM
, ' ', OP (RNUS
), ',', '(', OP (RMA
), ')', 0 } },
620 /* sw $rnl,$udisp7a4($spr) */
623 { { MNEM
, ' ', OP (RNL
), ',', OP (UDISP7A4
), '(', OP (SPR
), ')', 0 } },
624 & ifmt_sw_sp
, { 0x4002 }
626 /* lw $rnl,$udisp7a4($spr) */
629 { { MNEM
, ' ', OP (RNL
), ',', OP (UDISP7A4
), '(', OP (SPR
), ')', 0 } },
630 & ifmt_sw_sp
, { 0x4003 }
632 /* sb $rn3c,$udisp7($tpr) */
635 { { MNEM
, ' ', OP (RN3C
), ',', OP (UDISP7
), '(', OP (TPR
), ')', 0 } },
636 & ifmt_sb_tp
, { 0x8000 }
638 /* sh $rn3s,$udisp7a2($tpr) */
641 { { MNEM
, ' ', OP (RN3S
), ',', OP (UDISP7A2
), '(', OP (TPR
), ')', 0 } },
642 & ifmt_sh_tp
, { 0x8080 }
644 /* sw $rn3l,$udisp7a4($tpr) */
647 { { MNEM
, ' ', OP (RN3L
), ',', OP (UDISP7A4
), '(', OP (TPR
), ')', 0 } },
648 & ifmt_sw_tp
, { 0x4082 }
650 /* lb $rn3c,$udisp7($tpr) */
653 { { MNEM
, ' ', OP (RN3C
), ',', OP (UDISP7
), '(', OP (TPR
), ')', 0 } },
654 & ifmt_sb_tp
, { 0x8800 }
656 /* lh $rn3s,$udisp7a2($tpr) */
659 { { MNEM
, ' ', OP (RN3S
), ',', OP (UDISP7A2
), '(', OP (TPR
), ')', 0 } },
660 & ifmt_sh_tp
, { 0x8880 }
662 /* lw $rn3l,$udisp7a4($tpr) */
665 { { MNEM
, ' ', OP (RN3L
), ',', OP (UDISP7A4
), '(', OP (TPR
), ')', 0 } },
666 & ifmt_sw_tp
, { 0x4083 }
668 /* lbu $rn3uc,$udisp7($tpr) */
671 { { MNEM
, ' ', OP (RN3UC
), ',', OP (UDISP7
), '(', OP (TPR
), ')', 0 } },
672 & ifmt_lbu_tp
, { 0x4880 }
674 /* lhu $rn3us,$udisp7a2($tpr) */
677 { { MNEM
, ' ', OP (RN3US
), ',', OP (UDISP7A2
), '(', OP (TPR
), ')', 0 } },
678 & ifmt_lhu_tp
, { 0x8881 }
680 /* sb $rnc,$sdisp16($rma) */
683 { { MNEM
, ' ', OP (RNC
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
684 & ifmt_sb16
, { 0xc0080000 }
686 /* sh $rns,$sdisp16($rma) */
689 { { MNEM
, ' ', OP (RNS
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
690 & ifmt_sh16
, { 0xc0090000 }
692 /* sw $rnl,$sdisp16($rma) */
695 { { MNEM
, ' ', OP (RNL
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
696 & ifmt_sw16
, { 0xc00a0000 }
698 /* lb $rnc,$sdisp16($rma) */
701 { { MNEM
, ' ', OP (RNC
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
702 & ifmt_sb16
, { 0xc00c0000 }
704 /* lh $rns,$sdisp16($rma) */
707 { { MNEM
, ' ', OP (RNS
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
708 & ifmt_sh16
, { 0xc00d0000 }
710 /* lw $rnl,$sdisp16($rma) */
713 { { MNEM
, ' ', OP (RNL
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
714 & ifmt_sw16
, { 0xc00e0000 }
716 /* lbu $rnuc,$sdisp16($rma) */
719 { { MNEM
, ' ', OP (RNUC
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
720 & ifmt_lbu16
, { 0xc00b0000 }
722 /* lhu $rnus,$sdisp16($rma) */
725 { { MNEM
, ' ', OP (RNUS
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
726 & ifmt_lhu16
, { 0xc00f0000 }
728 /* sw $rnl,($addr24a4) */
731 { { MNEM
, ' ', OP (RNL
), ',', '(', OP (ADDR24A4
), ')', 0 } },
732 & ifmt_sw24
, { 0xe0020000 }
734 /* lw $rnl,($addr24a4) */
737 { { MNEM
, ' ', OP (RNL
), ',', '(', OP (ADDR24A4
), ')', 0 } },
738 & ifmt_sw24
, { 0xe0030000 }
743 { { MNEM
, ' ', OP (RN
), 0 } },
744 & ifmt_extb
, { 0x100d }
749 { { MNEM
, ' ', OP (RN
), 0 } },
750 & ifmt_extb
, { 0x102d }
755 { { MNEM
, ' ', OP (RN
), 0 } },
756 & ifmt_extb
, { 0x108d }
761 { { MNEM
, ' ', OP (RN
), 0 } },
762 & ifmt_extb
, { 0x10ad }
764 /* ssarb $udisp2($rm) */
767 { { MNEM
, ' ', OP (UDISP2
), '(', OP (RM
), ')', 0 } },
768 & ifmt_ssarb
, { 0x100c }
773 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
779 { { MNEM
, ' ', OP (RN
), ',', OP (SIMM8
), 0 } },
780 & ifmt_movi8
, { 0x5000 }
782 /* mov $rn,$simm16 */
785 { { MNEM
, ' ', OP (RN
), ',', OP (SIMM16
), 0 } },
786 & ifmt_movi16
, { 0xc0010000 }
788 /* movu $rn3,$uimm24 */
791 { { MNEM
, ' ', OP (RN3
), ',', OP (UIMM24
), 0 } },
792 & ifmt_movu24
, { 0xd0000000 }
794 /* movu $rn,$uimm16 */
797 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM16
), 0 } },
798 & ifmt_movu16
, { 0xc0110000 }
800 /* movh $rn,$uimm16 */
803 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM16
), 0 } },
804 & ifmt_movu16
, { 0xc0210000 }
806 /* add3 $rl,$rn,$rm */
809 { { MNEM
, ' ', OP (RL
), ',', OP (RN
), ',', OP (RM
), 0 } },
810 & ifmt_add3
, { 0x9000 }
815 { { MNEM
, ' ', OP (RN
), ',', OP (SIMM6
), 0 } },
816 & ifmt_add
, { 0x6000 }
818 /* add3 $rn,$spr,$uimm7a4 */
821 { { MNEM
, ' ', OP (RN
), ',', OP (SPR
), ',', OP (UIMM7A4
), 0 } },
822 & ifmt_add3i
, { 0x4000 }
824 /* advck3 \$0,$rn,$rm */
827 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (RM
), 0 } },
833 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
836 /* sbvck3 \$0,$rn,$rm */
839 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (RM
), 0 } },
845 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
848 /* slt3 \$0,$rn,$rm */
851 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (RM
), 0 } },
854 /* sltu3 \$0,$rn,$rm */
857 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (RM
), 0 } },
860 /* slt3 \$0,$rn,$uimm5 */
863 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (UIMM5
), 0 } },
864 & ifmt_slt3i
, { 0x6001 }
866 /* sltu3 \$0,$rn,$uimm5 */
869 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (UIMM5
), 0 } },
870 & ifmt_slt3i
, { 0x6005 }
872 /* sl1ad3 \$0,$rn,$rm */
875 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (RM
), 0 } },
876 & ifmt_mov
, { 0x2006 }
878 /* sl2ad3 \$0,$rn,$rm */
881 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (RM
), 0 } },
882 & ifmt_mov
, { 0x2007 }
884 /* add3 $rn,$rm,$simm16 */
887 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (SIMM16
), 0 } },
888 & ifmt_uci
, { 0xc0000000 }
890 /* slt3 $rn,$rm,$simm16 */
893 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (SIMM16
), 0 } },
894 & ifmt_uci
, { 0xc0020000 }
896 /* sltu3 $rn,$rm,$uimm16 */
899 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (UIMM16
), 0 } },
900 & ifmt_dsp
, { 0xc0030000 }
905 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
906 & ifmt_mov
, { 0x1000 }
911 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
912 & ifmt_mov
, { 0x1001 }
917 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
918 & ifmt_mov
, { 0x1002 }
923 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
924 & ifmt_mov
, { 0x1003 }
926 /* or3 $rn,$rm,$uimm16 */
929 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (UIMM16
), 0 } },
930 & ifmt_dsp
, { 0xc0040000 }
932 /* and3 $rn,$rm,$uimm16 */
935 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (UIMM16
), 0 } },
936 & ifmt_dsp
, { 0xc0050000 }
938 /* xor3 $rn,$rm,$uimm16 */
941 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (UIMM16
), 0 } },
942 & ifmt_dsp
, { 0xc0060000 }
947 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
948 & ifmt_mov
, { 0x200d }
953 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
954 & ifmt_mov
, { 0x200c }
959 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
960 & ifmt_mov
, { 0x200e }
965 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM5
), 0 } },
966 & ifmt_slt3i
, { 0x6003 }
971 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM5
), 0 } },
972 & ifmt_slt3i
, { 0x6002 }
977 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM5
), 0 } },
978 & ifmt_slt3i
, { 0x6006 }
980 /* sll3 \$0,$rn,$uimm5 */
983 { { MNEM
, ' ', '$', '0', ',', OP (RN
), ',', OP (UIMM5
), 0 } },
984 & ifmt_slt3i
, { 0x6007 }
989 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
990 & ifmt_mov
, { 0x200f }
995 { { MNEM
, ' ', OP (PCREL12A2
), 0 } },
996 & ifmt_bra
, { 0xb000 }
998 /* beqz $rn,$pcrel8a2 */
1001 { { MNEM
, ' ', OP (RN
), ',', OP (PCREL8A2
), 0 } },
1002 & ifmt_beqz
, { 0xa000 }
1004 /* bnez $rn,$pcrel8a2 */
1007 { { MNEM
, ' ', OP (RN
), ',', OP (PCREL8A2
), 0 } },
1008 & ifmt_beqz
, { 0xa001 }
1010 /* beqi $rn,$uimm4,$pcrel17a2 */
1013 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM4
), ',', OP (PCREL17A2
), 0 } },
1014 & ifmt_beqi
, { 0xe0000000 }
1016 /* bnei $rn,$uimm4,$pcrel17a2 */
1019 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM4
), ',', OP (PCREL17A2
), 0 } },
1020 & ifmt_beqi
, { 0xe0040000 }
1022 /* blti $rn,$uimm4,$pcrel17a2 */
1025 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM4
), ',', OP (PCREL17A2
), 0 } },
1026 & ifmt_beqi
, { 0xe00c0000 }
1028 /* bgei $rn,$uimm4,$pcrel17a2 */
1031 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM4
), ',', OP (PCREL17A2
), 0 } },
1032 & ifmt_beqi
, { 0xe0080000 }
1034 /* beq $rn,$rm,$pcrel17a2 */
1037 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (PCREL17A2
), 0 } },
1038 & ifmt_beq
, { 0xe0010000 }
1040 /* bne $rn,$rm,$pcrel17a2 */
1043 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), ',', OP (PCREL17A2
), 0 } },
1044 & ifmt_beq
, { 0xe0050000 }
1046 /* bsr $pcrel12a2 */
1049 { { MNEM
, ' ', OP (PCREL12A2
), 0 } },
1050 & ifmt_bra
, { 0xb001 }
1052 /* bsr $pcrel24a2 */
1055 { { MNEM
, ' ', OP (PCREL24A2
), 0 } },
1056 & ifmt_bsr24
, { 0xd8090000 }
1061 { { MNEM
, ' ', OP (RM
), 0 } },
1062 & ifmt_jmp
, { 0x100e }
1064 /* jmp $pcabs24a2 */
1067 { { MNEM
, ' ', OP (PCABS24A2
), 0 } },
1068 & ifmt_jmp24
, { 0xd8080000 }
1073 { { MNEM
, ' ', OP (RM
), 0 } },
1074 & ifmt_jmp
, { 0x100f }
1080 & ifmt_ret
, { 0x7002 }
1082 /* repeat $rn,$pcrel17a2 */
1085 { { MNEM
, ' ', OP (RN
), ',', OP (PCREL17A2
), 0 } },
1086 & ifmt_repeat
, { 0xe0090000 }
1088 /* erepeat $pcrel17a2 */
1091 { { MNEM
, ' ', OP (PCREL17A2
), 0 } },
1092 & ifmt_erepeat
, { 0xe0190000 }
1097 { { MNEM
, ' ', OP (RN
), ',', '$', 'l', 'p', 0 } },
1098 & ifmt_stc_lp
, { 0x7018 }
1103 { { MNEM
, ' ', OP (RN
), ',', '$', 'h', 'i', 0 } },
1104 & ifmt_stc_lp
, { 0x7078 }
1109 { { MNEM
, ' ', OP (RN
), ',', '$', 'l', 'o', 0 } },
1110 & ifmt_stc_lp
, { 0x7088 }
1115 { { MNEM
, ' ', OP (RN
), ',', OP (CSRN
), 0 } },
1116 & ifmt_stc
, { 0x7008 }
1121 { { MNEM
, ' ', OP (RN
), ',', '$', 'l', 'p', 0 } },
1122 & ifmt_stc_lp
, { 0x701a }
1127 { { MNEM
, ' ', OP (RN
), ',', '$', 'h', 'i', 0 } },
1128 & ifmt_stc_lp
, { 0x707a }
1133 { { MNEM
, ' ', OP (RN
), ',', '$', 'l', 'o', 0 } },
1134 & ifmt_stc_lp
, { 0x708a }
1139 { { MNEM
, ' ', OP (RN
), ',', OP (CSRN
), 0 } },
1140 & ifmt_stc
, { 0x700a }
1146 & ifmt_ret
, { 0x7000 }
1152 & ifmt_ret
, { 0x7010 }
1158 & ifmt_ret
, { 0x7012 }
1164 & ifmt_ret
, { 0x7022 }
1170 & ifmt_ret
, { 0x7062 }
1175 { { MNEM
, ' ', OP (UIMM2
), 0 } },
1176 & ifmt_swi
, { 0x7006 }
1182 & ifmt_ret
, { 0x7032 }
1188 & ifmt_ret
, { 0x7011 }
1190 /* stcb $rn,$uimm16 */
1193 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM16
), 0 } },
1194 & ifmt_movu16
, { 0xf0040000 }
1196 /* ldcb $rn,$uimm16 */
1199 { { MNEM
, ' ', OP (RN
), ',', OP (UIMM16
), 0 } },
1200 & ifmt_movu16
, { 0xf0140000 }
1202 /* bsetm ($rma),$uimm3 */
1205 { { MNEM
, ' ', '(', OP (RMA
), ')', ',', OP (UIMM3
), 0 } },
1206 & ifmt_bsetm
, { 0x2000 }
1208 /* bclrm ($rma),$uimm3 */
1211 { { MNEM
, ' ', '(', OP (RMA
), ')', ',', OP (UIMM3
), 0 } },
1212 & ifmt_bsetm
, { 0x2001 }
1214 /* bnotm ($rma),$uimm3 */
1217 { { MNEM
, ' ', '(', OP (RMA
), ')', ',', OP (UIMM3
), 0 } },
1218 & ifmt_bsetm
, { 0x2002 }
1220 /* btstm \$0,($rma),$uimm3 */
1223 { { MNEM
, ' ', '$', '0', ',', '(', OP (RMA
), ')', ',', OP (UIMM3
), 0 } },
1224 & ifmt_bsetm
, { 0x2003 }
1226 /* tas $rn,($rma) */
1229 { { MNEM
, ' ', OP (RN
), ',', '(', OP (RMA
), ')', 0 } },
1230 & ifmt_stcb_r
, { 0x2004 }
1232 /* cache $cimm4,($rma) */
1235 { { MNEM
, ' ', OP (CIMM4
), ',', '(', OP (RMA
), ')', 0 } },
1236 & ifmt_pref
, { 0x7004 }
1241 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1242 & ifmt_mov
, { 0x1004 }
1247 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1248 & ifmt_mov
, { 0x1005 }
1253 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1254 & ifmt_mov
, { 0x1006 }
1259 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1260 & ifmt_mov
, { 0x1007 }
1265 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1266 & ifmt_madd
, { 0xf0013004 }
1271 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1272 & ifmt_madd
, { 0xf0013005 }
1277 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1278 & ifmt_madd
, { 0xf0013006 }
1280 /* maddru $rn,$rm */
1283 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1284 & ifmt_madd
, { 0xf0013007 }
1289 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1290 & ifmt_mov
, { 0x1008 }
1295 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1296 & ifmt_mov
, { 0x1009 }
1302 & ifmt_ret
, { 0x7013 }
1308 & ifmt_ret
, { 0x7033 }
1313 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1314 & ifmt_madd
, { 0xf0010000 }
1319 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1320 & ifmt_madd
, { 0xf0010003 }
1325 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1326 & ifmt_madd
, { 0xf0010002 }
1331 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1332 & ifmt_madd
, { 0xf0010004 }
1337 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1338 & ifmt_madd
, { 0xf0010005 }
1343 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1344 & ifmt_madd
, { 0xf0010006 }
1349 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1350 & ifmt_madd
, { 0xf0010007 }
1352 /* clip $rn,$cimm5 */
1355 { { MNEM
, ' ', OP (RN
), ',', OP (CIMM5
), 0 } },
1356 & ifmt_clip
, { 0xf0011000 }
1358 /* clipu $rn,$cimm5 */
1361 { { MNEM
, ' ', OP (RN
), ',', OP (CIMM5
), 0 } },
1362 & ifmt_clip
, { 0xf0011001 }
1367 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1368 & ifmt_madd
, { 0xf0010008 }
1373 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1374 & ifmt_madd
, { 0xf001000a }
1379 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1380 & ifmt_madd
, { 0xf0010009 }
1385 { { MNEM
, ' ', OP (RN
), ',', OP (RM
), 0 } },
1386 & ifmt_madd
, { 0xf001000b }
1388 /* swcp $crn,($rma) */
1391 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), ')', 0 } },
1392 & ifmt_swcp
, { 0x3008 }
1394 /* lwcp $crn,($rma) */
1397 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), ')', 0 } },
1398 & ifmt_swcp
, { 0x3009 }
1400 /* smcp $crn64,($rma) */
1403 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), ')', 0 } },
1404 & ifmt_smcp
, { 0x300a }
1406 /* lmcp $crn64,($rma) */
1409 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), ')', 0 } },
1410 & ifmt_smcp
, { 0x300b }
1412 /* swcpi $crn,($rma+) */
1415 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', 0 } },
1416 & ifmt_swcp
, { 0x3000 }
1418 /* lwcpi $crn,($rma+) */
1421 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', 0 } },
1422 & ifmt_swcp
, { 0x3001 }
1424 /* smcpi $crn64,($rma+) */
1427 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', 0 } },
1428 & ifmt_smcp
, { 0x3002 }
1430 /* lmcpi $crn64,($rma+) */
1433 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', 0 } },
1434 & ifmt_smcp
, { 0x3003 }
1436 /* swcp $crn,$sdisp16($rma) */
1439 { { MNEM
, ' ', OP (CRN
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
1440 & ifmt_swcp16
, { 0xf00c0000 }
1442 /* lwcp $crn,$sdisp16($rma) */
1445 { { MNEM
, ' ', OP (CRN
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
1446 & ifmt_swcp16
, { 0xf00d0000 }
1448 /* smcp $crn64,$sdisp16($rma) */
1451 { { MNEM
, ' ', OP (CRN64
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
1452 & ifmt_smcp16
, { 0xf00e0000 }
1454 /* lmcp $crn64,$sdisp16($rma) */
1457 { { MNEM
, ' ', OP (CRN64
), ',', OP (SDISP16
), '(', OP (RMA
), ')', 0 } },
1458 & ifmt_smcp16
, { 0xf00f0000 }
1460 /* sbcpa $crn,($rma+),$cdisp10 */
1463 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
1464 & ifmt_lbucpa
, { 0xf0050000 }
1466 /* lbcpa $crn,($rma+),$cdisp10 */
1469 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
1470 & ifmt_lbucpa
, { 0xf0054000 }
1472 /* shcpa $crn,($rma+),$cdisp10a2 */
1475 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
1476 & ifmt_lhucpa
, { 0xf0051000 }
1478 /* lhcpa $crn,($rma+),$cdisp10a2 */
1481 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
1482 & ifmt_lhucpa
, { 0xf0055000 }
1484 /* swcpa $crn,($rma+),$cdisp10a4 */
1487 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A4
), 0 } },
1488 & ifmt_swcpa
, { 0xf0052000 }
1490 /* lwcpa $crn,($rma+),$cdisp10a4 */
1493 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A4
), 0 } },
1494 & ifmt_swcpa
, { 0xf0056000 }
1496 /* smcpa $crn64,($rma+),$cdisp10a8 */
1499 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A8
), 0 } },
1500 & ifmt_smcpa
, { 0xf0053000 }
1502 /* lmcpa $crn64,($rma+),$cdisp10a8 */
1505 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A8
), 0 } },
1506 & ifmt_smcpa
, { 0xf0057000 }
1508 /* sbcpm0 $crn,($rma+),$cdisp10 */
1511 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
1512 & ifmt_lbucpa
, { 0xf0050800 }
1514 /* lbcpm0 $crn,($rma+),$cdisp10 */
1517 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
1518 & ifmt_lbucpa
, { 0xf0054800 }
1520 /* shcpm0 $crn,($rma+),$cdisp10a2 */
1523 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
1524 & ifmt_lhucpa
, { 0xf0051800 }
1526 /* lhcpm0 $crn,($rma+),$cdisp10a2 */
1529 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
1530 & ifmt_lhucpa
, { 0xf0055800 }
1532 /* swcpm0 $crn,($rma+),$cdisp10a4 */
1535 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A4
), 0 } },
1536 & ifmt_swcpa
, { 0xf0052800 }
1538 /* lwcpm0 $crn,($rma+),$cdisp10a4 */
1541 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A4
), 0 } },
1542 & ifmt_swcpa
, { 0xf0056800 }
1544 /* smcpm0 $crn64,($rma+),$cdisp10a8 */
1547 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A8
), 0 } },
1548 & ifmt_smcpa
, { 0xf0053800 }
1550 /* lmcpm0 $crn64,($rma+),$cdisp10a8 */
1553 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A8
), 0 } },
1554 & ifmt_smcpa
, { 0xf0057800 }
1556 /* sbcpm1 $crn,($rma+),$cdisp10 */
1559 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
1560 & ifmt_lbucpa
, { 0xf0050c00 }
1562 /* lbcpm1 $crn,($rma+),$cdisp10 */
1565 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10
), 0 } },
1566 & ifmt_lbucpa
, { 0xf0054c00 }
1568 /* shcpm1 $crn,($rma+),$cdisp10a2 */
1571 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
1572 & ifmt_lhucpa
, { 0xf0051c00 }
1574 /* lhcpm1 $crn,($rma+),$cdisp10a2 */
1577 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A2
), 0 } },
1578 & ifmt_lhucpa
, { 0xf0055c00 }
1580 /* swcpm1 $crn,($rma+),$cdisp10a4 */
1583 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A4
), 0 } },
1584 & ifmt_swcpa
, { 0xf0052c00 }
1586 /* lwcpm1 $crn,($rma+),$cdisp10a4 */
1589 { { MNEM
, ' ', OP (CRN
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A4
), 0 } },
1590 & ifmt_swcpa
, { 0xf0056c00 }
1592 /* smcpm1 $crn64,($rma+),$cdisp10a8 */
1595 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A8
), 0 } },
1596 & ifmt_smcpa
, { 0xf0053c00 }
1598 /* lmcpm1 $crn64,($rma+),$cdisp10a8 */
1601 { { MNEM
, ' ', OP (CRN64
), ',', '(', OP (RMA
), '+', ')', ',', OP (CDISP10A8
), 0 } },
1602 & ifmt_smcpa
, { 0xf0057c00 }
1604 /* bcpeq $cccc,$pcrel17a2 */
1607 { { MNEM
, ' ', OP (CCCC
), ',', OP (PCREL17A2
), 0 } },
1608 & ifmt_bcpeq
, { 0xd8040000 }
1610 /* bcpne $cccc,$pcrel17a2 */
1613 { { MNEM
, ' ', OP (CCCC
), ',', OP (PCREL17A2
), 0 } },
1614 & ifmt_bcpeq
, { 0xd8050000 }
1616 /* bcpat $cccc,$pcrel17a2 */
1619 { { MNEM
, ' ', OP (CCCC
), ',', OP (PCREL17A2
), 0 } },
1620 & ifmt_bcpeq
, { 0xd8060000 }
1622 /* bcpaf $cccc,$pcrel17a2 */
1625 { { MNEM
, ' ', OP (CCCC
), ',', OP (PCREL17A2
), 0 } },
1626 & ifmt_bcpeq
, { 0xd8070000 }
1632 & ifmt_ret
, { 0x7021 }
1637 { { MNEM
, ' ', OP (RM
), 0 } },
1638 & ifmt_jmp
, { 0x180f }
1640 /* bsrv $pcrel24a2 */
1643 { { MNEM
, ' ', OP (PCREL24A2
), 0 } },
1644 & ifmt_bsr24
, { 0xd80b0000 }
1650 & ifmt_sim_syscall
, { 0x7800 }
1662 & ifmt_mov
, { 0x100a }
1668 & ifmt_mov
, { 0x100b }
1674 & ifmt_mov
, { 0x2005 }
1680 & ifmt_mov
, { 0x2008 }
1686 & ifmt_mov
, { 0x2009 }
1692 & ifmt_mov
, { 0x200a }
1698 & ifmt_mov
, { 0x200b }
1704 & ifmt_mov
, { 0x3004 }
1710 & ifmt_mov
, { 0x3005 }
1716 & ifmt_mov
, { 0x3006 }
1722 & ifmt_mov
, { 0x3007 }
1728 & ifmt_mov
, { 0x300c }
1734 & ifmt_mov
, { 0x300d }
1740 & ifmt_mov
, { 0x300e }
1746 & ifmt_mov
, { 0x300f }
1752 & ifmt_mov
, { 0x7007 }
1758 & ifmt_mov
, { 0x700e }
1764 & ifmt_mov
, { 0x700f }
1770 & ifmt_mov
, { 0xc007 }
1776 & ifmt_mov
, { 0xe00d }
1782 & ifmt_mov
, { 0xf008 }
1791 /* Formats for ALIAS macro-insns. */
1793 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1794 #define F(f) & mep_cgen_ifld_table[MEP_##f]
1796 #define F(f) & mep_cgen_ifld_table[MEP_/**/f]
1798 static const CGEN_IFMT ifmt_dsp0 ATTRIBUTE_UNUSED
= {
1799 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16U16
) }, { 0 } }
1802 static const CGEN_IFMT ifmt_dsp1 ATTRIBUTE_UNUSED
= {
1803 32, 32, 0xf00f0000, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { F (F_16U16
) }, { 0 } }
1806 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED
= {
1807 16, 16, 0xffff, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1810 static const CGEN_IFMT ifmt_sb16_0 ATTRIBUTE_UNUSED
= {
1811 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1814 static const CGEN_IFMT ifmt_sh16_0 ATTRIBUTE_UNUSED
= {
1815 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1818 static const CGEN_IFMT ifmt_sw16_0 ATTRIBUTE_UNUSED
= {
1819 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1822 static const CGEN_IFMT ifmt_lb16_0 ATTRIBUTE_UNUSED
= {
1823 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1826 static const CGEN_IFMT ifmt_lh16_0 ATTRIBUTE_UNUSED
= {
1827 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1830 static const CGEN_IFMT ifmt_lw16_0 ATTRIBUTE_UNUSED
= {
1831 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1834 static const CGEN_IFMT ifmt_lbu16_0 ATTRIBUTE_UNUSED
= {
1835 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1838 static const CGEN_IFMT ifmt_lhu16_0 ATTRIBUTE_UNUSED
= {
1839 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_RN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1842 static const CGEN_IFMT ifmt_swcp16_0 ATTRIBUTE_UNUSED
= {
1843 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1846 static const CGEN_IFMT ifmt_lwcp16_0 ATTRIBUTE_UNUSED
= {
1847 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1850 static const CGEN_IFMT ifmt_smcp16_0 ATTRIBUTE_UNUSED
= {
1851 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1854 static const CGEN_IFMT ifmt_lmcp16_0 ATTRIBUTE_UNUSED
= {
1855 16, 16, 0xf00f, { { F (F_MAJOR
) }, { F (F_CRN
) }, { F (F_RM
) }, { F (F_SUB4
) }, { 0 } }
1860 /* Each non-simple macro entry points to an array of expansion possibilities. */
1862 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1863 #define A(a) (1 << CGEN_INSN_##a)
1865 #define A(a) (1 << CGEN_INSN_/**/a)
1867 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1868 #define OPERAND(op) MEP_OPERAND_##op
1870 #define OPERAND(op) MEP_OPERAND_/**/op
1872 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1873 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1875 /* The macro instruction table. */
1877 static const CGEN_IBASE mep_cgen_macro_insn_table
[] =
1879 /* dsp0 $c5rnmuimm24 */
1881 -1, "dsp0", "dsp0", 32,
1882 { 0|A(VOLATILE
)|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_C5
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1884 /* dsp1 $rn,$c5rmuimm20 */
1886 -1, "dsp1", "dsp1", 32,
1887 { 0|A(VOLATILE
)|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_C5
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1891 -1, "nop", "nop", 16,
1892 { 0|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1894 /* sb $rnc,$zero($rma) */
1896 -1, "sb16-0", "sb", 16,
1897 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1899 /* sh $rns,$zero($rma) */
1901 -1, "sh16-0", "sh", 16,
1902 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1904 /* sw $rnl,$zero($rma) */
1906 -1, "sw16-0", "sw", 16,
1907 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1909 /* lb $rnc,$zero($rma) */
1911 -1, "lb16-0", "lb", 16,
1912 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1914 /* lh $rns,$zero($rma) */
1916 -1, "lh16-0", "lh", 16,
1917 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1919 /* lw $rnl,$zero($rma) */
1921 -1, "lw16-0", "lw", 16,
1922 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1924 /* lbu $rnuc,$zero($rma) */
1926 -1, "lbu16-0", "lbu", 16,
1927 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1929 /* lhu $rnus,$zero($rma) */
1931 -1, "lhu16-0", "lhu", 16,
1932 { 0|A(NO_DIS
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1934 /* swcp $crn,$zero($rma) */
1936 -1, "swcp16-0", "swcp", 16,
1937 { 0|A(NO_DIS
)|A(OPTIONAL_CP_INSN
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1939 /* lwcp $crn,$zero($rma) */
1941 -1, "lwcp16-0", "lwcp", 16,
1942 { 0|A(NO_DIS
)|A(OPTIONAL_CP_INSN
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1944 /* smcp $crn64,$zero($rma) */
1946 -1, "smcp16-0", "smcp", 16,
1947 { 0|A(NO_DIS
)|A(OPTIONAL_CP64_INSN
)|A(OPTIONAL_CP_INSN
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1949 /* lmcp $crn64,$zero($rma) */
1951 -1, "lmcp16-0", "lmcp", 16,
1952 { 0|A(NO_DIS
)|A(OPTIONAL_CP64_INSN
)|A(OPTIONAL_CP_INSN
)|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE
, 0 } } } }
1956 /* The macro instruction opcode table. */
1958 static const CGEN_OPCODE mep_cgen_macro_insn_opcode_table
[] =
1960 /* dsp0 $c5rnmuimm24 */
1963 { { MNEM
, ' ', OP (C5RNMUIMM24
), 0 } },
1964 & ifmt_dsp0
, { 0xf0000000 }
1966 /* dsp1 $rn,$c5rmuimm20 */
1969 { { MNEM
, ' ', OP (RN
), ',', OP (C5RMUIMM20
), 0 } },
1970 & ifmt_dsp1
, { 0xf0000000 }
1978 /* sb $rnc,$zero($rma) */
1981 { { MNEM
, ' ', OP (RNC
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
1982 & ifmt_sb16_0
, { 0x8 }
1984 /* sh $rns,$zero($rma) */
1987 { { MNEM
, ' ', OP (RNS
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
1988 & ifmt_sh16_0
, { 0x9 }
1990 /* sw $rnl,$zero($rma) */
1993 { { MNEM
, ' ', OP (RNL
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
1994 & ifmt_sw16_0
, { 0xa }
1996 /* lb $rnc,$zero($rma) */
1999 { { MNEM
, ' ', OP (RNC
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2000 & ifmt_lb16_0
, { 0xc }
2002 /* lh $rns,$zero($rma) */
2005 { { MNEM
, ' ', OP (RNS
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2006 & ifmt_lh16_0
, { 0xd }
2008 /* lw $rnl,$zero($rma) */
2011 { { MNEM
, ' ', OP (RNL
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2012 & ifmt_lw16_0
, { 0xe }
2014 /* lbu $rnuc,$zero($rma) */
2017 { { MNEM
, ' ', OP (RNUC
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2018 & ifmt_lbu16_0
, { 0xb }
2020 /* lhu $rnus,$zero($rma) */
2023 { { MNEM
, ' ', OP (RNUS
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2024 & ifmt_lhu16_0
, { 0xf }
2026 /* swcp $crn,$zero($rma) */
2029 { { MNEM
, ' ', OP (CRN
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2030 & ifmt_swcp16_0
, { 0x3008 }
2032 /* lwcp $crn,$zero($rma) */
2035 { { MNEM
, ' ', OP (CRN
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2036 & ifmt_lwcp16_0
, { 0x3009 }
2038 /* smcp $crn64,$zero($rma) */
2041 { { MNEM
, ' ', OP (CRN64
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2042 & ifmt_smcp16_0
, { 0x300a }
2044 /* lmcp $crn64,$zero($rma) */
2047 { { MNEM
, ' ', OP (CRN64
), ',', OP (ZERO
), '(', OP (RMA
), ')', 0 } },
2048 & ifmt_lmcp16_0
, { 0x300b }
2057 #ifndef CGEN_ASM_HASH_P
2058 #define CGEN_ASM_HASH_P(insn) 1
2061 #ifndef CGEN_DIS_HASH_P
2062 #define CGEN_DIS_HASH_P(insn) 1
2065 /* Return non-zero if INSN is to be added to the hash table.
2066 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
2069 asm_hash_insn_p (insn
)
2070 const CGEN_INSN
*insn ATTRIBUTE_UNUSED
;
2072 return CGEN_ASM_HASH_P (insn
);
2076 dis_hash_insn_p (insn
)
2077 const CGEN_INSN
*insn
;
2079 /* If building the hash table and the NO-DIS attribute is present,
2081 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
2083 return CGEN_DIS_HASH_P (insn
);
2086 #ifndef CGEN_ASM_HASH
2087 #define CGEN_ASM_HASH_SIZE 127
2088 #ifdef CGEN_MNEMONIC_OPERANDS
2089 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
2091 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
2095 /* It doesn't make much sense to provide a default here,
2096 but while this is under development we do.
2097 BUFFER is a pointer to the bytes of the insn, target order.
2098 VALUE is the first base_insn_bitsize bits as an int in host order. */
2100 #ifndef CGEN_DIS_HASH
2101 #define CGEN_DIS_HASH_SIZE 256
2102 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
2105 /* The result is the hash value of the insn.
2106 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
2109 asm_hash_insn (mnem
)
2112 return CGEN_ASM_HASH (mnem
);
2115 /* BUF is a pointer to the bytes of the insn, target order.
2116 VALUE is the first base_insn_bitsize bits as an int in host order. */
2119 dis_hash_insn (buf
, value
)
2120 const char * buf ATTRIBUTE_UNUSED
;
2121 CGEN_INSN_INT value ATTRIBUTE_UNUSED
;
2123 return CGEN_DIS_HASH (buf
, value
);
2126 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
2129 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
2131 CGEN_FIELDS_BITSIZE (fields
) = size
;
2134 /* Function to call before using the operand instance table.
2135 This plugs the opcode entries and macro instructions into the cpu table. */
2138 mep_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
2141 int num_macros
= (sizeof (mep_cgen_macro_insn_table
) /
2142 sizeof (mep_cgen_macro_insn_table
[0]));
2143 const CGEN_IBASE
*ib
= & mep_cgen_macro_insn_table
[0];
2144 const CGEN_OPCODE
*oc
= & mep_cgen_macro_insn_opcode_table
[0];
2145 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
2147 /* This test has been added to avoid a warning generated
2148 if memset is called with a third argument of value zero. */
2149 if (num_macros
>= 1)
2150 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
2151 for (i
= 0; i
< num_macros
; ++i
)
2153 insns
[i
].base
= &ib
[i
];
2154 insns
[i
].opcode
= &oc
[i
];
2155 mep_cgen_build_insn_regex (& insns
[i
]);
2157 cd
->macro_insn_table
.init_entries
= insns
;
2158 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
2159 cd
->macro_insn_table
.num_init_entries
= num_macros
;
2161 oc
= & mep_cgen_insn_opcode_table
[0];
2162 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
2163 for (i
= 0; i
< MAX_INSNS
; ++i
)
2165 insns
[i
].opcode
= &oc
[i
];
2166 mep_cgen_build_insn_regex (& insns
[i
]);
2169 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
2170 cd
->set_fields_bitsize
= set_fields_bitsize
;
2172 cd
->asm_hash_p
= asm_hash_insn_p
;
2173 cd
->asm_hash
= asm_hash_insn
;
2174 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
2176 cd
->dis_hash_p
= dis_hash_insn_p
;
2177 cd
->dis_hash
= dis_hash_insn
;
2178 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;