1 /* Disassemble Xilinx microblaze instructions.
3 Copyright 2009, 2012 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
29 #include "microblaze-opc.h"
30 #include "microblaze-dis.h"
32 #define get_field_rd(instr) get_field (instr, RD_MASK, RD_LOW)
33 #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW)
34 #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW)
35 #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW)
36 #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW)
41 get_field (long instr
, long mask
, unsigned short low
)
45 sprintf (tmpstr
, "%s%d", register_prefix
, (int)((instr
& mask
) >> low
));
46 return (strdup (tmpstr
));
50 get_field_imm (long instr
)
54 sprintf (tmpstr
, "%d", (short)((instr
& IMM_MASK
) >> IMM_LOW
));
55 return (strdup (tmpstr
));
59 get_field_imm5 (long instr
)
63 sprintf (tmpstr
, "%d", (short)((instr
& IMM5_MASK
) >> IMM_LOW
));
64 return (strdup (tmpstr
));
68 get_field_imm5_mbar (long instr
)
72 sprintf(tmpstr
, "%d", (short)((instr
& IMM5_MBAR_MASK
) >> IMM_MBAR
));
73 return(strdup(tmpstr
));
77 get_field_rfsl (long instr
)
81 sprintf (tmpstr
, "%s%d", fsl_register_prefix
,
82 (short)((instr
& RFSL_MASK
) >> IMM_LOW
));
83 return (strdup (tmpstr
));
87 get_field_imm15 (long instr
)
91 sprintf (tmpstr
, "%d", (short)((instr
& IMM15_MASK
) >> IMM_LOW
));
92 return (strdup (tmpstr
));
96 get_field_special (long instr
, struct op_code_struct
* op
)
101 switch ((((instr
& IMM_MASK
) >> IMM_LOW
) ^ op
->immval_mask
))
131 strcpy (spr
, "tlbx");
133 case REG_TLBLO_MASK
:
134 strcpy (spr
, "tlblo");
136 case REG_TLBHI_MASK
:
137 strcpy (spr
, "tlbhi");
139 case REG_TLBSX_MASK
:
140 strcpy (spr
, "tlbsx");
143 if (((((instr
& IMM_MASK
) >> IMM_LOW
) ^ op
->immval_mask
) & 0xE000)
146 sprintf (tmpstr
, "%spvr%d", register_prefix
,
147 (unsigned short)(((instr
& IMM_MASK
) >> IMM_LOW
)
148 ^ op
->immval_mask
) ^ REG_PVR_MASK
);
149 return (strdup (tmpstr
));
156 sprintf (tmpstr
, "%s%s", register_prefix
, spr
);
157 return (strdup (tmpstr
));
161 read_insn_microblaze (bfd_vma memaddr
,
162 struct disassemble_info
*info
,
163 struct op_code_struct
**opr
)
165 unsigned char ibytes
[4];
167 struct op_code_struct
* op
;
170 status
= info
->read_memory_func (memaddr
, ibytes
, 4, info
);
174 info
->memory_error_func (status
, memaddr
, info
);
178 if (info
->endian
== BFD_ENDIAN_BIG
)
179 inst
= (ibytes
[0] << 24) | (ibytes
[1] << 16) | (ibytes
[2] << 8) | ibytes
[3];
180 else if (info
->endian
== BFD_ENDIAN_LITTLE
)
181 inst
= (ibytes
[3] << 24) | (ibytes
[2] << 16) | (ibytes
[1] << 8) | ibytes
[0];
185 /* Just a linear search of the table. */
186 for (op
= opcodes
; op
->name
!= 0; op
++)
187 if (op
->bit_sequence
== (inst
& op
->opcode_mask
))
196 print_insn_microblaze (bfd_vma memaddr
, struct disassemble_info
* info
)
198 fprintf_ftype print_func
= info
->fprintf_func
;
199 void * stream
= info
->stream
;
200 unsigned long inst
, prev_inst
;
201 struct op_code_struct
* op
, *pop
;
203 bfd_boolean immfound
= FALSE
;
204 static bfd_vma prev_insn_addr
= -1; /* Init the prev insn addr. */
205 static int prev_insn_vma
= -1; /* Init the prev insn vma. */
206 int curr_insn_vma
= info
->buffer_vma
;
208 info
->bytes_per_chunk
= 4;
210 inst
= read_insn_microblaze (memaddr
, info
, &op
);
214 if (prev_insn_vma
== curr_insn_vma
)
216 if (memaddr
-(info
->bytes_per_chunk
) == prev_insn_addr
)
218 prev_inst
= read_insn_microblaze (prev_insn_addr
, info
, &pop
);
221 if (pop
->instr
== imm
)
223 immval
= (get_int_field_imm (prev_inst
) << 16) & 0xffff0000;
234 /* Make curr insn as prev insn. */
235 prev_insn_addr
= memaddr
;
236 prev_insn_vma
= curr_insn_vma
;
238 if (op
->name
== NULL
)
239 print_func (stream
, ".short 0x%04x", (unsigned int) inst
);
242 print_func (stream
, "%s", op
->name
);
244 switch (op
->inst_type
)
246 case INST_TYPE_RD_R1_R2
:
247 print_func (stream
, "\t%s, %s, %s", get_field_rd (inst
),
248 get_field_r1(inst
), get_field_r2 (inst
));
250 case INST_TYPE_RD_R1_IMM
:
251 print_func (stream
, "\t%s, %s, %s", get_field_rd (inst
),
252 get_field_r1(inst
), get_field_imm (inst
));
253 if (info
->print_address_func
&& get_int_field_r1 (inst
) == 0
254 && info
->symbol_at_address_func
)
257 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
260 immval
= get_int_field_imm (inst
);
262 immval
|= 0xFFFF0000;
264 if (immval
> 0 && info
->symbol_at_address_func (immval
, info
))
266 print_func (stream
, "\t// ");
267 info
->print_address_func (immval
, info
);
271 case INST_TYPE_RD_R1_IMM5
:
272 print_func (stream
, "\t%s, %s, %s", get_field_rd (inst
),
273 get_field_r1(inst
), get_field_imm5 (inst
));
275 case INST_TYPE_RD_RFSL
:
276 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_rfsl (inst
));
278 case INST_TYPE_R1_RFSL
:
279 print_func (stream
, "\t%s, %s", get_field_r1 (inst
), get_field_rfsl (inst
));
281 case INST_TYPE_RD_SPECIAL
:
282 print_func (stream
, "\t%s, %s", get_field_rd (inst
),
283 get_field_special (inst
, op
));
285 case INST_TYPE_SPECIAL_R1
:
286 print_func (stream
, "\t%s, %s", get_field_special (inst
, op
),
289 case INST_TYPE_RD_R1
:
290 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_r1 (inst
));
292 case INST_TYPE_R1_R2
:
293 print_func (stream
, "\t%s, %s", get_field_r1 (inst
), get_field_r2 (inst
));
295 case INST_TYPE_R1_IMM
:
296 print_func (stream
, "\t%s, %s", get_field_r1 (inst
), get_field_imm (inst
));
297 /* The non-pc relative instructions are returns, which shouldn't
298 have a label printed. */
299 if (info
->print_address_func
&& op
->inst_offset_type
== INST_PC_OFFSET
300 && info
->symbol_at_address_func
)
303 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
306 immval
= get_int_field_imm (inst
);
308 immval
|= 0xFFFF0000;
311 if (immval
> 0 && info
->symbol_at_address_func (immval
, info
))
313 print_func (stream
, "\t// ");
314 info
->print_address_func (immval
, info
);
318 print_func (stream
, "\t\t// ");
319 print_func (stream
, "%x", immval
);
323 case INST_TYPE_RD_IMM
:
324 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_imm (inst
));
325 if (info
->print_address_func
&& info
->symbol_at_address_func
)
328 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
331 immval
= get_int_field_imm (inst
);
333 immval
|= 0xFFFF0000;
335 if (op
->inst_offset_type
== INST_PC_OFFSET
)
336 immval
+= (int) memaddr
;
337 if (info
->symbol_at_address_func (immval
, info
))
339 print_func (stream
, "\t// ");
340 info
->print_address_func (immval
, info
);
345 print_func (stream
, "\t%s", get_field_imm (inst
));
346 if (info
->print_address_func
&& info
->symbol_at_address_func
350 immval
|= (get_int_field_imm (inst
) & 0x0000ffff);
353 immval
= get_int_field_imm (inst
);
355 immval
|= 0xFFFF0000;
357 if (op
->inst_offset_type
== INST_PC_OFFSET
)
358 immval
+= (int) memaddr
;
359 if (immval
> 0 && info
->symbol_at_address_func (immval
, info
))
361 print_func (stream
, "\t// ");
362 info
->print_address_func (immval
, info
);
364 else if (op
->inst_offset_type
== INST_PC_OFFSET
)
366 print_func (stream
, "\t\t// ");
367 print_func (stream
, "%x", immval
);
371 case INST_TYPE_RD_R2
:
372 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_r2 (inst
));
375 print_func (stream
, "\t%s", get_field_r2 (inst
));
378 print_func (stream
, "\t%s", get_field_r1 (inst
));
380 case INST_TYPE_RD_R1_SPECIAL
:
381 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_r2 (inst
));
383 case INST_TYPE_RD_IMM15
:
384 print_func (stream
, "\t%s, %s", get_field_rd (inst
), get_field_imm15 (inst
));
388 print_func (stream
, "\t%s", get_field_imm5_mbar (inst
));
390 /* For mbar 16 or sleep insn. */
393 /* For tuqula instruction */
395 print_func (stream
, "\t%s", get_field_rd (inst
));
398 print_func (stream
, "\t%s", get_field_rfsl (inst
));
401 /* If the disassembler lags the instruction set. */
402 print_func (stream
, "\tundecoded operands, inst is 0x%04x", (unsigned int) inst
);
407 /* Say how many bytes we consumed. */
411 enum microblaze_instr
412 get_insn_microblaze (long inst
,
413 bfd_boolean
*isunsignedimm
,
414 enum microblaze_instr_type
*insn_type
,
417 struct op_code_struct
* op
;
418 *isunsignedimm
= FALSE
;
420 /* Just a linear search of the table. */
421 for (op
= opcodes
; op
->name
!= 0; op
++)
422 if (op
->bit_sequence
== (inst
& op
->opcode_mask
))
429 *isunsignedimm
= (op
->inst_type
== INST_TYPE_RD_R1_UNSIGNED_IMM
);
430 *insn_type
= op
->instr_type
;
431 *delay_slots
= op
->delay_slots
;
436 enum microblaze_instr
437 microblaze_decode_insn (long insn
, int *rd
, int *ra
, int *rb
, int *immed
)
439 enum microblaze_instr op
;
441 enum microblaze_instr_type t2
;
444 op
= get_insn_microblaze (insn
, &t1
, &t2
, &t3
);
445 *rd
= (insn
& RD_MASK
) >> RD_LOW
;
446 *ra
= (insn
& RA_MASK
) >> RA_LOW
;
447 *rb
= (insn
& RB_MASK
) >> RB_LOW
;
448 t3
= (insn
& IMM_MASK
) >> IMM_LOW
;
454 microblaze_get_target_address (long inst
, bfd_boolean immfound
, int immval
,
455 long pcval
, long r1val
, long r2val
,
456 bfd_boolean
*targetvalid
,
457 bfd_boolean
*unconditionalbranch
)
459 struct op_code_struct
* op
;
462 *unconditionalbranch
= FALSE
;
463 /* Just a linear search of the table. */
464 for (op
= opcodes
; op
->name
!= 0; op
++)
465 if (op
->bit_sequence
== (inst
& op
->opcode_mask
))
470 *targetvalid
= FALSE
;
472 else if (op
->instr_type
== branch_inst
)
474 switch (op
->inst_type
)
477 *unconditionalbranch
= TRUE
;
479 case INST_TYPE_RD_R2
:
480 case INST_TYPE_R1_R2
:
483 if (op
->inst_offset_type
== INST_PC_OFFSET
)
487 *unconditionalbranch
= TRUE
;
489 case INST_TYPE_RD_IMM
:
490 case INST_TYPE_R1_IMM
:
493 targetaddr
= (immval
<< 16) & 0xffff0000;
494 targetaddr
|= (get_int_field_imm (inst
) & 0x0000ffff);
498 targetaddr
= get_int_field_imm (inst
);
499 if (targetaddr
& 0x8000)
500 targetaddr
|= 0xFFFF0000;
502 if (op
->inst_offset_type
== INST_PC_OFFSET
)
507 *targetvalid
= FALSE
;
511 else if (op
->instr_type
== return_inst
)
515 targetaddr
= (immval
<< 16) & 0xffff0000;
516 targetaddr
|= (get_int_field_imm (inst
) & 0x0000ffff);
520 targetaddr
= get_int_field_imm (inst
);
521 if (targetaddr
& 0x8000)
522 targetaddr
|= 0xFFFF0000;
528 *targetvalid
= FALSE
;