1 /* mips-opc.c -- MIPS opcode list.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
4 Free Software Foundation, Inc.
5 Contributed by Ralph Campbell and OSF
6 Commented and modified by Ian Lance Taylor, Cygnus Support
7 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
8 MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom
11 This file is part of the GNU opcodes library.
13 This library is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 3, or (at your option)
18 It is distributed in the hope that it will be useful, but WITHOUT
19 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
20 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
21 License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this file; see the file COPYING. If not, write to the
25 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
26 MA 02110-1301, USA. */
30 #include "opcode/mips.h"
31 #include "mips-formats.h"
33 /* The 4-bit XYZW mask used in some VU0 instructions. */
34 const struct mips_operand mips_vu0_channel_mask
= { OP_VU0_SUFFIX
, 4, 21 };
36 static unsigned char reg_0_map
[] = { 0 };
38 /* Return the mips_operand structure for the operand at the beginning of P. */
40 const struct mips_operand
*
41 decode_mips_operand (const char *p
)
48 case '1': HINT (5, 6);
49 case '2': HINT (10, 6);
50 case '3': HINT (15, 6);
51 case '4': HINT (20, 6);
52 case '5': REG (5, 6, VF
);
53 case '6': REG (5, 11, VF
);
54 case '7': REG (5, 16, VF
);
55 case '8': REG (5, 6, VI
);
56 case '9': REG (5, 11, VI
);
57 case '0': REG (5, 16, VI
);
59 case 'A': BIT (5, 6, 0); /* (0 .. 31) */
60 case 'B': MSB (5, 11, 1, TRUE
, 32); /* (1 .. 32), 32-bit op */
61 case 'C': MSB (5, 11, 1, FALSE
, 32); /* (1 .. 32), 32-bit op */
62 case 'E': BIT (5, 6, 32); /* (32 .. 63) */
63 case 'F': MSB (5, 11, 33, TRUE
, 64); /* (33 .. 64), 64-bit op */
64 case 'G': MSB (5, 11, 33, FALSE
, 64); /* (33 .. 64), 64-bit op */
65 case 'H': MSB (5, 11, 1, FALSE
, 64); /* (1 .. 32), 64-bit op */
66 case 'J': HINT (10, 11);
67 case 'K': SPECIAL (4, 21, VU0_MATCH_SUFFIX
);
68 case 'L': SPECIAL (2, 21, VU0_SUFFIX
);
69 case 'M': SPECIAL (2, 23, VU0_SUFFIX
);
70 case 'N': SPECIAL (2, 0, VU0_MATCH_SUFFIX
);
71 case 'P': BIT (5, 6, 32); /* (32 .. 63) */
72 case 'Q': SINT (10, 6);
73 case 'S': MSB (5, 11, 0, FALSE
, 63); /* (0 .. 31), 64-bit op */
74 case 'T': INT_ADJ (10, 16, 511, 0, FALSE
); /* (-512 .. 511) << 0 */
75 case 'U': INT_ADJ (10, 16, 511, 1, FALSE
); /* (-512 .. 511) << 1 */
76 case 'V': INT_ADJ (10, 16, 511, 2, FALSE
); /* (-512 .. 511) << 2 */
77 case 'W': INT_ADJ (10, 16, 511, 3, FALSE
); /* (-512 .. 511) << 3 */
78 case 'X': BIT (5, 16, 32); /* (32 .. 63) */
79 case 'Z': REG (5, 0, FP
);
81 case 'a': SINT (8, 6);
82 case 'b': SINT (8, 3);
83 case 'c': INT_ADJ (9, 6, 255, 4, FALSE
); /* (-256 .. 255) << 4 */
84 case 'd': REG (5, 6, MSA
);
85 case 'e': REG (5, 11, MSA
);
86 case 'f': INT_ADJ (15, 6, 32767, 3, TRUE
);
87 case 'g': SINT (5, 6);
88 case 'h': REG (5, 16, MSA
);
89 case 'i': JALX (26, 0, 2);
90 case 'j': SINT (9, 7);
91 case 'k': REG (5, 6, GP
);
92 case 'l': REG (5, 6, MSA_CTRL
);
93 case 'm': REG (0, 0, R5900_ACC
);
94 case 'n': REG (5, 11, MSA_CTRL
);
95 case 'o': SPECIAL (4, 16, IMM_INDEX
);
96 case 'p': BIT (5, 6, 0); /* (0 .. 31), 32-bit op */
97 case 'q': REG (0, 0, R5900_Q
);
98 case 'r': REG (0, 0, R5900_R
);
99 case 's': MSB (5, 11, 0, FALSE
, 31); /* (0 .. 31) */
100 case 't': REG (5, 16, COPRO
);
101 case 'u': SPECIAL (3, 16, IMM_INDEX
);
102 case 'v': SPECIAL (2, 16, IMM_INDEX
);
103 case 'w': SPECIAL (1, 16, IMM_INDEX
);
104 case 'x': BIT (5, 16, 0); /* (0 .. 31) */
105 case 'y': REG (0, 0, R5900_I
);
106 case 'z': REG (5, 0, GP
);
108 case '~': BIT (2, 6, 1); /* (1 .. 4) */
109 case '!': BIT (3, 16, 0); /* (0 .. 7) */
110 case '@': BIT (4, 16, 0); /* (0 .. 15) */
111 case '#': BIT (6, 16, 0); /* (0 .. 63) */
112 case '$': UINT (5, 16); /* (0 .. 31) */
113 case '%': SINT (5, 16); /* (-16 .. 15) */
114 case '^': SINT (10, 11); /* (-512 .. 511) */
115 case '&': SPECIAL (0, 0, IMM_INDEX
);
116 case '*': SPECIAL (5, 16, REG_INDEX
);
117 case '|': BIT (8, 16, 0); /* (0 .. 255) */
121 case '<': BIT (5, 6, 0); /* (0 .. 31) */
122 case '>': BIT (5, 6, 32); /* (32 .. 63) */
123 case '%': UINT (3, 21);
124 case ':': SINT (7, 19);
125 case '\'': HINT (6, 16);
126 case '@': SINT (10, 16);
127 case '!': UINT (1, 5);
128 case '$': UINT (1, 4);
129 case '*': REG (2, 18, ACC
);
130 case '&': REG (2, 13, ACC
);
131 case '~': SINT (12, 0);
132 case '\\': BIT (3, 12, 0); /* (0 .. 7) */
134 case '0': SINT (6, 20);
135 case '1': HINT (5, 6);
136 case '2': HINT (2, 11);
137 case '3': HINT (3, 21);
138 case '4': HINT (4, 21);
139 case '5': HINT (8, 16);
140 case '6': HINT (5, 21);
141 case '7': REG (2, 11, ACC
);
142 case '8': HINT (6, 11);
143 case '9': REG (2, 21, ACC
);
145 case 'B': HINT (20, 6);
146 case 'C': HINT (25, 0);
147 case 'D': REG (5, 6, FP
);
148 case 'E': REG (5, 16, COPRO
);
149 case 'G': REG (5, 11, COPRO
);
150 case 'H': UINT (3, 0);
151 case 'J': HINT (19, 6);
152 case 'K': REG (5, 11, HW
);
153 case 'M': REG (3, 8, CCC
);
154 case 'N': REG (3, 18, CCC
);
155 case 'O': UINT (3, 21);
156 case 'P': SPECIAL (5, 1, PERF_REG
);
157 case 'Q': SPECIAL (10, 16, MDMX_IMM_REG
);
158 case 'R': REG (5, 21, FP
);
159 case 'S': REG (5, 11, FP
);
160 case 'T': REG (5, 16, FP
);
161 case 'U': SPECIAL (10, 11, CLO_CLZ_DEST
);
162 case 'V': OPTIONAL_REG (5, 11, FP
);
163 case 'W': OPTIONAL_REG (5, 16, FP
);
164 case 'X': REG (5, 6, VEC
);
165 case 'Y': REG (5, 11, VEC
);
166 case 'Z': REG (5, 16, VEC
);
168 case 'a': JUMP (26, 0, 2);
169 case 'b': REG (5, 21, GP
);
170 case 'c': HINT (10, 16);
171 case 'd': REG (5, 11, GP
);
172 case 'e': UINT (3, 22)
173 case 'g': REG (5, 11, COPRO
);
174 case 'h': HINT (5, 11);
175 case 'i': HINT (16, 0);
176 case 'j': SINT (16, 0);
177 case 'k': HINT (5, 16);
178 case 'o': SINT (16, 0);
179 case 'p': BRANCH (16, 0, 2);
180 case 'q': HINT (10, 6);
181 case 'r': OPTIONAL_REG (5, 21, GP
);
182 case 's': REG (5, 21, GP
);
183 case 't': REG (5, 16, GP
);
184 case 'u': HINT (16, 0);
185 case 'v': OPTIONAL_REG (5, 21, GP
);
186 case 'w': OPTIONAL_REG (5, 16, GP
);
187 case 'x': REG (0, 0, GP
);
188 case 'z': MAPPED_REG (0, 0, GP
, reg_0_map
);
193 /* Short hand so the lines aren't too long. */
195 #define LCD INSN_LOAD_COPROC_DELAY
196 #define UBD INSN_UNCOND_BRANCH_DELAY
197 #define CBD INSN_COND_BRANCH_DELAY
198 #define COD INSN_COPROC_MOVE_DELAY
199 #define CLD (INSN_LOAD_MEMORY|INSN_COPROC_MEMORY_DELAY)
200 #define CBL INSN_COND_BRANCH_LIKELY
201 #define NODS INSN_NO_DELAY_SLOT
202 #define TRAP INSN_NO_DELAY_SLOT
203 #define LM INSN_LOAD_MEMORY
204 #define SM INSN_STORE_MEMORY
206 #define WR_1 INSN_WRITE_1
207 #define WR_2 INSN_WRITE_2
208 #define RD_1 INSN_READ_1
209 #define RD_2 INSN_READ_2
210 #define RD_3 INSN_READ_3
211 #define RD_4 INSN_READ_4
212 #define MOD_1 (WR_1|RD_1)
213 #define MOD_2 (WR_2|RD_2)
215 #define WR_31 INSN_WRITE_GPR_31
216 #define WR_CC INSN_WRITE_COND_CODE
217 #define RD_CC INSN_READ_COND_CODE
218 #define RD_C0 INSN_COP
219 #define RD_C1 INSN_COP
220 #define RD_C2 INSN_COP
221 #define RD_C3 INSN_COP
222 #define WR_C0 INSN_COP
223 #define WR_C1 INSN_COP
224 #define WR_C2 INSN_COP
225 #define WR_C3 INSN_COP
229 #define WR_HI INSN_WRITE_HI
230 #define RD_HI INSN_READ_HI
231 #define MOD_HI WR_HI|RD_HI
233 #define WR_LO INSN_WRITE_LO
234 #define RD_LO INSN_READ_LO
235 #define MOD_LO WR_LO|RD_LO
237 #define WR_HILO WR_HI|WR_LO
238 #define RD_HILO RD_HI|RD_LO
239 #define MOD_HILO WR_HILO|RD_HILO
241 #define IS_M INSN_MULT
243 #define WR_MACC INSN2_WRITE_MDMX_ACC
244 #define RD_MACC INSN2_READ_MDMX_ACC
251 #define I32 INSN_ISA32
252 #define I64 INSN_ISA64
253 #define I33 INSN_ISA32R2
254 #define I65 INSN_ISA64R2
255 #define I3_32 INSN_ISA3_32
256 #define I3_33 INSN_ISA3_32R2
257 #define I4_32 INSN_ISA4_32
258 #define I4_33 INSN_ISA4_32R2
259 #define I5_33 INSN_ISA5_32R2
261 /* MIPS64 MIPS-3D ASE support. */
262 #define M3D ASE_MIPS3D
264 /* MIPS32 SmartMIPS ASE support. */
265 #define SMT ASE_SMARTMIPS
267 /* MIPS64 MDMX ASE support. */
270 #define IL2E (INSN_LOONGSON_2E)
271 #define IL2F (INSN_LOONGSON_2F)
272 #define IL3A (INSN_LOONGSON_3A)
276 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
278 /* Emotion Engine MIPS r5900. */
280 #define M1 INSN_10000
282 #define N411 INSN_4111
283 #define N412 INSN_4120
284 #define N5 (INSN_5400 | INSN_5500)
285 #define N54 INSN_5400
286 #define N55 INSN_5500
287 #define IOCT (INSN_OCTEON | INSN_OCTEONP | INSN_OCTEON2)
288 #define IOCTP (INSN_OCTEONP | INSN_OCTEON2)
289 #define IOCT2 INSN_OCTEON2
291 #define IVIRT ASE_VIRT
292 #define IVIRT64 ASE_VIRT64
305 /* 64 bit CPU with 32 bit FPU (single float). */
308 /* Support for 128 bit MMI instructions. */
311 /* 64 bit CPU with only 32 bit multiplication/division support. */
314 /* Support for VU0 Coprocessor instructions */
316 #define VU0CH INSN2_VU0_CHANNEL_SUFFIX
318 /* MIPS DSP ASE support.
320 1. MIPS DSP ASE includes 4 accumulators ($ac0 - $ac3). $ac0 is the pair
321 of original HI and LO. $ac1, $ac2 and $ac3 are new registers, and have
322 the same structure as $ac0 (HI + LO). For DSP instructions that write or
323 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a
324 (RD_HILO) attributes, such that HILO dependencies are maintained
327 2. For some mul. instructions that use integer registers as destinations
328 but destroy HI+LO as side-effect, we add WR_HILO to their attributes.
330 3. MIPS DSP ASE includes a new DSP control register, which has 6 fields
331 (ccond, outflag, EFI, c, scount, pos). Many DSP instructions read or write
332 certain fields of the DSP control register. For simplicity, we decide not
333 to track dependencies of these fields.
334 However, "bposge32" is a branch instruction that depends on the "pos"
335 field. In order to make sure that GAS does not reorder DSP instructions
336 that writes the "pos" field and "bposge32", we add DSP_VOLA
337 (INSN_NO_DELAY_SLOT) attribute to those instructions that write the "pos"
340 #define WR_a WR_HILO /* Write dsp accumulators (reuse WR_HILO) */
341 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) */
342 #define MOD_a WR_a|RD_a
343 #define DSP_VOLA INSN_NO_DELAY_SLOT
345 #define D33 ASE_DSPR2
346 #define D64 ASE_DSP64
348 /* MIPS MT ASE support. */
351 /* MIPS MCU (MicroController) ASE support. */
354 /* MIPS Enhanced VA Scheme. */
357 /* TLB invalidate instruction support. */
358 #define TLBINV ASE_EVA
362 #define MSA64 ASE_MSA64
364 /* The order of overloaded instructions matters. Label arguments and
365 register arguments look the same. Instructions that can have either
366 for arguments must apear in the correct order in this table for the
367 assembler to pick the right one. In other words, entries with
368 immediate operands must apear after the same instruction with
371 Because of the lookup algorithm used, entries with the same opcode
372 name must be contiguous.
374 Many instructions are short hand for other instructions (i.e., The
375 jal <register> instruction is short for jalr <register>). */
377 const struct mips_opcode mips_builtin_opcodes
[] =
379 /* These instructions appear first so that the disassembler will find
380 them first. The assemblers uses a hash table based on the
381 instruction name anyhow. */
382 /* name, args, match, mask, pinfo, pinfo2, membership, ase, exclusions */
383 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_3
|LM
, 0, I4_32
|G3
, 0, 0 },
384 {"pref", "k,A(b)", 0, (int) M_PREF_AB
, INSN_MACRO
, 0, I4_32
|G3
, 0, 0 },
385 {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_2
|RD_3
|FP_S
|LM
, 0, I4_33
, 0, 0 },
386 {"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
387 {"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
388 {"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
389 {"li", "t,j", 0x24000000, 0xffe00000, WR_1
, INSN2_ALIAS
, I1
, 0, 0 }, /* addiu */
390 {"li", "t,i", 0x34000000, 0xffe00000, WR_1
, INSN2_ALIAS
, I1
, 0, 0 }, /* ori */
391 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, 0, I1
, 0, 0 },
392 {"move", "d,s", 0, (int) M_MOVE
, INSN_MACRO
, 0, I1
, 0, 0 },
393 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_1
|RD_2
, INSN2_ALIAS
, I3
, 0, 0 },/* daddu */
394 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_1
|RD_2
, INSN2_ALIAS
, I1
, 0, 0 },/* addu */
395 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_1
|RD_2
, INSN2_ALIAS
, I1
, 0, 0 },/* or */
396 {"b", "p", 0x10000000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
, 0, 0 },/* beq 0,0 */
397 {"b", "p", 0x04010000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
, 0, 0 },/* bgez 0 */
398 {"bal", "p", 0x04110000, 0xffff0000, WR_31
|UBD
, INSN2_ALIAS
, I1
, 0, 0 },/* bgezal 0*/
400 /* Loongson specific instructions. Loongson 3A redefines the Coprocessor 2
401 instructions. Put them here so that disassembler will find them first.
402 The assemblers uses a hash table based on the instruction name anyhow. */
403 {"campi", "d,s", 0x70000075, 0xfc1f07ff, WR_1
|RD_2
, 0, IL3A
, 0, 0 },
404 {"campv", "d,s", 0x70000035, 0xfc1f07ff, WR_1
|RD_2
, 0, IL3A
, 0, 0 },
405 {"camwi", "d,s,t", 0x700000b5, 0xfc0007ff, RD_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
406 {"ramri", "d,s", 0x700000f5, 0xfc1f07ff, WR_1
|RD_2
, 0, IL3A
, 0, 0 },
407 {"gsle", "s,t", 0x70000026, 0xfc00ffff, RD_1
|RD_2
, 0, IL3A
, 0, 0 },
408 {"gsgt", "s,t", 0x70000027, 0xfc00ffff, RD_1
|RD_2
, 0, IL3A
, 0, 0 },
409 {"gslble", "t,b,d", 0xc8000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
410 {"gslbgt", "t,b,d", 0xc8000011, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
411 {"gslhle", "t,b,d", 0xc8000012, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
412 {"gslhgt", "t,b,d", 0xc8000013, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
413 {"gslwle", "t,b,d", 0xc8000014, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
414 {"gslwgt", "t,b,d", 0xc8000015, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
415 {"gsldle", "t,b,d", 0xc8000016, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
416 {"gsldgt", "t,b,d", 0xc8000017, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
417 {"gssble", "t,b,d", 0xe8000010, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
418 {"gssbgt", "t,b,d", 0xe8000011, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
419 {"gsshle", "t,b,d", 0xe8000012, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
420 {"gsshgt", "t,b,d", 0xe8000013, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
421 {"gsswle", "t,b,d", 0xe8000014, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
422 {"gsswgt", "t,b,d", 0xe8000015, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
423 {"gssdle", "t,b,d", 0xe8000016, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
424 {"gssdgt", "t,b,d", 0xe8000017, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
425 {"gslwlec1", "T,b,d", 0xc8000018, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
426 {"gslwgtc1", "T,b,d", 0xc8000019, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
427 {"gsldlec1", "T,b,d", 0xc800001a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
428 {"gsldgtc1", "T,b,d", 0xc800001b, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IL3A
, 0, 0 },
429 {"gsswlec1", "T,b,d", 0xe800001c, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
430 {"gsswgtc1", "T,b,d", 0xe800001d, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
431 {"gssdlec1", "T,b,d", 0xe800001e, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
432 {"gssdgtc1", "T,b,d", 0xe800001f, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
, 0, IL3A
, 0, 0 },
433 {"gslwlc1", "T,+a(b)", 0xc8000004, 0xfc00c03f, WR_1
|RD_3
|LM
, 0, IL3A
, 0, 0 },
434 {"gslwrc1", "T,+a(b)", 0xc8000005, 0xfc00c03f, WR_1
|RD_3
|LM
, 0, IL3A
, 0, 0 },
435 {"gsldlc1", "T,+a(b)", 0xc8000006, 0xfc00c03f, WR_1
|RD_3
|LM
, 0, IL3A
, 0, 0 },
436 {"gsldrc1", "T,+a(b)", 0xc8000007, 0xfc00c03f, WR_1
|RD_3
|LM
, 0, IL3A
, 0, 0 },
437 {"gsswlc1", "T,+a(b)", 0xe8000004, 0xfc00c03f, RD_1
|RD_3
|SM
, 0, IL3A
, 0, 0 },
438 {"gsswrc1", "T,+a(b)", 0xe8000005, 0xfc00c03f, RD_1
|RD_3
|SM
, 0, IL3A
, 0, 0 },
439 {"gssdlc1", "T,+a(b)", 0xe8000006, 0xfc00c03f, RD_1
|RD_3
|SM
, 0, IL3A
, 0, 0 },
440 {"gssdrc1", "T,+a(b)", 0xe8000007, 0xfc00c03f, RD_1
|RD_3
|SM
, 0, IL3A
, 0, 0 },
441 {"gslbx", "t,+b(b,d)", 0xd8000000, 0xfc000007, WR_1
|RD_3
|RD_4
|LM
, 0, IL3A
, 0, 0 },
442 {"gslhx", "t,+b(b,d)", 0xd8000001, 0xfc000007, WR_1
|RD_3
|RD_4
|LM
, 0, IL3A
, 0, 0 },
443 {"gslwx", "t,+b(b,d)", 0xd8000002, 0xfc000007, WR_1
|RD_3
|RD_4
|LM
, 0, IL3A
, 0, 0 },
444 {"gsldx", "t,+b(b,d)", 0xd8000003, 0xfc000007, WR_1
|RD_3
|RD_4
|LM
, 0, IL3A
, 0, 0 },
445 {"gssbx", "t,+b(b,d)", 0xf8000000, 0xfc000007, RD_1
|RD_3
|RD_4
|SM
, 0, IL3A
, 0, 0 },
446 {"gsshx", "t,+b(b,d)", 0xf8000001, 0xfc000007, RD_1
|RD_3
|RD_4
|SM
, 0, IL3A
, 0, 0 },
447 {"gsswx", "t,+b(b,d)", 0xf8000002, 0xfc000007, RD_1
|RD_3
|RD_4
|SM
, 0, IL3A
, 0, 0 },
448 {"gssdx", "t,+b(b,d)", 0xf8000003, 0xfc000007, RD_1
|RD_3
|RD_4
|SM
, 0, IL3A
, 0, 0 },
449 {"gslwxc1", "T,+b(b,d)", 0xd8000006, 0xfc000007, WR_1
|RD_3
|RD_4
|LM
, 0, IL3A
, 0, 0 },
450 {"gsldxc1", "T,+b(b,d)", 0xd8000007, 0xfc000007, WR_1
|RD_3
|RD_4
|LM
, 0, IL3A
, 0, 0 },
451 {"gsswxc1", "T,+b(b,d)", 0xf8000006, 0xfc000007, RD_1
|RD_3
|RD_4
|SM
, 0, IL3A
, 0, 0 },
452 {"gssdxc1", "T,+b(b,d)", 0xf8000007, 0xfc000007, RD_1
|RD_3
|RD_4
|SM
, 0, IL3A
, 0, 0 },
453 {"gslq", "+z,t,+c(b)", 0xc8000020, 0xfc008020, WR_1
|WR_2
|RD_4
|LM
, 0, IL3A
, 0, 0 },
454 {"gssq", "+z,t,+c(b)", 0xe8000020, 0xfc008020, RD_1
|RD_2
|RD_4
|SM
, 0, IL3A
, 0, 0 },
455 {"gslqc1", "+Z,T,+c(b)", 0xc8008020, 0xfc008020, WR_1
|WR_2
|RD_4
|LM
, 0, IL3A
, 0, 0 },
456 {"gssqc1", "+Z,T,+c(b)", 0xe8008020, 0xfc008020, RD_1
|RD_2
|RD_4
|SM
, 0, IL3A
, 0, 0 },
458 /* R5900 VU0 Macromode instructions. */
459 {"vabs", "+7+K,+6+K", 0x4a0001fd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
460 {"vadd", "+5+K,+6+K,+7+K", 0x4a000028, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
461 {"vaddi", "+5+K,+6+K,+y", 0x4a000022, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
462 {"vaddq", "+5+K,+6+K,+q", 0x4a000020, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
463 {"vaddw", "+5+K,+6+K,+7+N", 0x4a000003, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
464 {"vaddx", "+5+K,+6+K,+7+N", 0x4a000000, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
465 {"vaddy", "+5+K,+6+K,+7+N", 0x4a000001, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
466 {"vaddz", "+5+K,+6+K,+7+N", 0x4a000002, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
467 {"vadda", "+m+K,+7+K,+6+K", 0x4a0002bc, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
468 {"vaddai", "+m+K,+6+K,+y", 0x4a00023e, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
469 {"vaddaq", "+m+K,+6+K,+q", 0x4a00023c, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
470 {"vaddaw", "+m+K,+6+K,+7+N", 0x4a00003f, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
471 {"vaddax", "+m+K,+6+K,+7+N", 0x4a00003c, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
472 {"vadday", "+m+K,+6+K,+7+N", 0x4a00003d, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
473 {"vaddaz", "+m+K,+6+K,+7+N", 0x4a00003e, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
474 {"vcallms", "+f", 0x4a000038, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
475 {"vcallmsr", "+9", 0x4a000039, 0xffff07ff, CP
, 0, VU0
, 0, 0 },
476 {"vclipw.xyz", "+6+K,+7+N", 0x4bc001ff, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
477 {"vclipw", "+6+K,+7+N", 0x4bc001ff, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
478 {"vdiv", "+q,+6+L,+7+M", 0x4a0003bc, 0xfe0007ff, CP
, 0, VU0
, 0, 0 },
479 {"vftoi0", "+7+K,+6+K", 0x4a00017c, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
480 {"vftoi4", "+7+K,+6+K", 0x4a00017d, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
481 {"vftoi12", "+7+K,+6+K", 0x4a00017e, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
482 {"vftoi15", "+7+K,+6+K", 0x4a00017f, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
483 {"viadd", "+8,+9,+0", 0x4a000030, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
484 {"viaddi", "+0,+9,+g", 0x4a000032, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
485 {"viand", "+8,+9,+0", 0x4a000034, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
486 {"vilwr.w", "+0,(+9)", 0x4a2003fe, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
487 {"vilwr.x", "+0,(+9)", 0x4b0003fe, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
488 {"vilwr.y", "+0,(+9)", 0x4a8003fe, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
489 {"vilwr.z", "+0,(+9)", 0x4a4003fe, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
490 {"vior", "+8,+9,+0", 0x4a000035, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
491 {"viswr.w", "+0,(+9)", 0x4a2003ff, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
492 {"viswr.x", "+0,(+9)", 0x4b0003ff, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
493 {"viswr.y", "+0,(+9)", 0x4a8003ff, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
494 {"viswr.z", "+0,(+9)", 0x4a4003ff, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
495 {"visub", "+8,+9,+0", 0x4a000031, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
496 {"vitof0", "+7+K,+6+K", 0x4a00013c, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
497 {"vitof4", "+7+K,+6+K", 0x4a00013d, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
498 {"vitof12", "+7+K,+6+K", 0x4a00013e, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
499 {"vitof15", "+7+K,+6+K", 0x4a00013f, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
500 {"vlqd", "+7+K,(#-+9)", 0x4a00037e, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
501 {"vlqi", "+7+K,(+9#+)", 0x4a00037c, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
502 {"vmadd", "+5+K,+6+K,+7+K", 0x4a000029, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
503 {"vmaddi", "+5+K,+6+K,+y", 0x4a000023, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
504 {"vmaddq", "+5+K,+6+K,+q", 0x4a000021, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
505 {"vmaddw", "+5+K,+6+K,+7+N", 0x4a00000b, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
506 {"vmaddx", "+5+K,+6+K,+7+N", 0x4a000008, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
507 {"vmaddy", "+5+K,+6+K,+7+N", 0x4a000009, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
508 {"vmaddz", "+5+K,+6+K,+7+N", 0x4a00000a, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
509 {"vmadda", "+m+K,+6+K,+7+K", 0x4a0002bd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
510 {"vmaddai", "+m+K,+6+K,+y", 0x4a00023f, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
511 {"vmaddaq", "+m+K,+6+K,+q", 0x4a00023d, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
512 {"vmaddaw", "+m+K,+6+K,+7+N", 0x4a0000bf, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
513 {"vmaddax", "+m+K,+6+K,+7+N", 0x4a0000bc, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
514 {"vmadday", "+m+K,+6+K,+7+N", 0x4a0000bd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
515 {"vmaddaz", "+m+K,+6+K,+7+N", 0x4a0000be, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
516 {"vmax", "+5+K,+6+K,+7+K", 0x4a00002b, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
517 {"vmaxi", "+5+K,+6+K,+y", 0x4a00001d, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
518 {"vmaxw", "+5+K,+6+K,+7+N", 0x4a000013, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
519 {"vmaxx", "+5+K,+6+K,+7+N", 0x4a000010, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
520 {"vmaxy", "+5+K,+6+K,+7+N", 0x4a000011, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
521 {"vmaxz", "+5+K,+6+K,+7+N", 0x4a000012, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
522 {"vmfir", "+7+K,+9", 0x4a0003fd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
523 {"vmini", "+5+K,+6+K,+7+K", 0x4a00002f, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
524 {"vminii", "+5+K,+6+K,+y", 0x4a00001f, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
525 {"vminiw", "+5+K,+6+K,+7+N", 0x4a000017, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
526 {"vminix", "+5+K,+6+K,+7+N", 0x4a000014, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
527 {"vminiy", "+5+K,+6+K,+7+N", 0x4a000015, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
528 {"vminiz", "+5+K,+6+K,+7+N", 0x4a000016, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
529 {"vmove", "+7+K,+6+K", 0x4a00033c, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
530 {"vmr32", "+7+K,+6+K", 0x4a00033d, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
531 {"vmsub", "+5+K,+6+K,+7+K", 0x4a00002d, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
532 {"vmsubi", "+5+K,+6+K,+y", 0x4a000027, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
533 {"vmsubq", "+5+K,+6+K,+q", 0x4a000025, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
534 {"vmsubw", "+5+K,+6+K,+7+N", 0x4a00000f, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
535 {"vmsubx", "+5+K,+6+K,+7+N", 0x4a00000c, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
536 {"vmsuby", "+5+K,+6+K,+7+N", 0x4a00000d, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
537 {"vmsubz", "+5+K,+6+K,+7+N", 0x4a00000e, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
538 {"vmsuba", "+m+K,+7+K,+6+K", 0x4a0002fd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
539 {"vmsubai", "+m+K,+6+K,+y", 0x4a00027f, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
540 {"vmsubaq", "+m+K,+6+K,+q", 0x4a00027d, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
541 {"vmsubaw", "+m+K,+6+K,+7+N", 0x4a0000ff, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
542 {"vmsubax", "+m+K,+6+K,+7+N", 0x4a0000fc, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
543 {"vmsubay", "+m+K,+6+K,+7+N", 0x4a0000fd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
544 {"vmsubaz", "+m+K,+6+K,+7+N", 0x4a0000fe, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
545 {"vmtir", "+0,+6+L", 0x4a0003fc, 0xff8007ff, CP
, 0, VU0
, 0, 0 },
546 {"vmul", "+5+K,+6+K,+7+K", 0x4a00002a, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
547 {"vmuli", "+5+K,+6+K,+y", 0x4a00001e, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
548 {"vmulq", "+5+K,+6+K,+q", 0x4a00001c, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
549 {"vmulw", "+5+K,+6+K,+7+N", 0x4a00001b, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
550 {"vmulx", "+5+K,+6+K,+7+N", 0x4a000018, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
551 {"vmuly", "+5+K,+6+K,+7+N", 0x4a000019, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
552 {"vmulz", "+5+K,+6+K,+7+N", 0x4a00001a, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
553 {"vmula", "+m+K,+6+K,+7+K", 0x4a0002be, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
554 {"vmulai", "+m+K,+6+K,+y", 0x4a0001fe, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
555 {"vmulaq", "+m+K,+6+K,+q", 0x4a0001fc, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
556 {"vmulaw", "+m+K,+6+K,+7+N", 0x4a0001bf, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
557 {"vmulax", "+m+K,+6+K,+7+N", 0x4a0001bc, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
558 {"vmulay", "+m+K,+6+K,+7+N", 0x4a0001bd, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
559 {"vmulaz", "+m+K,+6+K,+7+N", 0x4a0001be, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
560 {"vnop", "", 0x4a0002ff, 0xffffffff, CP
, 0, VU0
, 0, 0 },
561 {"vopmula.xyz", "+m+K,+6+K,+7+K", 0x4bc002fe, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
562 {"vopmula", "+m+K,+6+K,+7+K", 0x4bc002fe, 0xffe007ff, CP
, 0, VU0
, 0, 0 },
563 {"vopmsub.xyz", "+5+K,+6+K,+7+K", 0x4bc0002e, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
564 {"vopmsub", "+5+K,+6+K,+7+K", 0x4bc0002e, 0xffe0003f, CP
, 0, VU0
, 0, 0 },
565 {"vrget", "+7+K,+r", 0x4a00043d, 0xfe00ffff, CP
, VU0CH
, VU0
, 0, 0 },
566 {"vrinit", "+r,+6+L", 0x4a00043e, 0xff9f07ff, CP
, 0, VU0
, 0, 0 },
567 {"vrnext", "+7+K,+r", 0x4a00043c, 0xfe00ffff, CP
, VU0CH
, VU0
, 0, 0 },
568 {"vrsqrt", "+q,+6+L,+7+M", 0x4a0003be, 0xfe0007ff, CP
, 0, VU0
, 0, 0 },
569 {"vrxor", "+r,+6+L", 0x4a00043f, 0xff9f07ff, CP
, 0, VU0
, 0, 0 },
570 {"vsqd", "+6+K,(#-+0)", 0x4a00037f, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
571 {"vsqi", "+6+K,(+0#+)", 0x4a00037d, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
572 {"vsqrt", "+q,+7+M", 0x4a2003bd, 0xfe60ffff, CP
, 0, VU0
, 0, 0 },
573 {"vsub", "+5+K,+6+K,+7+K", 0x4a00002c, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
574 {"vsubi", "+5+K,+6+K,+y", 0x4a000026, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
575 {"vsubq", "+5+K,+6+K,+q", 0x4a000024, 0xfe1f003f, CP
, VU0CH
, VU0
, 0, 0 },
576 {"vsubw", "+5+K,+6+K,+7+N", 0x4a000007, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
577 {"vsubx", "+5+K,+6+K,+7+N", 0x4a000004, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
578 {"vsuby", "+5+K,+6+K,+7+N", 0x4a000005, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
579 {"vsubz", "+5+K,+6+K,+7+N", 0x4a000006, 0xfe00003f, CP
, VU0CH
, VU0
, 0, 0 },
580 {"vsuba", "+m+K,+6+K,+7+K", 0x4a0002fc, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
581 {"vsubai", "+m+K,+6+K,+y", 0x4a00027e, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
582 {"vsubaq", "+m+K,+6+K,+q", 0x4a00027c, 0xfe1f07ff, CP
, VU0CH
, VU0
, 0, 0 },
583 {"vsubaw", "+m+K,+6+K,+7+N", 0x4a00007f, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
584 {"vsubax", "+m+K,+6+K,+7+N", 0x4a00007c, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
585 {"vsubay", "+m+K,+6+K,+7+N", 0x4a00007d, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
586 {"vsubaz", "+m+K,+6+K,+7+N", 0x4a00007e, 0xfe0007ff, CP
, VU0CH
, VU0
, 0, 0 },
587 {"vwaitq", "", 0x4a0003bf, 0xffffffff, CP
, 0, VU0
, 0, 0 },
589 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, 0, I1
, 0, 0 },
590 {"abs.s", "D,V", 0x46000005, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
591 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I1
, 0, SF
},
592 {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
593 {"abs.ps", "D,V", 0x45600005, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2E
, 0, 0 },
594 {"aclr", "\\,~(b)", 0x04070000, 0xfc1f8000, RD_3
|LM
|SM
|NODS
, 0, 0, MC
, 0 },
595 {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB
, INSN_MACRO
, 0, 0, MC
, 0 },
596 {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
597 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, 0, I1
, 0, 0 },
598 {"add", "D,S,T", 0x45c00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
599 {"add", "D,S,T", 0x4b40000c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
|IL3A
, 0, 0 },
600 {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
601 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, SF
},
602 {"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
603 {"add.ob", "D,S,Q", 0x4800000b, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
604 {"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
605 {"add.ps", "D,V,T", 0x45600000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
606 {"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
607 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
608 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
609 {"adda.s", "S,T", 0x46000018, 0xffe007ff, RD_1
|RD_2
|FP_S
, 0, EE
, 0, 0 },
610 {"addi", "t,r,j", 0x20000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
611 {"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
612 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
613 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
614 {"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, M3D
, 0 },
615 {"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
616 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
617 {"addu", "D,S,T", 0x45800000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
618 {"addu", "D,S,T", 0x4b00000c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
|IL3A
, 0, 0 },
619 {"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
620 {"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
621 {"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
622 {"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I5_33
, 0, 0 },
623 {"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, SB1
, MX
, 0 },
624 {"alnv.qh", "X,Y,Z,s", 0x7800001b, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, 0, MX
, 0 },
625 {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
626 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, 0, I1
, 0, 0 },
627 {"and", "D,S,T", 0x47c00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
628 {"and", "D,S,T", 0x4bc00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
629 {"and.ob", "X,Y,Q", 0x7800000c, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
630 {"and.ob", "D,S,Q", 0x4800000c, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
631 {"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
632 {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
633 {"aset", "\\,~(b)", 0x04078000, 0xfc1f8000, RD_3
|LM
|SM
|NODS
, 0, 0, MC
, 0 },
634 {"aset", "\\,A(b)", 0, (int) M_ASET_AB
, INSN_MACRO
, 0, 0, MC
, 0 },
635 {"baddu", "d,v,t", 0x70000028, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IOCT
, 0, 0 },
636 /* b is at the top of the table. */
637 /* bal is at the top of the table. */
638 {"bbit032", "s,+x,p", 0xd8000000, 0xfc000000, RD_1
|CBD
, 0, IOCT
, 0, 0 },
639 {"bbit0", "s,+X,p", 0xd8000000, 0xfc000000, RD_1
|CBD
, 0, IOCT
, 0, 0 }, /* bbit032 */
640 {"bbit0", "s,+x,p", 0xc8000000, 0xfc000000, RD_1
|CBD
, 0, IOCT
, 0, 0 },
641 {"bbit132", "s,+x,p", 0xf8000000, 0xfc000000, RD_1
|CBD
, 0, IOCT
, 0, 0 },
642 {"bbit1", "s,+X,p", 0xf8000000, 0xfc000000, RD_1
|CBD
, 0, IOCT
, 0, 0 }, /* bbit132 */
643 {"bbit1", "s,+x,p", 0xe8000000, 0xfc000000, RD_1
|CBD
, 0, IOCT
, 0, 0 },
644 /* bc0[tf]l? are at the bottom of the table. */
645 {"bc1any2f", "N,p", 0x45200000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, 0, M3D
, 0 },
646 {"bc1any2t", "N,p", 0x45210000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, 0, M3D
, 0 },
647 {"bc1any4f", "N,p", 0x45400000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, 0, M3D
, 0 },
648 {"bc1any4t", "N,p", 0x45410000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, 0, M3D
, 0 },
649 {"bc1f", "p", 0x45000000, 0xffff0000, RD_CC
|CBD
|FP_S
, 0, I1
, 0, 0 },
650 {"bc1f", "N,p", 0x45000000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, I4_32
, 0, 0 },
651 {"bc1fl", "p", 0x45020000, 0xffff0000, RD_CC
|CBL
|FP_S
, 0, I2
|T3
, 0, 0 },
652 {"bc1fl", "N,p", 0x45020000, 0xffe30000, RD_CC
|CBL
|FP_S
, 0, I4_32
, 0, 0 },
653 {"bc1t", "p", 0x45010000, 0xffff0000, RD_CC
|CBD
|FP_S
, 0, I1
, 0, 0 },
654 {"bc1t", "N,p", 0x45010000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, I4_32
, 0, 0 },
655 {"bc1tl", "p", 0x45030000, 0xffff0000, RD_CC
|CBL
|FP_S
, 0, I2
|T3
, 0, 0 },
656 {"bc1tl", "N,p", 0x45030000, 0xffe30000, RD_CC
|CBL
|FP_S
, 0, I4_32
, 0, 0 },
657 /* bc2* are at the bottom of the table. */
658 /* bc3* are at the bottom of the table. */
659 {"beqz", "s,p", 0x10000000, 0xfc1f0000, RD_1
|CBD
, 0, I1
, 0, 0 },
660 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, RD_1
|CBL
, 0, I2
|T3
, 0, 0 },
661 {"beq", "s,t,p", 0x10000000, 0xfc000000, RD_1
|RD_2
|CBD
, 0, I1
, 0, 0 },
662 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, 0, I1
, 0, 0 },
663 {"beql", "s,t,p", 0x50000000, 0xfc000000, RD_1
|RD_2
|CBL
, 0, I2
|T3
, 0, 0 },
664 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
665 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, 0, I1
, 0, 0 },
666 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
667 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
668 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
669 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, 0, I1
, 0, 0 },
670 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
671 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
672 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
673 {"bgez", "s,p", 0x04010000, 0xfc1f0000, RD_1
|CBD
, 0, I1
, 0, 0 },
674 {"bgezl", "s,p", 0x04030000, 0xfc1f0000, RD_1
|CBL
, 0, I2
|T3
, 0, 0 },
675 {"bgezal", "s,p", 0x04110000, 0xfc1f0000, RD_1
|WR_31
|CBD
, 0, I1
, 0, 0 },
676 {"bgezall", "s,p", 0x04130000, 0xfc1f0000, RD_1
|WR_31
|CBL
, 0, I2
|T3
, 0, 0 },
677 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, 0, I1
, 0, 0 },
678 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
679 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
680 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
681 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, 0, I1
, 0, 0 },
682 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
683 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
684 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
685 {"bgtz", "s,p", 0x1c000000, 0xfc1f0000, RD_1
|CBD
, 0, I1
, 0, 0 },
686 {"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, RD_1
|CBL
, 0, I2
|T3
, 0, 0 },
687 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, 0, I1
, 0, 0 },
688 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
689 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
690 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
691 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, 0, I1
, 0, 0 },
692 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
693 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
694 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
695 {"blez", "s,p", 0x18000000, 0xfc1f0000, RD_1
|CBD
, 0, I1
, 0, 0 },
696 {"blezl", "s,p", 0x58000000, 0xfc1f0000, RD_1
|CBL
, 0, I2
|T3
, 0, 0 },
697 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, 0, I1
, 0, 0 },
698 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
699 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
700 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
701 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, 0, I1
, 0, 0 },
702 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
703 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
704 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
705 {"bltz", "s,p", 0x04000000, 0xfc1f0000, RD_1
|CBD
, 0, I1
, 0, 0 },
706 {"bltzl", "s,p", 0x04020000, 0xfc1f0000, RD_1
|CBL
, 0, I2
|T3
, 0, 0 },
707 {"bltzal", "s,p", 0x04100000, 0xfc1f0000, RD_1
|WR_31
|CBD
, 0, I1
, 0, 0 },
708 {"bltzall", "s,p", 0x04120000, 0xfc1f0000, RD_1
|WR_31
|CBL
, 0, I2
|T3
, 0, 0 },
709 {"bnez", "s,p", 0x14000000, 0xfc1f0000, RD_1
|CBD
, 0, I1
, 0, 0 },
710 {"bnezl", "s,p", 0x54000000, 0xfc1f0000, RD_1
|CBL
, 0, I2
|T3
, 0, 0 },
711 {"bne", "s,t,p", 0x14000000, 0xfc000000, RD_1
|RD_2
|CBD
, 0, I1
, 0, 0 },
712 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
713 {"bnel", "s,t,p", 0x54000000, 0xfc000000, RD_1
|RD_2
|CBL
, 0, I2
|T3
, 0, 0 },
714 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, 0, I2
|T3
, 0, 0 },
715 {"break", "", 0x0000000d, 0xffffffff, TRAP
, 0, I1
, 0, 0 },
716 {"break", "c", 0x0000000d, 0xfc00ffff, TRAP
, 0, I1
, 0, 0 },
717 {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP
, 0, I1
, 0, 0 },
718 {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
719 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
720 {"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
721 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
722 {"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
723 {"c.f.ps", "S,T", 0x45600030, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
724 {"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
725 {"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
726 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
727 {"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
728 {"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
729 {"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
730 {"c.un.ps", "S,T", 0x45600031, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
731 {"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
732 {"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
733 {"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
734 {"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
735 {"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
736 {"c.eq.ob", "Y,Q", 0x78000001, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, SB1
, MX
, 0 },
737 {"c.eq.ob", "S,Q", 0x48000001, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, N54
, 0, 0 },
738 {"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
739 {"c.eq.ps", "S,T", 0x45600032, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
740 {"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
741 {"c.eq.qh", "Y,Q", 0x78200001, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, 0, MX
, 0 },
742 {"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
743 {"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
744 {"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
745 {"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
746 {"c.ueq.ps", "S,T", 0x46c00033, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
747 {"c.ueq.ps", "S,T", 0x45600033, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
748 {"c.ueq.ps", "M,S,T", 0x46c00033, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
749 {"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
750 {"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
751 {"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
752 {"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
753 {"c.olt.ps", "S,T", 0x46c00034, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
754 {"c.olt.ps", "S,T", 0x45600034, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
755 {"c.olt.ps", "M,S,T", 0x46c00034, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
756 {"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
757 {"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
758 {"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
759 {"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
760 {"c.ult.ps", "S,T", 0x46c00035, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
761 {"c.ult.ps", "S,T", 0x45600035, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
762 {"c.ult.ps", "M,S,T", 0x46c00035, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
763 {"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
764 {"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
765 {"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
766 {"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
767 {"c.ole.ps", "S,T", 0x46c00036, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
768 {"c.ole.ps", "S,T", 0x45600036, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
769 {"c.ole.ps", "M,S,T", 0x46c00036, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
770 {"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
771 {"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
772 {"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
773 {"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
774 {"c.ule.ps", "S,T", 0x46c00037, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
775 {"c.ule.ps", "S,T", 0x45600037, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
776 {"c.ule.ps", "M,S,T", 0x46c00037, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
777 {"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
778 {"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
779 {"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
780 {"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
781 {"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
782 {"c.sf.ps", "S,T", 0x45600038, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
783 {"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
784 {"c.ngle.d", "S,T", 0x46200039, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
785 {"c.ngle.d", "M,S,T", 0x46200039, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
786 {"c.ngle.s", "S,T", 0x46000039, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
787 {"c.ngle.s", "M,S,T", 0x46000039, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
788 {"c.ngle.ps", "S,T", 0x46c00039, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
789 {"c.ngle.ps", "S,T", 0x45600039, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
790 {"c.ngle.ps", "M,S,T", 0x46c00039, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
791 {"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
792 {"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
793 {"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
794 {"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
795 {"c.seq.ps", "S,T", 0x46c0003a, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
796 {"c.seq.ps", "S,T", 0x4560003a, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
797 {"c.seq.ps", "M,S,T", 0x46c0003a, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
798 {"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
799 {"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
800 {"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
801 {"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
802 {"c.ngl.ps", "S,T", 0x46c0003b, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
803 {"c.ngl.ps", "S,T", 0x4560003b, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
804 {"c.ngl.ps", "M,S,T", 0x46c0003b, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
805 {"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
806 {"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
807 {"c.lt.s", "S,T", 0x46000034, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, EE
, 0, 0 },
808 {"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
809 {"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
810 {"c.lt.ob", "Y,Q", 0x78000004, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, SB1
, MX
, 0 },
811 {"c.lt.ob", "S,Q", 0x48000004, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, N54
, 0, 0 },
812 {"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
813 {"c.lt.ps", "S,T", 0x4560003c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
814 {"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
815 {"c.lt.qh", "Y,Q", 0x78200004, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, 0, MX
, 0 },
816 {"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
817 {"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
818 {"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
819 {"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
820 {"c.nge.ps", "S,T", 0x46c0003d, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
821 {"c.nge.ps", "S,T", 0x4560003d, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
822 {"c.nge.ps", "M,S,T", 0x46c0003d, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
823 {"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
824 {"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
825 {"c.le.s", "S,T", 0x46000036, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, EE
, 0, 0 },
826 {"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
827 {"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
828 {"c.le.ob", "Y,Q", 0x78000005, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, SB1
, MX
, 0 },
829 {"c.le.ob", "S,Q", 0x48000005, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, N54
, 0, 0 },
830 {"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
831 {"c.le.ps", "S,T", 0x4560003e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
832 {"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
833 {"c.le.qh", "Y,Q", 0x78200005, 0xfc2007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, 0, MX
, 0 },
834 {"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, SF
},
835 {"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I4_32
, 0, 0 },
836 {"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, EE
},
837 {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I4_32
, 0, 0 },
838 {"c.ngt.ps", "S,T", 0x46c0003f, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
839 {"c.ngt.ps", "S,T", 0x4560003f, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
840 {"c.ngt.ps", "M,S,T", 0x46c0003f, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I5_33
, 0, 0 },
841 {"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
842 {"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
843 {"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
844 {"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
845 {"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
846 {"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
847 {"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
848 {"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
849 {"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
850 {"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
851 {"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
852 {"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
853 {"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
854 {"cabs.nge.ps", "M,S,T", 0x46c0007d, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
855 {"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
856 {"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
857 {"cabs.ngl.ps", "M,S,T", 0x46c0007b, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
858 {"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
859 {"cabs.ngle.d", "M,S,T", 0x46200079, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
860 {"cabs.ngle.ps", "M,S,T", 0x46c00079, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
861 {"cabs.ngle.s", "M,S,T", 0x46000079, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
862 {"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
863 {"cabs.ngt.ps", "M,S,T", 0x46c0007f, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
864 {"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
865 {"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
866 {"cabs.ole.ps", "M,S,T", 0x46c00076, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
867 {"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
868 {"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
869 {"cabs.olt.ps", "M,S,T", 0x46c00074, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
870 {"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
871 {"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
872 {"cabs.seq.ps", "M,S,T", 0x46c0007a, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
873 {"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
874 {"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
875 {"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
876 {"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
877 {"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
878 {"cabs.ueq.ps", "M,S,T", 0x46c00073, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
879 {"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
880 {"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
881 {"cabs.ule.ps", "M,S,T", 0x46c00077, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
882 {"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
883 {"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
884 {"cabs.ult.ps", "M,S,T", 0x46c00075, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
885 {"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
886 {"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
887 {"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, 0, M3D
, 0 },
888 {"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, 0, M3D
, 0 },
889 /* CW4010 instructions which are aliases for the cache instruction. */
890 {"flushi", "", 0xbc010000, 0xffffffff, 0, 0, L1
, 0, 0 },
891 {"flushd", "", 0xbc020000, 0xffffffff, 0, 0, L1
, 0, 0 },
892 {"flushid", "", 0xbc030000, 0xffffffff, 0, 0, L1
, 0, 0 },
893 {"wb", "o(b)", 0xbc040000, 0xfc1f0000, RD_2
|SM
, 0, L1
, 0, 0 },
894 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_3
, 0, I3_32
|T3
, 0, 0},
895 {"cache", "k,A(b)", 0, (int) M_CACHE_AB
, INSN_MACRO
, 0, I3_32
|T3
, 0, 0},
896 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I3_33
, 0, 0 },
897 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I3_33
, 0, 0 },
898 {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I2
, 0, SF
},
899 {"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I2
, 0, EE
},
900 {"cfc0", "t,G", 0x40400000, 0xffe007ff, WR_1
|RD_C0
|LCD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
901 {"cfc1", "t,G", 0x44400000, 0xffe007ff, WR_1
|RD_C1
|LCD
|FP_S
, 0, I1
, 0, 0 },
902 {"cfc1", "t,S", 0x44400000, 0xffe007ff, WR_1
|RD_C1
|LCD
|FP_S
, 0, I1
, 0, 0 },
903 /* cfc2 is at the bottom of the table. */
904 /* cfc3 is at the bottom of the table. */
905 {"cftc1", "d,E", 0x41000023, 0xffe007ff, WR_1
|RD_C1
|TRAP
|LCD
|FP_S
, 0, 0, MT32
, 0 },
906 {"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1
|RD_C1
|TRAP
|LCD
|FP_S
, 0, 0, MT32
, 0 },
907 {"cftc2", "d,E", 0x41000025, 0xffe007ff, WR_1
|RD_C2
|TRAP
|LCD
, 0, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
908 {"cins32", "t,r,+p,+s", 0x70000033, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
909 {"cins", "t,r,+P,+S", 0x70000033, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 }, /* cins32 */
910 {"cins", "t,r,+p,+S", 0x70000032, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
911 {"clo", "U,s", 0x70000021, 0xfc0007ff, WR_1
|RD_2
, 0, I32
|N55
, 0, 0 },
912 {"clz", "U,s", 0x70000020, 0xfc0007ff, WR_1
|RD_2
, 0, I32
|N55
, 0, 0 },
913 {"ctc0", "t,G", 0x40c00000, 0xffe007ff, RD_1
|WR_CC
|COD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
914 {"ctc1", "t,G", 0x44c00000, 0xffe007ff, RD_1
|WR_CC
|COD
|FP_S
, 0, I1
, 0, 0 },
915 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1
|WR_CC
|COD
|FP_S
, 0, I1
, 0, 0 },
916 /* ctc2 is at the bottom of the table. */
917 /* ctc3 is at the bottom of the table. */
918 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1
|WR_CC
|TRAP
|COD
|FP_S
, 0, 0, MT32
, 0 },
919 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1
|WR_CC
|TRAP
|COD
|FP_S
, 0, 0, MT32
, 0 },
920 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1
|WR_CC
|TRAP
|COD
, 0, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
921 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I3_33
, 0, 0 },
922 {"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, SF
},
923 {"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, SF
},
924 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I3_33
, 0, 0 },
925 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I3_33
, 0, 0 },
926 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I3_33
, 0, 0 },
927 {"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, SF
},
928 {"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
929 {"cvt.s.pl", "D,S", 0x46c00028, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I5_33
, 0, 0 },
930 {"cvt.s.pu", "D,S", 0x46c00020, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I5_33
, 0, 0 },
931 {"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, SF
},
932 {"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I1
, 0, EE
},
933 {"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, 0, M3D
, 0 },
934 {"cvt.ps.s", "D,V,T", 0x46000026, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
|FP_D
, 0, I5_33
, 0, 0 },
935 {"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, 0, M3D
, 0 },
936 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, 0, I3
, 0, 0 },
937 {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
938 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
, 0, 0 },
939 {"dadd", "D,S,T", 0x45e00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
940 {"dadd", "D,S,T", 0x4b60000c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
941 {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_1
|RD_2
, 0, I3
, 0, 0 },
942 {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_1
|RD_2
, 0, I3
, 0, 0 },
943 {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
944 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, 0, I3
, 0, 0 },
945 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_C0
|RD_C0
, 0, XLR
, 0, 0 },
946 {"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5
, 0, 0 },
947 {"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1
|RD_2
, 0, I64
|N55
, 0, 0 },
948 {"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1
|RD_2
, 0, I64
|N55
, 0, 0 },
949 /* dctr and dctw are used on the r5000. */
950 {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_2
, 0, I3
, 0, 0 },
951 {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_2
, 0, I3
, 0, 0 },
952 {"deret", "", 0x4200001f, 0xffffffff, NODS
, 0, I32
|G2
, 0, 0 },
953 {"dext", "t,r,+A,+H", 0x7c000003, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
954 {"dext", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 }, /* dextm */
955 {"dext", "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 }, /* dextu */
956 {"dextm", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
957 {"dextu", "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
958 /* For ddiv, see the comments about div. */
959 {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, M32
},
960 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, 0, I3
, 0, M32
},
961 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, 0, I3
, 0, M32
},
962 /* For ddivu, see the comments about div. */
963 {"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, M32
},
964 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, 0, I3
, 0, M32
},
965 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, 0, I3
, 0, M32
},
966 {"di", "", 0x42000039, 0xffffffff, WR_C0
, 0, EE
, 0, 0 },
967 {"di", "", 0x41606000, 0xffffffff, WR_C0
, 0, I33
, 0, 0 },
968 {"di", "t", 0x41606000, 0xffe0ffff, WR_1
|WR_C0
, 0, I33
, 0, 0 },
969 {"dins", "t,r,+A,+B", 0x7c000007, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
970 {"dins", "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 }, /* dinsm */
971 {"dins", "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 }, /* dinsu */
972 {"dinsm", "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
973 {"dinsu", "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
974 /* The MIPS assembler treats the div opcode with two operands as
975 though the first operand appeared twice (the first operand is both
976 a source and a destination). To get the div machine instruction,
977 you must use an explicit destination of $0. */
978 {"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
979 {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_2
|WR_HILO
, 0, I1
, 0, 0 },
980 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, 0, I1
, 0, 0 },
981 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
982 {"div1", "z,s,t", 0x7000001a, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, EE
, 0, 0 },
983 {"div1", "z,t", 0x7000001a, 0xffe0ffff, RD_2
|WR_HILO
, 0, EE
, 0, 0 },
984 {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, SF
},
985 {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
986 {"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, 0, 0 },
987 /* For divu, see the comments about div. */
988 {"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
989 {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_2
|WR_HILO
, 0, I1
, 0, 0 },
990 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, 0, I1
, 0, 0 },
991 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
992 {"divu1", "z,s,t", 0x7000001b, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, EE
, 0, 0 },
993 {"divu1", "z,t", 0x7000001b, 0xffe0ffff, RD_2
|WR_HILO
, 0, EE
, 0, 0 },
994 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
995 {"dlca", "t,A(b)", 0, (int) M_DLCA_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
996 {"dli", "t,j", 0x24000000, 0xffe00000, WR_1
, 0, I3
, 0, 0 }, /* addiu */
997 {"dli", "t,i", 0x34000000, 0xffe00000, WR_1
, 0, I3
, 0, 0 }, /* ori */
998 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, 0, I3
, 0, 0 },
999 {"dmacc", "d,s,t", 0x00000029, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1000 {"dmacchi", "d,s,t", 0x00000229, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1001 {"dmacchis", "d,s,t", 0x00000629, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1002 {"dmacchiu", "d,s,t", 0x00000269, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1003 {"dmacchius", "d,s,t", 0x00000669, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1004 {"dmaccs", "d,s,t", 0x00000429, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1005 {"dmaccu", "d,s,t", 0x00000069, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1006 {"dmaccus", "d,s,t", 0x00000469, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_LO
, 0, N412
, 0, 0 },
1007 {"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_1
|RD_2
|MOD_LO
, 0, N411
, 0, 0 },
1008 {"dmfc0", "t,G", 0x40200000, 0xffe007ff, WR_1
|RD_C0
|LCD
, 0, I3
, 0, EE
},
1009 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1
|RD_C0
|LCD
, 0, I64
, 0, 0 },
1010 {"dmfgc0", "t,G", 0x40600100, 0xffe007ff, WR_1
|RD_C0
|LCD
, 0, 0, IVIRT64
, 0 },
1011 {"dmfgc0", "t,G,H", 0x40600100, 0xffe007f8, WR_1
|RD_C0
|LCD
, 0, 0, IVIRT64
, 0 },
1012 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP
, 0, 0, MT32
, 0 },
1013 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1
|TRAP
, 0, 0, MT32
, 0 },
1014 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1
|WR_C0
|WR_CC
|COD
, 0, I3
, 0, EE
},
1015 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1
|WR_C0
|WR_CC
|COD
, 0, I64
, 0, 0 },
1016 {"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1
|WR_C0
|WR_CC
|COD
, 0, 0, IVIRT64
, 0 },
1017 {"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1
|WR_C0
|WR_CC
|COD
, 0, 0, IVIRT64
, 0 },
1018 {"dmfc1", "t,S", 0x44200000, 0xffe007ff, WR_1
|RD_2
|LCD
|FP_D
, 0, I3
, 0, SF
},
1019 {"dmfc1", "t,G", 0x44200000, 0xffe007ff, WR_1
|RD_2
|LCD
|FP_D
, 0, I3
, 0, SF
},
1020 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1
|WR_2
|COD
|FP_D
, 0, I3
, 0, SF
},
1021 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1
|WR_2
|COD
|FP_D
, 0, I3
, 0, SF
},
1022 /* dmfc2 is at the bottom of the table. */
1023 /* dmtc2 is at the bottom of the table. */
1024 /* dmfc3 is at the bottom of the table. */
1025 /* dmtc3 is at the bottom of the table. */
1026 {"dmul", "d,v,t", 0x70000003, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, IOCT
, 0, 0 },
1027 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, 0, I3
, 0, M32
},
1028 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, 0, I3
, 0, M32
},
1029 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, 0, I3
, 0, M32
},
1030 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, 0, I3
, 0, M32
},
1031 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, 0, I3
, 0, M32
},
1032 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, 0, I3
, 0, M32
},
1033 {"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, I3
, 0, M32
},
1034 {"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, I3
, 0, M32
},
1035 {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsub 0 */
1036 {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsubu 0*/
1037 {"dpop", "d,v", 0x7000002d, 0xfc1f07ff, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
1038 {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, M32
},
1039 {"drem", "d,v,t", 0, (int) M_DREM_3
, INSN_MACRO
, 0, I3
, 0, M32
},
1040 {"drem", "d,v,I", 0, (int) M_DREM_3I
, INSN_MACRO
, 0, I3
, 0, M32
},
1041 {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, M32
},
1042 {"dremu", "d,v,t", 0, (int) M_DREMU_3
, INSN_MACRO
, 0, I3
, 0, M32
},
1043 {"dremu", "d,v,I", 0, (int) M_DREMU_3I
, INSN_MACRO
, 0, I3
, 0, M32
},
1044 {"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5
, 0, 0 },
1045 {"drol", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
, 0, 0 },
1046 {"drol", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
, 0, 0 },
1047 {"dror", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
, 0, 0 },
1048 {"dror", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
, 0, 0 },
1049 {"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_1
|RD_2
, 0, N5
|I65
, 0, 0 },
1050 {"drorv", "d,t,s", 0x00000056, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, N5
|I65
, 0, 0 },
1051 {"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_1
|RD_2
, 0, N5
|I65
, 0, 0 },
1052 {"drotl", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I65
, 0, 0 },
1053 {"drotl", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I65
, 0, 0 },
1054 {"drotr", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I65
, 0, 0 },
1055 {"drotr", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I65
, 0, 0 },
1056 {"drotrv", "d,t,s", 0x00000056, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I65
, 0, 0 },
1057 {"drotr32", "d,w,<", 0x0020003e, 0xffe0003f, WR_1
|RD_2
, 0, I65
, 0, 0 },
1058 {"dsbh", "d,w", 0x7c0000a4, 0xffe007ff, WR_1
|RD_2
, 0, I65
, 0, 0 },
1059 {"dshd", "d,w", 0x7c000164, 0xffe007ff, WR_1
|RD_2
, 0, I65
, 0, 0 },
1060 {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
1061 {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
1062 {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 }, /* dsllv */
1063 {"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsll32 */
1064 {"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
1065 {"dsll", "D,S,T", 0x45a00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1066 {"dsll", "D,S,T", 0x4b20000e, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1067 {"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
1068 {"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
1069 {"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 }, /* dsrav */
1070 {"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsra32 */
1071 {"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
1072 {"dsra", "D,S,T", 0x45e00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1073 {"dsra", "D,S,T", 0x4b60000f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1074 {"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
1075 {"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
1076 {"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 }, /* dsrlv */
1077 {"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsrl32 */
1078 {"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
1079 {"dsrl", "D,S,T", 0x45a00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1080 {"dsrl", "D,S,T", 0x4b20000f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1081 {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
1082 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, 0, I3
, 0, 0 },
1083 {"dsub", "D,S,T", 0x45e00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1084 {"dsub", "D,S,T", 0x4b60000d, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1085 {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
1086 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, 0, I3
, 0, 0 },
1087 {"dvpe", "", 0x41600001, 0xffffffff, TRAP
, 0, 0, MT32
, 0 },
1088 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1
|TRAP
, 0, 0, MT32
, 0 },
1089 {"ei", "", 0x42000038, 0xffffffff, WR_C0
, 0, EE
, 0, 0 },
1090 {"ei", "", 0x41606020, 0xffffffff, WR_C0
, 0, I33
, 0, 0 },
1091 {"ei", "t", 0x41606020, 0xffe0ffff, WR_1
|WR_C0
, 0, I33
, 0, 0 },
1092 {"emt", "", 0x41600be1, 0xffffffff, TRAP
, 0, 0, MT32
, 0 },
1093 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1
|TRAP
, 0, 0, MT32
, 0 },
1094 {"eret", "", 0x42000018, 0xffffffff, NODS
, 0, I3_32
, 0, 0 },
1095 {"evpe", "", 0x41600021, 0xffffffff, TRAP
, 0, 0, MT32
, 0 },
1096 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1
|TRAP
, 0, 0, MT32
, 0 },
1097 {"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_1
|RD_2
, 0, I33
, 0, 0 },
1098 {"exts32", "t,r,+p,+s", 0x7000003b, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
1099 {"exts", "t,r,+P,+S", 0x7000003b, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 }, /* exts32 */
1100 {"exts", "t,r,+p,+S", 0x7000003a, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
1101 {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I3_33
, 0, 0 },
1102 {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I3_33
, 0, 0 },
1103 {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I2
, 0, SF
},
1104 {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I2
, 0, 0 },
1105 {"hibernate", "", 0x42000023, 0xffffffff, 0, 0, V1
, 0, 0 },
1106 {"hypcall", "", 0x42000028, 0xffffffff, TRAP
, 0, 0, IVIRT
, 0 },
1107 {"hypcall", "+J", 0x42000028, 0xffe007ff, TRAP
, 0, 0, IVIRT
, 0 },
1108 {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_1
|RD_2
, 0, I33
, 0, 0 },
1109 {"iret", "", 0x42000038, 0xffffffff, NODS
, 0, 0, MC
, 0 },
1110 {"jr", "s", 0x00000008, 0xfc1fffff, RD_1
|UBD
, 0, I1
, 0, 0 },
1111 /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with
1112 the same hazard barrier effect. */
1113 {"jr.hb", "s", 0x00000408, 0xfc1fffff, RD_1
|UBD
, 0, I32
, 0, 0 },
1114 {"j", "s", 0x00000008, 0xfc1fffff, RD_1
|UBD
, 0, I1
, 0, 0 }, /* jr */
1115 /* SVR4 PIC code requires special handling for j, so it must be a
1117 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, 0, I1
, 0, 0 },
1118 /* This form of j is used by the disassembler and internally by the
1119 assembler, but will never match user input (because the line above
1120 will match first). */
1121 {"j", "a", 0x08000000, 0xfc000000, UBD
, 0, I1
, 0, 0 },
1122 {"jalr", "s", 0x0000f809, 0xfc1fffff, RD_1
|WR_31
|UBD
, 0, I1
, 0, 0 },
1123 {"jalr", "d,s", 0x00000009, 0xfc1f07ff, WR_1
|RD_2
|UBD
, 0, I1
, 0, 0 },
1124 /* jalr.hb is officially MIPS{32,64}R2, but it works on R1 as jalr
1125 with the same hazard barrier effect. */
1126 {"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, RD_1
|WR_31
|UBD
, 0, I32
, 0, 0 },
1127 {"jalr.hb", "d,s", 0x00000409, 0xfc1f07ff, WR_1
|RD_2
|UBD
, 0, I32
, 0, 0 },
1128 /* SVR4 PIC code requires special handling for jal, so it must be a
1130 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, 0, I1
, 0, 0 },
1131 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, 0, I1
, 0, 0 },
1132 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, 0, I1
, 0, 0 },
1133 /* This form of jal is used by the disassembler and internally by the
1134 assembler, but will never match user input (because the line above
1135 will match first). */
1136 {"jal", "a", 0x0c000000, 0xfc000000, WR_31
|UBD
, 0, I1
, 0, 0 },
1137 {"jalx", "+i", 0x74000000, 0xfc000000, WR_31
|UBD
, 0, I1
, 0, 0 },
1138 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1139 {"laa", "d,(b),t", 0x7000049f, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
|SM
, 0, IOCT2
, 0, 0 },
1140 {"laad", "d,(b),t", 0x700004df, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
|SM
, 0, IOCT2
, 0, 0 },
1141 {"lac", "d,(b)", 0x7000039f, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1142 {"lacd", "d,(b)", 0x700003df, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1143 {"lad", "d,(b)", 0x7000019f, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1144 {"ladd", "d,(b)", 0x700001df, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1145 {"lai", "d,(b)", 0x7000009f, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1146 {"laid", "d,(b)", 0x700000df, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1147 {"las", "d,(b)", 0x7000029f, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1148 {"lasd", "d,(b)", 0x700002df, 0xfc1f07ff, WR_1
|RD_2
|LM
|SM
, 0, IOCT2
, 0, 0 },
1149 {"law", "d,(b),t", 0x7000059f, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
|SM
, 0, IOCT2
, 0, 0 },
1150 {"lawd", "d,(b),t", 0x700005df, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
|SM
, 0, IOCT2
, 0, 0 },
1151 {"lb", "t,o(b)", 0x80000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1152 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1153 {"lbu", "t,o(b)", 0x90000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1154 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1155 {"lbx", "d,t(b)", 0x7c00058a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, 0, 0 },
1156 {"lbux", "d,t(b)", 0x7c00018a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, D32
, 0},
1157 {"ldx", "d,t(b)", 0x7c00020a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, D64
, 0},
1158 {"lhx", "d,t(b)", 0x7c00010a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, D32
, 0},
1159 {"lhux", "d,t(b)", 0x7c00050a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, 0, 0 },
1160 {"lwx", "d,t(b)", 0x7c00000a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, D32
, 0},
1161 {"lwux", "d,t(b)", 0x7c00040a, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, IOCT2
, 0, 0 },
1162 {"lca", "t,A(b)", 0, (int) M_LCA_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1163 /* The macro has to be first to handle o32 correctly. */
1164 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1165 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
1166 {"ldaddw", "t,b", 0x70000010, 0xfc00ffff, MOD_1
|RD_2
|LM
|SM
, 0, XLR
, 0, 0 },
1167 {"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, MOD_1
|RD_2
|LM
|SM
, 0, XLR
, 0, 0 },
1168 {"ldaddd", "t,b", 0x70000012, 0xfc00ffff, MOD_1
|RD_2
|LM
|SM
, 0, XLR
, 0, 0 },
1169 {"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, WR_1
|RD_3
|CLD
|FP_D
, 0, I2
, 0, SF
},
1170 {"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, WR_1
|RD_3
|CLD
|FP_D
, 0, I2
, 0, SF
},
1171 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
, 0, SF
},
1172 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
, 0, SF
},
1173 {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, WR_1
|RD_3
|CLD
|FP_D
, 0, I2
, 0, SF
}, /* ldc1 */
1174 {"l.d", "T,A(b)", 0, (int) M_L_DAB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
1175 {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, RD_3
|WR_CC
|CLD
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1176 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1177 {"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, RD_3
|WR_CC
|CLD
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1178 {"ldc3", "E,A(b)", 0, (int) M_LDC3_AB
, INSN_MACRO
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1179 {"ldl", "t,o(b)", 0x68000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
1180 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1181 {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
1182 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1183 {"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, WR_1
|RD_2
|RD_3
|LM
|FP_D
, 0, I4_33
, 0, 0 },
1184 {"lh", "t,o(b)", 0x84000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1185 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1186 {"lhu", "t,o(b)", 0x94000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1187 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1188 /* li is at the start of the table. */
1189 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, SF
},
1190 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, SF
},
1191 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1192 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1193 {"ll", "t,o(b)", 0xc0000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I2
, 0, EE
},
1194 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, 0, I2
, 0, EE
},
1195 {"lld", "t,o(b)", 0xd0000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I3
, 0, EE
},
1196 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, 0, I3
, 0, EE
},
1197 {"lq", "t,o(b)", 0x78000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, MMI
, 0, 0 },
1198 {"lq", "t,A(b)", 0, (int) M_LQ_AB
, INSN_MACRO
, 0, MMI
, 0, 0 },
1199 {"lqc2", "+7,o(b)", 0xd8000000, 0xfc000000, RD_3
|WR_C2
|LM
, 0, EE
, 0, 0 },
1200 {"lqc2", "+7,A(b)", 0, (int) M_LQC2_AB
, INSN_MACRO
, 0, EE
, 0, 0 },
1201 {"lui", "t,u", 0x3c000000, 0xffe00000, WR_1
, 0, I1
, 0, 0 },
1202 {"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, WR_1
|RD_2
|RD_3
|LM
|FP_D
, 0, I5_33
|N55
, 0, 0},
1203 {"lw", "t,o(b)", 0x8c000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1204 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1205 {"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, RD_3
|WR_CC
|CLD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
1206 {"lwc0", "E,A(b)", 0, (int) M_LWC0_AB
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
1207 {"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, WR_1
|RD_3
|CLD
|FP_S
, 0, I1
, 0, 0 },
1208 {"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, WR_1
|RD_3
|CLD
|FP_S
, 0, I1
, 0, 0 },
1209 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1210 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1211 {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, WR_1
|RD_3
|CLD
|FP_S
, 0, I1
, 0, 0 }, /* lwc1 */
1212 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1213 {"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, RD_3
|WR_CC
|CLD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1214 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1215 {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, RD_3
|WR_CC
|CLD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1216 {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1217 {"lwl", "t,o(b)", 0x88000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1218 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1219 {"lcache", "t,o(b)", 0x88000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I2
, 0, 0 }, /* same */
1220 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I2
, 0, 0 }, /* as lwl */
1221 {"lwr", "t,o(b)", 0x98000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
1222 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1223 {"flush", "t,o(b)", 0x98000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I2
, 0, 0 }, /* same */
1224 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I2
, 0, 0 }, /* as lwr */
1225 {"fork", "d,s,t", 0x7c000008, 0xfc0007ff, WR_1
|RD_2
|RD_3
|TRAP
, 0, 0, MT32
, 0 },
1226 {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
1227 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1228 {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, WR_1
|RD_2
|RD_3
|LM
|FP_S
, 0, I4_33
, 0, 0 },
1229 {"lwxs", "d,t(b)", 0x70000088, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, 0, SMT
, 0 },
1230 {"macc", "d,s,t", 0x00000028, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1231 {"macc", "d,s,t", 0x00000158, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1232 {"maccs", "d,s,t", 0x00000428, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1233 {"macchi", "d,s,t", 0x00000228, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1234 {"macchi", "d,s,t", 0x00000358, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1235 {"macchis", "d,s,t", 0x00000628, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1236 {"macchiu", "d,s,t", 0x00000268, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1237 {"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1238 {"macchius", "d,s,t", 0x00000668, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1239 {"maccu", "d,s,t", 0x00000068, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1240 {"maccu", "d,s,t", 0x00000159, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1241 {"maccus", "d,s,t", 0x00000468, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N412
, 0, 0 },
1242 {"mad", "s,t", 0x70000000, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, P3
, 0, 0 },
1243 {"madu", "s,t", 0x70000001, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, P3
, 0, 0 },
1244 {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I4_33
, 0, 0 },
1245 {"madd.d", "D,S,T", 0x46200018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1246 {"madd.d", "D,S,T", 0x72200018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1247 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I4_33
, 0, 0 },
1248 {"madd.s", "D,S,T", 0x46000018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
1249 {"madd.s", "D,S,T", 0x72000018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
, 0, 0 },
1250 {"madd.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, EE
, 0, 0 },
1251 {"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I5_33
, 0, 0 },
1252 {"madd.ps", "D,S,T", 0x45600018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1253 {"madd.ps", "D,S,T", 0x72c00018, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1254 {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, L1
, 0, 0 },
1255 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I32
|N55
, 0, 0 },
1256 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, G1
, 0, 0 },
1257 {"madd", "7,s,t", 0x70000000, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1258 {"madd", "d,s,t", 0x70000000, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, G1
, 0, 0 },
1259 {"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1260 {"madd1", "d,s,t", 0x70000020, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1261 {"madda.s", "S,T", 0x4600001e, 0xffe007ff, RD_1
|RD_2
|FP_S
, 0, EE
, 0, 0 },
1262 {"maddp", "s,t", 0x70000441, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, 0, SMT
, 0 },
1263 {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, L1
, 0, 0 },
1264 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I32
|N55
, 0, 0 },
1265 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, G1
, 0, 0 },
1266 {"maddu", "7,s,t", 0x70000001, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1267 {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, G1
, 0, 0 },
1268 {"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1269 {"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1270 {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, N411
, 0, 0 },
1271 {"max.ob", "X,Y,Q", 0x78000007, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1272 {"max.ob", "D,S,Q", 0x48000007, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1273 {"max.qh", "X,Y,Q", 0x78200007, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1274 {"max.s", "D,S,T", 0x46000028, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, EE
, 0, 0 },
1275 {"mfbpc", "t", 0x4000c000, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1276 {"mfdab", "t", 0x4000c004, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1277 {"mfdabm", "t", 0x4000c005, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1278 {"mfdvb", "t", 0x4000c006, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1279 {"mfdvbm", "t", 0x4000c007, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1280 {"mfiab", "t", 0x4000c002, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1281 {"mfiabm", "t", 0x4000c003, 0xffe0ffff, WR_1
|RD_C0
|LCD
, 0, EE
, 0, 0 },
1282 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, WR_1
|RD_C0
|LCD
, 0, M1
|N5
|EE
, 0, 0 },
1283 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, WR_1
|RD_C0
|LCD
, 0, M1
|N5
|EE
, 0, 0 },
1284 {"mftacx", "d", 0x41020021, 0xffff07ff, WR_1
|RD_a
|TRAP
, 0, 0, MT32
, 0 },
1285 {"mftacx", "d,*", 0x41020021, 0xfff307ff, WR_1
|RD_a
|TRAP
, 0, 0, MT32
, 0 },
1286 {"mftc0", "d,+t", 0x41000000, 0xffe007ff, WR_1
|RD_C0
|TRAP
|LCD
, 0, 0, MT32
, 0 },
1287 {"mftc0", "d,E,H", 0x41000000, 0xffe007f8, WR_1
|RD_C0
|TRAP
|LCD
, 0, 0, MT32
, 0 },
1288 {"mftc1", "d,T", 0x41000022, 0xffe007ff, WR_1
|RD_2
|TRAP
|LCD
|FP_S
, 0, 0, MT32
, 0 },
1289 {"mftc1", "d,E", 0x41000022, 0xffe007ff, WR_1
|RD_2
|TRAP
|LCD
|FP_S
, 0, 0, MT32
, 0 },
1290 {"mftc2", "d,E", 0x41000024, 0xffe007ff, WR_1
|RD_C2
|TRAP
|LCD
, 0, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
1291 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1
|TRAP
, 0, 0, MT32
, 0 },
1292 {"mftgpr", "d,t", 0x41000020, 0xffe007ff, WR_1
|RD_2
|TRAP
, 0, 0, MT32
, 0 },
1293 {"mfthc1", "d,T", 0x41000032, 0xffe007ff, WR_1
|RD_2
|TRAP
|LCD
|FP_D
, 0, 0, MT32
, 0 },
1294 {"mfthc1", "d,E", 0x41000032, 0xffe007ff, WR_1
|RD_2
|TRAP
|LCD
|FP_D
, 0, 0, MT32
, 0 },
1295 {"mfthc2", "d,E", 0x41000034, 0xffe007ff, WR_1
|RD_C2
|TRAP
|LCD
, 0, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
1296 {"mfthi", "d", 0x41010021, 0xffff07ff, WR_1
|RD_a
|TRAP
, 0, 0, MT32
, 0 },
1297 {"mfthi", "d,*", 0x41010021, 0xfff307ff, WR_1
|RD_a
|TRAP
, 0, 0, MT32
, 0 },
1298 {"mftlo", "d", 0x41000021, 0xffff07ff, WR_1
|RD_a
|TRAP
, 0, 0, MT32
, 0 },
1299 {"mftlo", "d,*", 0x41000021, 0xfff307ff, WR_1
|RD_a
|TRAP
, 0, 0, MT32
, 0 },
1300 {"mftr", "d,t,!,H,$", 0x41000000, 0xffe007c8, WR_1
|TRAP
, 0, 0, MT32
, 0 },
1301 {"mfc0", "t,G", 0x40000000, 0xffe007ff, WR_1
|RD_C0
|LCD
, 0, I1
, 0, 0 },
1302 {"mfc0", "t,G,H", 0x40000000, 0xffe007f8, WR_1
|RD_C0
|LCD
, 0, I32
, 0, 0 },
1303 {"mfgc0", "t,G", 0x40600000, 0xffe007ff, WR_1
|RD_C0
|LCD
, 0, 0, IVIRT
, 0 },
1304 {"mfgc0", "t,G,H", 0x40600000, 0xffe007f8, WR_1
|RD_C0
|LCD
, 0, 0, IVIRT
, 0 },
1305 {"mfc1", "t,S", 0x44000000, 0xffe007ff, WR_1
|RD_2
|LCD
|FP_S
, 0, I1
, 0, 0 },
1306 {"mfc1", "t,G", 0x44000000, 0xffe007ff, WR_1
|RD_2
|LCD
|FP_S
, 0, I1
, 0, 0 },
1307 {"mfhc1", "t,S", 0x44600000, 0xffe007ff, WR_1
|RD_2
|LCD
|FP_D
, 0, I33
, 0, 0 },
1308 {"mfhc1", "t,G", 0x44600000, 0xffe007ff, WR_1
|RD_2
|LCD
|FP_D
, 0, I33
, 0, 0 },
1309 /* mfc2 is at the bottom of the table. */
1310 /* mfhc2 is at the bottom of the table. */
1311 /* mfc3 is at the bottom of the table. */
1312 {"mfdr", "t,G", 0x7000003d, 0xffe007ff, WR_1
|RD_C0
|LCD
, 0, N5
, 0, 0 },
1313 {"mfhi", "d", 0x00000010, 0xffff07ff, WR_1
|RD_HI
, 0, I1
, 0, 0 },
1314 {"mfhi", "d,9", 0x00000010, 0xff9f07ff, WR_1
|RD_HI
, 0, 0, D32
, 0 },
1315 {"mfhi1", "d", 0x70000010, 0xffff07ff, WR_1
|RD_HI
, 0, EE
, 0, 0 },
1316 {"mflo", "d", 0x00000012, 0xffff07ff, WR_1
|RD_LO
, 0, I1
, 0, 0 },
1317 {"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_1
|RD_LO
, 0, 0, D32
, 0 },
1318 {"mflo1", "d", 0x70000012, 0xffff07ff, WR_1
|RD_LO
, 0, EE
, 0, 0 },
1319 {"mflhxu", "d", 0x00000052, 0xffff07ff, WR_1
|MOD_HILO
, 0, 0, SMT
, 0 },
1320 {"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_1
|RD_2
, 0, XLR
, 0, 0 },
1321 {"mfsa", "d", 0x00000028, 0xffff07ff, WR_1
, 0, EE
, 0, 0 },
1322 {"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1323 {"min.ob", "D,S,Q", 0x48000006, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1324 {"min.qh", "X,Y,Q", 0x78200006, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1325 {"min.s", "D,S,T", 0x46000029, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, EE
, 0, 0 },
1326 {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I1
, 0, SF
},
1327 {"mov.s", "D,S", 0x46000006, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
1328 {"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
1329 {"mov.ps", "D,S", 0x45600006, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2E
, 0, 0 },
1330 {"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_1
|RD_2
|RD_CC
|FP_S
|FP_D
, 0, I4_32
, 0, 0 },
1331 {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I4_32
, 0, 0 },
1332 {"movf.l", "D,S,N", 0x46a00011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, SB1
, MX
, 0 },
1333 {"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, SB1
, MX
, 0 },
1334 {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_S
, 0, I4_32
, 0, 0 },
1335 {"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I5_33
, 0, 0 },
1336 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I4_32
|IL2E
|IL2F
|EE
, 0, 0 },
1337 {"movnz", "d,v,t", 0x0000000b, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
|IL2F
|IL3A
, 0, 0 },
1338 {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_1
|RD_2
, 0, L1
, 0, 0 },
1339 {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I4_32
, 0, 0 },
1340 {"movn.l", "D,S,t", 0x46a00013, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1341 {"movn.l", "X,Y,t", 0x46a00013, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1342 {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, I4_32
, 0, 0 },
1343 {"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
, 0, 0 },
1344 {"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_1
|RD_2
|RD_CC
|FP_S
|FP_D
, 0, I4_32
, 0, 0 },
1345 {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I4_32
, 0, 0 },
1346 {"movt.l", "D,S,N", 0x46a10011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, SB1
, MX
, 0 },
1347 {"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, SB1
, MX
, 0 },
1348 {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_S
, 0, I4_32
, 0, 0 },
1349 {"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I5_33
, 0, 0 },
1350 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I4_32
|IL2E
|IL2F
|EE
, 0, 0 },
1351 {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_1
|RD_2
, 0, L1
, 0, 0 },
1352 {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I4_32
, 0, 0 },
1353 {"movz.l", "D,S,t", 0x46a00012, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1354 {"movz.l", "X,Y,t", 0x46a00012, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1355 {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, I4_32
, 0, 0 },
1356 {"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
, 0, 0 },
1357 {"msac", "d,s,t", 0x000001d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1358 {"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1359 {"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1360 {"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1361 /* move is at the top of the table. */
1362 {"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1363 {"msgsnd", "t", 0, (int) M_MSGSND
, INSN_MACRO
, 0, XLR
, 0, 0 },
1364 {"msgld", "", 0, (int) M_MSGLD
, INSN_MACRO
, 0, XLR
, 0, 0 },
1365 {"msgld", "t", 0, (int) M_MSGLD_T
, INSN_MACRO
, 0, XLR
, 0, 0 },
1366 {"msgwait", "", 0, (int) M_MSGWAIT
, INSN_MACRO
, 0, XLR
, 0, 0 },
1367 {"msgwait", "t", 0, (int) M_MSGWAIT_T
,INSN_MACRO
, 0, XLR
, 0, 0 },
1368 {"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I4_33
, 0, 0 },
1369 {"msub.d", "D,S,T", 0x46200019, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1370 {"msub.d", "D,S,T", 0x72200019, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1371 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I4_33
, 0, 0 },
1372 {"msub.s", "D,S,T", 0x46000019, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
1373 {"msub.s", "D,S,T", 0x72000019, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
, 0, 0 },
1374 {"msub.s", "D,S,T", 0x4600001d, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, EE
, 0, 0 },
1375 {"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I5_33
, 0, 0 },
1376 {"msub.ps", "D,S,T", 0x45600019, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1377 {"msub.ps", "D,S,T", 0x72c00019, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1378 {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, L1
, 0, 0 },
1379 {"msub", "s,t", 0x70000004, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I32
|N55
, 0, 0 },
1380 {"msub", "7,s,t", 0x70000004, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1381 {"msuba.s", "S,T", 0x4600001f, 0xffe007ff, RD_1
|RD_2
|FP_S
, 0, EE
, 0, 0 },
1382 {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, L1
, 0, 0 },
1383 {"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I32
|N55
, 0, 0 },
1384 {"msubu", "7,s,t", 0x70000005, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1385 {"mtbpc", "t", 0x4080c000, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1386 {"mtdab", "t", 0x4080c004, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1387 {"mtdabm", "t", 0x4080c005, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1388 {"mtdvb", "t", 0x4080c006, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1389 {"mtdvbm", "t", 0x4080c007, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1390 {"mtiab", "t", 0x4080c002, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1391 {"mtiabm", "t", 0x4080c003, 0xffe0ffff, RD_1
|WR_C0
|COD
, 0, EE
, 0, 0 },
1392 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, RD_1
|WR_C0
|COD
, 0, M1
|N5
|EE
, 0, 0 },
1393 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, RD_1
|WR_C0
|COD
, 0, M1
|N5
|EE
, 0, 0 },
1394 {"mtc0", "t,G", 0x40800000, 0xffe007ff, RD_1
|WR_C0
|WR_CC
|COD
, 0, I1
, 0, 0 },
1395 {"mtc0", "t,G,H", 0x40800000, 0xffe007f8, RD_1
|WR_C0
|WR_CC
|COD
, 0, I32
, 0, 0 },
1396 {"mtgc0", "t,G", 0x40600200, 0xffe007ff, RD_1
|WR_C0
|WR_CC
|COD
, 0, 0, IVIRT
, 0 },
1397 {"mtgc0", "t,G,H", 0x40600200, 0xffe007f8, RD_1
|WR_C0
|WR_CC
|COD
, 0, 0, IVIRT
, 0 },
1398 {"mtc1", "t,S", 0x44800000, 0xffe007ff, RD_1
|WR_2
|COD
|FP_S
, 0, I1
, 0, 0 },
1399 {"mtc1", "t,G", 0x44800000, 0xffe007ff, RD_1
|WR_2
|COD
|FP_S
, 0, I1
, 0, 0 },
1400 {"mthc1", "t,S", 0x44e00000, 0xffe007ff, RD_1
|WR_2
|COD
|FP_D
, 0, I33
, 0, 0 },
1401 {"mthc1", "t,G", 0x44e00000, 0xffe007ff, RD_1
|WR_2
|COD
|FP_D
, 0, I33
, 0, 0 },
1402 /* mtc2 is at the bottom of the table. */
1403 /* mthc2 is at the bottom of the table. */
1404 /* mtc3 is at the bottom of the table. */
1405 {"mtdr", "t,G", 0x7080003d, 0xffe007ff, RD_1
|WR_C0
|COD
, 0, N5
, 0, 0 },
1406 {"mthi", "s", 0x00000011, 0xfc1fffff, RD_1
|WR_HI
, 0, I1
, 0, 0 },
1407 {"mthi", "s,7", 0x00000011, 0xfc1fe7ff, RD_1
|WR_HI
, 0, 0, D32
, 0 },
1408 {"mthi1", "s", 0x70000011, 0xfc1fffff, RD_1
|WR_HI
, 0, EE
, 0, 0 },
1409 {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_1
|WR_LO
, 0, I1
, 0, 0 },
1410 {"mtlo", "s,7", 0x00000013, 0xfc1fe7ff, RD_1
|WR_LO
, 0, 0, D32
, 0 },
1411 {"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_1
|WR_LO
, 0, EE
, 0, 0 },
1412 {"mtlhx", "s", 0x00000053, 0xfc1fffff, RD_1
|MOD_HILO
, 0, 0, SMT
, 0 },
1413 {"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_1
|RD_2
, 0, XLR
, 0, 0 },
1414 {"mtm0", "s", 0x70000008, 0xfc1fffff, RD_1
, 0, IOCT
, 0, 0 },
1415 {"mtm1", "s", 0x7000000c, 0xfc1fffff, RD_1
, 0, IOCT
, 0, 0 },
1416 {"mtm2", "s", 0x7000000d, 0xfc1fffff, RD_1
, 0, IOCT
, 0, 0 },
1417 {"mtp0", "s", 0x70000009, 0xfc1fffff, RD_1
, 0, IOCT
, 0, 0 },
1418 {"mtp1", "s", 0x7000000a, 0xfc1fffff, RD_1
, 0, IOCT
, 0, 0 },
1419 {"mtp2", "s", 0x7000000b, 0xfc1fffff, RD_1
, 0, IOCT
, 0, 0 },
1420 {"mtsa", "s", 0x00000029, 0xfc1fffff, RD_1
, 0, EE
, 0, 0 },
1421 {"mtsab", "s,j", 0x04180000, 0xfc1f0000, RD_1
, 0, EE
, 0, 0 },
1422 {"mtsah", "s,j", 0x04190000, 0xfc1f0000, RD_1
, 0, EE
, 0, 0 },
1423 {"mttc0", "t,G", 0x41800000, 0xffe007ff, RD_1
|WR_C0
|WR_CC
|TRAP
|COD
, 0, 0, MT32
, 0 },
1424 {"mttc0", "t,G,H", 0x41800000, 0xffe007f8, RD_1
|WR_C0
|WR_CC
|TRAP
|COD
, 0, 0, MT32
, 0 },
1425 {"mttc1", "t,S", 0x41800022, 0xffe007ff, RD_1
|WR_2
|TRAP
|COD
|FP_S
, 0, 0, MT32
, 0 },
1426 {"mttc1", "t,G", 0x41800022, 0xffe007ff, RD_1
|WR_2
|TRAP
|COD
|FP_S
, 0, 0, MT32
, 0 },
1427 {"mttc2", "t,g", 0x41800024, 0xffe007ff, RD_1
|WR_C2
|WR_CC
|TRAP
|COD
, 0, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
1428 {"mttacx", "t", 0x41801021, 0xffe0ffff, RD_1
|WR_a
|TRAP
, 0, 0, MT32
, 0 },
1429 {"mttacx", "t,&", 0x41801021, 0xffe09fff, RD_1
|WR_a
|TRAP
, 0, 0, MT32
, 0 },
1430 {"mttdsp", "t", 0x41808021, 0xffe0ffff, RD_1
|TRAP
, 0, 0, MT32
, 0 },
1431 {"mttgpr", "t,d", 0x41800020, 0xffe007ff, RD_1
|WR_2
|TRAP
, 0, 0, MT32
, 0 },
1432 {"mtthc1", "t,S", 0x41800032, 0xffe007ff, RD_1
|WR_2
|TRAP
|COD
|FP_D
, 0, 0, MT32
, 0 },
1433 {"mtthc1", "t,G", 0x41800032, 0xffe007ff, RD_1
|WR_2
|TRAP
|COD
|FP_D
, 0, 0, MT32
, 0 },
1434 {"mtthc2", "t,g", 0x41800034, 0xffe007ff, RD_1
|WR_C2
|WR_CC
|TRAP
|COD
, 0, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
1435 {"mtthi", "t", 0x41800821, 0xffe0ffff, RD_1
|WR_a
|TRAP
, 0, 0, MT32
, 0 },
1436 {"mtthi", "t,&", 0x41800821, 0xffe09fff, RD_1
|WR_a
|TRAP
, 0, 0, MT32
, 0 },
1437 {"mttlo", "t", 0x41800021, 0xffe0ffff, RD_1
|WR_a
|TRAP
, 0, 0, MT32
, 0 },
1438 {"mttlo", "t,&", 0x41800021, 0xffe09fff, RD_1
|WR_a
|TRAP
, 0, 0, MT32
, 0 },
1439 {"mttr", "t,d,!,H,$", 0x41800000, 0xffe007c8, RD_1
|TRAP
, 0, 0, MT32
, 0 },
1440 {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, SF
},
1441 {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
1442 {"mul.ob", "X,Y,Q", 0x78000030, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1443 {"mul.ob", "D,S,Q", 0x48000030, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1444 {"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
1445 {"mul.ps", "D,V,T", 0x45600002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1446 {"mul.qh", "X,Y,Q", 0x78200030, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1447 {"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, I32
|P3
|N55
, 0, 0},
1448 {"mul", "d,s,t", 0x00000058, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N54
, 0, 0 },
1449 {"mul", "d,v,t", 0, (int) M_MUL
, INSN_MACRO
, 0, I1
, 0, 0 },
1450 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1451 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1452 {"mula.ob", "S,Q", 0x48000033, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, N54
, 0, 0 },
1453 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1454 {"mula.s", "S,T", 0x4600001a, 0xffe007ff, RD_1
|RD_2
|FP_S
, 0, EE
, 0, 0 },
1455 {"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1456 {"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1457 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1458 {"mull.ob", "S,Q", 0x48000433, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, N54
, 0, 0 },
1459 {"mull.qh", "Y,Q", 0x78200433, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1460 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, 0, I1
, 0, 0 },
1461 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1462 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, 0, I1
, 0, 0 },
1463 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1464 {"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, M3D
, 0 },
1465 {"muls", "d,s,t", 0x000000d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1466 {"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1467 {"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1468 {"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1469 {"muls.ob", "Y,Q", 0x78000032, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1470 {"muls.ob", "S,Q", 0x48000032, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, N54
, 0, 0 },
1471 {"muls.qh", "Y,Q", 0x78200032, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1472 {"mulsl.ob", "Y,Q", 0x78000432, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1473 {"mulsl.ob", "S,Q", 0x48000432, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, N54
, 0, 0 },
1474 {"mulsl.qh", "Y,Q", 0x78200432, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1475 {"mult", "s,t", 0x00000018, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, I1
, 0, 0 },
1476 {"mult", "7,s,t", 0x00000018, 0xfc00e7ff, RD_2
|RD_3
|WR_a
, 0, 0, D32
, 0 },
1477 {"mult", "d,s,t", 0x00000018, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, G1
, 0, 0 },
1478 {"mult1", "s,t", 0x70000018, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1479 {"mult1", "d,s,t", 0x70000018, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1480 {"multp", "s,t", 0x00000459, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, 0, SMT
, 0 },
1481 {"multu", "s,t", 0x00000019, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, I1
, 0, 0 },
1482 {"multu", "7,s,t", 0x00000019, 0xfc00e7ff, RD_2
|RD_3
|WR_a
, 0, 0, D32
, 0 },
1483 {"multu", "d,s,t", 0x00000019, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, G1
, 0, 0 },
1484 {"multu1", "s,t", 0x70000019, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1485 {"multu1", "d,s,t", 0x70000019, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
|IS_M
, 0, EE
, 0, 0 },
1486 {"mulu", "d,s,t", 0x00000059, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, N5
, 0, 0 },
1487 {"neg", "d,w", 0x00000022, 0xffe007ff, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* sub 0 */
1488 {"negu", "d,w", 0x00000023, 0xffe007ff, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* subu 0 */
1489 {"neg.d", "D,V", 0x46200007, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I1
, 0, SF
},
1490 {"neg.s", "D,V", 0x46000007, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
1491 {"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
1492 {"neg.ps", "D,V", 0x45600007, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2E
, 0, 0 },
1493 {"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I4_33
, 0, 0 },
1494 {"nmadd.d", "D,S,T", 0x4620001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1495 {"nmadd.d", "D,S,T", 0x7220001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1496 {"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I4_33
, 0, 0 },
1497 {"nmadd.s", "D,S,T", 0x4600001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
1498 {"nmadd.s", "D,S,T", 0x7200001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
, 0, 0 },
1499 {"nmadd.ps", "D,R,S,T", 0x4c000036, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I5_33
, 0, 0 },
1500 {"nmadd.ps", "D,S,T", 0x4560001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1501 {"nmadd.ps", "D,S,T", 0x72c0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1502 {"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I4_33
, 0, 0 },
1503 {"nmsub.d", "D,S,T", 0x4620001b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1504 {"nmsub.d", "D,S,T", 0x7220001b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1505 {"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I4_33
, 0, 0 },
1506 {"nmsub.s", "D,S,T", 0x4600001b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
1507 {"nmsub.s", "D,S,T", 0x7200001b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
, 0, 0 },
1508 {"nmsub.ps", "D,R,S,T", 0x4c00003e, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I5_33
, 0, 0 },
1509 {"nmsub.ps", "D,S,T", 0x4560001b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1510 {"nmsub.ps", "D,S,T", 0x72c0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
, 0, 0 },
1511 /* nop is at the start of the table. */
1512 {"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1513 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1514 {"nor", "D,S,T", 0x47a00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1515 {"nor", "D,S,T", 0x4ba00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1516 {"nor.ob", "X,Y,Q", 0x7800000f, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1517 {"nor.ob", "D,S,Q", 0x4800000f, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1518 {"nor.qh", "X,Y,Q", 0x7820000f, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1519 {"not", "d,v", 0x00000027, 0xfc1f07ff, WR_1
|RD_2
, 0, I1
, 0, 0 },/*nor d,s,0*/
1520 {"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1521 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1522 {"or", "D,S,T", 0x45a00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1523 {"or", "D,S,T", 0x4b20000c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1524 {"or.ob", "X,Y,Q", 0x7800000e, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1525 {"or.ob", "D,S,Q", 0x4800000e, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1526 {"or.qh", "X,Y,Q", 0x7820000e, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1527 {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1528 {"pabsdiff.ob", "X,Y,Q", 0x78000009, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, 0, 0 },
1529 {"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, 0, 0 },
1530 {"pause", "", 0x00000140, 0xffffffff, TRAP
, 0, I33
, 0, 0 },
1531 {"pavg.ob", "X,Y,Q", 0x78000008, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, 0, 0 },
1532 {"pabsh", "d,t", 0x70000168, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1533 {"pabsw", "d,t", 0x70000068, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1534 {"paddsw", "d,s,t", 0x70000408, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1535 {"paddub", "d,s,t", 0x70000628, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1536 {"padduh", "d,s,t", 0x70000528, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1537 {"padduw", "d,s,t", 0x70000428, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1538 {"padsbh", "d,s,t", 0x70000128, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1539 {"pand", "d,s,t", 0x70000489, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1540 {"pceqb", "d,s,t", 0x700002a8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1541 {"pceqh", "d,s,t", 0x700001a8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1542 {"pceqw", "d,s,t", 0x700000a8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1543 {"pcgtb", "d,s,t", 0x70000288, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1544 {"pcgth", "d,s,t", 0x70000188, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1545 {"pcgtw", "d,s,t", 0x70000088, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1546 {"pcpyh", "d,t", 0x700006e9, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1547 {"pcpyld", "d,s,t", 0x70000389, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1548 {"pcpyud", "d,s,t", 0x700003a9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1549 {"pdivbw", "s,t", 0x70000749, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, MMI
, 0, 0 },
1550 {"pdivuw", "s,t", 0x70000369, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, MMI
, 0, 0 },
1551 {"pdivw", "s,t", 0x70000349, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, MMI
, 0, 0 },
1552 {"pexch", "d,t", 0x700006a9, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1553 {"pexcw", "d,t", 0x700007a9, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1554 {"pexeh", "d,t", 0x70000689, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1555 {"pexew", "d,t", 0x70000789, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1556 {"pext5", "d,t", 0x70000788, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1557 {"pextlb", "d,s,t", 0x70000688, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1558 {"pextlh", "d,s,t", 0x70000588, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1559 {"pextlw", "d,s,t", 0x70000488, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1560 {"pextub", "d,s,t", 0x700006a8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1561 {"pextuh", "d,s,t", 0x700005a8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1562 {"pextuw", "d,s,t", 0x700004a8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1563 {"phmadh", "d,s,t", 0x70000449, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, MMI
, 0, 0 },
1564 {"phmsbh", "d,s,t", 0x70000549, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, MMI
, 0, 0 },
1565 {"pickf.ob", "X,Y,Q", 0x78000002, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1566 {"pickf.ob", "D,S,Q", 0x48000002, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1567 {"pickf.qh", "X,Y,Q", 0x78200002, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1568 {"pickt.ob", "X,Y,Q", 0x78000003, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1569 {"pickt.ob", "D,S,Q", 0x48000003, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1570 {"pickt.qh", "X,Y,Q", 0x78200003, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1571 {"pinteh", "d,s,t", 0x700002a9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1572 {"pinth", "d,s,t", 0x70000289, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1573 {"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
, 0, 0 },
1574 {"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
, 0, 0 },
1575 {"plzcw", "d,s", 0x70000004, 0xfc1f07ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1576 {"pmaddh", "d,s,t", 0x70000409, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, MMI
, 0, 0 },
1577 {"pmadduw", "d,s,t", 0x70000029, 0xfc0007ff, WR_1
|RD_2
|RD_3
|MOD_HILO
, 0, MMI
, 0, 0 },
1578 {"pmaddw", "d,s,t", 0x70000009, 0xfc0007ff, WR_1
|RD_2
|RD_3
|MOD_HILO
, 0, MMI
, 0, 0 },
1579 {"pmaxh", "d,s,t", 0x700001c8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1580 {"pmaxw", "d,s,t", 0x700000c8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1581 {"pmfhi", "d", 0x70000209, 0xffff07ff, WR_1
|RD_HI
, 0, MMI
, 0, 0 },
1582 {"pmfhl.lh", "d", 0x700000f0, 0xffff07ff, WR_1
|RD_HILO
, 0, MMI
, 0, 0 },
1583 {"pmfhl.lw", "d", 0x70000030, 0xffff07ff, WR_1
|RD_HILO
, 0, MMI
, 0, 0 },
1584 {"pmfhl.sh", "d", 0x70000130, 0xffff07ff, WR_1
|RD_HILO
, 0, MMI
, 0, 0 },
1585 {"pmfhl.slw", "d", 0x700000b0, 0xffff07ff, WR_1
|RD_HILO
, 0, MMI
, 0, 0 },
1586 {"pmfhl.uw", "d", 0x70000070, 0xffff07ff, WR_1
|RD_HILO
, 0, MMI
, 0, 0 },
1587 {"pmflo", "d", 0x70000249, 0xffff07ff, WR_1
|RD_LO
, 0, MMI
, 0, 0 },
1588 {"pminh", "d,s,t", 0x700001e8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1589 {"pminw", "d,s,t", 0x700000e8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1590 {"pmsubh", "d,s,t", 0x70000509, 0xfc0007ff, WR_1
|RD_2
|RD_3
|MOD_HILO
, 0, MMI
, 0, 0 },
1591 {"pmsubw", "d,s,t", 0x70000109, 0xfc0007ff, WR_1
|RD_2
|RD_3
|MOD_HILO
, 0, MMI
, 0, 0 },
1592 {"pmthi", "s", 0x70000229, 0xfc1fffff, RD_1
|WR_HI
, 0, MMI
, 0, 0 },
1593 {"pmthl.lw", "s", 0x70000031, 0xfc1fffff, RD_1
|MOD_HILO
, 0, MMI
, 0, 0 },
1594 {"pmtlo", "s", 0x70000269, 0xfc1fffff, RD_1
|WR_LO
, 0, MMI
, 0, 0 },
1595 {"pmulth", "d,s,t", 0x70000709, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, MMI
, 0, 0 },
1596 {"pmultuw", "d,s,t", 0x70000329, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, MMI
, 0, 0 },
1597 {"pmultw", "d,s,t", 0x70000309, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, MMI
, 0, 0 },
1598 {"pnor", "d,s,t", 0x700004e9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1599 {"pop", "d,v", 0x7000002c, 0xfc1f07ff, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
1600 {"por", "d,s,t", 0x700004a9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1601 {"ppac5", "d,t", 0x700007c8, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1602 {"ppacb", "d,s,t", 0x700006c8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1603 {"ppach", "d,s,t", 0x700005c8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1604 {"ppacw", "d,s,t", 0x700004c8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1605 {"prevh", "d,t", 0x700006c9, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1606 {"prot3w", "d,t", 0x700007c9, 0xffe007ff, WR_1
|RD_2
, 0, MMI
, 0, 0 },
1607 {"psllvw", "d,t,s", 0x70000089, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1608 {"psravw", "d,t,s", 0x700000e9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1609 {"psrlvw", "d,t,s", 0x700000c9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1610 {"psubsw", "d,s,t", 0x70000448, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1611 {"psubub", "d,s,t", 0x70000668, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1612 {"psubuh", "d,s,t", 0x70000568, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1613 {"psubuw", "d,s,t", 0x70000468, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1614 {"pxor", "d,s,t", 0x700004c9, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1615 /* pref and prefx are at the start of the table. */
1616 {"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
, 0, 0 },
1617 {"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
, 0, 0 },
1618 {"pperm", "s,t", 0x70000481, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, 0, SMT
, 0 },
1619 {"qfsrv", "d,s,t", 0x700006e8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
1620 {"qmac.00", "s,t", 0x70000412, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1621 {"qmac.01", "s,t", 0x70000452, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1622 {"qmac.02", "s,t", 0x70000492, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1623 {"qmac.03", "s,t", 0x700004d2, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1624 {"qmacs.00", "s,t", 0x70000012, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1625 {"qmacs.01", "s,t", 0x70000052, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1626 {"qmacs.02", "s,t", 0x70000092, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1627 {"qmacs.03", "s,t", 0x700000d2, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, IOCT2
, 0, 0 },
1628 {"rach.ob", "X", 0x7a00003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, SB1
, MX
, 0 },
1629 {"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, N54
, 0, 0 },
1630 {"rach.qh", "X", 0x7a20003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, 0, MX
, 0 },
1631 {"racl.ob", "X", 0x7800003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, SB1
, MX
, 0 },
1632 {"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, N54
, 0, 0 },
1633 {"racl.qh", "X", 0x7820003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, 0, MX
, 0 },
1634 {"racm.ob", "X", 0x7900003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, SB1
, MX
, 0 },
1635 {"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, N54
, 0, 0 },
1636 {"racm.qh", "X", 0x7920003f, 0xfffff83f, WR_1
|FP_D
, RD_MACC
, 0, MX
, 0 },
1637 {"recip.d", "D,S", 0x46200015, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I4_33
, 0, 0 },
1638 {"recip.ps", "D,S", 0x46c00015, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, SB1
, 0, 0 },
1639 {"recip.s", "D,S", 0x46000015, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I4_33
, 0, 0 },
1640 {"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, 0, M3D
, 0 },
1641 {"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, 0, M3D
, 0 },
1642 {"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, 0, M3D
, 0 },
1643 {"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, M3D
, 0 },
1644 {"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, 0, M3D
, 0 },
1645 {"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, 0, M3D
, 0 },
1646 {"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
1647 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, 0, I1
, 0, 0 },
1648 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
1649 {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
1650 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, 0, I1
, 0, 0 },
1651 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
1652 {"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_1
, 0, I33
, 0, 0 },
1653 {"rdpgpr", "d,w", 0x41400000, 0xffe007ff, WR_1
, 0, I33
, 0, 0 },
1654 /* rfe is moved below as it now conflicts with tlbgp */
1655 {"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, 0, MX
, 0 },
1656 {"rnau.ob", "X,Q", 0x78000021, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, SB1
, MX
, 0 },
1657 {"rnau.qh", "X,Q", 0x78200021, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, 0, MX
, 0 },
1658 {"rnes.qh", "X,Q", 0x78200026, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, 0, MX
, 0 },
1659 {"rneu.ob", "X,Q", 0x78000022, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, SB1
, MX
, 0 },
1660 {"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, 0, MX
, 0 },
1661 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
, 0, 0 },
1662 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1663 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
, 0, 0 },
1664 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1665 {"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_1
|RD_2
, 0, N5
|I33
, SMT
, 0 },
1666 {"rorv", "d,t,s", 0x00000046, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, N5
|I33
, SMT
, 0 },
1667 {"rotl", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I33
, SMT
, 0 },
1668 {"rotl", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I33
, SMT
, 0 },
1669 {"rotr", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I33
, SMT
, 0 },
1670 {"rotr", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I33
, SMT
, 0 },
1671 {"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I33
, SMT
, 0 },
1672 {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I3_33
, 0, 0 },
1673 {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I3_33
, 0, 0 },
1674 {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I2
, 0, SF
},
1675 {"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I2
, 0, 0 },
1676 {"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I4_33
, 0, 0 },
1677 {"rsqrt.ps", "D,S", 0x46c00016, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, SB1
, 0, 0 },
1678 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I4_33
, 0, 0 },
1679 {"rsqrt.s", "D,S,T", 0x46000016, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, EE
, 0, 0 },
1680 {"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, 0, M3D
, 0 },
1681 {"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, 0, M3D
, 0 },
1682 {"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, 0, M3D
, 0 },
1683 {"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, M3D
, 0 },
1684 {"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, 0, M3D
, 0 },
1685 {"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, 0, M3D
, 0 },
1686 {"rzs.qh", "X,Q", 0x78200024, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, 0, MX
, 0 },
1687 {"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, SB1
, MX
, 0 },
1688 {"rzu.ob", "D,Q", 0x48000020, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, N54
, 0, 0 },
1689 {"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_1
|RD_2
|FP_D
, RD_MACC
, 0, MX
, 0 },
1690 {"saa", "t,A(b)", 0, (int) M_SAA_AB
, INSN_MACRO
, 0, IOCTP
, 0, 0 },
1691 {"saa", "t,(b)", 0x70000018, 0xfc00ffff, RD_1
|RD_2
|SM
, 0, IOCTP
, 0, 0 },
1692 {"saad", "t,A(b)", 0, (int) M_SAAD_AB
, INSN_MACRO
, 0, IOCTP
, 0, 0 },
1693 {"saad", "t,(b)", 0x70000019, 0xfc00ffff, RD_1
|RD_2
|SM
, 0, IOCTP
, 0, 0 },
1694 {"sb", "t,o(b)", 0xa0000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1695 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1696 {"sc", "t,o(b)", 0xe0000000, 0xfc000000, MOD_1
|RD_3
|SM
, 0, I2
, 0, EE
},
1697 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, 0, I2
, 0, EE
},
1698 {"scd", "t,o(b)", 0xf0000000, 0xfc000000, MOD_1
|RD_3
|SM
, 0, I3
, 0, EE
},
1699 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, 0, I3
, 0, EE
},
1700 /* The macro has to be first to handle o32 correctly. */
1701 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1702 {"sd", "t,o(b)", 0xfc000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
1703 {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP
, 0, G2
, 0, 0 },
1704 {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP
, 0, G2
, 0, 0 },
1705 {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP
, 0, G2
, 0, 0 },
1706 {"sdbbp", "", 0x7000003f, 0xffffffff, TRAP
, 0, I32
, 0, 0 },
1707 {"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP
, 0, I32
, 0, 0 },
1708 {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_D
, 0, I2
, 0, SF
},
1709 {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_D
, 0, I2
, 0, SF
},
1710 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
, 0, SF
},
1711 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
, 0, SF
},
1712 {"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, RD_3
|RD_C2
|SM
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1713 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1714 {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, RD_3
|RD_C3
|SM
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1715 {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB
, INSN_MACRO
, 0, I2
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1716 {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_D
, 0, I2
, 0, SF
},
1717 {"s.d", "T,A(b)", 0, (int) M_S_DAB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
1718 {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
1719 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1720 {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
1721 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1722 {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
|FP_D
, 0, I4_33
, 0, 0 },
1723 {"seb", "d,w", 0x7c000420, 0xffe007ff, WR_1
|RD_2
, 0, I33
, 0, 0 },
1724 {"seh", "d,w", 0x7c000620, 0xffe007ff, WR_1
|RD_2
, 0, I33
, 0, 0 },
1725 {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, L1
, 0, 0 },
1726 {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, L1
, 0, 0 },
1727 {"seq", "d,v,t", 0x7000002a, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IOCT
, 0, 0 },
1728 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, 0, I1
, 0, 0 },
1729 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1730 {"seq", "S,T", 0x46a00032, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
1731 {"seq", "S,T", 0x4ba0000c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1732 {"seqi", "t,r,+Q", 0x7000002e, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
1733 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, 0, I1
, 0, 0 },
1734 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1735 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, 0, I1
, 0, 0 },
1736 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1737 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, 0, I1
, 0, 0 },
1738 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1739 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, 0, I1
, 0, 0 },
1740 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1741 {"sh", "t,o(b)", 0xa4000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1742 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1743 {"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1744 {"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1745 {"shfl.mixh.ob", "D,S,T", 0x4980001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1746 {"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1747 {"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1748 {"shfl.mixl.ob", "D,S,T", 0x49c0001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1749 {"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1750 {"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1751 {"shfl.pach.ob", "D,S,T", 0x4900001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1752 {"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1753 {"shfl.pacl.ob", "D,S,T", 0x4940001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1754 {"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1755 {"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1756 {"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1757 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, 0, I1
, 0, 0 },
1758 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1759 {"sle", "S,T", 0x46a0003e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
1760 {"sle", "S,T", 0x4ba0000e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1761 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, 0, I1
, 0, 0 },
1762 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1763 {"sleu", "S,T", 0x4680003e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
1764 {"sleu", "S,T", 0x4b80000e, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1765 {"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1766 {"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 }, /* sllv */
1767 {"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_1
|RD_2
, 0, I1
, 0, 0 },
1768 {"sll", "D,S,T", 0x45800002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1769 {"sll", "D,S,T", 0x4b00000e, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1770 {"sll.ob", "X,Y,Q", 0x78000010, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1771 {"sll.ob", "D,S,Q", 0x48000010, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1772 {"sll.qh", "X,Y,Q", 0x78200010, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1773 {"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1774 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1775 {"slt", "S,T", 0x46a0003c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
1776 {"slt", "S,T", 0x4ba0000d, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1777 {"slti", "t,r,j", 0x28000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1778 {"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1779 {"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1780 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1781 {"sltu", "S,T", 0x4680003c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
1782 {"sltu", "S,T", 0x4b80000d, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1783 {"sne", "d,v,t", 0x7000002b, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IOCT
, 0, 0 },
1784 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, 0, I1
, 0, 0 },
1785 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1786 {"snei", "t,r,+Q", 0x7000002f, 0xfc00003f, WR_1
|RD_2
, 0, IOCT
, 0, 0 },
1787 {"sq", "t,o(b)", 0x7c000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, MMI
, 0, 0 },
1788 {"sq", "t,A(b)", 0, (int) M_SQ_AB
, INSN_MACRO
, 0, MMI
, 0, 0 },
1789 {"sqc2", "+7,o(b)", 0xf8000000, 0xfc000000, RD_3
|RD_C2
|SM
, 0, EE
, 0, 0 },
1790 {"sqc2", "+7,A(b)", 0, (int) M_SQC2_AB
, INSN_MACRO
, 0, EE
, 0, 0 },
1791 {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I2
, 0, SF
},
1792 {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I2
, 0, 0 },
1793 {"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, SB1
, 0, 0 },
1794 {"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1795 {"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 }, /* srav */
1796 {"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_1
|RD_2
, 0, I1
, 0, 0 },
1797 {"sra", "D,S,T", 0x45c00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1798 {"sra", "D,S,T", 0x4b40000f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1799 {"sra.qh", "X,Y,Q", 0x78200013, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1800 {"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1801 {"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 }, /* srlv */
1802 {"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_1
|RD_2
, 0, I1
, 0, 0 },
1803 {"srl", "D,S,T", 0x45800003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1804 {"srl", "D,S,T", 0x4b00000f, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1805 {"srl.ob", "X,Y,Q", 0x78000012, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1806 {"srl.ob", "D,S,Q", 0x48000012, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1807 {"srl.qh", "X,Y,Q", 0x78200012, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1808 /* ssnop is at the start of the table. */
1809 {"standby", "", 0x42000021, 0xffffffff, 0, 0, V1
, 0, 0 },
1810 {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1811 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1812 {"sub", "D,S,T", 0x45c00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
1813 {"sub", "D,S,T", 0x4b40000d, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
|IL3A
, 0, 0 },
1814 {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, SF
},
1815 {"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
1816 {"sub.ob", "X,Y,Q", 0x7800000a, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1817 {"sub.ob", "D,S,Q", 0x4800000a, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1818 {"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, I5_33
|IL2F
, 0, 0 },
1819 {"sub.ps", "D,V,T", 0x45600001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1820 {"sub.qh", "X,Y,Q", 0x7820000a, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1821 {"suba.ob", "Y,Q", 0x78000036, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1822 {"suba.qh", "Y,Q", 0x78200036, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1823 {"subl.ob", "Y,Q", 0x78000436, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1824 {"subl.qh", "Y,Q", 0x78200436, 0xfc2007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1825 {"suba.s", "S,T", 0x46000019, 0xffe007ff, RD_1
|RD_2
|FP_S
, 0, EE
, 0, 0 },
1826 {"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1827 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1828 {"subu", "D,S,T", 0x45800001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2E
, 0, 0 },
1829 {"subu", "D,S,T", 0x4b00000d, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_S
, 0, IL2F
|IL3A
, 0, 0 },
1830 {"suspend", "", 0x42000022, 0xffffffff, 0, 0, V1
, 0, 0 },
1831 {"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
|FP_D
, 0, I5_33
|N55
, 0, 0},
1832 {"sw", "t,o(b)", 0xac000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1833 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1834 {"swapw", "t,b", 0x70000014, 0xfc00ffff, MOD_1
|RD_2
|LM
|SM
, 0, XLR
, 0, 0 },
1835 {"swapwu", "t,b", 0x70000015, 0xfc00ffff, MOD_1
|RD_2
|LM
|SM
, 0, XLR
, 0, 0 },
1836 {"swapd", "t,b", 0x70000016, 0xfc00ffff, MOD_1
|RD_2
|LM
|SM
, 0, XLR
, 0, 0 },
1837 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_3
|RD_C0
|SM
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
1838 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
1839 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 },
1840 {"swc1", "E,o(b)", 0xe4000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 },
1841 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1842 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1843 {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 }, /* swc1 */
1844 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1845 {"swc2", "E,o(b)", 0xe8000000, 0xfc000000, RD_3
|RD_C2
|SM
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1846 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1847 {"swc3", "E,o(b)", 0xec000000, 0xfc000000, RD_3
|RD_C3
|SM
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1848 {"swc3", "E,A(b)", 0, (int) M_SWC3_AB
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
1849 {"swl", "t,o(b)", 0xa8000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1850 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1851 {"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_1
|RD_3
, 0, I2
, 0, 0 }, /* same */
1852 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I2
, 0, 0 }, /* as swl */
1853 {"swr", "t,o(b)", 0xb8000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1854 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1855 {"invalidate", "t,o(b)", 0xb8000000, 0xfc000000, RD_1
|RD_3
, 0, I2
, 0, 0 }, /* same */
1856 {"invalidate", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I2
, 0, 0 }, /* as swr */
1857 {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
|FP_S
, 0, I4_33
, 0, 0 },
1858 {"synciobdma", "", 0x0000008f, 0xffffffff, NODS
, 0, IOCT
, 0, 0 },
1859 {"syncs", "", 0x0000018f, 0xffffffff, NODS
, 0, IOCT
, 0, 0 },
1860 {"syncw", "", 0x0000010f, 0xffffffff, NODS
, 0, IOCT
, 0, 0 },
1861 {"syncws", "", 0x0000014f, 0xffffffff, NODS
, 0, IOCT
, 0, 0 },
1862 {"sync_acquire", "", 0x0000044f, 0xffffffff, NODS
, 0, I33
, 0, 0 },
1863 {"sync_mb", "", 0x0000040f, 0xffffffff, NODS
, 0, I33
, 0, 0 },
1864 {"sync_release", "", 0x0000048f, 0xffffffff, NODS
, 0, I33
, 0, 0 },
1865 {"sync_rmb", "", 0x000004cf, 0xffffffff, NODS
, 0, I33
, 0, 0 },
1866 {"sync_wmb", "", 0x0000010f, 0xffffffff, NODS
, 0, I33
, 0, 0 },
1867 {"sync", "", 0x0000000f, 0xffffffff, NODS
, 0, I2
|G1
, 0, 0 },
1868 {"sync", "1", 0x0000000f, 0xfffff83f, NODS
, 0, I32
, 0, 0 },
1869 {"sync.p", "", 0x0000040f, 0xffffffff, NODS
, 0, I2
, 0, 0 },
1870 {"sync.l", "", 0x0000000f, 0xffffffff, NODS
, 0, I2
, 0, 0 },
1871 {"synci", "o(b)", 0x041f0000, 0xfc1f0000, RD_2
|SM
, 0, I33
, 0, 0 },
1872 {"syscall", "", 0x0000000c, 0xffffffff, TRAP
, 0, I1
, 0, 0 },
1873 {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP
, 0, I1
, 0, 0 },
1874 {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 },
1875 {"teq", "s,t", 0x00000034, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1876 {"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1877 {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 }, /* teqi */
1878 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, 0, I2
, 0, 0 },
1879 {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 },
1880 {"tge", "s,t", 0x00000030, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1881 {"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1882 {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 }, /* tgei */
1883 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, 0, I2
, 0, 0 },
1884 {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 },
1885 {"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1886 {"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1887 {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 }, /* tgeiu */
1888 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, 0, I2
, 0, 0 },
1889 {"tlbinv", "", 0x42000003, 0xffffffff, INSN_TLB
, 0, 0, TLBINV
, 0 },
1890 {"tlbinvf", "", 0x42000004, 0xffffffff, INSN_TLB
, 0, 0, TLBINV
, 0 },
1891 {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1892 {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1893 {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1894 {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1895 {"tlbgr", "", 0x42000009, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1896 {"tlbgwi", "", 0x4200000a, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1897 {"tlbginv", "", 0x4200000b, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1898 {"tlbginvf", "", 0x4200000c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1899 {"tlbgwr", "", 0x4200000e, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1900 {"tlbgp", "", 0x42000010, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1901 {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 },
1902 {"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1903 {"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1904 {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 }, /* tlti */
1905 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, 0, I2
, 0, 0 },
1906 {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 },
1907 {"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1908 {"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1909 {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 }, /* tltiu */
1910 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, 0, I2
, 0, 0 },
1911 {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 },
1912 {"tne", "s,t", 0x00000036, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1913 {"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_1
|RD_2
|TRAP
, 0, I2
, 0, 0 },
1914 {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_1
|TRAP
, 0, I2
, 0, 0 }, /* tnei */
1915 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, 0, I2
, 0, 0 },
1916 {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, I3_33
, 0, 0 },
1917 {"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I3_33
, 0, 0 },
1918 {"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I2
, 0, SF
},
1919 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_1
|RD_2
|FP_S
|FP_D
, 0, I2
, 0, SF
},
1920 {"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD
, INSN_MACRO
, INSN2_M_FP_S
|INSN2_M_FP_D
, I1
, 0, SF
},
1921 {"trunc.w.s", "D,S", 0x46000024, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, EE
, 0, 0 },
1922 {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I2
, 0, EE
},
1923 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_1
|RD_2
|FP_S
, 0, I2
, 0, EE
},
1924 {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, EE
},
1925 {"uld", "t,A(b)", 0, (int) M_ULD_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1926 {"ulh", "t,A(b)", 0, (int) M_ULH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1927 {"ulhu", "t,A(b)", 0, (int) M_ULHU_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1928 {"ulw", "t,A(b)", 0, (int) M_ULW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1929 {"usd", "t,A(b)", 0, (int) M_USD_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1930 {"ush", "t,A(b)", 0, (int) M_USH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1931 {"usw", "t,A(b)", 0, (int) M_USW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1932 {"v3mulu", "d,v,t", 0x70000011, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IOCT
, 0, 0 },
1933 {"vmm0", "d,v,t", 0x70000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IOCT
, 0, 0 },
1934 {"vmulu", "d,v,t", 0x7000000f, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IOCT
, 0, 0 },
1935 {"wach.ob", "Y", 0x7a00003e, 0xffff07ff, RD_1
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1936 {"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_1
|FP_D
, WR_MACC
, N54
, 0, 0 },
1937 {"wach.qh", "Y", 0x7a20003e, 0xffff07ff, RD_1
|FP_D
, WR_MACC
, 0, MX
, 0 },
1938 {"wacl.ob", "Y,Z", 0x7800003e, 0xffe007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, SB1
, MX
, 0 },
1939 {"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, N54
, 0, 0 },
1940 {"wacl.qh", "Y,Z", 0x7820003e, 0xffe007ff, RD_1
|RD_2
|FP_D
, WR_MACC
, 0, MX
, 0 },
1941 {"wait", "", 0x42000020, 0xffffffff, NODS
, 0, I3_32
, 0, 0 },
1942 {"wait", "J", 0x42000020, 0xfe00003f, NODS
, 0, I32
|N55
, 0, 0 },
1943 {"waiti", "", 0x42000020, 0xffffffff, NODS
, 0, L1
, 0, 0 },
1944 {"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_2
, 0, I33
, 0, 0 },
1945 {"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_1
|RD_2
, 0, I33
, 0, 0 },
1946 {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1947 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1948 {"xor", "D,S,T", 0x47800002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
1949 {"xor", "D,S,T", 0x4b800002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
1950 {"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, SB1
, MX
, 0 },
1951 {"xor.ob", "D,S,Q", 0x4800000d, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, N54
, 0, 0 },
1952 {"xor.qh", "X,Y,Q", 0x7820000d, 0xfc20003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, 0, MX
, 0 },
1953 {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1954 {"yield", "s", 0x7c000009, 0xfc1fffff, RD_1
|NODS
, 0, 0, MT32
, 0 },
1955 {"yield", "d,s", 0x7c000009, 0xfc1f07ff, WR_1
|RD_2
|NODS
, 0, 0, MT32
, 0 },
1956 {"zcb", "(b)", 0x7000071f, 0xfc1fffff, RD_1
|SM
, 0, IOCT2
, 0, 0 },
1957 {"zcbt", "(b)", 0x7000075f, 0xfc1fffff, RD_1
|SM
, 0, IOCT2
, 0, 0 },
1959 /* User Defined Instruction. */
1960 {"udi0", "s,t,d,+1", 0x70000010, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1961 {"udi0", "s,t,+2", 0x70000010, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1962 {"udi0", "s,+3", 0x70000010, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1963 {"udi0", "+4", 0x70000010, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1964 {"udi1", "s,t,d,+1", 0x70000011, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1965 {"udi1", "s,t,+2", 0x70000011, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1966 {"udi1", "s,+3", 0x70000011, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1967 {"udi1", "+4", 0x70000011, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1968 {"udi2", "s,t,d,+1", 0x70000012, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1969 {"udi2", "s,t,+2", 0x70000012, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1970 {"udi2", "s,+3", 0x70000012, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1971 {"udi2", "+4", 0x70000012, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1972 {"udi3", "s,t,d,+1", 0x70000013, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1973 {"udi3", "s,t,+2", 0x70000013, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1974 {"udi3", "s,+3", 0x70000013, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1975 {"udi3", "+4", 0x70000013, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1976 {"udi4", "s,t,d,+1", 0x70000014, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1977 {"udi4", "s,t,+2", 0x70000014, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1978 {"udi4", "s,+3", 0x70000014, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1979 {"udi4", "+4", 0x70000014, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1980 {"udi5", "s,t,d,+1", 0x70000015, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1981 {"udi5", "s,t,+2", 0x70000015, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1982 {"udi5", "s,+3", 0x70000015, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1983 {"udi5", "+4", 0x70000015, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1984 {"udi6", "s,t,d,+1", 0x70000016, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1985 {"udi6", "s,t,+2", 0x70000016, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1986 {"udi6", "s,+3", 0x70000016, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1987 {"udi6", "+4", 0x70000016, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1988 {"udi7", "s,t,d,+1", 0x70000017, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1989 {"udi7", "s,t,+2", 0x70000017, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1990 {"udi7", "s,+3", 0x70000017, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1991 {"udi7", "+4", 0x70000017, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1992 {"udi8", "s,t,d,+1", 0x70000018, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1993 {"udi8", "s,t,+2", 0x70000018, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1994 {"udi8", "s,+3", 0x70000018, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1995 {"udi8", "+4", 0x70000018, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1996 {"udi9", "s,t,d,+1", 0x70000019, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1997 {"udi9", "s,t,+2", 0x70000019, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1998 {"udi9", "s,+3", 0x70000019, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
1999 {"udi9", "+4", 0x70000019, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2000 {"udi10", "s,t,d,+1", 0x7000001a, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2001 {"udi10", "s,t,+2", 0x7000001a, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2002 {"udi10", "s,+3", 0x7000001a, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2003 {"udi10", "+4", 0x7000001a, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2004 {"udi11", "s,t,d,+1", 0x7000001b, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2005 {"udi11", "s,t,+2", 0x7000001b, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2006 {"udi11", "s,+3", 0x7000001b, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2007 {"udi11", "+4", 0x7000001b, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2008 {"udi12", "s,t,d,+1", 0x7000001c, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2009 {"udi12", "s,t,+2", 0x7000001c, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2010 {"udi12", "s,+3", 0x7000001c, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2011 {"udi12", "+4", 0x7000001c, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2012 {"udi13", "s,t,d,+1", 0x7000001d, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2013 {"udi13", "s,t,+2", 0x7000001d, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2014 {"udi13", "s,+3", 0x7000001d, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2015 {"udi13", "+4", 0x7000001d, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2016 {"udi14", "s,t,d,+1", 0x7000001e, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2017 {"udi14", "s,t,+2", 0x7000001e, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2018 {"udi14", "s,+3", 0x7000001e, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2019 {"udi14", "+4", 0x7000001e, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2020 {"udi15", "s,t,d,+1", 0x7000001f, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2021 {"udi15", "s,t,+2", 0x7000001f, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2022 {"udi15", "s,+3", 0x7000001f, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2023 {"udi15", "+4", 0x7000001f, 0xfc00003f, UDI
, 0, I33
, 0, 0 },
2025 /* Coprocessor 2 move/branch operations overlap with VR5400 .ob format
2026 instructions so they are here for the latters to take precedence. */
2027 {"bc2f", "p", 0x49000000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
2028 {"bc2f", "N,p", 0x49000000, 0xffe30000, RD_CC
|CBD
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
},
2029 {"bc2fl", "p", 0x49020000, 0xffff0000, RD_CC
|CBL
, 0, I2
|T3
, 0, IOCT
|IOCTP
|IOCT2
},
2030 {"bc2fl", "N,p", 0x49020000, 0xffe30000, RD_CC
|CBL
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
},
2031 {"bc2t", "p", 0x49010000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
2032 {"bc2t", "N,p", 0x49010000, 0xffe30000, RD_CC
|CBD
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
},
2033 {"bc2tl", "p", 0x49030000, 0xffff0000, RD_CC
|CBL
, 0, I2
|T3
, 0, IOCT
|IOCTP
|IOCT2
},
2034 {"bc2tl", "N,p", 0x49030000, 0xffe30000, RD_CC
|CBL
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
},
2035 {"cfc2", "t,G", 0x48400000, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2036 {"cfc2", "t,+9", 0x48400000, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, EE
, 0, 0 },
2037 {"cfc2.i", "t,+9", 0x48400001, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, EE
, 0, 0 },
2038 {"cfc2.ni", "t,+9", 0x48400000, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, EE
, 0, 0 },
2039 {"ctc2", "t,G", 0x48c00000, 0xffe007ff, RD_1
|WR_CC
|COD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2040 {"ctc2", "t,+9", 0x48c00000, 0xffe007ff, RD_1
|WR_CC
|COD
, 0, EE
, 0, 0 },
2041 {"ctc2.i", "t,+9", 0x48c00001, 0xffe007ff, RD_1
|WR_CC
|COD
, 0, EE
, 0, 0 },
2042 {"ctc2.ni", "t,+9", 0x48c00000, 0xffe007ff, RD_1
|WR_CC
|COD
, 0, EE
, 0, 0 },
2043 {"dmfc2", "t,i", 0x48200000, 0xffe00000, WR_1
|RD_C2
|LCD
, 0, IOCT
, 0, 0 },
2044 {"dmfc2", "t,G", 0x48200000, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, I3
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2045 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, WR_1
|RD_C2
|LCD
, 0, I64
, 0, IOCT
|IOCTP
|IOCT2
},
2046 {"dmtc2", "t,i", 0x48a00000, 0xffe00000, RD_1
|WR_C2
|WR_CC
|COD
, 0, IOCT
, 0, 0 },
2047 {"dmtc2", "t,G", 0x48a00000, 0xffe007ff, RD_1
|WR_C2
|WR_CC
|COD
, 0, I3
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2048 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, RD_1
|WR_C2
|WR_CC
|COD
, 0, I64
, 0, IOCT
|IOCTP
|IOCT2
},
2049 {"mfc2", "t,G", 0x48000000, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2050 {"mfc2", "t,G,H", 0x48000000, 0xffe007f8, WR_1
|RD_C2
|LCD
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
},
2051 {"mfhc2", "t,G", 0x48600000, 0xffe007ff, WR_1
|RD_C2
|LCD
, 0, I33
, 0, IOCT
|IOCTP
|IOCT2
},
2052 {"mfhc2", "t,G,H", 0x48600000, 0xffe007f8, WR_1
|RD_C2
|LCD
, 0, I33
, 0, IOCT
|IOCTP
|IOCT2
},
2053 {"mfhc2", "t,i", 0x48600000, 0xffe00000, WR_1
|RD_C2
|LCD
, 0, I33
, 0, IOCT
|IOCTP
|IOCT2
},
2054 {"mtc2", "t,G", 0x48800000, 0xffe007ff, RD_1
|WR_C2
|WR_CC
|COD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2055 {"mtc2", "t,G,H", 0x48800000, 0xffe007f8, RD_1
|WR_C2
|WR_CC
|COD
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
},
2056 {"mthc2", "t,G", 0x48e00000, 0xffe007ff, RD_1
|WR_C2
|WR_CC
|COD
, 0, I33
, 0, IOCT
|IOCTP
|IOCT2
},
2057 {"mthc2", "t,G,H", 0x48e00000, 0xffe007f8, RD_1
|WR_C2
|WR_CC
|COD
, 0, I33
, 0, IOCT
|IOCTP
|IOCT2
},
2058 {"mthc2", "t,i", 0x48e00000, 0xffe00000, RD_1
|WR_C2
|WR_CC
|COD
, 0, I33
, 0, IOCT
|IOCTP
|IOCT2
},
2059 {"qmfc2", "t,+6", 0x48200000, 0xffe007ff, WR_1
|RD_C2
, 0, EE
, 0, 0 },
2060 {"qmfc2.i", "t,+6", 0x48200001, 0xffe007ff, WR_1
|RD_C2
, 0, EE
, 0, 0 },
2061 {"qmfc2.ni", "t,+6", 0x48200000, 0xffe007ff, WR_1
|RD_C2
, 0, EE
, 0, 0 },
2062 {"qmtc2", "t,+6", 0x48a00000, 0xffe007ff, RD_1
|WR_C2
, 0, EE
, 0, 0 },
2063 {"qmtc2.i", "t,+6", 0x48a00001, 0xffe007ff, RD_1
|WR_C2
, 0, EE
, 0, 0 },
2064 {"qmtc2.ni", "t,+6", 0x48a00000, 0xffe007ff, RD_1
|WR_C2
, 0, EE
, 0, 0 },
2065 /* Coprocessor 3 move/branch operations overlap with MIPS IV COP1X
2066 instructions, so they are here for the latters to take precedence. */
2067 {"bc3f", "p", 0x4d000000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2068 {"bc3fl", "p", 0x4d020000, 0xffff0000, RD_CC
|CBL
, 0, I2
|T3
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2069 {"bc3t", "p", 0x4d010000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2070 {"bc3tl", "p", 0x4d030000, 0xffff0000, RD_CC
|CBL
, 0, I2
|T3
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2071 {"cfc3", "t,G", 0x4c400000, 0xffe007ff, WR_1
|RD_C3
|LCD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2072 {"ctc3", "t,G", 0x4cc00000, 0xffe007ff, RD_1
|WR_CC
|COD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2073 {"dmfc3", "t,G", 0x4c200000, 0xffe007ff, WR_1
|RD_C3
|LCD
, 0, I3
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2074 {"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, RD_1
|WR_C3
|WR_CC
|COD
, 0, I3
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2075 {"mfc3", "t,G", 0x4c000000, 0xffe007ff, WR_1
|RD_C3
|LCD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2076 {"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, WR_1
|RD_C3
|LCD
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2077 {"mtc3", "t,G", 0x4c800000, 0xffe007ff, RD_1
|WR_C3
|WR_CC
|COD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2078 {"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, RD_1
|WR_C3
|WR_CC
|COD
, 0, I32
, 0, IOCT
|IOCTP
|IOCT2
|EE
},
2080 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
2081 4010 any more, so move this insn out of the way. If the object
2082 format gave us more info, we could do this right. */
2083 {"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_1
|RD_2
, 0, L1
, 0, 0 },
2085 {"absq_s.ph", "d,t", 0x7c000252, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2086 {"absq_s.pw", "d,t", 0x7c000456, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2087 {"absq_s.qh", "d,t", 0x7c000256, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2088 {"absq_s.w", "d,t", 0x7c000452, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2089 {"addq.ph", "d,s,t", 0x7c000290, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2090 {"addq.pw", "d,s,t", 0x7c000494, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2091 {"addq.qh", "d,s,t", 0x7c000294, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2092 {"addq_s.ph", "d,s,t", 0x7c000390, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2093 {"addq_s.pw", "d,s,t", 0x7c000594, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2094 {"addq_s.qh", "d,s,t", 0x7c000394, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2095 {"addq_s.w", "d,s,t", 0x7c000590, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2096 {"addsc", "d,s,t", 0x7c000410, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2097 {"addu.ob", "d,s,t", 0x7c000014, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2098 {"addu.qb", "d,s,t", 0x7c000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2099 {"addu_s.ob", "d,s,t", 0x7c000114, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2100 {"addu_s.qb", "d,s,t", 0x7c000110, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2101 {"addwc", "d,s,t", 0x7c000450, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2102 {"bitrev", "d,t", 0x7c0006d2, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2103 {"bposge32", "p", 0x041c0000, 0xffff0000, CBD
, 0, 0, D32
, 0 },
2104 {"bposge64", "p", 0x041d0000, 0xffff0000, CBD
, 0, 0, D64
, 0 },
2105 {"cmp.eq.ph", "s,t", 0x7c000211, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
2106 {"cmp.eq.pw", "s,t", 0x7c000415, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2107 {"cmp.eq.qh", "s,t", 0x7c000215, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2108 {"cmpgu.eq.ob", "d,s,t", 0x7c000115, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2109 {"cmpgu.eq.qb", "d,s,t", 0x7c000111, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2110 {"cmpgu.le.ob", "d,s,t", 0x7c000195, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2111 {"cmpgu.le.qb", "d,s,t", 0x7c000191, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2112 {"cmpgu.lt.ob", "d,s,t", 0x7c000155, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2113 {"cmpgu.lt.qb", "d,s,t", 0x7c000151, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2114 {"cmp.le.ph", "s,t", 0x7c000291, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
2115 {"cmp.le.pw", "s,t", 0x7c000495, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2116 {"cmp.le.qh", "s,t", 0x7c000295, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2117 {"cmp.lt.ph", "s,t", 0x7c000251, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
2118 {"cmp.lt.pw", "s,t", 0x7c000455, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2119 {"cmp.lt.qh", "s,t", 0x7c000255, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2120 {"cmpu.eq.ob", "s,t", 0x7c000015, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2121 {"cmpu.eq.qb", "s,t", 0x7c000011, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
2122 {"cmpu.le.ob", "s,t", 0x7c000095, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2123 {"cmpu.le.qb", "s,t", 0x7c000091, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
2124 {"cmpu.lt.ob", "s,t", 0x7c000055, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D64
, 0 },
2125 {"cmpu.lt.qb", "s,t", 0x7c000051, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
2126 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_1
|RD_a
|DSP_VOLA
, 0, 0, D64
, 0 },
2127 {"dextpdpv", "t,7,s", 0x7c0002fc, 0xfc00e7ff, WR_1
|RD_3
|RD_a
|DSP_VOLA
, 0, 0, D64
, 0 },
2128 {"dextp", "t,7,6", 0x7c0000bc, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2129 {"dextpv", "t,7,s", 0x7c0000fc, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2130 {"dextr.l", "t,7,6", 0x7c00043c, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2131 {"dextr_r.l", "t,7,6", 0x7c00053c, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2132 {"dextr_rs.l", "t,7,6", 0x7c0005bc, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2133 {"dextr_rs.w", "t,7,6", 0x7c0001bc, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2134 {"dextr_r.w", "t,7,6", 0x7c00013c, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2135 {"dextr_s.h", "t,7,6", 0x7c0003bc, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2136 {"dextrv.l", "t,7,s", 0x7c00047c, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2137 {"dextrv_r.l", "t,7,s", 0x7c00057c, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2138 {"dextrv_rs.l", "t,7,s", 0x7c0005fc, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2139 {"dextrv_rs.w", "t,7,s", 0x7c0001fc, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2140 {"dextrv_r.w", "t,7,s", 0x7c00017c, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2141 {"dextrv_s.h", "t,7,s", 0x7c0003fc, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2142 {"dextrv.w", "t,7,s", 0x7c00007c, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D64
, 0 },
2143 {"dextr.w", "t,7,6", 0x7c00003c, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D64
, 0 },
2144 {"dinsv", "t,s", 0x7c00000d, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2145 {"dmadd", "7,s,t", 0x7c000674, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2146 {"dmaddu", "7,s,t", 0x7c000774, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2147 {"dmsub", "7,s,t", 0x7c0006f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2148 {"dmsubu", "7,s,t", 0x7c0007f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2149 {"dmthlip", "s,7", 0x7c0007fc, 0xfc1fe7ff, RD_1
|MOD_a
|DSP_VOLA
, 0, 0, D64
, 0 },
2150 {"dpaq_sa.l.pw", "7,s,t", 0x7c000334, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2151 {"dpaq_sa.l.w", "7,s,t", 0x7c000330, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2152 {"dpaq_s.w.ph", "7,s,t", 0x7c000130, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2153 {"dpaq_s.w.qh", "7,s,t", 0x7c000134, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2154 {"dpau.h.obl", "7,s,t", 0x7c0000f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2155 {"dpau.h.obr", "7,s,t", 0x7c0001f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2156 {"dpau.h.qbl", "7,s,t", 0x7c0000f0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2157 {"dpau.h.qbr", "7,s,t", 0x7c0001f0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2158 {"dpsq_sa.l.pw", "7,s,t", 0x7c000374, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2159 {"dpsq_sa.l.w", "7,s,t", 0x7c000370, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2160 {"dpsq_s.w.ph", "7,s,t", 0x7c000170, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2161 {"dpsq_s.w.qh", "7,s,t", 0x7c000174, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2162 {"dpsu.h.obl", "7,s,t", 0x7c0002f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2163 {"dpsu.h.obr", "7,s,t", 0x7c0003f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2164 {"dpsu.h.qbl", "7,s,t", 0x7c0002f0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2165 {"dpsu.h.qbr", "7,s,t", 0x7c0003f0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2166 {"dshilo", "7,:", 0x7c0006bc, 0xfc07e7ff, MOD_a
, 0, 0, D64
, 0 },
2167 {"dshilov", "7,s", 0x7c0006fc, 0xfc1fe7ff, RD_2
|MOD_a
, 0, 0, D64
, 0 },
2168 {"extpdp", "t,7,6", 0x7c0002b8, 0xfc00e7ff, WR_1
|RD_a
|DSP_VOLA
, 0, 0, D32
, 0 },
2169 {"extpdpv", "t,7,s", 0x7c0002f8, 0xfc00e7ff, WR_1
|RD_3
|RD_a
|DSP_VOLA
, 0, 0, D32
, 0 },
2170 {"extp", "t,7,6", 0x7c0000b8, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D32
, 0 },
2171 {"extpv", "t,7,s", 0x7c0000f8, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
2172 {"extr_rs.w", "t,7,6", 0x7c0001b8, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D32
, 0 },
2173 {"extr_r.w", "t,7,6", 0x7c000138, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D32
, 0 },
2174 {"extr_s.h", "t,7,6", 0x7c0003b8, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D32
, 0 },
2175 {"extrv_rs.w", "t,7,s", 0x7c0001f8, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
2176 {"extrv_r.w", "t,7,s", 0x7c000178, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
2177 {"extrv_s.h", "t,7,s", 0x7c0003f8, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
2178 {"extrv.w", "t,7,s", 0x7c000078, 0xfc00e7ff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
2179 {"extr.w", "t,7,6", 0x7c000038, 0xfc00e7ff, WR_1
|RD_a
, 0, 0, D32
, 0 },
2180 {"insv", "t,s", 0x7c00000c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2181 /* lbux, ldx, lhx and lwx are the basic instruction section. */
2182 {"maq_sa.w.phl", "7,s,t", 0x7c000430, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2183 {"maq_sa.w.phr", "7,s,t", 0x7c0004b0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2184 {"maq_sa.w.qhll", "7,s,t", 0x7c000434, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2185 {"maq_sa.w.qhlr", "7,s,t", 0x7c000474, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2186 {"maq_sa.w.qhrl", "7,s,t", 0x7c0004b4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2187 {"maq_sa.w.qhrr", "7,s,t", 0x7c0004f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2188 {"maq_s.l.pwl", "7,s,t", 0x7c000734, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2189 {"maq_s.l.pwr", "7,s,t", 0x7c0007b4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2190 {"maq_s.w.phl", "7,s,t", 0x7c000530, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2191 {"maq_s.w.phr", "7,s,t", 0x7c0005b0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2192 {"maq_s.w.qhll", "7,s,t", 0x7c000534, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2193 {"maq_s.w.qhlr", "7,s,t", 0x7c000574, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2194 {"maq_s.w.qhrl", "7,s,t", 0x7c0005b4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2195 {"maq_s.w.qhrr", "7,s,t", 0x7c0005f4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2196 {"modsub", "d,s,t", 0x7c000490, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2197 {"mthlip", "s,7", 0x7c0007f8, 0xfc1fe7ff, RD_1
|MOD_a
|DSP_VOLA
, 0, 0, D32
, 0 },
2198 {"muleq_s.pw.qhl", "d,s,t", 0x7c000714, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D64
, 0 },
2199 {"muleq_s.pw.qhr", "d,s,t", 0x7c000754, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D64
, 0 },
2200 {"muleq_s.w.phl", "d,s,t", 0x7c000710, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
2201 {"muleq_s.w.phr", "d,s,t", 0x7c000750, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
2202 {"muleu_s.ph.qbl", "d,s,t", 0x7c000190, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
2203 {"muleu_s.ph.qbr", "d,s,t", 0x7c0001d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
2204 {"muleu_s.qh.obl", "d,s,t", 0x7c000194, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D64
, 0 },
2205 {"muleu_s.qh.obr", "d,s,t", 0x7c0001d4, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D64
, 0 },
2206 {"mulq_rs.ph", "d,s,t", 0x7c0007d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
2207 {"mulq_rs.qh", "d,s,t", 0x7c0007d4, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D64
, 0 },
2208 {"mulsaq_s.l.pw", "7,s,t", 0x7c0003b4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2209 {"mulsaq_s.w.ph", "7,s,t", 0x7c0001b0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
2210 {"mulsaq_s.w.qh", "7,s,t", 0x7c0001b4, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D64
, 0 },
2211 {"packrl.ph", "d,s,t", 0x7c000391, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2212 {"packrl.pw", "d,s,t", 0x7c000395, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2213 {"pick.ob", "d,s,t", 0x7c0000d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2214 {"pick.ph", "d,s,t", 0x7c0002d1, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2215 {"pick.pw", "d,s,t", 0x7c0004d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2216 {"pick.qb", "d,s,t", 0x7c0000d1, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2217 {"pick.qh", "d,s,t", 0x7c0002d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2218 {"preceq.pw.qhla", "d,t", 0x7c000396, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2219 {"preceq.pw.qhl", "d,t", 0x7c000316, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2220 {"preceq.pw.qhra", "d,t", 0x7c0003d6, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2221 {"preceq.pw.qhr", "d,t", 0x7c000356, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2222 {"preceq.s.l.pwl", "d,t", 0x7c000516, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2223 {"preceq.s.l.pwr", "d,t", 0x7c000556, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2224 {"precequ.ph.qbla", "d,t", 0x7c000192, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2225 {"precequ.ph.qbl", "d,t", 0x7c000112, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2226 {"precequ.ph.qbra", "d,t", 0x7c0001d2, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2227 {"precequ.ph.qbr", "d,t", 0x7c000152, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2228 {"precequ.pw.qhla", "d,t", 0x7c000196, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2229 {"precequ.pw.qhl", "d,t", 0x7c000116, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2230 {"precequ.pw.qhra", "d,t", 0x7c0001d6, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2231 {"precequ.pw.qhr", "d,t", 0x7c000156, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2232 {"preceq.w.phl", "d,t", 0x7c000312, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2233 {"preceq.w.phr", "d,t", 0x7c000352, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2234 {"preceu.ph.qbla", "d,t", 0x7c000792, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2235 {"preceu.ph.qbl", "d,t", 0x7c000712, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2236 {"preceu.ph.qbra", "d,t", 0x7c0007d2, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2237 {"preceu.ph.qbr", "d,t", 0x7c000752, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2238 {"preceu.qh.obla", "d,t", 0x7c000796, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2239 {"preceu.qh.obl", "d,t", 0x7c000716, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2240 {"preceu.qh.obra", "d,t", 0x7c0007d6, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2241 {"preceu.qh.obr", "d,t", 0x7c000756, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2242 {"precrq.ob.qh", "d,s,t", 0x7c000315, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2243 {"precrq.ph.w", "d,s,t", 0x7c000511, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2244 {"precrq.pw.l", "d,s,t", 0x7c000715, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2245 {"precrq.qb.ph", "d,s,t", 0x7c000311, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2246 {"precrq.qh.pw", "d,s,t", 0x7c000515, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2247 {"precrq_rs.ph.w", "d,s,t", 0x7c000551, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2248 {"precrq_rs.qh.pw", "d,s,t", 0x7c000555, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2249 {"precrqu_s.ob.qh", "d,s,t", 0x7c0003d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2250 {"precrqu_s.qb.ph", "d,s,t", 0x7c0003d1, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2251 {"raddu.l.ob", "d,s", 0x7c000514, 0xfc1f07ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2252 {"raddu.w.qb", "d,s", 0x7c000510, 0xfc1f07ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2253 {"rddsp", "d", 0x7fff04b8, 0xffff07ff, WR_1
, 0, 0, D32
, 0 },
2254 {"rddsp", "d,'", 0x7c0004b8, 0xffc007ff, WR_1
, 0, 0, D32
, 0 },
2255 {"repl.ob", "d,5", 0x7c000096, 0xff0007ff, WR_1
, 0, 0, D64
, 0 },
2256 {"repl.ph", "d,@", 0x7c000292, 0xfc0007ff, WR_1
, 0, 0, D32
, 0 },
2257 {"repl.pw", "d,@", 0x7c000496, 0xfc0007ff, WR_1
, 0, 0, D64
, 0 },
2258 {"repl.qb", "d,5", 0x7c000092, 0xff0007ff, WR_1
, 0, 0, D32
, 0 },
2259 {"repl.qh", "d,@", 0x7c000296, 0xfc0007ff, WR_1
, 0, 0, D64
, 0 },
2260 {"replv.ob", "d,t", 0x7c0000d6, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2261 {"replv.ph", "d,t", 0x7c0002d2, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2262 {"replv.pw", "d,t", 0x7c0004d6, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2263 {"replv.qb", "d,t", 0x7c0000d2, 0xffe007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2264 {"replv.qh", "d,t", 0x7c0002d6, 0xffe007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2265 {"shilo", "7,0", 0x7c0006b8, 0xfc0fe7ff, MOD_a
, 0, 0, D32
, 0 },
2266 {"shilov", "7,s", 0x7c0006f8, 0xfc1fe7ff, RD_2
|MOD_a
, 0, 0, D32
, 0 },
2267 {"shll.ob", "d,t,3", 0x7c000017, 0xff0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2268 {"shll.ph", "d,t,4", 0x7c000213, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2269 {"shll.pw", "d,t,6", 0x7c000417, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2270 {"shll.qb", "d,t,3", 0x7c000013, 0xff0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2271 {"shll.qh", "d,t,4", 0x7c000217, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2272 {"shll_s.ph", "d,t,4", 0x7c000313, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2273 {"shll_s.pw", "d,t,6", 0x7c000517, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2274 {"shll_s.qh", "d,t,4", 0x7c000317, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2275 {"shll_s.w", "d,t,6", 0x7c000513, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2276 {"shllv.ob", "d,t,s", 0x7c000097, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2277 {"shllv.ph", "d,t,s", 0x7c000293, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2278 {"shllv.pw", "d,t,s", 0x7c000497, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2279 {"shllv.qb", "d,t,s", 0x7c000093, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2280 {"shllv.qh", "d,t,s", 0x7c000297, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2281 {"shllv_s.ph", "d,t,s", 0x7c000393, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2282 {"shllv_s.pw", "d,t,s", 0x7c000597, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2283 {"shllv_s.qh", "d,t,s", 0x7c000397, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2284 {"shllv_s.w", "d,t,s", 0x7c000593, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2285 {"shra.ph", "d,t,4", 0x7c000253, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2286 {"shra.pw", "d,t,6", 0x7c000457, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2287 {"shra.qh", "d,t,4", 0x7c000257, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2288 {"shra_r.ph", "d,t,4", 0x7c000353, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2289 {"shra_r.pw", "d,t,6", 0x7c000557, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2290 {"shra_r.qh", "d,t,4", 0x7c000357, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2291 {"shra_r.w", "d,t,6", 0x7c000553, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2292 {"shrav.ph", "d,t,s", 0x7c0002d3, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2293 {"shrav.pw", "d,t,s", 0x7c0004d7, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2294 {"shrav.qh", "d,t,s", 0x7c0002d7, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2295 {"shrav_r.ph", "d,t,s", 0x7c0003d3, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2296 {"shrav_r.pw", "d,t,s", 0x7c0005d7, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2297 {"shrav_r.qh", "d,t,s", 0x7c0003d7, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2298 {"shrav_r.w", "d,t,s", 0x7c0005d3, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2299 {"shrl.ob", "d,t,3", 0x7c000057, 0xff0007ff, WR_1
|RD_2
, 0, 0, D64
, 0 },
2300 {"shrl.qb", "d,t,3", 0x7c000053, 0xff0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
2301 {"shrlv.ob", "d,t,s", 0x7c0000d7, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2302 {"shrlv.qb", "d,t,s", 0x7c0000d3, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2303 {"subq.ph", "d,s,t", 0x7c0002d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2304 {"subq.pw", "d,s,t", 0x7c0004d4, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2305 {"subq.qh", "d,s,t", 0x7c0002d4, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2306 {"subq_s.ph", "d,s,t", 0x7c0003d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2307 {"subq_s.pw", "d,s,t", 0x7c0005d4, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2308 {"subq_s.qh", "d,s,t", 0x7c0003d4, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2309 {"subq_s.w", "d,s,t", 0x7c0005d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2310 {"subu.ob", "d,s,t", 0x7c000054, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2311 {"subu.qb", "d,s,t", 0x7c000050, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2312 {"subu_s.ob", "d,s,t", 0x7c000154, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D64
, 0 },
2313 {"subu_s.qb", "d,s,t", 0x7c000150, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
2314 {"wrdsp", "s", 0x7c1ffcf8, 0xfc1fffff, RD_1
|DSP_VOLA
, 0, 0, D32
, 0 },
2315 {"wrdsp", "s,8", 0x7c0004f8, 0xfc1e07ff, RD_1
|DSP_VOLA
, 0, 0, D32
, 0 },
2316 /* MIPS DSP ASE Rev2 */
2317 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_1
|RD_2
, 0, 0, D33
, 0 },
2318 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2319 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2320 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2321 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2322 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
2323 {"balign", "t,s,I", 0, (int) M_BALIGN
, INSN_MACRO
, 0, 0, D33
, 0 },
2324 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
2325 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2326 {"cmpgdu.lt.qb", "d,s,t", 0x7c000651, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2327 {"cmpgdu.le.qb", "d,s,t", 0x7c000691, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2328 {"dpa.w.ph", "7,s,t", 0x7c000030, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2329 {"dps.w.ph", "7,s,t", 0x7c000070, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2330 {"mul.ph", "d,s,t", 0x7c000318, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
2331 {"mul_s.ph", "d,s,t", 0x7c000398, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
2332 {"mulq_rs.w", "d,s,t", 0x7c0005d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
2333 {"mulq_s.ph", "d,s,t", 0x7c000790, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
2334 {"mulq_s.w", "d,s,t", 0x7c000598, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
2335 {"mulsa.w.ph", "7,s,t", 0x7c0000b0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2336 {"precr.qb.ph", "d,s,t", 0x7c000351, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2337 {"precr_sra.ph.w", "t,s,h", 0x7c000791, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
2338 {"precr_sra_r.ph.w", "t,s,h", 0x7c0007d1, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
2339 {"prepend", "t,s,h", 0x7c000071, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
2340 {"shra.qb", "d,t,3", 0x7c000113, 0xff0007ff, WR_1
|RD_2
, 0, 0, D33
, 0 },
2341 {"shra_r.qb", "d,t,3", 0x7c000153, 0xff0007ff, WR_1
|RD_2
, 0, 0, D33
, 0 },
2342 {"shrav.qb", "d,t,s", 0x7c000193, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2343 {"shrav_r.qb", "d,t,s", 0x7c0001d3, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2344 {"shrl.ph", "d,t,4", 0x7c000653, 0xfe0007ff, WR_1
|RD_2
, 0, 0, D33
, 0 },
2345 {"shrlv.ph", "d,t,s", 0x7c0006d3, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2346 {"subu.ph", "d,s,t", 0x7c000250, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2347 {"subu_s.ph", "d,s,t", 0x7c000350, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2348 {"subuh.qb", "d,s,t", 0x7c000058, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2349 {"subuh_r.qb", "d,s,t", 0x7c0000d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2350 {"addqh.ph", "d,s,t", 0x7c000218, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2351 {"addqh_r.ph", "d,s,t", 0x7c000298, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2352 {"addqh.w", "d,s,t", 0x7c000418, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2353 {"addqh_r.w", "d,s,t", 0x7c000498, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2354 {"subqh.ph", "d,s,t", 0x7c000258, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2355 {"subqh_r.ph", "d,s,t", 0x7c0002d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2356 {"subqh.w", "d,s,t", 0x7c000458, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2357 {"subqh_r.w", "d,s,t", 0x7c0004d8, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
2358 {"dpax.w.ph", "7,s,t", 0x7c000230, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2359 {"dpsx.w.ph", "7,s,t", 0x7c000270, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2360 {"dpaqx_s.w.ph", "7,s,t", 0x7c000630, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2361 {"dpaqx_sa.w.ph", "7,s,t", 0x7c0006b0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2362 {"dpsqx_s.w.ph", "7,s,t", 0x7c000670, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2363 {"dpsqx_sa.w.ph", "7,s,t", 0x7c0006f0, 0xfc00e7ff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
2364 /* Move bc0* after mftr and mttr to avoid opcode collision. */
2365 {"bc0f", "p", 0x41000000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
2366 {"bc0fl", "p", 0x41020000, 0xffff0000, RD_CC
|CBL
, 0, I2
|T3
, 0, IOCT
|IOCTP
|IOCT2
},
2367 {"bc0t", "p", 0x41010000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
2368 {"bc0tl", "p", 0x41030000, 0xffff0000, RD_CC
|CBL
, 0, I2
|T3
, 0, IOCT
|IOCTP
|IOCT2
},
2369 /* ST Microelectronics Loongson-2E and -2F. */
2370 {"mult.g", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2371 {"mult.g", "d,s,t", 0x70000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2372 {"gsmult", "d,s,t", 0x70000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2373 {"multu.g", "d,s,t", 0x7c000019, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2374 {"multu.g", "d,s,t", 0x70000012, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2375 {"gsmultu", "d,s,t", 0x70000012, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2376 {"dmult.g", "d,s,t", 0x7c00001c, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2377 {"dmult.g", "d,s,t", 0x70000011, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2378 {"gsdmult", "d,s,t", 0x70000011, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2379 {"dmultu.g", "d,s,t", 0x7c00001d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2380 {"dmultu.g", "d,s,t", 0x70000013, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2381 {"gsdmultu", "d,s,t", 0x70000013, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2382 {"div.g", "d,s,t", 0x7c00001a, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2383 {"div.g", "d,s,t", 0x70000014, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2384 {"gsdiv", "d,s,t", 0x70000014, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2385 {"divu.g", "d,s,t", 0x7c00001b, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2386 {"divu.g", "d,s,t", 0x70000016, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2387 {"gsdivu", "d,s,t", 0x70000016, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2388 {"ddiv.g", "d,s,t", 0x7c00001e, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2389 {"ddiv.g", "d,s,t", 0x70000015, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2390 {"gsddiv", "d,s,t", 0x70000015, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2391 {"ddivu.g", "d,s,t", 0x7c00001f, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2392 {"ddivu.g", "d,s,t", 0x70000017, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2393 {"gsddivu", "d,s,t", 0x70000017, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2394 {"mod.g", "d,s,t", 0x7c000022, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2395 {"mod.g", "d,s,t", 0x7000001c, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2396 {"gsmod", "d,s,t", 0x7000001c, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2397 {"modu.g", "d,s,t", 0x7c000023, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2398 {"modu.g", "d,s,t", 0x7000001e, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2399 {"gsmodu", "d,s,t", 0x7000001e, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2400 {"dmod.g", "d,s,t", 0x7c000026, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2401 {"dmod.g", "d,s,t", 0x7000001d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2402 {"gsdmod", "d,s,t", 0x7000001d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2403 {"dmodu.g", "d,s,t", 0x7c000027, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2E
, 0, 0 },
2404 {"dmodu.g", "d,s,t", 0x7000001f, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL2F
, 0, 0 },
2405 {"gsdmodu", "d,s,t", 0x7000001f, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, IL3A
, 0, 0 },
2406 {"packsshb", "D,S,T", 0x47400002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2407 {"packsshb", "D,S,T", 0x4b400002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2408 {"packsswh", "D,S,T", 0x47200002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2409 {"packsswh", "D,S,T", 0x4b200002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2410 {"packushb", "D,S,T", 0x47600002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2411 {"packushb", "D,S,T", 0x4b600002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2412 {"paddb", "D,S,T", 0x47c00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2413 {"paddb", "D,S,T", 0x4bc00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2414 {"paddb", "d,s,t", 0x70000208, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2415 {"paddh", "D,S,T", 0x47400000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2416 {"paddh", "d,s,t", 0x70000108, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2417 {"paddh", "D,S,T", 0x4b400000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2418 {"paddw", "D,S,T", 0x47600000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2419 {"paddw", "D,S,T", 0x4b600000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2420 {"paddw", "d,s,t", 0x70000008, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2421 {"paddd", "D,S,T", 0x47e00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2422 {"paddd", "D,S,T", 0x4be00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2423 {"paddsb", "D,S,T", 0x47800000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2424 {"paddsb", "D,S,T", 0x4b800000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2425 {"paddsb", "d,s,t", 0x70000608, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2426 {"paddsh", "D,S,T", 0x47000000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2427 {"paddsh", "D,S,T", 0x4b000000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2428 {"paddsh", "d,s,t", 0x70000508, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2429 {"paddusb", "D,S,T", 0x47a00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2430 {"paddusb", "D,S,T", 0x4ba00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2431 {"paddush", "D,S,T", 0x47200000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2432 {"paddush", "D,S,T", 0x4b200000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2433 {"pandn", "D,S,T", 0x47e00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2434 {"pandn", "D,S,T", 0x4be00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2435 {"pavgb", "D,S,T", 0x46600000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2436 {"pavgb", "D,S,T", 0x4b200008, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2437 {"pavgh", "D,S,T", 0x46400000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2438 {"pavgh", "D,S,T", 0x4b000008, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2439 {"pcmpeqb", "D,S,T", 0x46c00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2440 {"pcmpeqb", "D,S,T", 0x4b800009, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2441 {"pcmpeqh", "D,S,T", 0x46800001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2442 {"pcmpeqh", "D,S,T", 0x4b400009, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2443 {"pcmpeqw", "D,S,T", 0x46400001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2444 {"pcmpeqw", "D,S,T", 0x4b000009, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2445 {"pcmpgtb", "D,S,T", 0x46e00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2446 {"pcmpgtb", "D,S,T", 0x4ba00009, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2447 {"pcmpgth", "D,S,T", 0x46a00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2448 {"pcmpgth", "D,S,T", 0x4b600009, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2449 {"pcmpgtw", "D,S,T", 0x46600001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2450 {"pcmpgtw", "D,S,T", 0x4b200009, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2451 {"pextrh", "D,S,T", 0x45c00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2452 {"pextrh", "D,S,T", 0x4b40000e, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2453 {"pinsrh_0", "D,S,T", 0x47800003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2454 {"pinsrh_0", "D,S,T", 0x4b800003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2455 {"pinsrh_1", "D,S,T", 0x47a00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2456 {"pinsrh_1", "D,S,T", 0x4ba00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2457 {"pinsrh_2", "D,S,T", 0x47c00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2458 {"pinsrh_2", "D,S,T", 0x4bc00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2459 {"pinsrh_3", "D,S,T", 0x47e00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2460 {"pinsrh_3", "D,S,T", 0x4be00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2461 {"pmaddhw", "D,S,T", 0x45e00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2462 {"pmaddhw", "D,S,T", 0x4b60000e, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2463 {"pmaxsh", "D,S,T", 0x46800000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2464 {"pmaxsh", "D,S,T", 0x4b400008, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2465 {"pmaxub", "D,S,T", 0x46c00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2466 {"pmaxub", "D,S,T", 0x4b800008, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2467 {"pminsh", "D,S,T", 0x46a00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2468 {"pminsh", "D,S,T", 0x4b600008, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2469 {"pminub", "D,S,T", 0x46e00000, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2470 {"pminub", "D,S,T", 0x4ba00008, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2471 {"pmovmskb", "D,S", 0x46a00005, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2E
, 0, 0 },
2472 {"pmovmskb", "D,S", 0x4ba0000f, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2473 {"pmulhuh", "D,S,T", 0x46e00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2474 {"pmulhuh", "D,S,T", 0x4ba0000a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2475 {"pmulhh", "D,S,T", 0x46a00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2476 {"pmulhh", "D,S,T", 0x4b60000a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2477 {"pmullh", "D,S,T", 0x46800002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2478 {"pmullh", "D,S,T", 0x4b40000a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2479 {"pmuluw", "D,S,T", 0x46c00002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2480 {"pmuluw", "D,S,T", 0x4b80000a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2481 {"pasubub", "D,S,T", 0x45a00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2482 {"pasubub", "D,S,T", 0x4b20000d, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2483 {"biadd", "D,S", 0x46800005, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2E
, 0, 0 },
2484 {"biadd", "D,S", 0x4b80000f, 0xffff003f, WR_1
|RD_2
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2485 {"pshufh", "D,S,T", 0x47000002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2486 {"pshufh", "D,S,T", 0x4b000002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2487 {"psllh", "D,S,T", 0x46600002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2488 {"psllh", "D,S,T", 0x4b20000a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2489 {"psllh", "d,t,<", 0x70000034, 0xffe0003f, WR_1
|RD_2
, 0, MMI
, 0, 0 },
2490 {"psllw", "D,S,T", 0x46400002, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2491 {"psllw", "D,S,T", 0x4b00000a, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2492 {"psllw", "d,t,<", 0x7000003c, 0xffe0003f, WR_1
|RD_2
, 0, MMI
, 0, 0 },
2493 {"psrah", "D,S,T", 0x46a00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2494 {"psrah", "D,S,T", 0x4b60000b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2495 {"psrah", "d,t,<", 0x70000037, 0xffe0003f, WR_1
|RD_2
, 0, MMI
, 0, 0 },
2496 {"psraw", "D,S,T", 0x46800003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2497 {"psraw", "D,S,T", 0x4b40000b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2498 {"psraw", "d,t,<", 0x7000003f, 0xffe0003f, WR_1
|RD_2
, 0, MMI
, 0, 0 },
2499 {"psrlh", "D,S,T", 0x46600003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2500 {"psrlh", "D,S,T", 0x4b20000b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2501 {"psrlh", "d,t,<", 0x70000036, 0xffe0003f, WR_1
|RD_2
, 0, MMI
, 0, 0 },
2502 {"psrlw", "D,S,T", 0x46400003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2503 {"psrlw", "D,S,T", 0x4b00000b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2504 {"psrlw", "d,t,<", 0x7000003e, 0xffe0003f, WR_1
|RD_2
, 0, MMI
, 0, 0 },
2505 {"psubb", "D,S,T", 0x47c00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2506 {"psubb", "D,S,T", 0x4bc00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2507 {"psubb", "d,s,t", 0x70000248, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2508 {"psubh", "D,S,T", 0x47400001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2509 {"psubh", "D,S,T", 0x4b400001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2510 {"psubh", "d,s,t", 0x70000148, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2511 {"psubw", "D,S,T", 0x47600001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2512 {"psubw", "D,S,T", 0x4b600001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2513 {"psubw", "d,s,t", 0x70000048, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2514 {"psubd", "D,S,T", 0x47e00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2515 {"psubd", "D,S,T", 0x4be00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2516 {"psubsb", "D,S,T", 0x47800001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2517 {"psubsb", "D,S,T", 0x4b800001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2518 {"psubsb", "d,s,t", 0x70000648, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2519 {"psubsh", "D,S,T", 0x47000001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2520 {"psubsh", "D,S,T", 0x4b000001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2521 {"psubsh", "d,s,t", 0x70000548, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, MMI
, 0, 0 },
2522 {"psubusb", "D,S,T", 0x47a00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2523 {"psubusb", "D,S,T", 0x4ba00001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2524 {"psubush", "D,S,T", 0x47200001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2525 {"psubush", "D,S,T", 0x4b200001, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2526 {"punpckhbh", "D,S,T", 0x47600003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2527 {"punpckhbh", "D,S,T", 0x4b600003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2528 {"punpckhhw", "D,S,T", 0x47200003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2529 {"punpckhhw", "D,S,T", 0x4b200003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2530 {"punpckhwd", "D,S,T", 0x46e00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2531 {"punpckhwd", "D,S,T", 0x4ba0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2532 {"punpcklbh", "D,S,T", 0x47400003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2533 {"punpcklbh", "D,S,T", 0x4b400003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2534 {"punpcklhw", "D,S,T", 0x47000003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2535 {"punpcklhw", "D,S,T", 0x4b000003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2536 {"punpcklwd", "D,S,T", 0x46c00003, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2E
, 0, 0 },
2537 {"punpcklwd", "D,S,T", 0x4b80000b, 0xffe0003f, WR_1
|RD_2
|RD_3
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2538 {"sequ", "S,T", 0x46800032, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2E
, 0, 0 },
2539 {"sequ", "S,T", 0x4b80000c, 0xffe007ff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, IL2F
|IL3A
, 0, 0 },
2540 /* MIPS Enhanced VA Scheme */
2541 {"lbue", "t,+j(b)", 0x7c000028, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2542 {"lbue", "t,A(b)", 0, (int) M_LBUE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2543 {"lhue", "t,+j(b)", 0x7c000029, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2544 {"lhue", "t,A(b)", 0, (int) M_LHUE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2545 {"lbe", "t,+j(b)", 0x7c00002c, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2546 {"lbe", "t,A(b)", 0, (int) M_LBE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2547 {"lhe", "t,+j(b)", 0x7c00002d, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2548 {"lhe", "t,A(b)", 0, (int) M_LHE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2549 {"lle", "t,+j(b)", 0x7c00002e, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2550 {"lle", "t,A(b)", 0, (int) M_LLE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2551 {"lwe", "t,+j(b)", 0x7c00002f, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2552 {"lwe", "t,A(b)", 0, (int) M_LWE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2553 {"lwle", "t,+j(b)", 0x7c000019, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2554 {"lwle", "t,A(b)", 0, (int) M_LWLE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2555 {"lwre", "t,+j(b)", 0x7c00001a, 0xfc00007f, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
2556 {"lwre", "t,A(b)", 0, (int) M_LWRE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2557 {"sbe", "t,+j(b)", 0x7c00001c, 0xfc00007f, RD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
2558 {"sbe", "t,A(b)", 0, (int) M_SBE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2559 {"sce", "t,+j(b)", 0x7c00001e, 0xfc00007f, MOD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
2560 {"sce", "t,A(b)", 0, (int) M_SCE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2561 {"she", "t,+j(b)", 0x7c00001d, 0xfc00007f, RD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
2562 {"she", "t,A(b)", 0, (int) M_SHE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2563 {"swe", "t,+j(b)", 0x7c00001f, 0xfc00007f, RD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
2564 {"swe", "t,A(b)", 0, (int) M_SWE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2565 {"swle", "t,+j(b)", 0x7c000021, 0xfc00007f, RD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
2566 {"swle", "t,A(b)", 0, (int) M_SWLE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2567 {"swre", "t,+j(b)", 0x7c000022, 0xfc00007f, RD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
2568 {"swre", "t,A(b)", 0, (int) M_SWRE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2569 {"cachee", "k,+j(b)", 0x7c00001b, 0xfc00007f, RD_3
, 0, 0, EVA
, 0 },
2570 {"cachee", "k,A(b)", 0, (int) M_CACHEE_AB
,INSN_MACRO
, 0, 0, EVA
, 0 },
2571 {"prefe", "k,+j(b)", 0x7c000023, 0xfc00007f, RD_3
|LM
, 0, 0, EVA
, 0 },
2572 {"prefe", "k,A(b)", 0, (int) M_PREFE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
2573 /* MSA Extension. */
2574 {"sll.b", "+d,+e,+h", 0x7800000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2575 {"sll.h", "+d,+e,+h", 0x7820000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2576 {"sll.w", "+d,+e,+h", 0x7840000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2577 {"sll.d", "+d,+e,+h", 0x7860000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2578 {"slli.b", "+d,+e,+!", 0x78700009, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2579 {"slli.h", "+d,+e,+@", 0x78600009, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2580 {"slli.w", "+d,+e,+x", 0x78400009, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2581 {"slli.d", "+d,+e,+#", 0x78000009, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2582 {"sra.b", "+d,+e,+h", 0x7880000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2583 {"sra.h", "+d,+e,+h", 0x78a0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2584 {"sra.w", "+d,+e,+h", 0x78c0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2585 {"sra.d", "+d,+e,+h", 0x78e0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2586 {"srai.b", "+d,+e,+!", 0x78f00009, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2587 {"srai.h", "+d,+e,+@", 0x78e00009, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2588 {"srai.w", "+d,+e,+x", 0x78c00009, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2589 {"srai.d", "+d,+e,+#", 0x78800009, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2590 {"srl.b", "+d,+e,+h", 0x7900000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2591 {"srl.h", "+d,+e,+h", 0x7920000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2592 {"srl.w", "+d,+e,+h", 0x7940000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2593 {"srl.d", "+d,+e,+h", 0x7960000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2594 {"srli.b", "+d,+e,+!", 0x79700009, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2595 {"srli.h", "+d,+e,+@", 0x79600009, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2596 {"srli.w", "+d,+e,+x", 0x79400009, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2597 {"srli.d", "+d,+e,+#", 0x79000009, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2598 {"bclr.b", "+d,+e,+h", 0x7980000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2599 {"bclr.h", "+d,+e,+h", 0x79a0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2600 {"bclr.w", "+d,+e,+h", 0x79c0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2601 {"bclr.d", "+d,+e,+h", 0x79e0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2602 {"bclri.b", "+d,+e,+!", 0x79f00009, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2603 {"bclri.h", "+d,+e,+@", 0x79e00009, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2604 {"bclri.w", "+d,+e,+x", 0x79c00009, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2605 {"bclri.d", "+d,+e,+#", 0x79800009, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2606 {"bset.b", "+d,+e,+h", 0x7a00000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2607 {"bset.h", "+d,+e,+h", 0x7a20000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2608 {"bset.w", "+d,+e,+h", 0x7a40000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2609 {"bset.d", "+d,+e,+h", 0x7a60000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2610 {"bseti.b", "+d,+e,+!", 0x7a700009, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2611 {"bseti.h", "+d,+e,+@", 0x7a600009, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2612 {"bseti.w", "+d,+e,+x", 0x7a400009, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2613 {"bseti.d", "+d,+e,+#", 0x7a000009, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2614 {"bneg.b", "+d,+e,+h", 0x7a80000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2615 {"bneg.h", "+d,+e,+h", 0x7aa0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2616 {"bneg.w", "+d,+e,+h", 0x7ac0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2617 {"bneg.d", "+d,+e,+h", 0x7ae0000d, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2618 {"bnegi.b", "+d,+e,+!", 0x7af00009, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2619 {"bnegi.h", "+d,+e,+@", 0x7ae00009, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2620 {"bnegi.w", "+d,+e,+x", 0x7ac00009, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2621 {"bnegi.d", "+d,+e,+#", 0x7a800009, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2622 {"binsl.b", "+d,+e,+h", 0x7b00000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2623 {"binsl.h", "+d,+e,+h", 0x7b20000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2624 {"binsl.w", "+d,+e,+h", 0x7b40000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2625 {"binsl.d", "+d,+e,+h", 0x7b60000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2626 {"binsli.b", "+d,+e,+!", 0x7b700009, 0xfff8003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2627 {"binsli.h", "+d,+e,+@", 0x7b600009, 0xfff0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2628 {"binsli.w", "+d,+e,+x", 0x7b400009, 0xffe0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2629 {"binsli.d", "+d,+e,+#", 0x7b000009, 0xffc0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2630 {"binsr.b", "+d,+e,+h", 0x7b80000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2631 {"binsr.h", "+d,+e,+h", 0x7ba0000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2632 {"binsr.w", "+d,+e,+h", 0x7bc0000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2633 {"binsr.d", "+d,+e,+h", 0x7be0000d, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2634 {"binsri.b", "+d,+e,+!", 0x7bf00009, 0xfff8003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2635 {"binsri.h", "+d,+e,+@", 0x7be00009, 0xfff0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2636 {"binsri.w", "+d,+e,+x", 0x7bc00009, 0xffe0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2637 {"binsri.d", "+d,+e,+#", 0x7b800009, 0xffc0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2638 {"addv.b", "+d,+e,+h", 0x7800000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2639 {"addv.h", "+d,+e,+h", 0x7820000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2640 {"addv.w", "+d,+e,+h", 0x7840000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2641 {"addv.d", "+d,+e,+h", 0x7860000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2642 {"addvi.b", "+d,+e,+$", 0x78000006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2643 {"addvi.h", "+d,+e,+$", 0x78200006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2644 {"addvi.w", "+d,+e,+$", 0x78400006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2645 {"addvi.d", "+d,+e,+$", 0x78600006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2646 {"subv.b", "+d,+e,+h", 0x7880000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2647 {"subv.h", "+d,+e,+h", 0x78a0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2648 {"subv.w", "+d,+e,+h", 0x78c0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2649 {"subv.d", "+d,+e,+h", 0x78e0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2650 {"subvi.b", "+d,+e,+$", 0x78800006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2651 {"subvi.h", "+d,+e,+$", 0x78a00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2652 {"subvi.w", "+d,+e,+$", 0x78c00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2653 {"subvi.d", "+d,+e,+$", 0x78e00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2654 {"max_s.b", "+d,+e,+h", 0x7900000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2655 {"max_s.h", "+d,+e,+h", 0x7920000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2656 {"max_s.w", "+d,+e,+h", 0x7940000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2657 {"max_s.d", "+d,+e,+h", 0x7960000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2658 {"maxi_s.b", "+d,+e,+%", 0x79000006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2659 {"maxi_s.h", "+d,+e,+%", 0x79200006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2660 {"maxi_s.w", "+d,+e,+%", 0x79400006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2661 {"maxi_s.d", "+d,+e,+%", 0x79600006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2662 {"max_u.b", "+d,+e,+h", 0x7980000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2663 {"max_u.h", "+d,+e,+h", 0x79a0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2664 {"max_u.w", "+d,+e,+h", 0x79c0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2665 {"max_u.d", "+d,+e,+h", 0x79e0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2666 {"maxi_u.b", "+d,+e,+$", 0x79800006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2667 {"maxi_u.h", "+d,+e,+$", 0x79a00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2668 {"maxi_u.w", "+d,+e,+$", 0x79c00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2669 {"maxi_u.d", "+d,+e,+$", 0x79e00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2670 {"min_s.b", "+d,+e,+h", 0x7a00000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2671 {"min_s.h", "+d,+e,+h", 0x7a20000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2672 {"min_s.w", "+d,+e,+h", 0x7a40000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2673 {"min_s.d", "+d,+e,+h", 0x7a60000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2674 {"mini_s.b", "+d,+e,+%", 0x7a000006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2675 {"mini_s.h", "+d,+e,+%", 0x7a200006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2676 {"mini_s.w", "+d,+e,+%", 0x7a400006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2677 {"mini_s.d", "+d,+e,+%", 0x7a600006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2678 {"min_u.b", "+d,+e,+h", 0x7a80000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2679 {"min_u.h", "+d,+e,+h", 0x7aa0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2680 {"min_u.w", "+d,+e,+h", 0x7ac0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2681 {"min_u.d", "+d,+e,+h", 0x7ae0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2682 {"mini_u.b", "+d,+e,+$", 0x7a800006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2683 {"mini_u.h", "+d,+e,+$", 0x7aa00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2684 {"mini_u.w", "+d,+e,+$", 0x7ac00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2685 {"mini_u.d", "+d,+e,+$", 0x7ae00006, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2686 {"max_a.b", "+d,+e,+h", 0x7b00000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2687 {"max_a.h", "+d,+e,+h", 0x7b20000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2688 {"max_a.w", "+d,+e,+h", 0x7b40000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2689 {"max_a.d", "+d,+e,+h", 0x7b60000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2690 {"min_a.b", "+d,+e,+h", 0x7b80000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2691 {"min_a.h", "+d,+e,+h", 0x7ba0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2692 {"min_a.w", "+d,+e,+h", 0x7bc0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2693 {"min_a.d", "+d,+e,+h", 0x7be0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2694 {"ceq.b", "+d,+e,+h", 0x7800000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2695 {"ceq.h", "+d,+e,+h", 0x7820000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2696 {"ceq.w", "+d,+e,+h", 0x7840000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2697 {"ceq.d", "+d,+e,+h", 0x7860000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2698 {"ceqi.b", "+d,+e,+%", 0x78000007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2699 {"ceqi.h", "+d,+e,+%", 0x78200007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2700 {"ceqi.w", "+d,+e,+%", 0x78400007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2701 {"ceqi.d", "+d,+e,+%", 0x78600007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2702 {"clt_s.b", "+d,+e,+h", 0x7900000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2703 {"clt_s.h", "+d,+e,+h", 0x7920000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2704 {"clt_s.w", "+d,+e,+h", 0x7940000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2705 {"clt_s.d", "+d,+e,+h", 0x7960000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2706 {"clti_s.b", "+d,+e,+%", 0x79000007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2707 {"clti_s.h", "+d,+e,+%", 0x79200007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2708 {"clti_s.w", "+d,+e,+%", 0x79400007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2709 {"clti_s.d", "+d,+e,+%", 0x79600007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2710 {"clt_u.b", "+d,+e,+h", 0x7980000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2711 {"clt_u.h", "+d,+e,+h", 0x79a0000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2712 {"clt_u.w", "+d,+e,+h", 0x79c0000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2713 {"clt_u.d", "+d,+e,+h", 0x79e0000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2714 {"clti_u.b", "+d,+e,+$", 0x79800007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2715 {"clti_u.h", "+d,+e,+$", 0x79a00007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2716 {"clti_u.w", "+d,+e,+$", 0x79c00007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2717 {"clti_u.d", "+d,+e,+$", 0x79e00007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2718 {"cle_s.b", "+d,+e,+h", 0x7a00000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2719 {"cle_s.h", "+d,+e,+h", 0x7a20000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2720 {"cle_s.w", "+d,+e,+h", 0x7a40000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2721 {"cle_s.d", "+d,+e,+h", 0x7a60000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2722 {"clei_s.b", "+d,+e,+%", 0x7a000007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2723 {"clei_s.h", "+d,+e,+%", 0x7a200007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2724 {"clei_s.w", "+d,+e,+%", 0x7a400007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2725 {"clei_s.d", "+d,+e,+%", 0x7a600007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2726 {"cle_u.b", "+d,+e,+h", 0x7a80000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2727 {"cle_u.h", "+d,+e,+h", 0x7aa0000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2728 {"cle_u.w", "+d,+e,+h", 0x7ac0000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2729 {"cle_u.d", "+d,+e,+h", 0x7ae0000f, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2730 {"clei_u.b", "+d,+e,+$", 0x7a800007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2731 {"clei_u.h", "+d,+e,+$", 0x7aa00007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2732 {"clei_u.w", "+d,+e,+$", 0x7ac00007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2733 {"clei_u.d", "+d,+e,+$", 0x7ae00007, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2734 {"ld.b", "+d,+T(d)", 0x78000020, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
2735 {"ld.h", "+d,+U(d)", 0x78000021, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
2736 {"ld.w", "+d,+V(d)", 0x78000022, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
2737 {"ld.d", "+d,+W(d)", 0x78000023, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
2738 {"st.b", "+d,+T(d)", 0x78000024, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
2739 {"st.h", "+d,+U(d)", 0x78000025, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
2740 {"st.w", "+d,+V(d)", 0x78000026, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
2741 {"st.d", "+d,+W(d)", 0x78000027, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
2742 {"sat_s.b", "+d,+e,+!", 0x7870000a, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2743 {"sat_s.h", "+d,+e,+@", 0x7860000a, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2744 {"sat_s.w", "+d,+e,+x", 0x7840000a, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2745 {"sat_s.d", "+d,+e,+#", 0x7800000a, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2746 {"sat_u.b", "+d,+e,+!", 0x78f0000a, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2747 {"sat_u.h", "+d,+e,+@", 0x78e0000a, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2748 {"sat_u.w", "+d,+e,+x", 0x78c0000a, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2749 {"sat_u.d", "+d,+e,+#", 0x7880000a, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2750 {"add_a.b", "+d,+e,+h", 0x78000010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2751 {"add_a.h", "+d,+e,+h", 0x78200010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2752 {"add_a.w", "+d,+e,+h", 0x78400010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2753 {"add_a.d", "+d,+e,+h", 0x78600010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2754 {"adds_a.b", "+d,+e,+h", 0x78800010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2755 {"adds_a.h", "+d,+e,+h", 0x78a00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2756 {"adds_a.w", "+d,+e,+h", 0x78c00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2757 {"adds_a.d", "+d,+e,+h", 0x78e00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2758 {"adds_s.b", "+d,+e,+h", 0x79000010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2759 {"adds_s.h", "+d,+e,+h", 0x79200010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2760 {"adds_s.w", "+d,+e,+h", 0x79400010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2761 {"adds_s.d", "+d,+e,+h", 0x79600010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2762 {"adds_u.b", "+d,+e,+h", 0x79800010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2763 {"adds_u.h", "+d,+e,+h", 0x79a00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2764 {"adds_u.w", "+d,+e,+h", 0x79c00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2765 {"adds_u.d", "+d,+e,+h", 0x79e00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2766 {"ave_s.b", "+d,+e,+h", 0x7a000010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2767 {"ave_s.h", "+d,+e,+h", 0x7a200010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2768 {"ave_s.w", "+d,+e,+h", 0x7a400010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2769 {"ave_s.d", "+d,+e,+h", 0x7a600010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2770 {"ave_u.b", "+d,+e,+h", 0x7a800010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2771 {"ave_u.h", "+d,+e,+h", 0x7aa00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2772 {"ave_u.w", "+d,+e,+h", 0x7ac00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2773 {"ave_u.d", "+d,+e,+h", 0x7ae00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2774 {"aver_s.b", "+d,+e,+h", 0x7b000010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2775 {"aver_s.h", "+d,+e,+h", 0x7b200010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2776 {"aver_s.w", "+d,+e,+h", 0x7b400010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2777 {"aver_s.d", "+d,+e,+h", 0x7b600010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2778 {"aver_u.b", "+d,+e,+h", 0x7b800010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2779 {"aver_u.h", "+d,+e,+h", 0x7ba00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2780 {"aver_u.w", "+d,+e,+h", 0x7bc00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2781 {"aver_u.d", "+d,+e,+h", 0x7be00010, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2782 {"subs_s.b", "+d,+e,+h", 0x78000011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2783 {"subs_s.h", "+d,+e,+h", 0x78200011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2784 {"subs_s.w", "+d,+e,+h", 0x78400011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2785 {"subs_s.d", "+d,+e,+h", 0x78600011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2786 {"subs_u.b", "+d,+e,+h", 0x78800011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2787 {"subs_u.h", "+d,+e,+h", 0x78a00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2788 {"subs_u.w", "+d,+e,+h", 0x78c00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2789 {"subs_u.d", "+d,+e,+h", 0x78e00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2790 {"subsus_u.b", "+d,+e,+h", 0x79000011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2791 {"subsus_u.h", "+d,+e,+h", 0x79200011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2792 {"subsus_u.w", "+d,+e,+h", 0x79400011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2793 {"subsus_u.d", "+d,+e,+h", 0x79600011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2794 {"subsuu_s.b", "+d,+e,+h", 0x79800011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2795 {"subsuu_s.h", "+d,+e,+h", 0x79a00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2796 {"subsuu_s.w", "+d,+e,+h", 0x79c00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2797 {"subsuu_s.d", "+d,+e,+h", 0x79e00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2798 {"asub_s.b", "+d,+e,+h", 0x7a000011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2799 {"asub_s.h", "+d,+e,+h", 0x7a200011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2800 {"asub_s.w", "+d,+e,+h", 0x7a400011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2801 {"asub_s.d", "+d,+e,+h", 0x7a600011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2802 {"asub_u.b", "+d,+e,+h", 0x7a800011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2803 {"asub_u.h", "+d,+e,+h", 0x7aa00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2804 {"asub_u.w", "+d,+e,+h", 0x7ac00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2805 {"asub_u.d", "+d,+e,+h", 0x7ae00011, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2806 {"mulv.b", "+d,+e,+h", 0x78000012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2807 {"mulv.h", "+d,+e,+h", 0x78200012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2808 {"mulv.w", "+d,+e,+h", 0x78400012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2809 {"mulv.d", "+d,+e,+h", 0x78600012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2810 {"maddv.b", "+d,+e,+h", 0x78800012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2811 {"maddv.h", "+d,+e,+h", 0x78a00012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2812 {"maddv.w", "+d,+e,+h", 0x78c00012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2813 {"maddv.d", "+d,+e,+h", 0x78e00012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2814 {"msubv.b", "+d,+e,+h", 0x79000012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2815 {"msubv.h", "+d,+e,+h", 0x79200012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2816 {"msubv.w", "+d,+e,+h", 0x79400012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2817 {"msubv.d", "+d,+e,+h", 0x79600012, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2818 {"div_s.b", "+d,+e,+h", 0x7a000012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2819 {"div_s.h", "+d,+e,+h", 0x7a200012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2820 {"div_s.w", "+d,+e,+h", 0x7a400012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2821 {"div_s.d", "+d,+e,+h", 0x7a600012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2822 {"div_u.b", "+d,+e,+h", 0x7a800012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2823 {"div_u.h", "+d,+e,+h", 0x7aa00012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2824 {"div_u.w", "+d,+e,+h", 0x7ac00012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2825 {"div_u.d", "+d,+e,+h", 0x7ae00012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2826 {"mod_s.b", "+d,+e,+h", 0x7b000012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2827 {"mod_s.h", "+d,+e,+h", 0x7b200012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2828 {"mod_s.w", "+d,+e,+h", 0x7b400012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2829 {"mod_s.d", "+d,+e,+h", 0x7b600012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2830 {"mod_u.b", "+d,+e,+h", 0x7b800012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2831 {"mod_u.h", "+d,+e,+h", 0x7ba00012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2832 {"mod_u.w", "+d,+e,+h", 0x7bc00012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2833 {"mod_u.d", "+d,+e,+h", 0x7be00012, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2834 {"dotp_s.h", "+d,+e,+h", 0x78200013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2835 {"dotp_s.w", "+d,+e,+h", 0x78400013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2836 {"dotp_s.d", "+d,+e,+h", 0x78600013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2837 {"dotp_u.h", "+d,+e,+h", 0x78a00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2838 {"dotp_u.w", "+d,+e,+h", 0x78c00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2839 {"dotp_u.d", "+d,+e,+h", 0x78e00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2840 {"dpadd_s.h", "+d,+e,+h", 0x79200013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2841 {"dpadd_s.w", "+d,+e,+h", 0x79400013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2842 {"dpadd_s.d", "+d,+e,+h", 0x79600013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2843 {"dpadd_u.h", "+d,+e,+h", 0x79a00013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2844 {"dpadd_u.w", "+d,+e,+h", 0x79c00013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2845 {"dpadd_u.d", "+d,+e,+h", 0x79e00013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2846 {"dpsub_s.h", "+d,+e,+h", 0x7a200013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2847 {"dpsub_s.w", "+d,+e,+h", 0x7a400013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2848 {"dpsub_s.d", "+d,+e,+h", 0x7a600013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2849 {"dpsub_u.h", "+d,+e,+h", 0x7aa00013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2850 {"dpsub_u.w", "+d,+e,+h", 0x7ac00013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2851 {"dpsub_u.d", "+d,+e,+h", 0x7ae00013, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2852 {"sld.b", "+d,+e+*", 0x78000014, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2853 {"sld.h", "+d,+e+*", 0x78200014, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2854 {"sld.w", "+d,+e+*", 0x78400014, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2855 {"sld.d", "+d,+e+*", 0x78600014, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2856 {"sldi.b", "+d,+e+o", 0x78000019, 0xfff0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2857 {"sldi.h", "+d,+e+u", 0x78200019, 0xfff8003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2858 {"sldi.w", "+d,+e+v", 0x78300019, 0xfffc003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2859 {"sldi.d", "+d,+e+w", 0x78380019, 0xfffe003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2860 {"splat.b", "+d,+e+*", 0x78800014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2861 {"splat.h", "+d,+e+*", 0x78a00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2862 {"splat.w", "+d,+e+*", 0x78c00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2863 {"splat.d", "+d,+e+*", 0x78e00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2864 {"splati.b", "+d,+e+o", 0x78400019, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2865 {"splati.h", "+d,+e+u", 0x78600019, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2866 {"splati.w", "+d,+e+v", 0x78700019, 0xfffc003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2867 {"splati.d", "+d,+e+w", 0x78780019, 0xfffe003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2868 {"pckev.b", "+d,+e,+h", 0x79000014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2869 {"pckev.h", "+d,+e,+h", 0x79200014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2870 {"pckev.w", "+d,+e,+h", 0x79400014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2871 {"pckev.d", "+d,+e,+h", 0x79600014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2872 {"pckod.b", "+d,+e,+h", 0x79800014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2873 {"pckod.h", "+d,+e,+h", 0x79a00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2874 {"pckod.w", "+d,+e,+h", 0x79c00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2875 {"pckod.d", "+d,+e,+h", 0x79e00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2876 {"ilvl.b", "+d,+e,+h", 0x7a000014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2877 {"ilvl.h", "+d,+e,+h", 0x7a200014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2878 {"ilvl.w", "+d,+e,+h", 0x7a400014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2879 {"ilvl.d", "+d,+e,+h", 0x7a600014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2880 {"ilvr.b", "+d,+e,+h", 0x7a800014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2881 {"ilvr.h", "+d,+e,+h", 0x7aa00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2882 {"ilvr.w", "+d,+e,+h", 0x7ac00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2883 {"ilvr.d", "+d,+e,+h", 0x7ae00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2884 {"ilvev.b", "+d,+e,+h", 0x7b000014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2885 {"ilvev.h", "+d,+e,+h", 0x7b200014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2886 {"ilvev.w", "+d,+e,+h", 0x7b400014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2887 {"ilvev.d", "+d,+e,+h", 0x7b600014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2888 {"ilvod.b", "+d,+e,+h", 0x7b800014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2889 {"ilvod.h", "+d,+e,+h", 0x7ba00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2890 {"ilvod.w", "+d,+e,+h", 0x7bc00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2891 {"ilvod.d", "+d,+e,+h", 0x7be00014, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2892 {"vshf.b", "+d,+e,+h", 0x78000015, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2893 {"vshf.h", "+d,+e,+h", 0x78200015, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2894 {"vshf.w", "+d,+e,+h", 0x78400015, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2895 {"vshf.d", "+d,+e,+h", 0x78600015, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2896 {"srar.b", "+d,+e,+h", 0x78800015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2897 {"srar.h", "+d,+e,+h", 0x78a00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2898 {"srar.w", "+d,+e,+h", 0x78c00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2899 {"srar.d", "+d,+e,+h", 0x78e00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2900 {"srari.b", "+d,+e,+!", 0x7970000a, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2901 {"srari.h", "+d,+e,+@", 0x7960000a, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2902 {"srari.w", "+d,+e,+x", 0x7940000a, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2903 {"srari.d", "+d,+e,+#", 0x7900000a, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2904 {"srlr.b", "+d,+e,+h", 0x79000015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2905 {"srlr.h", "+d,+e,+h", 0x79200015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2906 {"srlr.w", "+d,+e,+h", 0x79400015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2907 {"srlr.d", "+d,+e,+h", 0x79600015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2908 {"srlri.b", "+d,+e,+!", 0x79f0000a, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2909 {"srlri.h", "+d,+e,+@", 0x79e0000a, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2910 {"srlri.w", "+d,+e,+x", 0x79c0000a, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2911 {"srlri.d", "+d,+e,+#", 0x7980000a, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2912 {"hadd_s.h", "+d,+e,+h", 0x7a200015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2913 {"hadd_s.w", "+d,+e,+h", 0x7a400015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2914 {"hadd_s.d", "+d,+e,+h", 0x7a600015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2915 {"hadd_u.h", "+d,+e,+h", 0x7aa00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2916 {"hadd_u.w", "+d,+e,+h", 0x7ac00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2917 {"hadd_u.d", "+d,+e,+h", 0x7ae00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2918 {"hsub_s.h", "+d,+e,+h", 0x7b200015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2919 {"hsub_s.w", "+d,+e,+h", 0x7b400015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2920 {"hsub_s.d", "+d,+e,+h", 0x7b600015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2921 {"hsub_u.h", "+d,+e,+h", 0x7ba00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2922 {"hsub_u.w", "+d,+e,+h", 0x7bc00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2923 {"hsub_u.d", "+d,+e,+h", 0x7be00015, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2924 {"and.v", "+d,+e,+h", 0x7800001e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2925 {"andi.b", "+d,+e,+|", 0x78000000, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2926 {"or.v", "+d,+e,+h", 0x7820001e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2927 {"ori.b", "+d,+e,+|", 0x79000000, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2928 {"nor.v", "+d,+e,+h", 0x7840001e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2929 {"nori.b", "+d,+e,+|", 0x7a000000, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2930 {"xor.v", "+d,+e,+h", 0x7860001e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2931 {"xori.b", "+d,+e,+|", 0x7b000000, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2932 {"bmnz.v", "+d,+e,+h", 0x7880001e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2933 {"bmnzi.b", "+d,+e,+|", 0x78000001, 0xff00003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2934 {"bmz.v", "+d,+e,+h", 0x78a0001e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2935 {"bmzi.b", "+d,+e,+|", 0x79000001, 0xff00003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2936 {"bsel.v", "+d,+e,+h", 0x78c0001e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2937 {"bseli.b", "+d,+e,+|", 0x7a000001, 0xff00003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
2938 {"shf.b", "+d,+e,+|", 0x78000002, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2939 {"shf.h", "+d,+e,+|", 0x79000002, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2940 {"shf.w", "+d,+e,+|", 0x7a000002, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2941 {"bnz.v", "+h,p", 0x45e00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2942 {"bz.v", "+h,p", 0x45600000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2943 {"fill.b", "+d,d", 0x7b00001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2944 {"fill.h", "+d,d", 0x7b01001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2945 {"fill.w", "+d,d", 0x7b02001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2946 {"fill.d", "+d,d", 0x7b03001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA64
, 0 },
2947 {"pcnt.b", "+d,+e", 0x7b04001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2948 {"pcnt.h", "+d,+e", 0x7b05001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2949 {"pcnt.w", "+d,+e", 0x7b06001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2950 {"pcnt.d", "+d,+e", 0x7b07001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2951 {"nloc.b", "+d,+e", 0x7b08001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2952 {"nloc.h", "+d,+e", 0x7b09001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2953 {"nloc.w", "+d,+e", 0x7b0a001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2954 {"nloc.d", "+d,+e", 0x7b0b001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2955 {"nlzc.b", "+d,+e", 0x7b0c001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2956 {"nlzc.h", "+d,+e", 0x7b0d001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2957 {"nlzc.w", "+d,+e", 0x7b0e001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2958 {"nlzc.d", "+d,+e", 0x7b0f001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2959 {"copy_s.b", "+k,+e+o", 0x78800019, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2960 {"copy_s.h", "+k,+e+u", 0x78a00019, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2961 {"copy_s.w", "+k,+e+v", 0x78b00019, 0xfffc003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2962 {"copy_s.d", "+k,+e+w", 0x78b80019, 0xfffe003f, WR_1
|RD_2
, 0, 0, MSA64
, 0 },
2963 {"copy_u.b", "+k,+e+o", 0x78c00019, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2964 {"copy_u.h", "+k,+e+u", 0x78e00019, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2965 {"copy_u.w", "+k,+e+v", 0x78f00019, 0xfffc003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
2966 {"copy_u.d", "+k,+e+w", 0x78f80019, 0xfffe003f, WR_1
|RD_2
, 0, 0, MSA64
, 0 },
2967 {"insert.b", "+d+o,d", 0x79000019, 0xfff0003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2968 {"insert.h", "+d+u,d", 0x79200019, 0xfff8003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2969 {"insert.w", "+d+v,d", 0x79300019, 0xfffc003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2970 {"insert.d", "+d+w,d", 0x79380019, 0xfffe003f, MOD_1
|RD_3
, 0, 0, MSA64
, 0 },
2971 {"insve.b", "+d+o,+e+&", 0x79400019, 0xfff0003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2972 {"insve.h", "+d+u,+e+&", 0x79600019, 0xfff8003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2973 {"insve.w", "+d+v,+e+&", 0x79700019, 0xfffc003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2974 {"insve.d", "+d+w,+e+&", 0x79780019, 0xfffe003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
2975 {"bnz.b", "+h,p", 0x47800000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2976 {"bnz.h", "+h,p", 0x47a00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2977 {"bnz.w", "+h,p", 0x47c00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2978 {"bnz.d", "+h,p", 0x47e00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2979 {"bz.b", "+h,p", 0x47000000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2980 {"bz.h", "+h,p", 0x47200000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2981 {"bz.w", "+h,p", 0x47400000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2982 {"bz.d", "+h,p", 0x47600000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
2983 {"ldi.b", "+d,+^", 0x7b000007, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
2984 {"ldi.h", "+d,+^", 0x7b200007, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
2985 {"ldi.w", "+d,+^", 0x7b400007, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
2986 {"ldi.d", "+d,+^", 0x7b600007, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
2987 {"fcaf.w", "+d,+e,+h", 0x7800001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2988 {"fcaf.d", "+d,+e,+h", 0x7820001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2989 {"fcun.w", "+d,+e,+h", 0x7840001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2990 {"fcun.d", "+d,+e,+h", 0x7860001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2991 {"fceq.w", "+d,+e,+h", 0x7880001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2992 {"fceq.d", "+d,+e,+h", 0x78a0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2993 {"fcueq.w", "+d,+e,+h", 0x78c0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2994 {"fcueq.d", "+d,+e,+h", 0x78e0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2995 {"fclt.w", "+d,+e,+h", 0x7900001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2996 {"fclt.d", "+d,+e,+h", 0x7920001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2997 {"fcult.w", "+d,+e,+h", 0x7940001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2998 {"fcult.d", "+d,+e,+h", 0x7960001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
2999 {"fcle.w", "+d,+e,+h", 0x7980001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3000 {"fcle.d", "+d,+e,+h", 0x79a0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3001 {"fcule.w", "+d,+e,+h", 0x79c0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3002 {"fcule.d", "+d,+e,+h", 0x79e0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3003 {"fsaf.w", "+d,+e,+h", 0x7a00001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3004 {"fsaf.d", "+d,+e,+h", 0x7a20001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3005 {"fsun.w", "+d,+e,+h", 0x7a40001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3006 {"fsun.d", "+d,+e,+h", 0x7a60001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3007 {"fseq.w", "+d,+e,+h", 0x7a80001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3008 {"fseq.d", "+d,+e,+h", 0x7aa0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3009 {"fsueq.w", "+d,+e,+h", 0x7ac0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3010 {"fsueq.d", "+d,+e,+h", 0x7ae0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3011 {"fslt.w", "+d,+e,+h", 0x7b00001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3012 {"fslt.d", "+d,+e,+h", 0x7b20001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3013 {"fsult.w", "+d,+e,+h", 0x7b40001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3014 {"fsult.d", "+d,+e,+h", 0x7b60001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3015 {"fsle.w", "+d,+e,+h", 0x7b80001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3016 {"fsle.d", "+d,+e,+h", 0x7ba0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3017 {"fsule.w", "+d,+e,+h", 0x7bc0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3018 {"fsule.d", "+d,+e,+h", 0x7be0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3019 {"fadd.w", "+d,+e,+h", 0x7800001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3020 {"fadd.d", "+d,+e,+h", 0x7820001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3021 {"fsub.w", "+d,+e,+h", 0x7840001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3022 {"fsub.d", "+d,+e,+h", 0x7860001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3023 {"fmul.w", "+d,+e,+h", 0x7880001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3024 {"fmul.d", "+d,+e,+h", 0x78a0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3025 {"fdiv.w", "+d,+e,+h", 0x78c0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3026 {"fdiv.d", "+d,+e,+h", 0x78e0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3027 {"fmadd.w", "+d,+e,+h", 0x7900001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3028 {"fmadd.d", "+d,+e,+h", 0x7920001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3029 {"fmsub.w", "+d,+e,+h", 0x7940001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3030 {"fmsub.d", "+d,+e,+h", 0x7960001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3031 {"fexp2.w", "+d,+e,+h", 0x79c0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3032 {"fexp2.d", "+d,+e,+h", 0x79e0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3033 {"fexdo.h", "+d,+e,+h", 0x7a00001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3034 {"fexdo.w", "+d,+e,+h", 0x7a20001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3035 {"ftq.h", "+d,+e,+h", 0x7a80001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3036 {"ftq.w", "+d,+e,+h", 0x7aa0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3037 {"fmin.w", "+d,+e,+h", 0x7b00001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3038 {"fmin.d", "+d,+e,+h", 0x7b20001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3039 {"fmin_a.w", "+d,+e,+h", 0x7b40001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3040 {"fmin_a.d", "+d,+e,+h", 0x7b60001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3041 {"fmax.w", "+d,+e,+h", 0x7b80001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3042 {"fmax.d", "+d,+e,+h", 0x7ba0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3043 {"fmax_a.w", "+d,+e,+h", 0x7bc0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3044 {"fmax_a.d", "+d,+e,+h", 0x7be0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3045 {"fcor.w", "+d,+e,+h", 0x7840001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3046 {"fcor.d", "+d,+e,+h", 0x7860001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3047 {"fcune.w", "+d,+e,+h", 0x7880001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3048 {"fcune.d", "+d,+e,+h", 0x78a0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3049 {"fcne.w", "+d,+e,+h", 0x78c0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3050 {"fcne.d", "+d,+e,+h", 0x78e0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3051 {"mul_q.h", "+d,+e,+h", 0x7900001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3052 {"mul_q.w", "+d,+e,+h", 0x7920001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3053 {"madd_q.h", "+d,+e,+h", 0x7940001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3054 {"madd_q.w", "+d,+e,+h", 0x7960001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3055 {"msub_q.h", "+d,+e,+h", 0x7980001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3056 {"msub_q.w", "+d,+e,+h", 0x79a0001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3057 {"fsor.w", "+d,+e,+h", 0x7a40001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3058 {"fsor.d", "+d,+e,+h", 0x7a60001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3059 {"fsune.w", "+d,+e,+h", 0x7a80001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3060 {"fsune.d", "+d,+e,+h", 0x7aa0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3061 {"fsne.w", "+d,+e,+h", 0x7ac0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3062 {"fsne.d", "+d,+e,+h", 0x7ae0001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3063 {"mulr_q.h", "+d,+e,+h", 0x7b00001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3064 {"mulr_q.w", "+d,+e,+h", 0x7b20001c, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3065 {"maddr_q.h", "+d,+e,+h", 0x7b40001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3066 {"maddr_q.w", "+d,+e,+h", 0x7b60001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3067 {"msubr_q.h", "+d,+e,+h", 0x7b80001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3068 {"msubr_q.w", "+d,+e,+h", 0x7ba0001c, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3069 {"fclass.w", "+d,+e", 0x7b20001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3070 {"fclass.d", "+d,+e", 0x7b21001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3071 {"ftrunc_s.w", "+d,+e", 0x7b22001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3072 {"ftrunc_s.d", "+d,+e", 0x7b23001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3073 {"ftrunc_u.w", "+d,+e", 0x7b24001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3074 {"ftrunc_u.d", "+d,+e", 0x7b25001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3075 {"fsqrt.w", "+d,+e", 0x7b26001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3076 {"fsqrt.d", "+d,+e", 0x7b27001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3077 {"frsqrt.w", "+d,+e", 0x7b28001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3078 {"frsqrt.d", "+d,+e", 0x7b29001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3079 {"frcp.w", "+d,+e", 0x7b2a001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3080 {"frcp.d", "+d,+e", 0x7b2b001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3081 {"frint.w", "+d,+e", 0x7b2c001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3082 {"frint.d", "+d,+e", 0x7b2d001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3083 {"flog2.w", "+d,+e", 0x7b2e001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3084 {"flog2.d", "+d,+e", 0x7b2f001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3085 {"fexupl.w", "+d,+e", 0x7b30001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3086 {"fexupl.d", "+d,+e", 0x7b31001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3087 {"fexupr.w", "+d,+e", 0x7b32001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3088 {"fexupr.d", "+d,+e", 0x7b33001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3089 {"ffql.w", "+d,+e", 0x7b34001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3090 {"ffql.d", "+d,+e", 0x7b35001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3091 {"ffqr.w", "+d,+e", 0x7b36001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3092 {"ffqr.d", "+d,+e", 0x7b37001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3093 {"ftint_s.w", "+d,+e", 0x7b38001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3094 {"ftint_s.d", "+d,+e", 0x7b39001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3095 {"ftint_u.w", "+d,+e", 0x7b3a001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3096 {"ftint_u.d", "+d,+e", 0x7b3b001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3097 {"ffint_s.w", "+d,+e", 0x7b3c001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3098 {"ffint_s.d", "+d,+e", 0x7b3d001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3099 {"ffint_u.w", "+d,+e", 0x7b3e001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3100 {"ffint_u.d", "+d,+e", 0x7b3f001e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3101 {"ctcmsa", "+l,d", 0x783e0019, 0xffff003f, RD_2
|COD
, 0, 0, MSA
, 0 },
3102 {"cfcmsa", "+k,+n", 0x787e0019, 0xffff003f, WR_1
|COD
, 0, 0, MSA
, 0 },
3103 {"move.v", "+d,+e", 0x78be0019, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
3104 {"lsa", "d,v,t,+~", 0x00000005, 0xfc00073f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
3105 {"dlsa", "d,v,t,+~", 0x00000015, 0xfc00073f, WR_1
|RD_2
|RD_3
, 0, 0, MSA64
, 0 },
3106 /* No hazard protection on coprocessor instructions--they shouldn't
3107 change the state of the processor and if they do it's up to the
3108 user to put in nops as necessary. These are at the end so that the
3109 disassembler recognizes more specific versions first. */
3110 {"c0", "C", 0x42000000, 0xfe000000, CP
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
3111 {"c1", "C", 0x46000000, 0xfe000000, FP_S
, 0, I1
, 0, 0 },
3112 {"c2", "C", 0x4a000000, 0xfe000000, CP
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
3113 {"c3", "C", 0x4e000000, 0xfe000000, CP
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
3114 {"cop0", "C", 0, (int) M_COP0
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
3115 {"cop1", "C", 0, (int) M_COP1
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
3116 {"cop2", "C", 0, (int) M_COP2
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
3117 {"cop3", "C", 0, (int) M_COP3
, INSN_MACRO
, 0, I1
, 0, IOCT
|IOCTP
|IOCT2
},
3118 /* RFE conflicts with the new Virt spec instruction tlbgp. */
3119 {"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1
|T3
, 0, 0 },
3122 #define MIPS_NUM_OPCODES \
3123 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
3124 const int bfd_mips_num_builtin_opcodes
= MIPS_NUM_OPCODES
;
3126 /* const removed from the following to allow for dynamic extensions to the
3127 * built-in instruction set. */
3128 struct mips_opcode
*mips_opcodes
=
3129 (struct mips_opcode
*) mips_builtin_opcodes
;
3130 int bfd_mips_num_opcodes
= MIPS_NUM_OPCODES
;
3131 #undef MIPS_NUM_OPCODES
projects / deliverable / binutils-gdb.git / blob