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* mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
1 /* mips.h. Mips opcode list for GDB, the GNU debugger.
2 Copyright 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
5
6 This file is part of GDB, GAS, and the GNU binutils.
7
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 1, or (at your option) any later version.
12
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22 #include <stdio.h>
23 #include "ansidecl.h"
24 #include "opcode/mips.h"
25
26 /* Short hand so the lines aren't too long. */
27
28 #define LDD INSN_LOAD_MEMORY_DELAY
29 #define LCD INSN_LOAD_COPROC_DELAY
30 #define UBD INSN_UNCOND_BRANCH_DELAY
31 #define CBD INSN_COND_BRANCH_DELAY
32 #define COD INSN_COPROC_MOVE_DELAY
33 #define CLD INSN_COPROC_MEMORY_DELAY
34 #define CBL INSN_COND_BRANCH_LIKELY
35 #define TRAP INSN_TRAP
36 #define SM INSN_STORE_MEMORY
37
38 #define WR_d INSN_WRITE_GPR_D
39 #define WR_t INSN_WRITE_GPR_T
40 #define WR_31 INSN_WRITE_GPR_31
41 #define WR_D INSN_WRITE_FPR_D
42 #define WR_T INSN_WRITE_FPR_T
43 #define WR_S INSN_WRITE_FPR_S
44 #define RD_s INSN_READ_GPR_S
45 #define RD_b INSN_READ_GPR_S
46 #define RD_t INSN_READ_GPR_T
47 #define RD_S INSN_READ_FPR_S
48 #define RD_T INSN_READ_FPR_T
49 #define RD_R INSN_READ_FPR_R
50 #define WR_CC INSN_WRITE_COND_CODE
51 #define RD_CC INSN_READ_COND_CODE
52 #define RD_C0 INSN_COP
53 #define RD_C1 INSN_COP
54 #define RD_C2 INSN_COP
55 #define RD_C3 INSN_COP
56 #define WR_C0 INSN_COP
57 #define WR_C1 INSN_COP
58 #define WR_C2 INSN_COP
59 #define WR_C3 INSN_COP
60 #define WR_HI INSN_WRITE_HI
61 #define WR_LO INSN_WRITE_LO
62 #define RD_HI INSN_READ_HI
63 #define RD_LO INSN_READ_LO
64
65 /* start-sanitize-vr5400 */
66 #define WR_HILO WR_HI|WR_LO
67 #define RD_HILO RD_HI|RD_LO
68 #define MOD_HILO WR_HILO|RD_HILO
69 /* end-sanitize-vr5400 */
70
71 #define I1 INSN_ISA1
72 #define I2 INSN_ISA2
73 #define I3 INSN_ISA3
74 #define I4 INSN_ISA4
75 #define P3 INSN_4650
76 #define L1 INSN_4010
77 #define V1 INSN_4100
78 #define T3 INSN_3900
79 /* start-sanitize-tx49 */
80 #define T4 INSN_4900
81 /* end-sanitize-tx49 */
82 /* start-sanitize-vr5400 */
83 #define N5 INSN_5400
84 /* end-sanitize-vr5400 */
85 /* start-sanitize-r5900 */
86 #define T5 INSN_5900
87 /* end-sanitize-r5900 */
88
89 #define G1 (T3 \
90 /* start-sanitize-tx49 */ \
91 | T4 \
92 /* end-sanitize-tx49 */ \
93 /* start-sanitize-r5900 */ \
94 | T5 \
95 /* end-sanitize-r5900 */ \
96 )
97
98 #define G2 (T3 \
99 /* start-sanitize-tx49 */ \
100 | T4 \
101 /* end-sanitize-tx49 */ \
102 )
103
104 #define G3 (I4 \
105 /* start-sanitize-tx49 */ \
106 | T4 \
107 /* end-sanitize-tx49 */ \
108 )
109
110 /* The order of overloaded instructions matters. Label arguments and
111 register arguments look the same. Instructions that can have either
112 for arguments must apear in the correct order in this table for the
113 assembler to pick the right one. In other words, entries with
114 immediate operands must apear after the same instruction with
115 registers.
116
117 Many instructions are short hand for other instructions (i.e., The
118 jal <register> instruction is short for jalr <register>). */
119
120 const struct mips_opcode mips_builtin_opcodes[] = {
121 /* These instructions appear first so that the disassembler will find
122 them first. The assemblers uses a hash table based on the
123 instruction name anyhow. */
124 /* name, args, mask, match, pinfo */
125 {"nop", "", 0x00000000, 0xffffffff, 0, I1 },
126 {"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
127 {"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
128 {"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
129 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
130 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
131 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
132 {"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
133 {"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
134 {"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
135
136 {"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
137 {"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
138 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
139 {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
140 {"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
141 {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1},
142 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1},
143 {"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
144 {"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
145 {"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
146 {"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
147 {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
148 {"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
149 {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
150 /* b is at the top of the table. */
151 /* bal is at the top of the table. */
152 {"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
153 {"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
154 {"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
155 {"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4 },
156 {"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
157 {"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4 },
158 {"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
159 {"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
160 {"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
161 {"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
162 {"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
163 {"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
164 {"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
165 {"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4 },
166 {"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
167 {"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4 },
168 {"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
169 {"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
170 {"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
171 {"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
172 {"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
173 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
174 {"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
175 {"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
176 {"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
177 {"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
178 {"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
179 {"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
180 {"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
181 {"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
182 {"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
183 {"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
184 {"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
185 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
186 {"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
187 {"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
188 {"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
189 {"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
190 {"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
191 {"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
192 {"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
193 {"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
194 {"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
195 {"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
196 {"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
197 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
198 {"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
199 {"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
200 {"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
201 {"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
202 {"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
203 {"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
204 {"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
205 {"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
206 {"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
207 {"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
208 {"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
209 {"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
210 {"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
211 {"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
212 {"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
213 {"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
214 {"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
215 {"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
216 {"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
217 {"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
218 {"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
219 {"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
220 {"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
221 {"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
222 {"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
223 {"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
224 {"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
225 {"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
226 {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
227 {"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
228 {"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
229 {"break", "c", 0x0000000d, 0xfc00003f, TRAP, I1 },
230 {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
231 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
232 {"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
233 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
234 {"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
235 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
236 {"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
237 {"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
238 {"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
239 {"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
240 {"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
241 {"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
242 {"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
243 {"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
244 {"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
245 {"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
246 {"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
247 {"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
248 {"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
249 {"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
250 {"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
251 {"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
252 {"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
253 {"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
254 {"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
255 {"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
256 {"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
257 {"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
258 {"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
259 {"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
260 {"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
261 {"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
262 {"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
263 {"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
264 {"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
265 {"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
266 {"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
267 {"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
268 {"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
269 {"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
270 {"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
271 {"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
272 {"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
273 {"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
274 {"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
275 {"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
276 {"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
277 {"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
278 {"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
279 {"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
280 {"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
281 {"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
282 {"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
283 {"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
284 {"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
285 {"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
286 {"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
287 {"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
288 {"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
289 {"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
290 {"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
291 {"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
292 {"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
293 {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
294 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3 },
295 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
296 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
297 {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
298 {"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
299 {"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
300 {"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
301 {"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
302 {"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
303 {"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
304 {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
305 {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
306 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
307 {"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
308 {"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
309 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
310 {"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
311 {"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
312 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
313 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
314 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
315 {"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
316 {"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
317 {"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
318 {"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
319 {"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
320 {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
321 {"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
322 {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
323 {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
324 {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
325 {"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
326 /* start-sanitize-vr5400 */
327 {"dbreak", "", 0x7000003f, 0xffffffff, 0, N5 },
328 /* end-sanitize-vr5400 */
329 /* dctr and dctw are used on the r5000. */
330 {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
331 {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
332 {"deret", "", 0x4200001f, 0xffffffff, 0, G2 },
333 /* For ddiv, see the comments about div. */
334 {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
335 {"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
336 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
337 /* For ddivu, see the comments about div. */
338 {"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
339 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
340 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
341 /* The MIPS assembler treats the div opcode with two operands as
342 though the first operand appeared twice (the first operand is both
343 a source and a destination). To get the div machine instruction,
344 you must use an explicit destination of $0. */
345 {"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
346 {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
347 {"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
348 {"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
349 /* start-sanitize-r5900 */
350 {"div1", "s,t", 0x7000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
351 /* end-sanitize-r5900 */
352 {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
353 {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
354 /* For divu, see the comments about div. */
355 {"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
356 {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
357 {"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
358 {"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
359 /* start-sanitize-r5900 */
360 {"divu1", "s,t", 0x7000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
361 /* end-sanitize-r5900 */
362 {"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
363 {"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
364 {"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
365 {"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
366 {"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO, V1 },
367 {"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
368 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
369 {"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
370 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
371 {"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
372 {"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
373 {"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
374 {"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
375 {"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
376 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
377 {"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
378 /* start-sanitize-tx49 */
379 {"dmult", "d,s,t", 0x0000001c, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
380 /* end-sanitize-tx49 */
381 {"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
382 /* start-sanitize-tx49 */
383 {"dmultu", "d,s,t", 0x0000001d, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
384 /* end-sanitize-tx49 */
385 {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
386 {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
387 {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
388 {"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
389 {"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
390 {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
391 {"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
392 {"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
393 /* start-sanitize-vr5400 */
394 {"dret", "", 0x7000003e, 0xffffffff, 0, N5 },
395 {"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
396 {"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
397 {"dror", "d,w,>", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
398 {"dror", "d,w,<", 0x00200036, 0xffe0003f, WR_d|RD_t, N5 },
399 /* end-sanitize-vr5400 */
400 {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
401 {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
402 {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
403 {"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
404 {"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
405 {"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
406 {"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
407 {"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
408 {"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
409 {"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
410 {"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
411 {"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
412 {"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
413 {"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
414 {"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
415 {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
416 {"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
417 {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
418 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
419 {"eret", "", 0x42000018, 0xffffffff, 0, I3 },
420 {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
421 {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
422 {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
423 {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
424 {"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
425 {"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
426 {"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
427 {"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
428 {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
429 {"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
430 /* SVR4 PIC code requires special handling for j, so it must be a
431 macro. */
432 {"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
433 /* This form of j is used by the disassembler and internally by the
434 assembler, but will never match user input (because the line above
435 will match first). */
436 {"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
437 {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
438 {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
439 /* SVR4 PIC code requires special handling for jal, so it must be a
440 macro. */
441 {"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
442 {"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
443 {"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
444 /* This form of jal is used by the disassembler and internally by the
445 assembler, but will never match user input (because the line above
446 will match first). */
447 {"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
448 /* jalx really should only be avaliable if mips16 is available,
449 but for now make it I1. */
450 {"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
451 {"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
452 {"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
453 {"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
454 {"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
455 {"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
456 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
457 {"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
458 {"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
459 {"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
460 {"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
461 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
462 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
463 {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
464 {"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
465 {"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
466 {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
467 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
468 {"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
469 {"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
470 {"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
471 {"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
472 {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
473 {"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
474 {"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
475 {"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
476 {"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
477 {"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
478 {"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
479 /* li is at the start of the table. */
480 {"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
481 {"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
482 {"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
483 {"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
484 {"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
485 {"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
486 {"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
487 {"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
488 {"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
489 /* start-sanitize-r5900 */
490 {"lq", "t,o(b)", 0x78000000, 0xfc000000, WR_t|RD_b, T5 },
491 /* end-sanitize-r5900 */
492 {"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
493 {"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
494 {"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
495 {"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
496 {"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
497 {"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
498 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
499 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
500 {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
501 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
502 {"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
503 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
504 {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
505 {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
506 {"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
507 {"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
508 {"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
509 {"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
510 {"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
511 {"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
512 {"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
513 {"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
514 {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
515 {"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
516 {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
517 /* start-sanitize-vr5400 */
518 {"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
519 {"maccu", "d,s,t", 0x00000159, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
520 {"macchi", "d,s,t", 0x00000358, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
521 {"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
522 /* end-sanitize-vr5400 */
523 {"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
524 {"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
525 {"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s,L1 },
526 {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
527 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
528 /* start-sanitize-r5900 */
529 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, T5 },
530 /* end-sanitize-r5900 */
531 {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
532 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, G1 },
533 {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1 },
534 /* start-sanitize-r5900 */
535 {"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
536 {"madd1", "d,s,t", 0x70000020, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 },
537 /* end-sanitize-r5900 */
538 {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
539 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, G1 },
540 {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1 },
541 /* start-sanitize-r5900 */
542 {"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
543 {"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 },
544 /* end-sanitize-r5900 */
545 {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 },
546 /* start-sanitize-vr5400 */
547 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0|WR_t, N5 },
548 /* end-sanitize-vr5400 */
549 /* start-sanitize-r5900 */
550 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0|WR_t, T5 },
551 /* end-sanitize-r5900 */
552 /* start-sanitize-vr5400 */
553 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0|WR_t, N5 },
554 /* end-sanitize-vr5400 */
555 /* start-sanitize-r5900 */
556 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0|WR_t, T5 },
557 /* end-sanitize-r5900 */
558 /* start-sanitize-vr5400 */
559 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0|RD_t, N5 },
560 /* end-sanitize-vr5400 */
561 /* start-sanitize-r5900 */
562 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0|RD_t, T5 },
563 /* end-sanitize-r5900 */
564 /* start-sanitize-vr5400 */
565 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0|RD_t, N5 },
566 /* end-sanitize-vr5400 */
567 /* start-sanitize-r5900 */
568 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0|RD_t, T5 },
569 /* end-sanitize-r5900 */
570 {"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
571 {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
572 {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
573 {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
574 {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
575 /* start-sanitize-vr5400 */
576 {"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, N5 },
577 /* end-sanitize-vr5400 */
578 {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
579 /* start-sanitize-r5900 */
580 {"mfhi1", "d", 0x70000010, 0xffff07ff, WR_d|RD_HI, T5 },
581 /* end-sanitize-r5900 */
582 {"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
583 /* start-sanitize-r5900 */
584 {"mflo1", "d", 0x70000012, 0xffff07ff, WR_d|RD_LO, T5 },
585 {"mfsa", "d", 0x00000028, 0xffff07ff, WR_d, T5 },
586 /* end-sanitize-r5900 */
587 {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
588 {"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
589 {"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4 },
590 {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4 },
591 {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4 },
592 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4 },
593 /* start-sanitize-r5900 */
594 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
595 /* end-sanitize-r5900 */
596 {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1 },
597 {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4 },
598 {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4 },
599 {"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4 },
600 {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4 },
601 {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4 },
602 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4 },
603 /* start-sanitize-r5900 */
604 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
605 /* end-sanitize-r5900 */
606 {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1 },
607 {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4 },
608 {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4 },
609 /* start-sanitize-vr5400 */
610 {"msac", "d,s,t", 0x000001d8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
611 {"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
612 {"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
613 {"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
614 /* end-sanitize-vr5400 */
615 /* move is at the top of the table. */
616 {"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
617 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
618 /* start-sanitize-r5900 */
619 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, T5 },
620 /* end-sanitize-r5900 */
621 {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
622 {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
623 {"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
624 {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
625 {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
626 {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
627 {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
628 /* start-sanitize-vr5400 */
629 {"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, N5 },
630 /* end-sanitize-vr5400 */
631 {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
632 /* start-sanitize-r5900 */
633 {"mthi1", "s", 0x70000011, 0xfc1fffff, RD_s|WR_HI, T5 },
634 /* end-sanitize-r5900 */
635 {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
636 /* start-sanitize-r5900 */
637 {"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_s|WR_LO, T5 },
638 {"mtsa", "s", 0x00000029, 0xfc1fffff, RD_s, T5 },
639 {"mtsab", "s,j", 0x04180000, 0xfc1f0000, RD_s, T5 },
640 {"mtsah", "s,j", 0x04190000, 0xfc1f0000, RD_s, T5 },
641 /* end-sanitize-r5900 */
642 {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
643 {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
644 /* start-sanitize-vr5400 */
645 {"mulu", "d,s,t", 0x00000059, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
646 {"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
647 {"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
648 {"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
649 /* end-sanitize-vr5400 */
650 {"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, P3 },
651 {"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
652 {"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
653 {"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
654 {"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
655 {"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
656 {"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
657 /* start-sanitize-vr5400 */
658 {"muls", "d,s,t", 0x000000d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
659 {"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
660 {"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
661 {"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
662 /* end-sanitize-vr5400 */
663 {"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1},
664 {"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1},
665 /* start-sanitize-r5900 */
666 {"mult1", "d,s,t", 0x70000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
667 /* end-sanitize-r5900 */
668 {"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1},
669 {"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1},
670 /* start-sanitize-r5900 */
671 {"multu1", "d,s,t", 0x70000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
672 /* end-sanitize-r5900 */
673 {"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
674 {"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
675 {"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
676 {"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
677 {"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
678 {"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
679 {"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
680 {"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
681 /* nop is at the start of the table. */
682 {"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
683 {"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
684 {"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
685 {"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
686 {"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
687 {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
688
689 /* start-sanitize-r5900 */
690 {"pabsh", "d,t", 0x70000168, 0xffe007ff, WR_d|RD_t, T5 },
691 {"pabsw", "d,t", 0x70000068, 0xffe007ff, WR_d|RD_t, T5 },
692 {"paddb", "d,v,t", 0x70000208, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
693 {"paddh", "d,v,t", 0x70000108, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
694 {"paddw", "d,v,t", 0x70000008, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
695 {"paddsb", "d,v,t", 0x70000608, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
696 {"paddsh", "d,v,t", 0x70000508, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
697 {"paddsw", "d,v,t", 0x70000408, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
698 {"paddub", "d,v,t", 0x70000628, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
699 {"padduh", "d,v,t", 0x70000528, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
700 {"padduw", "d,v,t", 0x70000428, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
701 {"padsbh", "d,v,t", 0x70000128, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
702 {"pand", "d,v,t", 0x70000489, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
703 {"pceqb", "d,v,t", 0x700002a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
704 {"pceqh", "d,v,t", 0x700001a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
705 {"pceqw", "d,v,t", 0x700000a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
706
707 {"pcgtb", "d,v,t", 0x70000288, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
708 {"pcgth", "d,v,t", 0x70000188, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
709 {"pcgtw", "d,v,t", 0x70000088, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
710
711 {"pcpyh", "d,t", 0x700006e9, 0xffe007ff, WR_d|RD_t, T5 },
712
713 {"pcpyld", "d,v,t", 0x70000389, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
714 {"pcpyud", "d,v,t", 0x700003a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
715
716 {"pdivbw", "s,t", 0x70000749, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
717 {"pdivuw", "s,t", 0x70000369, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
718 {"pdivw", "s,t", 0x70000349, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
719
720 {"pexch", "d,t", 0x700006a9, 0xffe007ff, WR_d|RD_t, T5 },
721 {"pexcw", "d,t", 0x700007a9, 0xffe007ff, WR_d|RD_t, T5 },
722 {"pexeh", "d,t", 0x70000689, 0xffe007ff, WR_d|RD_t, T5 },
723 {"pexoh", "d,t", 0x70000689, 0xffe007ff, WR_d|RD_t, T5 },
724 {"pexew", "d,t", 0x70000789, 0xffe007ff, WR_d|RD_t, T5 },
725 {"pexow", "d,t", 0x70000789, 0xffe007ff, WR_d|RD_t, T5 },
726
727 {"pext5", "d,t", 0x70000788, 0xffe007ff, WR_d|RD_t, T5 },
728
729 {"pextlb", "d,v,t", 0x70000688, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
730 {"pextlh", "d,v,t", 0x70000588, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
731 {"pextlw", "d,v,t", 0x70000488, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
732 {"pextub", "d,v,t", 0x700006a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
733 {"pextuh", "d,v,t", 0x700005a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
734 {"pextuw", "d,v,t", 0x700004a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
735
736 {"phmaddh", "d,v,t", 0x70000449, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
737 {"phmsubh", "d,v,t", 0x70000549, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
738
739 {"pinth", "d,v,t", 0x70000289, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
740 {"pinteh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
741 {"pintoh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
742
743 {"plzcw", "d,v", 0x70000004, 0xfc1f07ff, WR_d|RD_s, T5 },
744
745 {"pmaddh", "d,v,t", 0x70000409, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
746 {"pmadduw", "d,v,t", 0x70000029, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
747 {"pmaddw", "d,v,t", 0x70000009, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
748
749 {"pmaxh", "d,v,t", 0x700001c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
750 {"pmaxw", "d,v,t", 0x700000c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
751
752 {"pmfhi", "d", 0x70000209, 0xffff07ff, WR_d|RD_HI, T5 },
753 {"pmflo", "d", 0x70000249, 0xffff07ff, WR_d|RD_LO, T5 },
754
755 {"pmfhl.lw", "d", 0x70000030, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
756 {"pmfhl.uw", "d", 0x70000070, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
757 {"pmfhl.slw","d", 0x700000b0, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
758 {"pmfhl.lh", "d", 0x700000f0, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
759 {"pmfhl.sh", "d", 0x70000130, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
760
761 {"pminh", "d,v,t", 0x700001e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
762 {"pminw", "d,v,t", 0x700000e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
763
764 {"pmsubh", "d,v,t", 0x70000509, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
765 {"pmsubw", "d,v,t", 0x70000109, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
766
767 {"pmthi", "v", 0x70000229, 0xfc1fffff, WR_HI|RD_s, T5 },
768 {"pmtlo", "v", 0x70000269, 0xfc1fffff, WR_LO|RD_s, T5 },
769
770 {"pmthl.lw", "v", 0x70000031, 0xfc1fffff, WR_HI|WR_LO|RD_s, T5 },
771
772 {"pmulth", "d,v,t", 0x70000709, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
773 {"pmultuw", "d,v,t", 0x70000329, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
774 {"pmultw", "d,v,t", 0x70000309, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
775
776 {"pnor", "d,v,t", 0x700004e9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
777 {"por", "d,v,t", 0x700004a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
778
779 {"ppac5", "d,t", 0x700007c8, 0xffe007ff, WR_d|RD_t, T5 },
780
781 {"ppacb", "d,v,t", 0x700006c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
782 {"ppach", "d,v,t", 0x700005c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
783 {"ppacw", "d,v,t", 0x700004c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
784
785 {"prevh", "d,t", 0x700006c9, 0xffe007ff, WR_d|RD_t, T5 },
786 {"prot3w", "d,t", 0x700007c9, 0xffe007ff, WR_d|RD_t, T5 },
787
788 {"psllh", "d,t,<", 0x70000034, 0xffe0003f, WR_d|RD_t, T5 },
789 {"psllvw", "d,t,s", 0x70000089, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
790 {"psllw", "d,t,<", 0x7000003c, 0xffe0003f, WR_d|RD_t, T5 },
791
792 {"psrah", "d,t,<", 0x70000037, 0xffe0003f, WR_d|RD_t, T5 },
793 {"psravw", "d,t,s", 0x700000e9, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
794 {"psraw", "d,t,<", 0x7000003f, 0xffe0003f, WR_d|RD_t, T5 },
795
796 {"psrlh", "d,t,<", 0x70000036, 0xffe0003f, WR_d|RD_t, T5 },
797 {"psrlvw", "d,t,s", 0x700000c9, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
798 {"psrlw", "d,t,<", 0x7000003e, 0xffe0003f, WR_d|RD_t, T5 },
799
800 {"psubb", "d,v,t", 0x70000248, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
801 {"psubh", "d,v,t", 0x70000148, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
802 {"psubsb", "d,v,t", 0x70000648, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
803 {"psubsh", "d,v,t", 0x70000548, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
804 {"psubsw", "d,v,t", 0x70000448, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
805 {"psubub", "d,v,t", 0x70000668, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
806 {"psubuh", "d,v,t", 0x70000568, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
807 {"psubuw", "d,v,t", 0x70000468, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
808 {"psubw", "d,v,t", 0x70000048, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
809
810 {"pxor", "d,v,t", 0x700004c9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
811 /* end-sanitize-r5900 */
812
813 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3 },
814 {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
815
816 /* start-sanitize-r5900 */
817 {"qfsrv", "d,v,t", 0x700006e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
818 /* end-sanitize-r5900 */
819
820 {"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
821 {"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
822 {"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
823 {"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
824 {"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
825 {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
826 {"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
827 {"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
828 {"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
829 {"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
830 {"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
831 /* start-sanitize-vr5400 */
832 {"ror", "d,t,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 },
833 /* end-sanitize-vr5400 */
834 {"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
835 {"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
836 /* start-sanitize-vr5400 */
837 {"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
838 /* end-sanitize-vr5400 */
839 {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
840 {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
841 {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
842 {"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
843 {"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
844 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
845 /* start-sanitize-r5900 */
846 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, T5 },
847 /* end-sanitize-r5900 */
848 {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
849 {"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
850 {"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
851 {"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
852 {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
853 {"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
854 {"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
855 {"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
856 {"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
857 {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
858 {"sdbbp", "c", 0x0000000e, 0xfc00003f, TRAP, G2 },
859 {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
860 {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
861 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
862 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
863 {"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
864 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
865 {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
866 {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
867 {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b, I2 },
868 {"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
869 {"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
870 {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
871 {"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
872 {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
873 {"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
874 {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
875 {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
876 {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
877 {"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
878 {"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
879 {"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
880 {"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
881 {"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
882 {"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
883 {"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
884 {"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
885 {"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
886 {"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
887 {"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
888 {"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
889 {"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
890 {"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
891 {"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
892 {"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
893 {"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
894 {"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
895 {"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
896 {"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
897 {"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
898 {"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
899 {"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
900 {"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
901 {"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
902 {"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
903 {"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
904 /* start-sanitize-r5900 */
905 {"sq", "t,o(b)", 0x7c000000, 0xfc000000, SM|RD_t|RD_b, T5 },
906 /* end-sanitize-r5900 */
907 {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
908 {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
909 {"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
910 {"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
911 {"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
912 {"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
913 {"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
914 {"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
915 {"standby", "", 0x42000021, 0xffffffff, 0, V1 },
916 {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
917 {"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
918 {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
919 {"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
920 {"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
921 {"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
922 {"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
923 {"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
924 {"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
925 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
926 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
927 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
928 {"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
929 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
930 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
931 {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
932 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
933 {"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
934 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
935 {"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
936 {"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
937 {"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
938 {"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
939 {"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
940 {"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
941 {"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
942 {"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
943 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
944 {"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
945 {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
946 {"sync", "", 0x0000000f, 0xffffffff, 0, I2|T3 },
947 {"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
948 {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
949 {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
950 {"teq", "s,t", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
951 {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
952 {"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
953 {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
954 {"tge", "s,t", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
955 {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
956 {"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
957 {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
958 {"tgeu", "s,t", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
959 {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
960 {"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
961 {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
962 {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
963 {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
964 {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
965 {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
966 {"tlt", "s,t", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
967 {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
968 {"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
969 {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
970 {"tltu", "s,t", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
971 {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
972 {"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
973 {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
974 {"tne", "s,t", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
975 {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
976 {"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
977 {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
978 {"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
979 {"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
980 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
981 {"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
982 {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
983 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
984 {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
985 {"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
986 {"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
987 {"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
988 {"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
989 {"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
990 {"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
991 {"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
992 {"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
993 {"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
994 {"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
995 {"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
996 {"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
997 {"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
998 {"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
999 {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
1000 {"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
1001 {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
1002 {"wait", "", 0x42000020, 0xffffffff, TRAP, I3 },
1003 {"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
1004 {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
1005 /* start-sanitize-vr5400 */
1006 {"add.ob", "D,S,T", 0x4ac0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1007 {"add.ob", "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1008 {"add.ob", "D,S,k", 0x4bc0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1009 {"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D|RD_S|RD_T, N5 },
1010 {"and.ob", "D,S,T", 0x4ac0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1011 {"and.ob", "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1012 {"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1013 {"c.eq.ob", "S,T", 0x4ac00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1014 {"c.eq.ob", "S,T[e]", 0x48000001, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1015 {"c.eq.ob", "S,k", 0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1016 {"c.le.ob", "S,T", 0x4ac00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1017 {"c.le.ob", "S,T[e]", 0x48000005, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1018 {"c.le.ob", "S,k", 0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1019 {"c.lt.ob", "S,T", 0x4ac00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1020 {"c.lt.ob", "S,T[e]", 0x48000004, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1021 {"c.lt.ob", "S,k", 0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1022 {"max.ob", "D,S,T", 0x4ac00007, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1023 {"max.ob", "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1024 {"max.ob", "D,S,k", 0x4bc00007, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1025 {"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1026 {"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1027 {"min.ob", "D,S,k", 0x4bc00006, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1028 {"mul.ob", "D,S,T", 0x4ac00030, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1029 {"mul.ob", "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1030 {"mul.ob", "D,S,k", 0x4bc00030, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1031 {"mula.ob", "S,T", 0x4ac00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1032 {"mula.ob", "S,T[e]", 0x48000033, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1033 {"mula.ob", "S,k", 0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1034 {"mull.ob", "S,T", 0x4ac00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1035 {"mull.ob", "S,T[e]", 0x48000433, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1036 {"mull.ob", "S,k", 0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1037 {"muls.ob", "S,T", 0x4ac00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1038 {"muls.ob", "S,T[e]", 0x48000032, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1039 {"muls.ob", "S,k", 0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1040 {"mulsl.ob","S,T", 0x4ac00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1041 {"mulsl.ob","S,T[e]", 0x48000432, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1042 {"mulsl.ob","S,k", 0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1043 {"nor.ob", "D,S,T", 0x4ac0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1044 {"nor.ob", "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1045 {"nor.ob", "D,S,k", 0x4bc0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1046 {"or.ob", "D,S,T", 0x4ac0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1047 {"or.ob", "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1048 {"or.ob", "D,S,k", 0x4bc0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1049 {"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1050 {"pickf.ob", "D,S,T[e]", 0x48000002, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1051 {"pickf.ob", "D,S,k", 0x4bc00002, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1052 {"pickt.ob", "D,S,T", 0x4ac00003, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1053 {"pickt.ob", "D,S,T[e]", 0x48000003, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1054 {"pickt.ob", "D,S,k", 0x4bc00003, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1055 {"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_D, N5 },
1056 {"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_D, N5 },
1057 {"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D, N5 },
1058 {"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T, N5 },
1059 {"shfl.mixh.ob","D,S,T",0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1060 {"shfl.mixl.ob","D,S,T",0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1061 {"shfl.pach.ob","D,S,T",0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1062 {"shfl.pacl.ob","D,S,T",0x4940001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1063 {"sll.ob", "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1064 {"sll.ob", "D,S,k", 0x4bc00010, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1065 {"srl.ob", "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1066 {"srl.ob", "D,S,k", 0x4bc00012, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1067 {"sub.ob", "D,S,T", 0x4ac0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1068 {"sub.ob", "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1069 {"sub.ob", "D,S,k", 0x4bc0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1070 {"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_S, N5 },
1071 {"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S|RD_T, N5 },
1072 {"xor.ob", "D,S,T", 0x4ac0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1073 {"xor.ob", "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1074 {"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1075 /* end-sanitize-vr5400 */
1076 /* No hazard protection on coprocessor instructions--they shouldn't
1077 change the state of the processor and if they do it's up to the
1078 user to put in nops as necessary. These are at the end so that the
1079 disasembler recognizes more specific versions first. */
1080 {"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
1081 {"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
1082 {"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
1083 {"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
1084 {"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
1085 {"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
1086 {"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
1087 {"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
1088 };
1089
1090 #define MIPS_NUM_OPCODES \
1091 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1092 const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
1093
1094 /* const removed from the following to allow for dynamic extensions to the
1095 * built-in instruction set. */
1096 struct mips_opcode *mips_opcodes =
1097 (struct mips_opcode *) mips_builtin_opcodes;
1098 int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
1099 #undef MIPS_NUM_OPCODES
1100
GDB Binutils - Deliverables
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