opcodes/ms1-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-dis.in isn't
   6
   7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
   8 Free Software Foundation, Inc.
   9
  10 This file is part of the GNU Binutils and GDB, the GNU debugger.
  11
  12 This program is free software; you can redistribute it and/or modify
  13 it under the terms of the GNU General Public License as published by
  14 the Free Software Foundation; either version 2, or (at your option)
  15 any later version.
  16
  17 This program is distributed in the hope that it will be useful,
  18 but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 GNU General Public License for more details.
  21
  22 You should have received a copy of the GNU General Public License
  23 along with this program; if not, write to the Free Software Foundation, Inc.,
  24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  25
  26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  27    Keep that in mind.  */
  28
  29 #include "sysdep.h"
  30 #include <stdio.h>
  31 #include "ansidecl.h"
  32 #include "dis-asm.h"
  33 #include "bfd.h"
  34 #include "symcat.h"
  35 #include "libiberty.h"
  36 #include "ms1-desc.h"
  37 #include "ms1-opc.h"
  38 #include "opintl.h"
  39
  40 /* Default text to print if an instruction isn't recognized.  */
  41 #define UNKNOWN_INSN_MSG _("*unknown*")
  42
  43 static void print_normal
  44   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  45 static void print_address
  46   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  47 static void print_keyword
  48   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  49 static void print_insn_normal
  50   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  51 static int print_insn
  52   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
  53 static int default_print_insn
  54   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  55 static int read_insn
  56   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  57    unsigned long *);
  58 \f
  59 /* -- disassembler routines inserted here */
  60
  61 /* -- dis.c */
  62 static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
  63
  64 static void
  65 print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  66                  void * dis_info,
  67                  long value,
  68                  unsigned int attrs ATTRIBUTE_UNUSED,
  69                  bfd_vma pc ATTRIBUTE_UNUSED,
  70                  int length ATTRIBUTE_UNUSED)
  71 {
  72   disassemble_info *info = (disassemble_info *) dis_info;
  73
  74   info->fprintf_func (info->stream, "$%x", value);
  75
  76   if (0)
  77     print_normal (cd, dis_info, value, attrs, pc, length);
  78 }
  79
  80
  81 /* -- */
  82
  83 void ms1_cgen_print_operand
  84   PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
  85            void const *, bfd_vma, int));
  86
  87 /* Main entry point for printing operands.
  88    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
  89    of dis-asm.h on cgen.h.
  90
  91    This function is basically just a big switch statement.  Earlier versions
  92    used tables to look up the function to use, but
  93    - if the table contains both assembler and disassembler functions then
  94      the disassembler contains much of the assembler and vice-versa,
  95    - there's a lot of inlining possibilities as things grow,
  96    - using a switch statement avoids the function call overhead.
  97
  98    This function could be moved into `print_insn_normal', but keeping it
  99    separate makes clear the interface between `print_insn_normal' and each of
 100    the handlers.  */
 101
 102 void
 103 ms1_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
 104      CGEN_CPU_DESC cd;
 105      int opindex;
 106      PTR xinfo;
 107      CGEN_FIELDS *fields;
 108      void const *attrs ATTRIBUTE_UNUSED;
 109      bfd_vma pc;
 110      int length;
 111 {
 112  disassemble_info *info = (disassemble_info *) xinfo;
 113
 114   switch (opindex)
 115     {
 116     case MS1_OPERAND_A23 :
 117       print_dollarhex (cd, info, fields->f_a23, 0, pc, length);
 118       break;
 119     case MS1_OPERAND_BALL :
 120       print_dollarhex (cd, info, fields->f_ball, 0, pc, length);
 121       break;
 122     case MS1_OPERAND_BALL2 :
 123       print_dollarhex (cd, info, fields->f_ball2, 0, pc, length);
 124       break;
 125     case MS1_OPERAND_BANKADDR :
 126       print_dollarhex (cd, info, fields->f_bankaddr, 0, pc, length);
 127       break;
 128     case MS1_OPERAND_BRC :
 129       print_dollarhex (cd, info, fields->f_brc, 0, pc, length);
 130       break;
 131     case MS1_OPERAND_BRC2 :
 132       print_dollarhex (cd, info, fields->f_brc2, 0, pc, length);
 133       break;
 134     case MS1_OPERAND_CBRB :
 135       print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length);
 136       break;
 137     case MS1_OPERAND_CBS :
 138       print_dollarhex (cd, info, fields->f_cbs, 0, pc, length);
 139       break;
 140     case MS1_OPERAND_CBX :
 141       print_dollarhex (cd, info, fields->f_cbx, 0, pc, length);
 142       break;
 143     case MS1_OPERAND_CCB :
 144       print_dollarhex (cd, info, fields->f_ccb, 0, pc, length);
 145       break;
 146     case MS1_OPERAND_CDB :
 147       print_dollarhex (cd, info, fields->f_cdb, 0, pc, length);
 148       break;
 149     case MS1_OPERAND_CELL :
 150       print_dollarhex (cd, info, fields->f_cell, 0, pc, length);
 151       break;
 152     case MS1_OPERAND_COLNUM :
 153       print_dollarhex (cd, info, fields->f_colnum, 0, pc, length);
 154       break;
 155     case MS1_OPERAND_CONTNUM :
 156       print_dollarhex (cd, info, fields->f_contnum, 0, pc, length);
 157       break;
 158     case MS1_OPERAND_CR :
 159       print_dollarhex (cd, info, fields->f_cr, 0, pc, length);
 160       break;
 161     case MS1_OPERAND_CTXDISP :
 162       print_dollarhex (cd, info, fields->f_ctxdisp, 0, pc, length);
 163       break;
 164     case MS1_OPERAND_DUP :
 165       print_dollarhex (cd, info, fields->f_dup, 0, pc, length);
 166       break;
 167     case MS1_OPERAND_FBDISP :
 168       print_dollarhex (cd, info, fields->f_fbdisp, 0, pc, length);
 169       break;
 170     case MS1_OPERAND_FBINCR :
 171       print_dollarhex (cd, info, fields->f_fbincr, 0, pc, length);
 172       break;
 173     case MS1_OPERAND_FRDR :
 174       print_keyword (cd, info, & ms1_cgen_opval_h_spr, fields->f_dr, 0|(1<<CGEN_OPERAND_ABS_ADDR));
 175       break;
 176     case MS1_OPERAND_FRDRRR :
 177       print_keyword (cd, info, & ms1_cgen_opval_h_spr, fields->f_drrr, 0|(1<<CGEN_OPERAND_ABS_ADDR));
 178       break;
 179     case MS1_OPERAND_FRSR1 :
 180       print_keyword (cd, info, & ms1_cgen_opval_h_spr, fields->f_sr1, 0|(1<<CGEN_OPERAND_ABS_ADDR));
 181       break;
 182     case MS1_OPERAND_FRSR2 :
 183       print_keyword (cd, info, & ms1_cgen_opval_h_spr, fields->f_sr2, 0|(1<<CGEN_OPERAND_ABS_ADDR));
 184       break;
 185     case MS1_OPERAND_ID :
 186       print_dollarhex (cd, info, fields->f_id, 0, pc, length);
 187       break;
 188     case MS1_OPERAND_IMM16 :
 189       print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 190       break;
 191     case MS1_OPERAND_IMM16O :
 192       print_dollarhex (cd, info, fields->f_imm16s, 0, pc, length);
 193       break;
 194     case MS1_OPERAND_IMM16Z :
 195       print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length);
 196       break;
 197     case MS1_OPERAND_INCAMT :
 198       print_dollarhex (cd, info, fields->f_incamt, 0, pc, length);
 199       break;
 200     case MS1_OPERAND_INCR :
 201       print_dollarhex (cd, info, fields->f_incr, 0, pc, length);
 202       break;
 203     case MS1_OPERAND_LENGTH :
 204       print_dollarhex (cd, info, fields->f_length, 0, pc, length);
 205       break;
 206     case MS1_OPERAND_MASK :
 207       print_dollarhex (cd, info, fields->f_mask, 0, pc, length);
 208       break;
 209     case MS1_OPERAND_MASK1 :
 210       print_dollarhex (cd, info, fields->f_mask1, 0, pc, length);
 211       break;
 212     case MS1_OPERAND_MODE :
 213       print_dollarhex (cd, info, fields->f_mode, 0, pc, length);
 214       break;
 215     case MS1_OPERAND_PERM :
 216       print_dollarhex (cd, info, fields->f_perm, 0, pc, length);
 217       break;
 218     case MS1_OPERAND_RBBC :
 219       print_dollarhex (cd, info, fields->f_rbbc, 0, pc, length);
 220       break;
 221     case MS1_OPERAND_RC :
 222       print_dollarhex (cd, info, fields->f_rc, 0, pc, length);
 223       break;
 224     case MS1_OPERAND_RC1 :
 225       print_dollarhex (cd, info, fields->f_rc1, 0, pc, length);
 226       break;
 227     case MS1_OPERAND_RC2 :
 228       print_dollarhex (cd, info, fields->f_rc2, 0, pc, length);
 229       break;
 230     case MS1_OPERAND_RCNUM :
 231       print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length);
 232       break;
 233     case MS1_OPERAND_RDA :
 234       print_dollarhex (cd, info, fields->f_rda, 0, pc, length);
 235       break;
 236     case MS1_OPERAND_ROWNUM :
 237       print_dollarhex (cd, info, fields->f_rownum, 0, pc, length);
 238       break;
 239     case MS1_OPERAND_ROWNUM1 :
 240       print_dollarhex (cd, info, fields->f_rownum1, 0, pc, length);
 241       break;
 242     case MS1_OPERAND_ROWNUM2 :
 243       print_dollarhex (cd, info, fields->f_rownum2, 0, pc, length);
 244       break;
 245     case MS1_OPERAND_SIZE :
 246       print_dollarhex (cd, info, fields->f_size, 0, pc, length);
 247       break;
 248     case MS1_OPERAND_TYPE :
 249       print_dollarhex (cd, info, fields->f_type, 0, pc, length);
 250       break;
 251     case MS1_OPERAND_WR :
 252       print_dollarhex (cd, info, fields->f_wr, 0, pc, length);
 253       break;
 254     case MS1_OPERAND_XMODE :
 255       print_dollarhex (cd, info, fields->f_xmode, 0, pc, length);
 256       break;
 257
 258     default :
 259       /* xgettext:c-format */
 260       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 261                opindex);
 262     abort ();
 263   }
 264 }
 265
 266 cgen_print_fn * const ms1_cgen_print_handlers[] =
 267 {
 268   print_insn_normal,
 269 };
 270
 271
 272 void
 273 ms1_cgen_init_dis (cd)
 274      CGEN_CPU_DESC cd;
 275 {
 276   ms1_cgen_init_opcode_table (cd);
 277   ms1_cgen_init_ibld_table (cd);
 278   cd->print_handlers = & ms1_cgen_print_handlers[0];
 279   cd->print_operand = ms1_cgen_print_operand;
 280 }
 281
 282 \f
 283 /* Default print handler.  */
 284
 285 static void
 286 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 287               void *dis_info,
 288               long value,
 289               unsigned int attrs,
 290               bfd_vma pc ATTRIBUTE_UNUSED,
 291               int length ATTRIBUTE_UNUSED)
 292 {
 293   disassemble_info *info = (disassemble_info *) dis_info;
 294
 295 #ifdef CGEN_PRINT_NORMAL
 296   CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
 297 #endif
 298
 299   /* Print the operand as directed by the attributes.  */
 300   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 301     ; /* nothing to do */
 302   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 303     (*info->fprintf_func) (info->stream, "%ld", value);
 304   else
 305     (*info->fprintf_func) (info->stream, "0x%lx", value);
 306 }
 307
 308 /* Default address handler.  */
 309
 310 static void
 311 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 312                void *dis_info,
 313                bfd_vma value,
 314                unsigned int attrs,
 315                bfd_vma pc ATTRIBUTE_UNUSED,
 316                int length ATTRIBUTE_UNUSED)
 317 {
 318   disassemble_info *info = (disassemble_info *) dis_info;
 319
 320 #ifdef CGEN_PRINT_ADDRESS
 321   CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
 322 #endif
 323
 324   /* Print the operand as directed by the attributes.  */
 325   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 326     ; /* nothing to do */
 327   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 328     (*info->print_address_func) (value, info);
 329   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 330     (*info->print_address_func) (value, info);
 331   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 332     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 333   else
 334     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 335 }
 336
 337 /* Keyword print handler.  */
 338
 339 static void
 340 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 341                void *dis_info,
 342                CGEN_KEYWORD *keyword_table,
 343                long value,
 344                unsigned int attrs ATTRIBUTE_UNUSED)
 345 {
 346   disassemble_info *info = (disassemble_info *) dis_info;
 347   const CGEN_KEYWORD_ENTRY *ke;
 348
 349   ke = cgen_keyword_lookup_value (keyword_table, value);
 350   if (ke != NULL)
 351     (*info->fprintf_func) (info->stream, "%s", ke->name);
 352   else
 353     (*info->fprintf_func) (info->stream, "???");
 354 }
 355 \f
 356 /* Default insn printer.
 357
 358    DIS_INFO is defined as `void *' so the disassembler needn't know anything
 359    about disassemble_info.  */
 360
 361 static void
 362 print_insn_normal (CGEN_CPU_DESC cd,
 363                    void *dis_info,
 364                    const CGEN_INSN *insn,
 365                    CGEN_FIELDS *fields,
 366                    bfd_vma pc,
 367                    int length)
 368 {
 369   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 370   disassemble_info *info = (disassemble_info *) dis_info;
 371   const CGEN_SYNTAX_CHAR_TYPE *syn;
 372
 373   CGEN_INIT_PRINT (cd);
 374
 375   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 376     {
 377       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 378         {
 379           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 380           continue;
 381         }
 382       if (CGEN_SYNTAX_CHAR_P (*syn))
 383         {
 384           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 385           continue;
 386         }
 387
 388       /* We have an operand.  */
 389       ms1_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 390                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 391     }
 392 }
 393 \f
 394 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 395    the extract info.
 396    Returns 0 if all is well, non-zero otherwise.  */
 397
 398 static int
 399 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 400            bfd_vma pc,
 401            disassemble_info *info,
 402            bfd_byte *buf,
 403            int buflen,
 404            CGEN_EXTRACT_INFO *ex_info,
 405            unsigned long *insn_value)
 406 {
 407   int status = (*info->read_memory_func) (pc, buf, buflen, info);
 408   if (status != 0)
 409     {
 410       (*info->memory_error_func) (status, pc, info);
 411       return -1;
 412     }
 413
 414   ex_info->dis_info = info;
 415   ex_info->valid = (1 << buflen) - 1;
 416   ex_info->insn_bytes = buf;
 417
 418   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
 419   return 0;
 420 }
 421
 422 /* Utility to print an insn.
 423    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
 424    The result is the size of the insn in bytes or zero for an unknown insn
 425    or -1 if an error occurs fetching data (memory_error_func will have
 426    been called).  */
 427
 428 static int
 429 print_insn (CGEN_CPU_DESC cd,
 430             bfd_vma pc,
 431             disassemble_info *info,
 432             bfd_byte *buf,
 433             unsigned int buflen)
 434 {
 435   CGEN_INSN_INT insn_value;
 436   const CGEN_INSN_LIST *insn_list;
 437   CGEN_EXTRACT_INFO ex_info;
 438   int basesize;
 439
 440   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
 441   basesize = cd->base_insn_bitsize < buflen * 8 ?
 442                                      cd->base_insn_bitsize : buflen * 8;
 443   insn_value = cgen_get_insn_value (cd, buf, basesize);
 444
 445
 446   /* Fill in ex_info fields like read_insn would.  Don't actually call
 447      read_insn, since the incoming buffer is already read (and possibly
 448      modified a la m32r).  */
 449   ex_info.valid = (1 << buflen) - 1;
 450   ex_info.dis_info = info;
 451   ex_info.insn_bytes = buf;
 452
 453   /* The instructions are stored in hash lists.
 454      Pick the first one and keep trying until we find the right one.  */
 455
 456   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
 457   while (insn_list != NULL)
 458     {
 459       const CGEN_INSN *insn = insn_list->insn;
 460       CGEN_FIELDS fields;
 461       int length;
 462       unsigned long insn_value_cropped;
 463
 464 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 465       /* Not needed as insn shouldn't be in hash lists if not supported.  */
 466       /* Supported by this cpu?  */
 467       if (! ms1_cgen_insn_supported (cd, insn))
 468         {
 469           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 470           continue;
 471         }
 472 #endif
 473
 474       /* Basic bit mask must be correct.  */
 475       /* ??? May wish to allow target to defer this check until the extract
 476          handler.  */
 477
 478       /* Base size may exceed this instruction's size.  Extract the
 479          relevant part from the buffer. */
 480       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
 481           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 482         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
 483                                            info->endian == BFD_ENDIAN_BIG);
 484       else
 485         insn_value_cropped = insn_value;
 486
 487       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 488           == CGEN_INSN_BASE_VALUE (insn))
 489         {
 490           /* Printing is handled in two passes.  The first pass parses the
 491              machine insn and extracts the fields.  The second pass prints
 492              them.  */
 493
 494           /* Make sure the entire insn is loaded into insn_value, if it
 495              can fit.  */
 496           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
 497               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 498             {
 499               unsigned long full_insn_value;
 500               int rc = read_insn (cd, pc, info, buf,
 501                                   CGEN_INSN_BITSIZE (insn) / 8,
 502                                   & ex_info, & full_insn_value);
 503               if (rc != 0)
 504                 return rc;
 505               length = CGEN_EXTRACT_FN (cd, insn)
 506                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
 507             }
 508           else
 509             length = CGEN_EXTRACT_FN (cd, insn)
 510               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 511
 512           /* length < 0 -> error */
 513           if (length < 0)
 514             return length;
 515           if (length > 0)
 516             {
 517               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
 518               /* length is in bits, result is in bytes */
 519               return length / 8;
 520             }
 521         }
 522
 523       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 524     }
 525
 526   return 0;
 527 }
 528
 529 /* Default value for CGEN_PRINT_INSN.
 530    The result is the size of the insn in bytes or zero for an unknown insn
 531    or -1 if an error occured fetching bytes.  */
 532
 533 #ifndef CGEN_PRINT_INSN
 534 #define CGEN_PRINT_INSN default_print_insn
 535 #endif
 536
 537 static int
 538 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
 539 {
 540   bfd_byte buf[CGEN_MAX_INSN_SIZE];
 541   int buflen;
 542   int status;
 543
 544   /* Attempt to read the base part of the insn.  */
 545   buflen = cd->base_insn_bitsize / 8;
 546   status = (*info->read_memory_func) (pc, buf, buflen, info);
 547
 548   /* Try again with the minimum part, if min < base.  */
 549   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
 550     {
 551       buflen = cd->min_insn_bitsize / 8;
 552       status = (*info->read_memory_func) (pc, buf, buflen, info);
 553     }
 554
 555   if (status != 0)
 556     {
 557       (*info->memory_error_func) (status, pc, info);
 558       return -1;
 559     }
 560
 561   return print_insn (cd, pc, info, buf, buflen);
 562 }
 563
 564 /* Main entry point.
 565    Print one instruction from PC on INFO->STREAM.
 566    Return the size of the instruction (in bytes).  */
 567
 568 typedef struct cpu_desc_list {
 569   struct cpu_desc_list *next;
 570   int isa;
 571   int mach;
 572   int endian;
 573   CGEN_CPU_DESC cd;
 574 } cpu_desc_list;
 575
 576 int
 577 print_insn_ms1 (bfd_vma pc, disassemble_info *info)
 578 {
 579   static cpu_desc_list *cd_list = 0;
 580   cpu_desc_list *cl = 0;
 581   static CGEN_CPU_DESC cd = 0;
 582   static int prev_isa;
 583   static int prev_mach;
 584   static int prev_endian;
 585   int length;
 586   int isa,mach;
 587   int endian = (info->endian == BFD_ENDIAN_BIG
 588                 ? CGEN_ENDIAN_BIG
 589                 : CGEN_ENDIAN_LITTLE);
 590   enum bfd_architecture arch;
 591
 592   /* ??? gdb will set mach but leave the architecture as "unknown" */
 593 #ifndef CGEN_BFD_ARCH
 594 #define CGEN_BFD_ARCH bfd_arch_ms1
 595 #endif
 596   arch = info->arch;
 597   if (arch == bfd_arch_unknown)
 598     arch = CGEN_BFD_ARCH;
 599
 600   /* There's no standard way to compute the machine or isa number
 601      so we leave it to the target.  */
 602 #ifdef CGEN_COMPUTE_MACH
 603   mach = CGEN_COMPUTE_MACH (info);
 604 #else
 605   mach = info->mach;
 606 #endif
 607
 608 #ifdef CGEN_COMPUTE_ISA
 609   isa = CGEN_COMPUTE_ISA (info);
 610 #else
 611   isa = info->insn_sets;
 612 #endif
 613
 614   /* If we've switched cpu's, try to find a handle we've used before */
 615   if (cd
 616       && (isa != prev_isa
 617           || mach != prev_mach
 618           || endian != prev_endian))
 619     {
 620       cd = 0;
 621       for (cl = cd_list; cl; cl = cl->next)
 622         {
 623           if (cl->isa == isa &&
 624               cl->mach == mach &&
 625               cl->endian == endian)
 626             {
 627               cd = cl->cd;
 628               break;
 629             }
 630         }
 631     }
 632
 633   /* If we haven't initialized yet, initialize the opcode table.  */
 634   if (! cd)
 635     {
 636       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
 637       const char *mach_name;
 638
 639       if (!arch_type)
 640         abort ();
 641       mach_name = arch_type->printable_name;
 642
 643       prev_isa = isa;
 644       prev_mach = mach;
 645       prev_endian = endian;
 646       cd = ms1_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
 647                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
 648                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
 649                                  CGEN_CPU_OPEN_END);
 650       if (!cd)
 651         abort ();
 652
 653       /* save this away for future reference */
 654       cl = xmalloc (sizeof (struct cpu_desc_list));
 655       cl->cd = cd;
 656       cl->isa = isa;
 657       cl->mach = mach;
 658       cl->endian = endian;
 659       cl->next = cd_list;
 660       cd_list = cl;
 661
 662       ms1_cgen_init_dis (cd);
 663     }
 664
 665   /* We try to have as much common code as possible.
 666      But at this point some targets need to take over.  */
 667   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
 668      but if not possible try to move this hook elsewhere rather than
 669      have two hooks.  */
 670   length = CGEN_PRINT_INSN (cd, pc, info);
 671   if (length > 0)
 672     return length;
 673   if (length < 0)
 674     return -1;
 675
 676   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 677   return cd->default_insn_bitsize / 8;
 678 }