1 /* NDS32-specific support for 32-bit ELF.
2 Copyright (C) 2012-2020 Free Software Foundation, Inc.
3 Contributed by Andes Technology Corporation.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "disassemble.h"
28 #include "libiberty.h"
30 #include "bfd_stdint.h"
32 #include "nds32-asm.h"
33 #include "opcode/nds32.h"
35 /* Get fields macro define. */
36 #define MASK_OP(insn, mask) ((insn) & (0x3f << 25 | (mask)))
38 /* For mapping symbol. */
49 struct nds32_private_data
51 /* Whether any mapping symbols are present in the provided symbol
52 table. -1 if we do not know yet, otherwise 0 or 1. */
53 int has_mapping_symbols
;
55 /* Track the last type (although this doesn't seem to be useful). */
56 enum map_type last_mapping_type
;
58 /* Tracking symbol table information. */
59 int last_symbol_index
;
63 /* Default text to print if an instruction isn't recognized. */
64 #define UNKNOWN_INSN_MSG _("*unknown*")
65 #define NDS32_PARSE_INSN16 0x01
66 #define NDS32_PARSE_INSN32 0x02
68 extern const field_t
*nds32_field_table
[NDS32_CORE_COUNT
];
69 extern opcode_t
*nds32_opcode_table
[NDS32_CORE_COUNT
];
70 extern keyword_t
**nds32_keyword_table
[NDS32_CORE_COUNT
];
71 extern struct nds32_opcode nds32_opcodes
[];
72 extern const field_t operand_fields
[];
73 extern keyword_t
*keywords
[];
74 extern const keyword_t keyword_gpr
[];
76 static uint32_t nds32_mask_opcode (uint32_t);
77 static void nds32_special_opcode (uint32_t, struct nds32_opcode
**);
78 static int get_mapping_symbol_type (struct disassemble_info
*, int,
80 static int is_mapping_symbol (struct disassemble_info
*, int,
83 /* Hash function for disassemble. */
85 static htab_t opcode_htab
;
87 /* Find the value map register name. */
90 nds32_find_reg_keyword (keyword_t
*reg
, int value
)
95 while (reg
->name
!= NULL
&& reg
->value
!= value
)
99 if (reg
->name
== NULL
)
105 nds32_parse_audio_ext (const field_t
*pfd
,
106 disassemble_info
*info
, uint32_t insn
)
108 fprintf_ftype func
= info
->fprintf_func
;
109 void *stream
= info
->stream
;
111 int int_value
, new_value
;
113 if (pfd
->hw_res
== HW_INT
|| pfd
->hw_res
== HW_UINT
)
115 if (pfd
->hw_res
== HW_INT
)
116 int_value
= (unsigned) N32_IMMS (insn
>> pfd
->bitpos
,
117 pfd
->bitsize
) << pfd
->shift
;
119 int_value
= __GF (insn
, pfd
->bitpos
, pfd
->bitsize
) << pfd
->shift
;
122 func (stream
, "#%d", int_value
);
124 func (stream
, "#0x%x", int_value
);
128 __GF (insn
, pfd
->bitpos
, pfd
->bitsize
) << pfd
->shift
;
129 new_value
= int_value
;
130 psys_reg
= (keyword_t
*) keywords
[pfd
->hw_res
];
132 /* p = bit[4].bit[1:0], r = bit[4].bit[3:2]. */
133 if (strcmp (pfd
->name
, "im5_i") == 0)
135 new_value
= int_value
& 0x03;
136 new_value
|= ((int_value
& 0x10) >> 2);
138 else if (strcmp (pfd
->name
, "im5_m") == 0)
140 new_value
= ((int_value
& 0x1C) >> 2);
142 /* p = 0.bit[1:0], r = 0.bit[3:2]. */
143 /* q = 1.bit[1:0], s = 1.bit[5:4]. */
144 else if (strcmp (pfd
->name
, "im6_iq") == 0)
148 else if (strcmp (pfd
->name
, "im6_ms") == 0)
152 /* Rt CONCAT(c, t21, t0). */
153 else if (strcmp (pfd
->name
, "a_rt21") == 0)
155 new_value
= (insn
& 0x00000020) >> 5;
156 new_value
|= (insn
& 0x00000C00) >> 9;
157 new_value
|= (insn
& 0x00008000) >> 12;
159 else if (strcmp (pfd
->name
, "a_rte") == 0)
161 new_value
= (insn
& 0x00000C00) >> 9;
162 new_value
|= (insn
& 0x00008000) >> 12;
164 else if (strcmp (pfd
->name
, "a_rte1") == 0)
166 new_value
= (insn
& 0x00000C00) >> 9;
167 new_value
|= (insn
& 0x00008000) >> 12;
170 else if (strcmp (pfd
->name
, "a_rte69") == 0)
172 new_value
= int_value
<< 1;
174 else if (strcmp (pfd
->name
, "a_rte69_1") == 0)
176 new_value
= int_value
<< 1;
180 psys_reg
= nds32_find_reg_keyword (psys_reg
, new_value
);
182 func (stream
, "???");
184 func (stream
, "$%s", psys_reg
->name
);
187 /* Match instruction opcode with keyword table. */
190 match_field (char *name
)
195 for (k
= 0; k
< NDS32_CORE_COUNT
; k
++)
197 pfd
= (field_t
*) nds32_field_table
[k
];
200 if (pfd
->name
== NULL
)
202 if (strcmp (name
, pfd
->name
) == 0)
211 /* Dump instruction. If the opcode is unknown, return FALSE. */
214 nds32_parse_opcode (struct nds32_opcode
*opc
, bfd_vma pc ATTRIBUTE_UNUSED
,
215 disassemble_info
*info
, uint32_t insn
,
219 fprintf_ftype func
= info
->fprintf_func
;
220 void *stream
= info
->stream
;
221 const char *pstr_src
;
224 unsigned int push25gpr
= 0, lsmwRb
, lsmwRe
, lsmwEnb4
, checkbit
, i
;
225 int int_value
, ifthe1st
= 1;
231 func (stream
, UNKNOWN_INSN_MSG
);
235 pstr_src
= opc
->instruction
;
238 func (stream
, "%s", opc
->opcode
);
241 /* NDS32_PARSE_INSN16. */
242 if (parse_mode
& NDS32_PARSE_INSN16
)
244 func (stream
, "%s ", opc
->opcode
);
247 /* NDS32_PARSE_INSN32. */
251 if (op
== N32_OP6_LSMW
)
252 func (stream
, "%s.", opc
->opcode
);
253 else if (strstr (opc
->instruction
, "tito"))
254 func (stream
, "%s", opc
->opcode
);
256 func (stream
, "%s\t", opc
->opcode
);
267 /* Compare with operand_fields[].name. */
268 pstr_tmp
= &tmp_string
[0];
271 if ((*pstr_src
== ',') || (*pstr_src
== ' ')
272 || (*pstr_src
== '{') || (*pstr_src
== '}')
273 || (*pstr_src
== '[') || (*pstr_src
== ']')
274 || (*pstr_src
== '(') || (*pstr_src
== ')')
275 || (*pstr_src
== '+') || (*pstr_src
== '<'))
277 *pstr_tmp
++ = *pstr_src
++;
281 if ((pfd
= match_field (&tmp_string
[0])) == NULL
)
285 if (parse_mode
& NDS32_PARSE_INSN16
)
287 if (pfd
->hw_res
== HW_GPR
)
290 __GF (insn
, pfd
->bitpos
, pfd
->bitsize
) << pfd
->shift
;
292 if ((opc
->value
== 0xfc00) || (opc
->value
== 0xfc80))
297 int_value
= (6 + (0x01 << int_value
));
298 push25gpr
= int_value
;
300 else if (strcmp (pfd
->name
, "rt4") == 0)
302 int_value
= nds32_r45map
[int_value
];
304 func (stream
, "$%s", keyword_gpr
[int_value
].name
);
306 else if ((pfd
->hw_res
== HW_INT
) || (pfd
->hw_res
== HW_UINT
))
308 if (pfd
->hw_res
== HW_INT
)
310 = (unsigned) N32_IMMS (insn
>> pfd
->bitpos
,
311 pfd
->bitsize
) << pfd
->shift
;
314 __GF (insn
, pfd
->bitpos
, pfd
->bitsize
) << pfd
->shift
;
317 if (opc
->value
== 0xfa00)
320 func (stream
, "#0x%x", int_value
);
323 else if (opc
->value
== 0xb200)
325 int_value
= 0 - (128 - int_value
);
326 func (stream
, "#%d", int_value
);
328 /* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8. */
329 else if ((opc
->value
== 0xc000) || (opc
->value
== 0xc800)
330 || (opc
->value
== 0xd000) || (opc
->value
== 0xd800)
331 || (opc
->value
== 0xd500) || (opc
->value
== 0xe800)
332 || (opc
->value
== 0xe900))
334 info
->print_address_func (int_value
+ pc
, info
);
337 else if ((opc
->value
== 0xfc00) || (opc
->value
== 0xfc80))
339 func (stream
, "#%d ! {$r6", int_value
);
341 func (stream
, "~$%s", keyword_gpr
[push25gpr
].name
);
342 func (stream
, ", $fp, $gp, $lp}");
344 else if (pfd
->hw_res
== HW_INT
)
347 func (stream
, "#%d", int_value
);
349 func (stream
, "#0x%x", int_value
);
351 else /* if (pfd->hw_res == HW_UINT). */
354 func (stream
, "#%u", int_value
);
356 func (stream
, "#0x%x", int_value
);
362 else if (op
== N32_OP6_AEXT
)
364 nds32_parse_audio_ext (pfd
, info
, insn
);
367 else if (pfd
->hw_res
< HW_INT
)
370 __GF (insn
, pfd
->bitpos
, pfd
->bitsize
) << pfd
->shift
;
372 psys_reg
= *(nds32_keyword_table
[pfd
->hw_res
>> 8]
373 + (pfd
->hw_res
& 0xff));
375 psys_reg
= nds32_find_reg_keyword (psys_reg
, int_value
);
376 /* For HW_SR, dump the index when it can't
377 map the register name. */
378 if (!psys_reg
&& pfd
->hw_res
== HW_SR
)
379 func (stream
, "%d", int_value
);
381 func (stream
, "???");
384 if (pfd
->hw_res
== HW_GPR
|| pfd
->hw_res
== HW_CPR
385 || pfd
->hw_res
== HW_FDR
|| pfd
->hw_res
== HW_FSR
386 || pfd
->hw_res
== HW_DXR
|| pfd
->hw_res
== HW_SR
387 || pfd
->hw_res
== HW_USR
)
388 func (stream
, "$%s", psys_reg
->name
);
389 else if (pfd
->hw_res
== HW_DTITON
390 || pfd
->hw_res
== HW_DTITOFF
)
391 func (stream
, ".%s", psys_reg
->name
);
393 func (stream
, "%s", psys_reg
->name
);
396 else if ((pfd
->hw_res
== HW_INT
) || (pfd
->hw_res
== HW_UINT
))
398 if (pfd
->hw_res
== HW_INT
)
399 int_value
= (unsigned) N32_IMMS (insn
>> pfd
->bitpos
,
400 pfd
->bitsize
) << pfd
->shift
;
403 __GF (insn
, pfd
->bitpos
, pfd
->bitsize
) << pfd
->shift
;
405 if ((op
== N32_OP6_BR1
) || (op
== N32_OP6_BR2
))
407 info
->print_address_func (int_value
+ pc
, info
);
409 else if ((op
== N32_OP6_BR3
) && (pfd
->bitpos
== 0))
411 info
->print_address_func (int_value
+ pc
, info
);
413 else if (op
== N32_OP6_JI
)
415 /* FIXME: Handle relocation. */
416 if (info
->flags
& INSN_HAS_RELOC
)
418 info
->print_address_func (int_value
+ pc
, info
);
420 else if (op
== N32_OP6_LSMW
)
422 /* lmw.adm/smw.adm. */
423 func (stream
, "#0x%x ! {", int_value
);
424 lsmwEnb4
= int_value
;
425 lsmwRb
= ((insn
>> 20) & 0x1F);
426 lsmwRe
= ((insn
>> 10) & 0x1F);
428 /* If [Rb, Re] specifies at least one register,
429 Rb(4,0) <= Re(4,0) and 0 <= Rb(4,0), Re(4,0) < 28.
430 Disassembling does not consider this currently because of
431 the convience comparing with bsp320. */
432 if (lsmwRb
!= 31 || lsmwRe
!= 31)
434 func (stream
, "$%s", keyword_gpr
[lsmwRb
].name
);
435 if (lsmwRb
!= lsmwRe
)
436 func (stream
, "~$%s", keyword_gpr
[lsmwRe
].name
);
441 /* $fp, $gp, $lp, $sp. */
443 for (i
= 0; i
< 4; i
++)
445 if (lsmwEnb4
& checkbit
)
450 func (stream
, "$%s", keyword_gpr
[28 + i
].name
);
453 func (stream
, ", $%s", keyword_gpr
[28 + i
].name
);
460 else if (pfd
->hw_res
== HW_INT
)
463 func (stream
, "#%d", int_value
);
465 func (stream
, "#0x%x", int_value
);
467 else /* if (pfd->hw_res == HW_UINT). */
470 func (stream
, "#%u", int_value
);
472 func (stream
, "#0x%x", int_value
);
488 func (stream
, " + ");
493 if (pstr_src
[1] == '<')
495 func (stream
, " << ");
506 func (stream
, "%c", *pstr_src
++);
512 /* Filter instructions with some bits must be fixed. */
515 nds32_filter_unknown_insn (uint32_t insn
, struct nds32_opcode
**opc
)
520 switch ((*opc
)->value
)
525 if (__GF (insn
, 6, 2) != 0 || __GF (insn
, 15, 10) != 0)
529 if (__GF (insn
, 7, 18) != 0)
534 if (__GF (insn
, 5, 5) != 0)
538 if (__GF (insn
, 20, 5) != 0)
542 if (__GF (insn
, 5, 3) != 0 || __GF (insn
, 15, 5) != 0)
564 if (__GF (insn
, 5, 5) != 0)
570 if (__GF (insn
, 5, 20) != 0)
577 print_insn32 (bfd_vma pc
, disassemble_info
*info
, uint32_t insn
,
580 /* Get the final correct opcode and parse. */
581 struct nds32_opcode
*opc
;
582 uint32_t opcode
= nds32_mask_opcode (insn
);
583 opc
= (struct nds32_opcode
*) htab_find (opcode_htab
, &opcode
);
585 nds32_special_opcode (insn
, &opc
);
586 nds32_filter_unknown_insn (insn
, &opc
);
587 nds32_parse_opcode (opc
, pc
, info
, insn
, parse_mode
);
591 print_insn16 (bfd_vma pc
, disassemble_info
*info
,
592 uint32_t insn
, uint32_t parse_mode
)
594 struct nds32_opcode
*opc
;
597 /* Get highest 7 bit in default. */
598 unsigned int mask
= 0xfe00;
600 /* Classify 16-bit instruction to 4 sets by bit 13 and 14. */
601 switch (__GF (insn
, 13, 2))
605 if (__GF (insn
, 11, 2) == 0)
608 /* ifret16 = mov55 $sp, $sp*/
609 if (__GF (insn
, 0, 11) == 0x3ff)
612 else if (__GF (insn
, 9, 4) == 0xb)
617 if (__GF (insn
, 11, 2) == 0x3)
622 /* Exclude beqz38, bnez38, beqs38, and bnes38. */
623 if (__GF (insn
, 12, 1) == 0x1
624 && __GF (insn
, 8, 3) == 0x5)
626 if (__GF (insn
, 11, 1) == 0x0)
633 switch (__GF (insn
, 11, 2))
637 if (__GF (insn
, 9, 2) == 0x0)
640 else if (__GF(insn
, 10, 1) == 0x1)
644 /* lwi37.sp swi37.sp */
648 if (__GF (insn
, 8, 3) == 0x5)
650 else if (__GF (insn
, 8, 3) == 0x4)
652 else if (__GF (insn
, 9 , 2) == 0x3)
658 opcode
= insn
& mask
;
659 opc
= (struct nds32_opcode
*) htab_find (opcode_htab
, &opcode
);
661 nds32_special_opcode (insn
, &opc
);
662 /* Get the final correct opcode and parse it. */
663 nds32_parse_opcode (opc
, pc
, info
, insn
, parse_mode
);
667 htab_hash_hash (const void *p
)
669 return (*(unsigned int *) p
) % 49;
673 htab_hash_eq (const void *p
, const void *q
)
675 uint32_t pinsn
= ((struct nds32_opcode
*) p
)->value
;
676 uint32_t qinsn
= *((uint32_t *) q
);
678 return (pinsn
== qinsn
);
681 /* Get the format of instruction. */
684 nds32_mask_opcode (uint32_t insn
)
686 uint32_t opcode
= N32_OP6 (insn
);
708 case N32_OP6_LBSI_BI
:
709 case N32_OP6_LHSI_BI
:
710 case N32_OP6_LWSI_BI
:
722 return MASK_OP (insn
, 0);
725 if (__GF (insn
, 0, 7) == (N32_ALU2_FFBI
| N32_BIT (6)))
726 return MASK_OP (insn
, 0x7f);
727 else if (__GF (insn
, 0, 7) == (N32_ALU2_MFUSR
| N32_BIT (6))
728 || __GF (insn
, 0, 7) == (N32_ALU2_MTUSR
| N32_BIT (6)))
730 return MASK_OP (insn
, 0xf81ff);
731 else if (__GF (insn
, 0, 10) == (N32_ALU2_ONEOP
| N32_BIT (7)))
734 if (__GF (insn
, 12, 3) == 4)
735 return MASK_OP (insn
, 0x73ff);
736 return MASK_OP (insn
, 0x7fff);
738 return MASK_OP (insn
, 0x3ff);
741 return MASK_OP (insn
, 0x1f);
743 return MASK_OP (insn
, 0xff);
745 return MASK_OP (insn
, 0x7f);
747 return MASK_OP (insn
, 0x23);
750 return MASK_OP (insn
, 0x1 << 19);
752 if (__GF (insn
, 18, 2) == 0x3)
753 return MASK_OP (insn
, 0x7 << 17);
754 return MASK_OP (insn
, 0x3 << 18);
756 return MASK_OP (insn
, 0x1 << 24);
761 return MASK_OP (insn
, 0x1 << 12);
763 return MASK_OP (insn
, 0x1 << 24);
765 return MASK_OP (insn
, 0x1 << 14);
767 if (__GF (insn
, 16, 4) == 0)
768 return MASK_OP (insn
, 0x1ff << 16);
770 return MASK_OP (insn
, 0xf << 16);
772 return MASK_OP (insn
, 0x1 << 19);
774 switch (__GF (insn
, 0, 5))
777 /* SETGIE and SETEND */
778 if (__GF (insn
, 5, 5) == 0x1 || __GF (insn
, 5, 5) == 0x2)
779 return MASK_OP (insn
, 0x1fffff);
780 return MASK_OP (insn
, 0x1f);
782 if (__GF (insn
, 5, 5) == 5 || __GF (insn
, 5, 5) == 7)
784 return MASK_OP (insn
, 0x3ff);
785 return MASK_OP (insn
, 0x1f);
787 return MASK_OP (insn
, 0x1f);
790 if (__GF (insn
, 4, 2) == 0)
793 switch (__GF (insn
, 0, 4))
797 /* FS1/F2OP FD1/F2OP */
798 if (__GF (insn
, 6, 4) == 0xf)
799 return MASK_OP (insn
, 0x7fff);
801 return MASK_OP (insn
, 0x3ff);
805 return MASK_OP (insn
, 0x3ff);
809 if (__GF (insn
, 6, 4) == 0xc)
810 return MASK_OP (insn
, 0x7fff);
812 return MASK_OP (insn
, 0x3ff);
814 return MASK_OP (insn
, 0xff);
817 else if (__GF (insn
, 0, 2) == 0)
818 return MASK_OP (insn
, 0xf);
819 return MASK_OP (insn
, 0xcf);
822 switch (__GF (insn
, 23, 2))
825 if (__GF (insn
, 5, 4) == 0)
826 /* AMxxx AMAyyS AMyyS AMAWzS AMWzS */
827 return MASK_OP (insn
, (0x1f << 20) | 0x1ff);
828 else if (__GF (insn
, 5, 4) == 1)
829 /* ALR ASR ALA ASA AUPI */
830 return MASK_OP (insn
, (0x1f << 20) | (0xf << 5));
831 else if (__GF (insn
, 20, 3) == 0 && __GF (insn
, 6, 3) == 1)
833 return MASK_OP (insn
, (0x1f << 20) | (0x7 << 6));
834 else if (__GF (insn
, 20 ,3) == 2 && __GF (insn
, 6, 3) == 1)
836 return MASK_OP (insn
, (0x1f << 20) | (0xf << 5));
837 else if (__GF (insn
, 20 ,3) == 3 && __GF (insn
, 6, 3) == 1)
838 /* AMTAR AMTAR2 AMFAR AMFAR2 */
839 return MASK_OP (insn
, (0x1f << 20) | (0x1f << 5));
840 else if (__GF (insn
, 7, 2) == 3)
842 return MASK_OP (insn
, (0x1f << 20) | (0x3 << 7));
843 else if (__GF (insn
, 6, 3) == 2)
845 return MASK_OP (insn
, (0x1f << 20) | (0xf << 5));
847 /* AmxxxL.l AmxxxL2.S AMxxxL2.L */
848 return MASK_OP (insn
, (0x1f << 20) | (0x7 << 6));
850 if (__GF (insn
, 20, 3) == 0)
852 return MASK_OP (insn
, (0x1f << 20) | (0x1 << 5));
853 else if (__GF (insn
, 20, 3) == 1)
854 /* AMTARI Ix AMTARI Mx */
855 return MASK_OP (insn
, (0x1f << 20));
856 else if (__GF (insn
, 6, 3) == 2)
857 /* AMAWzSl.S AMWzSl.S */
858 return MASK_OP (insn
, (0x1f << 20) | (0xf << 5));
859 else if (__GF (insn
, 7, 2) == 3)
860 /* AMAWzSSA AMWzSSA */
861 return MASK_OP (insn
, (0x1f << 20) | (0x3 << 7));
863 /* AMAWzSL.L AMAWzSL2.S AMAWzSL2.L
864 AMWzSL.L AMWzSL.L AMWzSL2.S */
865 return MASK_OP (insn
, (0x1f << 20) | (0x7 << 6));
867 if (__GF (insn
, 6, 3) == 2)
868 /* AMAyySl.S AMWyySl.S */
869 return MASK_OP (insn
, (0x1f << 20) | (0xf << 5));
870 else if (__GF (insn
, 7, 2) == 3)
871 /* AMAWyySSA AMWyySSA */
872 return MASK_OP (insn
, (0x1f << 20) | (0x3 << 7));
874 /* AMAWyySL.L AMAWyySL2.S AMAWyySL2.L
875 AMWyySL.L AMWyySL.L AMWyySL2.S */
876 return MASK_OP (insn
, (0x1f << 20) | (0x7 << 6));
878 return MASK_OP (insn
, 0x1f << 20);
884 /* Define cctl subtype. */
885 static char *cctl_subtype
[] =
888 "st0", "st0", "st0", "st2", "st2", "st3", "st3", "st4",
889 "st1", "st1", "st1", "st0", "st0", NULL
, NULL
, "st5",
891 "st0", NULL
, NULL
, "st2", "st2", "st3", "st3", NULL
,
892 "st1", NULL
, NULL
, "st0", "st0", NULL
, NULL
, NULL
895 /* Check the subset of opcode. */
898 nds32_special_opcode (uint32_t insn
, struct nds32_opcode
**opc
)
906 /* Check if special case. */
907 switch ((*opc
)->value
)
913 case FPU_RA_IMMBI (LWC
):
914 case FPU_RA_IMMBI (SWC
):
915 case FPU_RA_IMMBI (LDC
):
916 case FPU_RA_IMMBI (SDC
):
917 /* Check if cp0 => FPU. */
918 if (__GF (insn
, 13, 2) == 0)
920 while (!((*opc
)->attr
& ATTR (FPU
)) && (*opc
)->next
)
929 /* Check if (add/add_slli) (sub/sub_slli) (and/and_slli). */
930 if (N32_SH5(insn
) != 0)
935 if (__GF (insn
, 10, 15) == 0)
939 string
= cctl_subtype
[__GF (insn
, 5, 5)];
943 case JREG (JR
) | JREG_RET
:
944 if (__GF (insn
, 8, 2) != 0)
951 if (__GF (insn
, 0, 9) == 0)
958 while (strstr ((*opc
)->opcode
, string
) == NULL
959 && strstr ((*opc
)->instruction
, string
) == NULL
&& (*opc
)->next
)
964 /* Classify instruction is COP or FPU. */
966 if (op
== N32_OP6_COP
&& __GF (insn
, 4, 2) != 0)
968 while (((*opc
)->attr
& ATTR (FPU
)) != 0 && (*opc
)->next
)
974 print_insn_nds32 (bfd_vma pc
, disassemble_info
*info
)
978 bfd_byte buf_data
[16];
983 int last_symbol_index
= -1;
986 bfd_boolean found
= FALSE
;
987 struct nds32_private_data
*private_data
;
989 enum map_type mapping_type
= MAP_CODE
;
991 if (info
->private_data
== NULL
)
993 /* Note: remain lifecycle throughout whole execution. */
994 static struct nds32_private_data
private;
995 private.has_mapping_symbols
= -1; /* unknown yet. */
996 private.last_symbol_index
= -1;
997 private.last_addr
= 0;
998 info
->private_data
= &private;
1000 private_data
= info
->private_data
;
1002 if (info
->symtab_size
!= 0)
1009 start
= info
->symtab_pos
;
1010 if (start
< private_data
->last_symbol_index
)
1011 start
= private_data
->last_symbol_index
;
1017 if (private_data
->has_mapping_symbols
!= 0
1018 && ((strncmp (".text", info
->section
->name
, 5) == 0)))
1020 for (n
= start
; n
< info
->symtab_size
; n
++)
1022 addr
= bfd_asymbol_value (info
->symtab
[n
]);
1025 if (get_mapping_symbol_type (info
, n
, &mapping_type
))
1027 last_symbol_index
= n
;
1033 private_data
->has_mapping_symbols
= 1;
1034 else if (!found
&& private_data
->has_mapping_symbols
== -1)
1036 /* Make sure there are no any mapping symbol. */
1037 for (n
= 0; n
< info
->symtab_size
; n
++)
1039 if (is_mapping_symbol (info
, n
, &mapping_type
))
1041 private_data
->has_mapping_symbols
= -1;
1045 if (private_data
->has_mapping_symbols
== -1)
1046 private_data
->has_mapping_symbols
= 0;
1049 private_data
->last_symbol_index
= last_symbol_index
;
1050 private_data
->last_mapping_type
= mapping_type
;
1051 is_data
= (private_data
->last_mapping_type
== MAP_DATA0
1052 || private_data
->last_mapping_type
== MAP_DATA1
1053 || private_data
->last_mapping_type
== MAP_DATA2
1054 || private_data
->last_mapping_type
== MAP_DATA3
1055 || private_data
->last_mapping_type
== MAP_DATA4
);
1059 /* Wonder data or instruction. */
1064 /* Fix corner case: there is no next mapping symbol,
1065 let mapping type decides size */
1067 if (last_symbol_index
+ 1 >= info
->symtab_size
)
1069 if (mapping_type
== MAP_DATA0
)
1071 if (mapping_type
== MAP_DATA1
)
1073 if (mapping_type
== MAP_DATA2
)
1075 if (mapping_type
== MAP_DATA3
)
1077 if (mapping_type
== MAP_DATA4
)
1080 for (n
= last_symbol_index
+ 1; n
< info
->symtab_size
; n
++)
1082 addr
= bfd_asymbol_value (info
->symtab
[n
]);
1084 enum map_type fake_mapping_type
;
1085 if (get_mapping_symbol_type (info
, n
, &fake_mapping_type
)
1087 && ((info
->section
== NULL
)
1088 || (info
->section
== info
->symtab
[n
]->section
)))
1089 && (addr
- pc
< size
))
1097 size
= (pc
& 1) ? 1 : 2;
1099 /* Read bytes from BFD. */
1100 info
->read_memory_func (pc
, buf_data
, size
, info
);
1103 /* Start assembling data. */
1104 /* Little endian of data. */
1105 if (info
->endian
== BFD_ENDIAN_LITTLE
)
1107 for (i1
= size
- 1;; i1
--)
1110 given1
= buf_data
[i1
] | (given1
<< 8);
1112 given
= buf_data
[i1
] | (given
<< 8);
1120 /* Big endian of data. */
1121 for (i1
= 0; i1
< size
; i1
++)
1124 given
= buf_data
[i1
] | (given
<< 8);
1126 given1
= buf_data
[i1
] | (given1
<< 8);
1130 info
->bytes_per_line
= 4;
1133 info
->fprintf_func (info
->stream
, ".qword\t0x%016" PRIx64
"%016" PRIx64
,
1136 info
->fprintf_func (info
->stream
, ".dword\t0x%016" PRIx64
, given
);
1138 info
->fprintf_func (info
->stream
, ".word\t0x%08" PRIx64
, given
);
1142 if (mapping_type
== MAP_DATA0
)
1143 info
->fprintf_func (info
->stream
, ".byte\t0x%02" PRIx64
,
1146 info
->fprintf_func (info
->stream
, ".short\t0x%04" PRIx64
, given
);
1151 info
->fprintf_func (info
->stream
, ".byte\t0x%02" PRIx64
, given
);
1158 status
= info
->read_memory_func (pc
, buf
, 4, info
);
1161 /* For the last 16-bit instruction. */
1163 status
= info
->read_memory_func (pc
, buf
, 2, info
);
1166 (*info
->memory_error_func
) (status
, pc
, info
);
1173 insn
= bfd_getb32 (buf
);
1174 /* 16-bit instruction. */
1175 if (insn
& 0x80000000)
1177 print_insn16 (pc
, info
, (insn
>> 16), NDS32_PARSE_INSN16
);
1181 /* 32-bit instructions. */
1183 print_insn32 (pc
, info
, insn
, NDS32_PARSE_INSN32
);
1185 info
->fprintf_func (info
->stream
,
1186 _("insufficient data to decode instruction"));
1190 /* Ignore disassembling unnecessary name. */
1193 nds32_symbol_is_valid (asymbol
*sym
,
1194 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
1201 name
= bfd_asymbol_name (sym
);
1203 /* Mapping symbol is invalid. */
1210 nds32_add_opcode_hash_table (unsigned indx
)
1214 opc
= nds32_opcode_table
[indx
];
1218 while (opc
->opcode
!= NULL
)
1222 slot
= (opcode_t
**) htab_find_slot
1223 (opcode_htab
, &opc
->value
, INSERT
);
1226 /* This is the new one. */
1233 /* Already exists. Append to the list. */
1245 disassemble_init_nds32 (struct disassemble_info
*info
)
1247 static unsigned init_done
= 0;
1250 /* Set up symbol checking function. */
1251 info
->symbol_is_valid
= nds32_symbol_is_valid
;
1253 /* Only need to initialize once:
1254 High level will call this function for every object file.
1255 For example, when disassemble all members of a library. */
1259 /* Setup main core. */
1260 nds32_keyword_table
[NDS32_MAIN_CORE
] = &keywords
[0];
1261 nds32_opcode_table
[NDS32_MAIN_CORE
] = &nds32_opcodes
[0];
1262 nds32_field_table
[NDS32_MAIN_CORE
] = &operand_fields
[0];
1264 /* Build opcode table. */
1265 opcode_htab
= htab_create_alloc (1024, htab_hash_hash
, htab_hash_eq
,
1266 NULL
, xcalloc
, free
);
1268 for (k
= 0; k
< NDS32_CORE_COUNT
; k
++)
1271 nds32_add_opcode_hash_table (k
);
1278 is_mapping_symbol (struct disassemble_info
*info
, int n
,
1279 enum map_type
*map_type
)
1281 const char *name
= NULL
;
1283 /* Get symbol name. */
1284 name
= bfd_asymbol_name (info
->symtab
[n
]);
1288 *map_type
= MAP_CODE
;
1291 else if (name
[1] == 'd' && name
[2] == '0')
1293 *map_type
= MAP_DATA0
;
1296 else if (name
[1] == 'd' && name
[2] == '1')
1298 *map_type
= MAP_DATA1
;
1301 else if (name
[1] == 'd' && name
[2] == '2')
1303 *map_type
= MAP_DATA2
;
1306 else if (name
[1] == 'd' && name
[2] == '3')
1308 *map_type
= MAP_DATA3
;
1311 else if (name
[1] == 'd' && name
[2] == '4')
1313 *map_type
= MAP_DATA4
;
1321 get_mapping_symbol_type (struct disassemble_info
*info
, int n
,
1322 enum map_type
*map_type
)
1324 /* If the symbol is in a different section, ignore it. */
1325 if (info
->section
!= NULL
1326 && info
->section
!= info
->symtab
[n
]->section
)
1329 return is_mapping_symbol (info
, n
, map_type
);