1 /* Altera Nios II disassemble routines
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by Nigel Gray (ngray@altera.com).
4 Contributed by Mentor Graphics, Inc.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
24 #include "disassemble.h"
26 #include "opcode/nios2.h"
27 #include "libiberty.h"
31 /* No symbol table is available when this code runs out in an embedded
32 system as when it is used for disassembler support in a monitor. */
33 #if !defined(EMBEDDED_ENV)
34 #define SYMTAB_AVAILABLE 1
36 #include "elf/nios2.h"
39 /* Default length of Nios II instruction in bytes. */
42 /* Data structures used by the opcode hash table. */
43 typedef struct _nios2_opcode_hash
45 const struct nios2_opcode
*opcode
;
46 struct _nios2_opcode_hash
*next
;
49 /* Hash table size. */
50 #define OPCODE_HASH_SIZE (IW_R1_OP_UNSHIFTED_MASK + 1)
52 /* Extract the opcode from an instruction word. */
54 nios2_r1_extract_opcode (unsigned int x
)
56 return GET_IW_R1_OP (x
);
60 nios2_r2_extract_opcode (unsigned int x
)
62 return GET_IW_R2_OP (x
);
65 /* We maintain separate hash tables for R1 and R2 opcodes, and pseudo-ops
66 are stored in a different table than regular instructions. */
68 typedef struct _nios2_disassembler_state
70 const struct nios2_opcode
*opcodes
;
71 const int *num_opcodes
;
72 unsigned int (*extract_opcode
) (unsigned int);
73 nios2_opcode_hash
*hash
[OPCODE_HASH_SIZE
];
74 nios2_opcode_hash
*ps_hash
[OPCODE_HASH_SIZE
];
75 const struct nios2_opcode
*nop
;
77 } nios2_disassembler_state
;
79 static nios2_disassembler_state
80 nios2_r1_disassembler_state
= {
82 &nios2_num_r1_opcodes
,
83 nios2_r1_extract_opcode
,
90 static nios2_disassembler_state
91 nios2_r2_disassembler_state
= {
93 &nios2_num_r2_opcodes
,
94 nios2_r2_extract_opcode
,
101 /* Function to initialize the opcode hash table. */
103 nios2_init_opcode_hash (nios2_disassembler_state
*state
)
106 register const struct nios2_opcode
*op
;
108 for (i
= 0; i
< OPCODE_HASH_SIZE
; i
++)
109 for (op
= state
->opcodes
; op
< &state
->opcodes
[*(state
->num_opcodes
)]; op
++)
111 nios2_opcode_hash
*new_hash
;
112 nios2_opcode_hash
**bucket
= NULL
;
114 if ((op
->pinfo
& NIOS2_INSN_MACRO
) == NIOS2_INSN_MACRO
)
116 if (i
== state
->extract_opcode (op
->match
)
117 && (op
->pinfo
& (NIOS2_INSN_MACRO_MOV
| NIOS2_INSN_MACRO_MOVI
)
120 bucket
= &(state
->ps_hash
[i
]);
121 if (strcmp (op
->name
, "nop") == 0)
125 else if (i
== state
->extract_opcode (op
->match
))
126 bucket
= &(state
->hash
[i
]);
131 (nios2_opcode_hash
*) malloc (sizeof (nios2_opcode_hash
));
132 if (new_hash
== NULL
)
134 /* xgettext:c-format */
135 opcodes_error_handler (_("out of memory"));
138 new_hash
->opcode
= op
;
139 new_hash
->next
= NULL
;
141 bucket
= &((*bucket
)->next
);
147 #ifdef DEBUG_HASHTABLE
148 for (i
= 0; i
< OPCODE_HASH_SIZE
; ++i
)
150 nios2_opcode_hash
*tmp_hash
= state
->hash
[i
];
151 printf ("index: 0x%02X ops: ", i
);
152 while (tmp_hash
!= NULL
)
154 printf ("%s ", tmp_hash
->opcode
->name
);
155 tmp_hash
= tmp_hash
->next
;
160 for (i
= 0; i
< OPCODE_HASH_SIZE
; ++i
)
162 nios2_opcode_hash
*tmp_hash
= state
->ps_hash
[i
];
163 printf ("index: 0x%02X ops: ", i
);
164 while (tmp_hash
!= NULL
)
166 printf ("%s ", tmp_hash
->opcode
->name
);
167 tmp_hash
= tmp_hash
->next
;
171 #endif /* DEBUG_HASHTABLE */
174 /* Return a pointer to an nios2_opcode struct for a given instruction
175 word OPCODE for bfd machine MACH, or NULL if there is an error. */
176 const struct nios2_opcode
*
177 nios2_find_opcode_hash (unsigned long opcode
, unsigned long mach
)
179 nios2_opcode_hash
*entry
;
180 nios2_disassembler_state
*state
;
182 /* Select the right instruction set, hash tables, and opcode accessor
183 for the mach variant. */
184 if (mach
== bfd_mach_nios2r2
)
185 state
= &nios2_r2_disassembler_state
;
187 state
= &nios2_r1_disassembler_state
;
189 /* Build a hash table to shorten the search time. */
191 nios2_init_opcode_hash (state
);
193 /* Check for NOP first. Both NOP and MOV are macros that expand into
194 an ADD instruction, and we always want to give priority to NOP. */
195 if (state
->nop
->match
== (opcode
& state
->nop
->mask
))
198 /* First look in the pseudo-op hashtable. */
199 for (entry
= state
->ps_hash
[state
->extract_opcode (opcode
)];
200 entry
; entry
= entry
->next
)
201 if (entry
->opcode
->match
== (opcode
& entry
->opcode
->mask
))
202 return entry
->opcode
;
204 /* Otherwise look in the main hashtable. */
205 for (entry
= state
->hash
[state
->extract_opcode (opcode
)];
206 entry
; entry
= entry
->next
)
207 if (entry
->opcode
->match
== (opcode
& entry
->opcode
->mask
))
208 return entry
->opcode
;
213 /* There are 32 regular registers, 32 coprocessor registers,
214 and 32 control registers. */
215 #define NUMREGNAMES 32
217 /* Return a pointer to the base of the coprocessor register name array. */
218 static struct nios2_reg
*
219 nios2_coprocessor_regs (void)
221 static struct nios2_reg
*cached
= NULL
;
226 for (i
= NUMREGNAMES
; i
< nios2_num_regs
; i
++)
227 if (!strcmp (nios2_regs
[i
].name
, "c0"))
229 cached
= nios2_regs
+ i
;
237 /* Return a pointer to the base of the control register name array. */
238 static struct nios2_reg
*
239 nios2_control_regs (void)
241 static struct nios2_reg
*cached
= NULL
;
246 for (i
= NUMREGNAMES
; i
< nios2_num_regs
; i
++)
247 if (!strcmp (nios2_regs
[i
].name
, "status"))
249 cached
= nios2_regs
+ i
;
257 /* Helper routine to report internal errors. */
259 bad_opcode (const struct nios2_opcode
*op
)
261 opcodes_error_handler
262 /* xgettext:c-format */
263 (_("internal error: broken opcode descriptor for `%s %s'"),
268 /* The function nios2_print_insn_arg uses the character pointed
269 to by ARGPTR to determine how it print the next token or separator
270 character in the arguments to an instruction. */
272 nios2_print_insn_arg (const char *argptr
,
273 unsigned long opcode
, bfd_vma address
,
274 disassemble_info
*info
,
275 const struct nios2_opcode
*op
)
278 struct nios2_reg
*reg_base
;
285 (*info
->fprintf_func
) (info
->stream
, "%c", *argptr
);
289 /* Control register index. */
293 i
= GET_IW_R_IMM5 (opcode
);
296 i
= GET_IW_F3X6L5_IMM5 (opcode
);
301 reg_base
= nios2_control_regs ();
302 (*info
->fprintf_func
) (info
->stream
, "%s", reg_base
[i
].name
);
306 reg_base
= nios2_regs
;
310 i
= GET_IW_R_C (opcode
);
313 i
= GET_IW_CUSTOM_C (opcode
);
314 if (GET_IW_CUSTOM_READC (opcode
) == 0)
315 reg_base
= nios2_coprocessor_regs ();
319 i
= GET_IW_F3X6L5_C (opcode
);
322 i
= GET_IW_F3X8_C (opcode
);
323 if (GET_IW_F3X8_READC (opcode
) == 0)
324 reg_base
= nios2_coprocessor_regs ();
327 i
= GET_IW_F2_B (opcode
);
333 (*info
->fprintf_func
) (info
->stream
, "%s", reg_base
[i
].name
);
335 (*info
->fprintf_func
) (info
->stream
, "unknown");
339 reg_base
= nios2_regs
;
343 i
= GET_IW_R_A (opcode
);
346 i
= GET_IW_I_A (opcode
);
349 i
= GET_IW_CUSTOM_A (opcode
);
350 if (GET_IW_CUSTOM_READA (opcode
) == 0)
351 reg_base
= nios2_coprocessor_regs ();
354 i
= GET_IW_F2I16_A (opcode
);
356 case iw_F2X4I12_type
:
357 i
= GET_IW_F2X4I12_A (opcode
);
359 case iw_F1X4I12_type
:
360 i
= GET_IW_F1X4I12_A (opcode
);
362 case iw_F1X4L17_type
:
363 i
= GET_IW_F1X4L17_A (opcode
);
367 i
= GET_IW_F3X6L5_A (opcode
);
369 case iw_F2X6L10_type
:
370 i
= GET_IW_F2X6L10_A (opcode
);
373 i
= GET_IW_F3X8_A (opcode
);
374 if (GET_IW_F3X8_READA (opcode
) == 0)
375 reg_base
= nios2_coprocessor_regs ();
378 i
= GET_IW_F1X1_A (opcode
);
381 i
= 27; /* Implicit stack pointer reference. */
384 i
= GET_IW_F2_A (opcode
);
390 (*info
->fprintf_func
) (info
->stream
, "%s", reg_base
[i
].name
);
392 (*info
->fprintf_func
) (info
->stream
, "unknown");
396 reg_base
= nios2_regs
;
400 i
= GET_IW_R_B (opcode
);
403 i
= GET_IW_I_B (opcode
);
406 i
= GET_IW_CUSTOM_B (opcode
);
407 if (GET_IW_CUSTOM_READB (opcode
) == 0)
408 reg_base
= nios2_coprocessor_regs ();
411 i
= GET_IW_F2I16_B (opcode
);
413 case iw_F2X4I12_type
:
414 i
= GET_IW_F2X4I12_B (opcode
);
418 i
= GET_IW_F3X6L5_B (opcode
);
420 case iw_F2X6L10_type
:
421 i
= GET_IW_F2X6L10_B (opcode
);
424 i
= GET_IW_F3X8_B (opcode
);
425 if (GET_IW_F3X8_READB (opcode
) == 0)
426 reg_base
= nios2_coprocessor_regs ();
429 i
= GET_IW_F1I5_B (opcode
);
432 i
= GET_IW_F2_B (opcode
);
441 (*info
->fprintf_func
) (info
->stream
, "%s", reg_base
[i
].name
);
443 (*info
->fprintf_func
) (info
->stream
, "unknown");
450 i
= GET_IW_T1I7_A3 (opcode
);
453 i
= GET_IW_T2X1L3_B3 (opcode
);
456 i
= GET_IW_T2X1I3_B3 (opcode
);
459 i
= GET_IW_T3X1_C3 (opcode
);
462 if (op
->num_args
== 3)
463 i
= GET_IW_T2X3_A3 (opcode
);
465 i
= GET_IW_T2X3_B3 (opcode
);
470 i
= nios2_r2_reg3_mappings
[i
];
471 (*info
->fprintf_func
) (info
->stream
, "%s", nios2_regs
[i
].name
);
475 /* 6-bit unsigned immediate with no shift. */
479 i
= GET_IW_T1X1I6_IMM6 (opcode
);
484 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
488 /* 6-bit unsigned immediate with 2-bit shift. */
492 i
= GET_IW_T1X1I6_IMM6 (opcode
) << 2;
497 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
504 i
= GET_IW_T1I7_A3 (opcode
);
507 i
= GET_IW_T2I4_A3 (opcode
);
510 i
= GET_IW_T2X1L3_A3 (opcode
);
513 i
= GET_IW_T2X1I3_A3 (opcode
);
516 i
= GET_IW_T3X1_A3 (opcode
);
519 i
= GET_IW_T2X3_A3 (opcode
);
522 i
= GET_IW_T1X1I6_A3 (opcode
);
527 i
= nios2_r2_reg3_mappings
[i
];
528 (*info
->fprintf_func
) (info
->stream
, "%s", nios2_regs
[i
].name
);
535 i
= GET_IW_T2I4_B3 (opcode
);
538 i
= GET_IW_T3X1_B3 (opcode
);
541 i
= GET_IW_T2X3_B3 (opcode
);
546 i
= nios2_r2_reg3_mappings
[i
];
547 (*info
->fprintf_func
) (info
->stream
, "%s", nios2_regs
[i
].name
);
551 /* 16-bit signed immediate. */
555 i
= (signed) (GET_IW_I_IMM16 (opcode
) << 16) >> 16;
558 i
= (signed) (GET_IW_F2I16_IMM16 (opcode
) << 16) >> 16;
563 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
567 /* 12-bit signed immediate. */
570 case iw_F2X4I12_type
:
571 i
= (signed) (GET_IW_F2X4I12_IMM12 (opcode
) << 20) >> 20;
573 case iw_F1X4I12_type
:
574 i
= (signed) (GET_IW_F1X4I12_IMM12 (opcode
) << 20) >> 20;
579 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
583 /* 16-bit unsigned immediate. */
587 i
= GET_IW_I_IMM16 (opcode
);
590 i
= GET_IW_F2I16_IMM16 (opcode
);
595 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
599 /* 7-bit unsigned immediate with 2-bit shift. */
603 i
= GET_IW_T1I7_IMM7 (opcode
) << 2;
606 i
= GET_IW_X1I7_IMM7 (opcode
) << 2;
611 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
615 /* 5-bit unsigned immediate with 2-bit shift. */
619 i
= GET_IW_F1I5_IMM5 (opcode
) << 2;
624 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
628 /* 4-bit unsigned immediate with 2-bit shift. */
632 i
= GET_IW_T2I4_IMM4 (opcode
) << 2;
635 i
= GET_IW_L5I4X1_IMM4 (opcode
) << 2;
640 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
644 /* 4-bit unsigned immediate with 1-bit shift. */
648 i
= GET_IW_T2I4_IMM4 (opcode
) << 1;
653 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
657 /* 4-bit unsigned immediate without shift. */
661 i
= GET_IW_T2I4_IMM4 (opcode
);
666 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
670 /* 16-bit signed immediate address offset. */
674 i
= (signed) (GET_IW_I_IMM16 (opcode
) << 16) >> 16;
677 i
= (signed) (GET_IW_F2I16_IMM16 (opcode
) << 16) >> 16;
682 address
= address
+ 4 + i
;
683 (*info
->print_address_func
) (address
, info
);
687 /* 10-bit signed address offset with 1-bit shift. */
691 i
= (signed) (GET_IW_I10_IMM10 (opcode
) << 22) >> 21;
696 address
= address
+ 2 + i
;
697 (*info
->print_address_func
) (address
, info
);
701 /* 7-bit signed address offset with 1-bit shift. */
705 i
= (signed) (GET_IW_T1I7_IMM7 (opcode
) << 25) >> 24;
710 address
= address
+ 2 + i
;
711 (*info
->print_address_func
) (address
, info
);
715 /* 5-bit unsigned immediate. */
719 i
= GET_IW_R_IMM5 (opcode
);
722 i
= GET_IW_F3X6L5_IMM5 (opcode
);
724 case iw_F2X6L10_type
:
725 i
= GET_IW_F2X6L10_MSB (opcode
);
728 i
= GET_IW_X2L5_IMM5 (opcode
);
733 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
737 /* Second 5-bit unsigned immediate field. */
740 case iw_F2X6L10_type
:
741 i
= GET_IW_F2X6L10_LSB (opcode
);
746 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
750 /* 8-bit unsigned immediate. */
754 i
= GET_IW_CUSTOM_N (opcode
);
757 i
= GET_IW_F3X8_N (opcode
);
762 (*info
->fprintf_func
) (info
->stream
, "%lu", i
);
766 /* 26-bit unsigned immediate. */
770 i
= GET_IW_J_IMM26 (opcode
);
773 i
= GET_IW_L26_IMM26 (opcode
);
778 /* This translates to an address because it's only used in call
780 address
= (address
& 0xf0000000) | (i
<< 2);
781 (*info
->print_address_func
) (address
, info
);
785 /* Encoded enumeration for addi.n/subi.n. */
789 i
= nios2_r2_asi_n_mappings
[GET_IW_T2X1I3_IMM3 (opcode
)];
794 (*info
->fprintf_func
) (info
->stream
, "%lu", i
);
798 /* Encoded enumeration for slli.n/srli.n. */
802 i
= nios2_r2_shi_n_mappings
[GET_IW_T2X1I3_IMM3 (opcode
)];
807 (*info
->fprintf_func
) (info
->stream
, "%lu", i
);
811 /* Encoded enumeration for andi.n. */
815 i
= nios2_r2_andi_n_mappings
[GET_IW_T2I4_IMM4 (opcode
)];
820 (*info
->fprintf_func
) (info
->stream
, "%lu", i
);
824 /* Encoded enumeration for movi.n. */
828 i
= GET_IW_T1I7_IMM7 (opcode
);
839 (*info
->fprintf_func
) (info
->stream
, "%ld", i
);
844 unsigned long reglist
= 0;
850 case iw_F1X4L17_type
:
851 /* Encoding for ldwm/stwm. */
852 i
= GET_IW_F1X4L17_REGMASK (opcode
);
853 if (GET_IW_F1X4L17_RS (opcode
))
855 reglist
= ((i
<< 14) & 0x00ffc000);
857 reglist
|= (1 << 28);
859 reglist
|= (1 << 31);
863 dir
= GET_IW_F1X4L17_REGMASK (opcode
) ? 1 : -1;
867 /* Encoding for push.n/pop.n. */
868 reglist
|= (1 << 31);
869 if (GET_IW_L5I4X1_FP (opcode
))
870 reglist
|= (1 << 28);
871 if (GET_IW_L5I4X1_CS (opcode
))
873 int val
= GET_IW_L5I4X1_REGRANGE (opcode
);
874 reglist
|= nios2_r2_reg_range_mappings
[val
];
876 dir
= (op
->match
== MATCH_R2_POP_N
? 1 : -1);
884 (*info
->fprintf_func
) (info
->stream
, "{");
885 for (k
= (dir
== 1 ? 0 : 31);
886 (dir
== 1 && k
< 32) || (dir
== -1 && k
>= 0);
888 if (reglist
& (1 << k
))
891 (*info
->fprintf_func
) (info
->stream
, ",");
894 (*info
->fprintf_func
) (info
->stream
, "%s", nios2_regs
[k
].name
);
896 (*info
->fprintf_func
) (info
->stream
, "}");
901 /* Base register and options for ldwm/stwm. */
904 case iw_F1X4L17_type
:
905 if (GET_IW_F1X4L17_ID (opcode
) == 0)
906 (*info
->fprintf_func
) (info
->stream
, "--");
908 i
= GET_IW_F1X4I12_A (opcode
);
909 (*info
->fprintf_func
) (info
->stream
, "(%s)",
910 nios2_builtin_regs
[i
].name
);
912 if (GET_IW_F1X4L17_ID (opcode
))
913 (*info
->fprintf_func
) (info
->stream
, "++");
914 if (GET_IW_F1X4L17_WB (opcode
))
915 (*info
->fprintf_func
) (info
->stream
, ",writeback");
916 if (GET_IW_F1X4L17_PC (opcode
))
917 (*info
->fprintf_func
) (info
->stream
, ",ret");
925 (*info
->fprintf_func
) (info
->stream
, "unknown");
931 /* nios2_disassemble does all the work of disassembling a Nios II
932 instruction opcode. */
934 nios2_disassemble (bfd_vma address
, unsigned long opcode
,
935 disassemble_info
*info
)
937 const struct nios2_opcode
*op
;
939 info
->bytes_per_line
= INSNLEN
;
940 info
->bytes_per_chunk
= INSNLEN
;
941 info
->display_endian
= info
->endian
;
942 info
->insn_info_valid
= 1;
943 info
->branch_delay_insns
= 0;
945 info
->insn_type
= dis_nonbranch
;
949 /* Find the major opcode and use this to disassemble
950 the instruction and its arguments. */
951 op
= nios2_find_opcode_hash (opcode
, info
->mach
);
955 const char *argstr
= op
->args
;
956 (*info
->fprintf_func
) (info
->stream
, "%s", op
->name
);
957 if (argstr
!= NULL
&& *argstr
!= '\0')
959 (*info
->fprintf_func
) (info
->stream
, "\t");
960 while (*argstr
!= '\0')
962 nios2_print_insn_arg (argstr
, opcode
, address
, info
, op
);
966 /* Tell the caller how far to advance the program counter. */
967 info
->bytes_per_chunk
= op
->size
;
972 /* Handle undefined instructions. */
973 info
->insn_type
= dis_noninsn
;
974 (*info
->fprintf_func
) (info
->stream
, "0x%lx", opcode
);
980 /* print_insn_nios2 is the main disassemble function for Nios II.
981 The function diassembler(abfd) (source in disassemble.c) returns a
982 pointer to this either print_insn_big_nios2 or
983 print_insn_little_nios2, which in turn call this function when the
984 bfd machine type is Nios II. print_insn_nios2 reads the
985 instruction word at the address given, and prints the disassembled
986 instruction on the stream info->stream using info->fprintf_func. */
989 print_insn_nios2 (bfd_vma address
, disassemble_info
*info
,
990 enum bfd_endian endianness
)
992 bfd_byte buffer
[INSNLEN
];
995 status
= (*info
->read_memory_func
) (address
, buffer
, INSNLEN
, info
);
999 if (endianness
== BFD_ENDIAN_BIG
)
1000 insn
= (unsigned long) bfd_getb32 (buffer
);
1002 insn
= (unsigned long) bfd_getl32 (buffer
);
1003 return nios2_disassemble (address
, insn
, info
);
1006 /* We might have a 16-bit R2 instruction at the end of memory. Try that. */
1007 if (info
->mach
== bfd_mach_nios2r2
)
1009 status
= (*info
->read_memory_func
) (address
, buffer
, 2, info
);
1013 if (endianness
== BFD_ENDIAN_BIG
)
1014 insn
= (unsigned long) bfd_getb16 (buffer
);
1016 insn
= (unsigned long) bfd_getl16 (buffer
);
1017 return nios2_disassemble (address
, insn
, info
);
1021 /* If we got here, we couldn't read anything. */
1022 (*info
->memory_error_func
) (status
, address
, info
);
1026 /* These two functions are the main entry points, accessed from
1029 print_insn_big_nios2 (bfd_vma address
, disassemble_info
*info
)
1031 return print_insn_nios2 (address
, info
, BFD_ENDIAN_BIG
);
1035 print_insn_little_nios2 (bfd_vma address
, disassemble_info
*info
)
1037 return print_insn_nios2 (address
, info
, BFD_ENDIAN_LITTLE
);