1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for or1k. -*- C -*-
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
7 Copyright (C) 1996-2020 Free Software Foundation, Inc.
9 This file is part of libopcodes.
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "or1k-desc.h"
36 #include "cgen/basic-modes.h"
38 #include "safe-ctype.h"
41 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #define max(a,b) ((a) > (b) ? (a) : (b))
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
48 static const char * insert_normal
49 (CGEN_CPU_DESC
, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR
);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC
, const CGEN_INSN
*,
53 CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
);
54 static int extract_normal
55 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma
, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC
, const CGEN_INSN
*, CGEN_EXTRACT_INFO
*,
60 CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
);
62 static void put_insn_int_value
63 (CGEN_CPU_DESC
, CGEN_INSN_BYTES_PTR
, int, int, CGEN_INSN_INT
);
66 static CGEN_INLINE
void insert_1
67 (CGEN_CPU_DESC
, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE
int fill_cache
69 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, int, int, bfd_vma
);
70 static CGEN_INLINE
long extract_1
71 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, int, int, int, unsigned char *, bfd_vma
);
74 /* Operand insertion. */
78 /* Subroutine of insert_normal. */
80 static CGEN_INLINE
void
81 insert_1 (CGEN_CPU_DESC cd
,
91 x
= cgen_get_insn_value (cd
, bufp
, word_length
, cd
->endian
);
93 /* Written this way to avoid undefined behaviour. */
94 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
96 shift
= (start
+ 1) - length
;
98 shift
= (word_length
- (start
+ length
));
99 x
= (x
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
101 cgen_put_insn_value (cd
, bufp
, word_length
, (bfd_vma
) x
, cd
->endian
);
104 #endif /* ! CGEN_INT_INSN_P */
106 /* Default insertion routine.
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
115 The result is an error message or NULL if success. */
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
123 insert_normal (CGEN_CPU_DESC cd
,
126 unsigned int word_offset
,
129 unsigned int word_length
,
130 unsigned int total_length
,
131 CGEN_INSN_BYTES_PTR buffer
)
133 static char errbuf
[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
141 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
)
149 && word_length
> total_length
)
150 word_length
= total_length
;
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGN_OPT
))
156 long minval
= - (1L << (length
- 1));
157 unsigned long maxval
= mask
;
159 if ((value
> 0 && (unsigned long) value
> maxval
)
162 /* xgettext:c-format */
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value
, minval
, maxval
);
169 else if (! CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGNED
))
171 unsigned long maxval
= mask
;
172 unsigned long val
= (unsigned long) value
;
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value
>> 32) == -1))
183 /* xgettext:c-format */
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
192 if (! cgen_signed_overflow_ok_p (cd
))
194 long minval
= - (1L << (length
- 1));
195 long maxval
= (1L << (length
- 1)) - 1;
197 if (value
< minval
|| value
> maxval
)
200 /* xgettext:c-format */
201 (errbuf
, _("operand out of range (%ld not between %ld and %ld)"),
202 value
, minval
, maxval
);
211 int shift_within_word
, shift_to_word
, shift
;
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word
= total_length
- (word_offset
+ word_length
);
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P
)
218 shift_within_word
= start
+ 1 - length
;
220 shift_within_word
= word_length
- start
- length
;
222 /* The total SHIFT, then mask in the value. */
223 shift
= shift_to_word
+ shift_within_word
;
224 *buffer
= (*buffer
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
227 #else /* ! CGEN_INT_INSN_P */
230 unsigned char *bufp
= (unsigned char *) buffer
+ word_offset
/ 8;
232 insert_1 (cd
, value
, start
, length
, word_length
, bufp
);
235 #endif /* ! CGEN_INT_INSN_P */
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
248 insert_insn_normal (CGEN_CPU_DESC cd
,
249 const CGEN_INSN
* insn
,
250 CGEN_FIELDS
* fields
,
251 CGEN_INSN_BYTES_PTR buffer
,
254 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
256 const CGEN_SYNTAX_CHAR_TYPE
* syn
;
258 CGEN_INIT_INSERT (cd
);
259 value
= CGEN_INSN_BASE_VALUE (insn
);
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
266 put_insn_int_value (cd
, buffer
, cd
->base_insn_bitsize
,
267 CGEN_FIELDS_BITSIZE (fields
), value
);
271 cgen_put_insn_value (cd
, buffer
, min ((unsigned) cd
->base_insn_bitsize
,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields
)),
273 value
, cd
->insn_endian
);
275 #endif /* ! CGEN_INT_INSN_P */
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
282 for (syn
= CGEN_SYNTAX_STRING (syntax
); * syn
; ++ syn
)
286 if (CGEN_SYNTAX_CHAR_P (* syn
))
289 errmsg
= (* cd
->insert_operand
) (cd
, CGEN_SYNTAX_FIELD (*syn
),
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
304 CGEN_INSN_BYTES_PTR buf
,
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length
> insn_length
)
315 int shift
= insn_length
- length
;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
319 *buf
= (*buf
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
324 /* Operand extraction. */
326 #if ! CGEN_INT_INSN_P
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
334 static CGEN_INLINE
int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
336 CGEN_EXTRACT_INFO
*ex_info
,
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
344 disassemble_info
*info
= (disassemble_info
*) ex_info
->dis_info
;
346 /* First do a quick check. */
347 mask
= (1 << bytes
) - 1;
348 if (((ex_info
->valid
>> offset
) & mask
) == mask
)
351 /* Search for the first byte we need to read. */
352 for (mask
= 1 << offset
; bytes
> 0; --bytes
, ++offset
, mask
<<= 1)
353 if (! (mask
& ex_info
->valid
))
361 status
= (*info
->read_memory_func
)
362 (pc
, ex_info
->insn_bytes
+ offset
, bytes
, info
);
366 (*info
->memory_error_func
) (status
, pc
, info
);
370 ex_info
->valid
|= ((1 << bytes
) - 1) << offset
;
376 /* Subroutine of extract_normal. */
378 static CGEN_INLINE
long
379 extract_1 (CGEN_CPU_DESC cd
,
380 CGEN_EXTRACT_INFO
*ex_info ATTRIBUTE_UNUSED
,
385 bfd_vma pc ATTRIBUTE_UNUSED
)
390 x
= cgen_get_insn_value (cd
, bufp
, word_length
, cd
->endian
);
392 if (CGEN_INSN_LSB0_P
)
393 shift
= (start
+ 1) - length
;
395 shift
= (word_length
- (start
+ length
));
399 #endif /* ! CGEN_INT_INSN_P */
401 /* Default extraction routine.
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
414 Returns 1 for success, 0 for failure. */
416 /* ??? The return code isn't properly used. wip. */
418 /* ??? This doesn't handle bfd_vma's. Create another function when
422 extract_normal (CGEN_CPU_DESC cd
,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO
*ex_info
,
426 CGEN_EXTRACT_INFO
*ex_info ATTRIBUTE_UNUSED
,
428 CGEN_INSN_INT insn_value
,
430 unsigned int word_offset
,
433 unsigned int word_length
,
434 unsigned int total_length
,
435 #if ! CGEN_INT_INSN_P
438 bfd_vma pc ATTRIBUTE_UNUSED
,
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
452 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
)
459 if (word_offset
+ word_length
> total_length
)
460 word_length
= total_length
- word_offset
;
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
465 if (CGEN_INT_INSN_P
|| (word_offset
== 0 && word_length
== total_length
))
467 if (CGEN_INSN_LSB0_P
)
468 value
= insn_value
>> ((word_offset
+ start
+ 1) - length
);
470 value
= insn_value
>> (total_length
- ( word_offset
+ start
+ length
));
473 #if ! CGEN_INT_INSN_P
477 unsigned char *bufp
= ex_info
->insn_bytes
+ word_offset
/ 8;
479 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
482 if (fill_cache (cd
, ex_info
, word_offset
/ 8, word_length
/ 8, pc
) == 0)
488 value
= extract_1 (cd
, ex_info
, start
, length
, word_length
, bufp
, pc
);
491 #endif /* ! CGEN_INT_INSN_P */
493 /* Written this way to avoid undefined behaviour. */
494 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
498 if (CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGNED
)
499 && (value
& (1L << (length
- 1))))
507 /* Default insn extractor.
509 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
510 The extracted fields are stored in FIELDS.
511 EX_INFO is used to handle reading variable length insns.
512 Return the length of the insn in bits, or 0 if no match,
513 or -1 if an error occurs fetching data (memory_error_func will have
517 extract_insn_normal (CGEN_CPU_DESC cd
,
518 const CGEN_INSN
*insn
,
519 CGEN_EXTRACT_INFO
*ex_info
,
520 CGEN_INSN_INT insn_value
,
524 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
525 const CGEN_SYNTAX_CHAR_TYPE
*syn
;
527 CGEN_FIELDS_BITSIZE (fields
) = CGEN_INSN_BITSIZE (insn
);
529 CGEN_INIT_EXTRACT (cd
);
531 for (syn
= CGEN_SYNTAX_STRING (syntax
); *syn
; ++syn
)
535 if (CGEN_SYNTAX_CHAR_P (*syn
))
538 length
= (* cd
->extract_operand
) (cd
, CGEN_SYNTAX_FIELD (*syn
),
539 ex_info
, insn_value
, fields
, pc
);
544 /* We recognized and successfully extracted this insn. */
545 return CGEN_INSN_BITSIZE (insn
);
548 /* Machine generated code added here. */
550 const char * or1k_cgen_insert_operand
551 (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
);
553 /* Main entry point for operand insertion.
555 This function is basically just a big switch statement. Earlier versions
556 used tables to look up the function to use, but
557 - if the table contains both assembler and disassembler functions then
558 the disassembler contains much of the assembler and vice-versa,
559 - there's a lot of inlining possibilities as things grow,
560 - using a switch statement avoids the function call overhead.
562 This function could be moved into `parse_insn_normal', but keeping it
563 separate makes clear the interface between `parse_insn_normal' and each of
564 the handlers. It's also needed by GAS to insert operands that couldn't be
565 resolved during parsing. */
568 or1k_cgen_insert_operand (CGEN_CPU_DESC cd
,
570 CGEN_FIELDS
* fields
,
571 CGEN_INSN_BYTES_PTR buffer
,
572 bfd_vma pc ATTRIBUTE_UNUSED
)
574 const char * errmsg
= NULL
;
575 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
579 case OR1K_OPERAND_DISP21
:
581 long value
= fields
->f_disp21
;
582 value
= ((((SI
) (value
) >> (13))) - (((SI
) (pc
) >> (13))));
583 errmsg
= insert_normal (cd
, value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_ABS_ADDR
), 0, 20, 21, 32, total_length
, buffer
);
586 case OR1K_OPERAND_DISP26
:
588 long value
= fields
->f_disp26
;
589 value
= ((SI
) (((value
) - (pc
))) >> (2));
590 errmsg
= insert_normal (cd
, value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 25, 26, 32, total_length
, buffer
);
593 case OR1K_OPERAND_RA
:
594 errmsg
= insert_normal (cd
, fields
->f_r2
, 0, 0, 20, 5, 32, total_length
, buffer
);
596 case OR1K_OPERAND_RAD32F
:
599 FLD (f_r2
) = ((FLD (f_rad32
)) & (31));
600 FLD (f_raoff_9_1
) = ((((SI
) (FLD (f_rad32
)) >> (5))) & (1));
602 errmsg
= insert_normal (cd
, fields
->f_r2
, 0, 0, 20, 5, 32, total_length
, buffer
);
605 errmsg
= insert_normal (cd
, fields
->f_raoff_9_1
, 0, 0, 9, 1, 32, total_length
, buffer
);
610 case OR1K_OPERAND_RADI
:
613 FLD (f_r2
) = ((FLD (f_rad32
)) & (31));
614 FLD (f_raoff_9_1
) = ((((SI
) (FLD (f_rad32
)) >> (5))) & (1));
616 errmsg
= insert_normal (cd
, fields
->f_r2
, 0, 0, 20, 5, 32, total_length
, buffer
);
619 errmsg
= insert_normal (cd
, fields
->f_raoff_9_1
, 0, 0, 9, 1, 32, total_length
, buffer
);
624 case OR1K_OPERAND_RASF
:
625 errmsg
= insert_normal (cd
, fields
->f_r2
, 0, 0, 20, 5, 32, total_length
, buffer
);
627 case OR1K_OPERAND_RB
:
628 errmsg
= insert_normal (cd
, fields
->f_r3
, 0, 0, 15, 5, 32, total_length
, buffer
);
630 case OR1K_OPERAND_RBD32F
:
633 FLD (f_r3
) = ((FLD (f_rbd32
)) & (31));
634 FLD (f_rboff_8_1
) = ((((SI
) (FLD (f_rbd32
)) >> (5))) & (1));
636 errmsg
= insert_normal (cd
, fields
->f_r3
, 0, 0, 15, 5, 32, total_length
, buffer
);
639 errmsg
= insert_normal (cd
, fields
->f_rboff_8_1
, 0, 0, 8, 1, 32, total_length
, buffer
);
644 case OR1K_OPERAND_RBDI
:
647 FLD (f_r3
) = ((FLD (f_rbd32
)) & (31));
648 FLD (f_rboff_8_1
) = ((((SI
) (FLD (f_rbd32
)) >> (5))) & (1));
650 errmsg
= insert_normal (cd
, fields
->f_r3
, 0, 0, 15, 5, 32, total_length
, buffer
);
653 errmsg
= insert_normal (cd
, fields
->f_rboff_8_1
, 0, 0, 8, 1, 32, total_length
, buffer
);
658 case OR1K_OPERAND_RBSF
:
659 errmsg
= insert_normal (cd
, fields
->f_r3
, 0, 0, 15, 5, 32, total_length
, buffer
);
661 case OR1K_OPERAND_RD
:
662 errmsg
= insert_normal (cd
, fields
->f_r1
, 0, 0, 25, 5, 32, total_length
, buffer
);
664 case OR1K_OPERAND_RDD32F
:
667 FLD (f_r1
) = ((FLD (f_rdd32
)) & (31));
668 FLD (f_rdoff_10_1
) = ((((SI
) (FLD (f_rdd32
)) >> (5))) & (1));
670 errmsg
= insert_normal (cd
, fields
->f_r1
, 0, 0, 25, 5, 32, total_length
, buffer
);
673 errmsg
= insert_normal (cd
, fields
->f_rdoff_10_1
, 0, 0, 10, 1, 32, total_length
, buffer
);
678 case OR1K_OPERAND_RDDI
:
681 FLD (f_r1
) = ((FLD (f_rdd32
)) & (31));
682 FLD (f_rdoff_10_1
) = ((((SI
) (FLD (f_rdd32
)) >> (5))) & (1));
684 errmsg
= insert_normal (cd
, fields
->f_r1
, 0, 0, 25, 5, 32, total_length
, buffer
);
687 errmsg
= insert_normal (cd
, fields
->f_rdoff_10_1
, 0, 0, 10, 1, 32, total_length
, buffer
);
692 case OR1K_OPERAND_RDSF
:
693 errmsg
= insert_normal (cd
, fields
->f_r1
, 0, 0, 25, 5, 32, total_length
, buffer
);
695 case OR1K_OPERAND_SIMM16
:
696 errmsg
= insert_normal (cd
, fields
->f_simm16
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_SIGN_OPT
), 0, 15, 16, 32, total_length
, buffer
);
698 case OR1K_OPERAND_SIMM16_SPLIT
:
701 FLD (f_imm16_25_5
) = ((((INT
) (FLD (f_simm16_split
)) >> (11))) & (31));
702 FLD (f_imm16_10_11
) = ((FLD (f_simm16_split
)) & (2047));
704 errmsg
= insert_normal (cd
, fields
->f_imm16_25_5
, 0, 0, 25, 5, 32, total_length
, buffer
);
707 errmsg
= insert_normal (cd
, fields
->f_imm16_10_11
, 0, 0, 10, 11, 32, total_length
, buffer
);
712 case OR1K_OPERAND_UIMM16
:
713 errmsg
= insert_normal (cd
, fields
->f_uimm16
, 0, 0, 15, 16, 32, total_length
, buffer
);
715 case OR1K_OPERAND_UIMM16_SPLIT
:
718 FLD (f_imm16_25_5
) = ((((UINT
) (FLD (f_uimm16_split
)) >> (11))) & (31));
719 FLD (f_imm16_10_11
) = ((FLD (f_uimm16_split
)) & (2047));
721 errmsg
= insert_normal (cd
, fields
->f_imm16_25_5
, 0, 0, 25, 5, 32, total_length
, buffer
);
724 errmsg
= insert_normal (cd
, fields
->f_imm16_10_11
, 0, 0, 10, 11, 32, total_length
, buffer
);
729 case OR1K_OPERAND_UIMM6
:
730 errmsg
= insert_normal (cd
, fields
->f_uimm6
, 0, 0, 5, 6, 32, total_length
, buffer
);
734 /* xgettext:c-format */
735 opcodes_error_handler
736 (_("internal error: unrecognized field %d while building insn"),
744 int or1k_cgen_extract_operand
745 (CGEN_CPU_DESC
, int, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
);
747 /* Main entry point for operand extraction.
748 The result is <= 0 for error, >0 for success.
749 ??? Actual values aren't well defined right now.
751 This function is basically just a big switch statement. Earlier versions
752 used tables to look up the function to use, but
753 - if the table contains both assembler and disassembler functions then
754 the disassembler contains much of the assembler and vice-versa,
755 - there's a lot of inlining possibilities as things grow,
756 - using a switch statement avoids the function call overhead.
758 This function could be moved into `print_insn_normal', but keeping it
759 separate makes clear the interface between `print_insn_normal' and each of
763 or1k_cgen_extract_operand (CGEN_CPU_DESC cd
,
765 CGEN_EXTRACT_INFO
*ex_info
,
766 CGEN_INSN_INT insn_value
,
767 CGEN_FIELDS
* fields
,
770 /* Assume success (for those operands that are nops). */
772 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
776 case OR1K_OPERAND_DISP21
:
779 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_ABS_ADDR
), 0, 20, 21, 32, total_length
, pc
, & value
);
780 value
= ((((value
) + (((SI
) (pc
) >> (13))))) * (8192));
781 fields
->f_disp21
= value
;
784 case OR1K_OPERAND_DISP26
:
787 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 25, 26, 32, total_length
, pc
, & value
);
788 value
= ((((value
) * (4))) + (pc
));
789 fields
->f_disp26
= value
;
792 case OR1K_OPERAND_RA
:
793 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 20, 5, 32, total_length
, pc
, & fields
->f_r2
);
795 case OR1K_OPERAND_RAD32F
:
797 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 20, 5, 32, total_length
, pc
, & fields
->f_r2
);
798 if (length
<= 0) break;
799 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 1, 32, total_length
, pc
, & fields
->f_raoff_9_1
);
800 if (length
<= 0) break;
801 FLD (f_rad32
) = ((FLD (f_r2
)) | (((FLD (f_raoff_9_1
)) << (5))));
804 case OR1K_OPERAND_RADI
:
806 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 20, 5, 32, total_length
, pc
, & fields
->f_r2
);
807 if (length
<= 0) break;
808 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 1, 32, total_length
, pc
, & fields
->f_raoff_9_1
);
809 if (length
<= 0) break;
810 FLD (f_rad32
) = ((FLD (f_r2
)) | (((FLD (f_raoff_9_1
)) << (5))));
813 case OR1K_OPERAND_RASF
:
814 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 20, 5, 32, total_length
, pc
, & fields
->f_r2
);
816 case OR1K_OPERAND_RB
:
817 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 5, 32, total_length
, pc
, & fields
->f_r3
);
819 case OR1K_OPERAND_RBD32F
:
821 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 5, 32, total_length
, pc
, & fields
->f_r3
);
822 if (length
<= 0) break;
823 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 8, 1, 32, total_length
, pc
, & fields
->f_rboff_8_1
);
824 if (length
<= 0) break;
825 FLD (f_rbd32
) = ((FLD (f_r3
)) | (((FLD (f_rboff_8_1
)) << (5))));
828 case OR1K_OPERAND_RBDI
:
830 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 5, 32, total_length
, pc
, & fields
->f_r3
);
831 if (length
<= 0) break;
832 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 8, 1, 32, total_length
, pc
, & fields
->f_rboff_8_1
);
833 if (length
<= 0) break;
834 FLD (f_rbd32
) = ((FLD (f_r3
)) | (((FLD (f_rboff_8_1
)) << (5))));
837 case OR1K_OPERAND_RBSF
:
838 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 5, 32, total_length
, pc
, & fields
->f_r3
);
840 case OR1K_OPERAND_RD
:
841 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_r1
);
843 case OR1K_OPERAND_RDD32F
:
845 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_r1
);
846 if (length
<= 0) break;
847 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 10, 1, 32, total_length
, pc
, & fields
->f_rdoff_10_1
);
848 if (length
<= 0) break;
849 FLD (f_rdd32
) = ((FLD (f_r1
)) | (((FLD (f_rdoff_10_1
)) << (5))));
852 case OR1K_OPERAND_RDDI
:
854 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_r1
);
855 if (length
<= 0) break;
856 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 10, 1, 32, total_length
, pc
, & fields
->f_rdoff_10_1
);
857 if (length
<= 0) break;
858 FLD (f_rdd32
) = ((FLD (f_r1
)) | (((FLD (f_rdoff_10_1
)) << (5))));
861 case OR1K_OPERAND_RDSF
:
862 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_r1
);
864 case OR1K_OPERAND_SIMM16
:
865 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_SIGN_OPT
), 0, 15, 16, 32, total_length
, pc
, & fields
->f_simm16
);
867 case OR1K_OPERAND_SIMM16_SPLIT
:
869 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_imm16_25_5
);
870 if (length
<= 0) break;
871 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 10, 11, 32, total_length
, pc
, & fields
->f_imm16_10_11
);
872 if (length
<= 0) break;
873 FLD (f_simm16_split
) = ((HI
) (UINT
) (((((FLD (f_imm16_25_5
)) << (11))) | (FLD (f_imm16_10_11
)))));
876 case OR1K_OPERAND_UIMM16
:
877 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 16, 32, total_length
, pc
, & fields
->f_uimm16
);
879 case OR1K_OPERAND_UIMM16_SPLIT
:
881 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 5, 32, total_length
, pc
, & fields
->f_imm16_25_5
);
882 if (length
<= 0) break;
883 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 10, 11, 32, total_length
, pc
, & fields
->f_imm16_10_11
);
884 if (length
<= 0) break;
885 FLD (f_uimm16_split
) = ((UHI
) (UINT
) (((((FLD (f_imm16_25_5
)) << (11))) | (FLD (f_imm16_10_11
)))));
888 case OR1K_OPERAND_UIMM6
:
889 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 5, 6, 32, total_length
, pc
, & fields
->f_uimm6
);
893 /* xgettext:c-format */
894 opcodes_error_handler
895 (_("internal error: unrecognized field %d while decoding insn"),
903 cgen_insert_fn
* const or1k_cgen_insert_handlers
[] =
908 cgen_extract_fn
* const or1k_cgen_extract_handlers
[] =
913 int or1k_cgen_get_int_operand (CGEN_CPU_DESC
, int, const CGEN_FIELDS
*);
914 bfd_vma
or1k_cgen_get_vma_operand (CGEN_CPU_DESC
, int, const CGEN_FIELDS
*);
916 /* Getting values from cgen_fields is handled by a collection of functions.
917 They are distinguished by the type of the VALUE argument they return.
918 TODO: floating point, inlining support, remove cases where result type
922 or1k_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
924 const CGEN_FIELDS
* fields
)
930 case OR1K_OPERAND_DISP21
:
931 value
= fields
->f_disp21
;
933 case OR1K_OPERAND_DISP26
:
934 value
= fields
->f_disp26
;
936 case OR1K_OPERAND_RA
:
937 value
= fields
->f_r2
;
939 case OR1K_OPERAND_RAD32F
:
940 value
= fields
->f_rad32
;
942 case OR1K_OPERAND_RADI
:
943 value
= fields
->f_rad32
;
945 case OR1K_OPERAND_RASF
:
946 value
= fields
->f_r2
;
948 case OR1K_OPERAND_RB
:
949 value
= fields
->f_r3
;
951 case OR1K_OPERAND_RBD32F
:
952 value
= fields
->f_rbd32
;
954 case OR1K_OPERAND_RBDI
:
955 value
= fields
->f_rbd32
;
957 case OR1K_OPERAND_RBSF
:
958 value
= fields
->f_r3
;
960 case OR1K_OPERAND_RD
:
961 value
= fields
->f_r1
;
963 case OR1K_OPERAND_RDD32F
:
964 value
= fields
->f_rdd32
;
966 case OR1K_OPERAND_RDDI
:
967 value
= fields
->f_rdd32
;
969 case OR1K_OPERAND_RDSF
:
970 value
= fields
->f_r1
;
972 case OR1K_OPERAND_SIMM16
:
973 value
= fields
->f_simm16
;
975 case OR1K_OPERAND_SIMM16_SPLIT
:
976 value
= fields
->f_simm16_split
;
978 case OR1K_OPERAND_UIMM16
:
979 value
= fields
->f_uimm16
;
981 case OR1K_OPERAND_UIMM16_SPLIT
:
982 value
= fields
->f_uimm16_split
;
984 case OR1K_OPERAND_UIMM6
:
985 value
= fields
->f_uimm6
;
989 /* xgettext:c-format */
990 opcodes_error_handler
991 (_("internal error: unrecognized field %d while getting int operand"),
1000 or1k_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1002 const CGEN_FIELDS
* fields
)
1008 case OR1K_OPERAND_DISP21
:
1009 value
= fields
->f_disp21
;
1011 case OR1K_OPERAND_DISP26
:
1012 value
= fields
->f_disp26
;
1014 case OR1K_OPERAND_RA
:
1015 value
= fields
->f_r2
;
1017 case OR1K_OPERAND_RAD32F
:
1018 value
= fields
->f_rad32
;
1020 case OR1K_OPERAND_RADI
:
1021 value
= fields
->f_rad32
;
1023 case OR1K_OPERAND_RASF
:
1024 value
= fields
->f_r2
;
1026 case OR1K_OPERAND_RB
:
1027 value
= fields
->f_r3
;
1029 case OR1K_OPERAND_RBD32F
:
1030 value
= fields
->f_rbd32
;
1032 case OR1K_OPERAND_RBDI
:
1033 value
= fields
->f_rbd32
;
1035 case OR1K_OPERAND_RBSF
:
1036 value
= fields
->f_r3
;
1038 case OR1K_OPERAND_RD
:
1039 value
= fields
->f_r1
;
1041 case OR1K_OPERAND_RDD32F
:
1042 value
= fields
->f_rdd32
;
1044 case OR1K_OPERAND_RDDI
:
1045 value
= fields
->f_rdd32
;
1047 case OR1K_OPERAND_RDSF
:
1048 value
= fields
->f_r1
;
1050 case OR1K_OPERAND_SIMM16
:
1051 value
= fields
->f_simm16
;
1053 case OR1K_OPERAND_SIMM16_SPLIT
:
1054 value
= fields
->f_simm16_split
;
1056 case OR1K_OPERAND_UIMM16
:
1057 value
= fields
->f_uimm16
;
1059 case OR1K_OPERAND_UIMM16_SPLIT
:
1060 value
= fields
->f_uimm16_split
;
1062 case OR1K_OPERAND_UIMM6
:
1063 value
= fields
->f_uimm6
;
1067 /* xgettext:c-format */
1068 opcodes_error_handler
1069 (_("internal error: unrecognized field %d while getting vma operand"),
1077 void or1k_cgen_set_int_operand (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, int);
1078 void or1k_cgen_set_vma_operand (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, bfd_vma
);
1080 /* Stuffing values in cgen_fields is handled by a collection of functions.
1081 They are distinguished by the type of the VALUE argument they accept.
1082 TODO: floating point, inlining support, remove cases where argument type
1086 or1k_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1088 CGEN_FIELDS
* fields
,
1093 case OR1K_OPERAND_DISP21
:
1094 fields
->f_disp21
= value
;
1096 case OR1K_OPERAND_DISP26
:
1097 fields
->f_disp26
= value
;
1099 case OR1K_OPERAND_RA
:
1100 fields
->f_r2
= value
;
1102 case OR1K_OPERAND_RAD32F
:
1103 fields
->f_rad32
= value
;
1105 case OR1K_OPERAND_RADI
:
1106 fields
->f_rad32
= value
;
1108 case OR1K_OPERAND_RASF
:
1109 fields
->f_r2
= value
;
1111 case OR1K_OPERAND_RB
:
1112 fields
->f_r3
= value
;
1114 case OR1K_OPERAND_RBD32F
:
1115 fields
->f_rbd32
= value
;
1117 case OR1K_OPERAND_RBDI
:
1118 fields
->f_rbd32
= value
;
1120 case OR1K_OPERAND_RBSF
:
1121 fields
->f_r3
= value
;
1123 case OR1K_OPERAND_RD
:
1124 fields
->f_r1
= value
;
1126 case OR1K_OPERAND_RDD32F
:
1127 fields
->f_rdd32
= value
;
1129 case OR1K_OPERAND_RDDI
:
1130 fields
->f_rdd32
= value
;
1132 case OR1K_OPERAND_RDSF
:
1133 fields
->f_r1
= value
;
1135 case OR1K_OPERAND_SIMM16
:
1136 fields
->f_simm16
= value
;
1138 case OR1K_OPERAND_SIMM16_SPLIT
:
1139 fields
->f_simm16_split
= value
;
1141 case OR1K_OPERAND_UIMM16
:
1142 fields
->f_uimm16
= value
;
1144 case OR1K_OPERAND_UIMM16_SPLIT
:
1145 fields
->f_uimm16_split
= value
;
1147 case OR1K_OPERAND_UIMM6
:
1148 fields
->f_uimm6
= value
;
1152 /* xgettext:c-format */
1153 opcodes_error_handler
1154 (_("internal error: unrecognized field %d while setting int operand"),
1161 or1k_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1163 CGEN_FIELDS
* fields
,
1168 case OR1K_OPERAND_DISP21
:
1169 fields
->f_disp21
= value
;
1171 case OR1K_OPERAND_DISP26
:
1172 fields
->f_disp26
= value
;
1174 case OR1K_OPERAND_RA
:
1175 fields
->f_r2
= value
;
1177 case OR1K_OPERAND_RAD32F
:
1178 fields
->f_rad32
= value
;
1180 case OR1K_OPERAND_RADI
:
1181 fields
->f_rad32
= value
;
1183 case OR1K_OPERAND_RASF
:
1184 fields
->f_r2
= value
;
1186 case OR1K_OPERAND_RB
:
1187 fields
->f_r3
= value
;
1189 case OR1K_OPERAND_RBD32F
:
1190 fields
->f_rbd32
= value
;
1192 case OR1K_OPERAND_RBDI
:
1193 fields
->f_rbd32
= value
;
1195 case OR1K_OPERAND_RBSF
:
1196 fields
->f_r3
= value
;
1198 case OR1K_OPERAND_RD
:
1199 fields
->f_r1
= value
;
1201 case OR1K_OPERAND_RDD32F
:
1202 fields
->f_rdd32
= value
;
1204 case OR1K_OPERAND_RDDI
:
1205 fields
->f_rdd32
= value
;
1207 case OR1K_OPERAND_RDSF
:
1208 fields
->f_r1
= value
;
1210 case OR1K_OPERAND_SIMM16
:
1211 fields
->f_simm16
= value
;
1213 case OR1K_OPERAND_SIMM16_SPLIT
:
1214 fields
->f_simm16_split
= value
;
1216 case OR1K_OPERAND_UIMM16
:
1217 fields
->f_uimm16
= value
;
1219 case OR1K_OPERAND_UIMM16_SPLIT
:
1220 fields
->f_uimm16_split
= value
;
1222 case OR1K_OPERAND_UIMM6
:
1223 fields
->f_uimm6
= value
;
1227 /* xgettext:c-format */
1228 opcodes_error_handler
1229 (_("internal error: unrecognized field %d while setting vma operand"),
1235 /* Function to call before using the instruction builder tables. */
1238 or1k_cgen_init_ibld_table (CGEN_CPU_DESC cd
)
1240 cd
->insert_handlers
= & or1k_cgen_insert_handlers
[0];
1241 cd
->extract_handlers
= & or1k_cgen_extract_handlers
[0];
1243 cd
->insert_operand
= or1k_cgen_insert_operand
;
1244 cd
->extract_operand
= or1k_cgen_extract_operand
;
1246 cd
->get_int_operand
= or1k_cgen_get_int_operand
;
1247 cd
->set_int_operand
= or1k_cgen_set_int_operand
;
1248 cd
->get_vma_operand
= or1k_cgen_get_vma_operand
;
1249 cd
->set_vma_operand
= or1k_cgen_set_vma_operand
;