1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode table for or1k.
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 Copyright (C) 1996-2019 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
30 #include "or1k-desc.h"
32 #include "libiberty.h"
36 /* Special check to ensure that instruction exists for given machine. */
39 or1k_cgen_insn_supported (CGEN_CPU_DESC cd
, const CGEN_INSN
*insn
)
41 int machs
= CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_MACH
);
43 /* No mach attribute? Assume it's supported for all machs. */
47 return ((machs
& cd
->machs
) != 0);
51 /* The hash functions are recorded here to help keep assembler code out of
52 the disassembler and vice versa. */
54 static int asm_hash_insn_p (const CGEN_INSN
*);
55 static unsigned int asm_hash_insn (const char *);
56 static int dis_hash_insn_p (const CGEN_INSN
*);
57 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
59 /* Instruction formats. */
61 #define F(f) & or1k_cgen_ifld_table[OR1K_##f]
62 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
66 static const CGEN_IFMT ifmt_l_j ATTRIBUTE_UNUSED
= {
67 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_DISP26
) }, { 0 } }
70 static const CGEN_IFMT ifmt_l_adrp ATTRIBUTE_UNUSED
= {
71 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_DISP21
) }, { 0 } }
74 static const CGEN_IFMT ifmt_l_jr ATTRIBUTE_UNUSED
= {
75 32, 32, 0xffff07ff, { { F (F_OPCODE
) }, { F (F_RESV_25_10
) }, { F (F_R3
) }, { F (F_RESV_10_11
) }, { 0 } }
78 static const CGEN_IFMT ifmt_l_trap ATTRIBUTE_UNUSED
= {
79 32, 32, 0xffff0000, { { F (F_OPCODE
) }, { F (F_OP_25_5
) }, { F (F_RESV_20_5
) }, { F (F_UIMM16
) }, { 0 } }
82 static const CGEN_IFMT ifmt_l_msync ATTRIBUTE_UNUSED
= {
83 32, 32, 0xffffffff, { { F (F_OPCODE
) }, { F (F_OP_25_5
) }, { F (F_RESV_20_21
) }, { 0 } }
86 static const CGEN_IFMT ifmt_l_rfe ATTRIBUTE_UNUSED
= {
87 32, 32, 0xffffffff, { { F (F_OPCODE
) }, { F (F_RESV_25_26
) }, { 0 } }
90 static const CGEN_IFMT ifmt_l_nop_imm ATTRIBUTE_UNUSED
= {
91 32, 32, 0xffff0000, { { F (F_OPCODE
) }, { F (F_OP_25_2
) }, { F (F_RESV_23_8
) }, { F (F_UIMM16
) }, { 0 } }
94 static const CGEN_IFMT ifmt_l_movhi ATTRIBUTE_UNUSED
= {
95 32, 32, 0xfc1f0000, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_RESV_20_4
) }, { F (F_OP_16_1
) }, { F (F_UIMM16
) }, { 0 } }
98 static const CGEN_IFMT ifmt_l_macrc ATTRIBUTE_UNUSED
= {
99 32, 32, 0xfc1fffff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_RESV_20_4
) }, { F (F_OP_16_1
) }, { F (F_UIMM16
) }, { 0 } }
102 static const CGEN_IFMT ifmt_l_mfspr ATTRIBUTE_UNUSED
= {
103 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_UIMM16
) }, { 0 } }
106 static const CGEN_IFMT ifmt_l_mtspr ATTRIBUTE_UNUSED
= {
107 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_UIMM16_SPLIT
) }, { 0 } }
110 static const CGEN_IFMT ifmt_l_lwz ATTRIBUTE_UNUSED
= {
111 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_SIMM16
) }, { 0 } }
114 static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED
= {
115 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_SIMM16_SPLIT
) }, { 0 } }
118 static const CGEN_IFMT ifmt_l_swa ATTRIBUTE_UNUSED
= {
119 32, 32, 0xfc000000, { { F (F_OPCODE
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_SIMM16
) }, { 0 } }
122 static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED
= {
123 32, 32, 0xfc0007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_2
) }, { F (F_RESV_5_2
) }, { F (F_OP_3_4
) }, { 0 } }
126 static const CGEN_IFMT ifmt_l_slli ATTRIBUTE_UNUSED
= {
127 32, 32, 0xfc00ffc0, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_RESV_15_8
) }, { F (F_OP_7_2
) }, { F (F_UIMM6
) }, { 0 } }
130 static const CGEN_IFMT ifmt_l_and ATTRIBUTE_UNUSED
= {
131 32, 32, 0xfc0007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_7
) }, { F (F_OP_3_4
) }, { 0 } }
134 static const CGEN_IFMT ifmt_l_muld ATTRIBUTE_UNUSED
= {
135 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_RESV_25_5
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_7
) }, { F (F_OP_3_4
) }, { 0 } }
138 static const CGEN_IFMT ifmt_l_exths ATTRIBUTE_UNUSED
= {
139 32, 32, 0xfc00ffff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_RESV_15_6
) }, { F (F_OP_9_4
) }, { F (F_RESV_5_2
) }, { F (F_OP_3_4
) }, { 0 } }
142 static const CGEN_IFMT ifmt_l_cmov ATTRIBUTE_UNUSED
= {
143 32, 32, 0xfc0007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_1
) }, { F (F_OP_9_2
) }, { F (F_RESV_7_4
) }, { F (F_OP_3_4
) }, { 0 } }
146 static const CGEN_IFMT ifmt_l_sfgts ATTRIBUTE_UNUSED
= {
147 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_OP_25_5
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_11
) }, { 0 } }
150 static const CGEN_IFMT ifmt_l_sfgtsi ATTRIBUTE_UNUSED
= {
151 32, 32, 0xffe00000, { { F (F_OPCODE
) }, { F (F_OP_25_5
) }, { F (F_R2
) }, { F (F_SIMM16
) }, { 0 } }
154 static const CGEN_IFMT ifmt_l_mac ATTRIBUTE_UNUSED
= {
155 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_OP_25_5
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_7
) }, { F (F_OP_3_4
) }, { 0 } }
158 static const CGEN_IFMT ifmt_l_maci ATTRIBUTE_UNUSED
= {
159 32, 32, 0xffe00000, { { F (F_OPCODE
) }, { F (F_RESV_25_5
) }, { F (F_R2
) }, { F (F_SIMM16
) }, { 0 } }
162 static const CGEN_IFMT ifmt_lf_add_s ATTRIBUTE_UNUSED
= {
163 32, 32, 0xfc0007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
166 static const CGEN_IFMT ifmt_lf_add_d ATTRIBUTE_UNUSED
= {
167 32, 32, 0xfc0007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
170 static const CGEN_IFMT ifmt_lf_add_d32 ATTRIBUTE_UNUSED
= {
171 32, 32, 0xfc0000ff, { { F (F_OPCODE
) }, { F (F_RDD32
) }, { F (F_RAD32
) }, { F (F_RBD32
) }, { F (F_OP_7_8
) }, { 0 } }
174 static const CGEN_IFMT ifmt_lf_itof_s ATTRIBUTE_UNUSED
= {
175 32, 32, 0xfc00ffff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
178 static const CGEN_IFMT ifmt_lf_itof_d ATTRIBUTE_UNUSED
= {
179 32, 32, 0xfc00ffff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
182 static const CGEN_IFMT ifmt_lf_itof_d32 ATTRIBUTE_UNUSED
= {
183 32, 32, 0xfc00f9ff, { { F (F_OPCODE
) }, { F (F_R3
) }, { F (F_RDD32
) }, { F (F_RAD32
) }, { F (F_RESV_8_1
) }, { F (F_OP_7_8
) }, { 0 } }
186 static const CGEN_IFMT ifmt_lf_ftoi_s ATTRIBUTE_UNUSED
= {
187 32, 32, 0xfc00ffff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
190 static const CGEN_IFMT ifmt_lf_ftoi_d ATTRIBUTE_UNUSED
= {
191 32, 32, 0xfc00ffff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
194 static const CGEN_IFMT ifmt_lf_ftoi_d32 ATTRIBUTE_UNUSED
= {
195 32, 32, 0xfc00f9ff, { { F (F_OPCODE
) }, { F (F_R3
) }, { F (F_RDD32
) }, { F (F_RAD32
) }, { F (F_RESV_8_1
) }, { F (F_OP_7_8
) }, { 0 } }
198 static const CGEN_IFMT ifmt_lf_sfeq_s ATTRIBUTE_UNUSED
= {
199 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
202 static const CGEN_IFMT ifmt_lf_sfeq_d ATTRIBUTE_UNUSED
= {
203 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
206 static const CGEN_IFMT ifmt_lf_sfeq_d32 ATTRIBUTE_UNUSED
= {
207 32, 32, 0xffe004ff, { { F (F_OPCODE
) }, { F (F_R1
) }, { F (F_RESV_10_1
) }, { F (F_RAD32
) }, { F (F_RBD32
) }, { F (F_OP_7_8
) }, { 0 } }
210 static const CGEN_IFMT ifmt_lf_cust1_s ATTRIBUTE_UNUSED
= {
211 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_RESV_25_5
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
214 static const CGEN_IFMT ifmt_lf_cust1_d ATTRIBUTE_UNUSED
= {
215 32, 32, 0xffe007ff, { { F (F_OPCODE
) }, { F (F_RESV_25_5
) }, { F (F_R2
) }, { F (F_R3
) }, { F (F_RESV_10_3
) }, { F (F_OP_7_8
) }, { 0 } }
218 static const CGEN_IFMT ifmt_lf_cust1_d32 ATTRIBUTE_UNUSED
= {
219 32, 32, 0xffe004ff, { { F (F_OPCODE
) }, { F (F_RESV_25_5
) }, { F (F_RESV_10_1
) }, { F (F_RAD32
) }, { F (F_RBD32
) }, { F (F_OP_7_8
) }, { 0 } }
224 #define A(a) (1 << CGEN_INSN_##a)
225 #define OPERAND(op) OR1K_OPERAND_##op
226 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
227 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
229 /* The instruction table. */
231 static const CGEN_OPCODE or1k_cgen_insn_opcode_table
[MAX_INSNS
] =
233 /* Special null first entry.
234 A `num' value of zero is thus invalid.
235 Also, the special `invalid' insn resides here. */
236 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
240 { { MNEM
, ' ', OP (DISP26
), 0 } },
243 /* l.adrp $rD,${disp21} */
246 { { MNEM
, ' ', OP (RD
), ',', OP (DISP21
), 0 } },
247 & ifmt_l_adrp
, { 0x8000000 }
249 /* l.jal ${disp26} */
252 { { MNEM
, ' ', OP (DISP26
), 0 } },
253 & ifmt_l_j
, { 0x4000000 }
258 { { MNEM
, ' ', OP (RB
), 0 } },
259 & ifmt_l_jr
, { 0x44000000 }
264 { { MNEM
, ' ', OP (RB
), 0 } },
265 & ifmt_l_jr
, { 0x48000000 }
267 /* l.bnf ${disp26} */
270 { { MNEM
, ' ', OP (DISP26
), 0 } },
271 & ifmt_l_j
, { 0xc000000 }
276 { { MNEM
, ' ', OP (DISP26
), 0 } },
277 & ifmt_l_j
, { 0x10000000 }
279 /* l.trap ${uimm16} */
282 { { MNEM
, ' ', OP (UIMM16
), 0 } },
283 & ifmt_l_trap
, { 0x21000000 }
285 /* l.sys ${uimm16} */
288 { { MNEM
, ' ', OP (UIMM16
), 0 } },
289 & ifmt_l_trap
, { 0x20000000 }
295 & ifmt_l_msync
, { 0x22000000 }
301 & ifmt_l_msync
, { 0x22800000 }
307 & ifmt_l_msync
, { 0x23000000 }
313 & ifmt_l_rfe
, { 0x24000000 }
315 /* l.nop ${uimm16} */
318 { { MNEM
, ' ', OP (UIMM16
), 0 } },
319 & ifmt_l_nop_imm
, { 0x15000000 }
325 & ifmt_l_nop_imm
, { 0x15000000 }
327 /* l.movhi $rD,$uimm16 */
330 { { MNEM
, ' ', OP (RD
), ',', OP (UIMM16
), 0 } },
331 & ifmt_l_movhi
, { 0x18000000 }
336 { { MNEM
, ' ', OP (RD
), 0 } },
337 & ifmt_l_macrc
, { 0x18010000 }
339 /* l.mfspr $rD,$rA,${uimm16} */
342 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM16
), 0 } },
343 & ifmt_l_mfspr
, { 0xb4000000 }
345 /* l.mtspr $rA,$rB,${uimm16-split} */
348 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), ',', OP (UIMM16_SPLIT
), 0 } },
349 & ifmt_l_mtspr
, { 0xc0000000 }
351 /* l.lwz $rD,${simm16}($rA) */
354 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
355 & ifmt_l_lwz
, { 0x84000000 }
357 /* l.lws $rD,${simm16}($rA) */
360 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
361 & ifmt_l_lwz
, { 0x88000000 }
363 /* l.lwa $rD,${simm16}($rA) */
366 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
367 & ifmt_l_lwz
, { 0x6c000000 }
369 /* l.lbz $rD,${simm16}($rA) */
372 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
373 & ifmt_l_lwz
, { 0x8c000000 }
375 /* l.lbs $rD,${simm16}($rA) */
378 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
379 & ifmt_l_lwz
, { 0x90000000 }
381 /* l.lhz $rD,${simm16}($rA) */
384 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
385 & ifmt_l_lwz
, { 0x94000000 }
387 /* l.lhs $rD,${simm16}($rA) */
390 { { MNEM
, ' ', OP (RD
), ',', OP (SIMM16
), '(', OP (RA
), ')', 0 } },
391 & ifmt_l_lwz
, { 0x98000000 }
393 /* l.sw ${simm16-split}($rA),$rB */
396 { { MNEM
, ' ', OP (SIMM16_SPLIT
), '(', OP (RA
), ')', ',', OP (RB
), 0 } },
397 & ifmt_l_sw
, { 0xd4000000 }
399 /* l.sb ${simm16-split}($rA),$rB */
402 { { MNEM
, ' ', OP (SIMM16_SPLIT
), '(', OP (RA
), ')', ',', OP (RB
), 0 } },
403 & ifmt_l_sw
, { 0xd8000000 }
405 /* l.sh ${simm16-split}($rA),$rB */
408 { { MNEM
, ' ', OP (SIMM16_SPLIT
), '(', OP (RA
), ')', ',', OP (RB
), 0 } },
409 & ifmt_l_sw
, { 0xdc000000 }
411 /* l.swa ${simm16-split}($rA),$rB */
414 { { MNEM
, ' ', OP (SIMM16_SPLIT
), '(', OP (RA
), ')', ',', OP (RB
), 0 } },
415 & ifmt_l_swa
, { 0xcc000000 }
417 /* l.sll $rD,$rA,$rB */
420 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
421 & ifmt_l_sll
, { 0xe0000008 }
423 /* l.slli $rD,$rA,${uimm6} */
426 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM6
), 0 } },
427 & ifmt_l_slli
, { 0xb8000000 }
429 /* l.srl $rD,$rA,$rB */
432 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
433 & ifmt_l_sll
, { 0xe0000048 }
435 /* l.srli $rD,$rA,${uimm6} */
438 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM6
), 0 } },
439 & ifmt_l_slli
, { 0xb8000040 }
441 /* l.sra $rD,$rA,$rB */
444 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
445 & ifmt_l_sll
, { 0xe0000088 }
447 /* l.srai $rD,$rA,${uimm6} */
450 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM6
), 0 } },
451 & ifmt_l_slli
, { 0xb8000080 }
453 /* l.ror $rD,$rA,$rB */
456 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
457 & ifmt_l_sll
, { 0xe00000c8 }
459 /* l.rori $rD,$rA,${uimm6} */
462 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM6
), 0 } },
463 & ifmt_l_slli
, { 0xb80000c0 }
465 /* l.and $rD,$rA,$rB */
468 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
469 & ifmt_l_and
, { 0xe0000003 }
471 /* l.or $rD,$rA,$rB */
474 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
475 & ifmt_l_and
, { 0xe0000004 }
477 /* l.xor $rD,$rA,$rB */
480 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
481 & ifmt_l_and
, { 0xe0000005 }
483 /* l.add $rD,$rA,$rB */
486 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
487 & ifmt_l_and
, { 0xe0000000 }
489 /* l.sub $rD,$rA,$rB */
492 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
493 & ifmt_l_and
, { 0xe0000002 }
495 /* l.addc $rD,$rA,$rB */
498 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
499 & ifmt_l_and
, { 0xe0000001 }
501 /* l.mul $rD,$rA,$rB */
504 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
505 & ifmt_l_and
, { 0xe0000306 }
510 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
511 & ifmt_l_muld
, { 0xe0000307 }
513 /* l.mulu $rD,$rA,$rB */
516 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
517 & ifmt_l_and
, { 0xe000030b }
519 /* l.muldu $rA,$rB */
522 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
523 & ifmt_l_muld
, { 0xe000030d }
525 /* l.div $rD,$rA,$rB */
528 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
529 & ifmt_l_and
, { 0xe0000309 }
531 /* l.divu $rD,$rA,$rB */
534 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
535 & ifmt_l_and
, { 0xe000030a }
540 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
541 & ifmt_l_and
, { 0xe000000f }
546 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
547 & ifmt_l_and
, { 0xe000010f }
549 /* l.andi $rD,$rA,$uimm16 */
552 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM16
), 0 } },
553 & ifmt_l_mfspr
, { 0xa4000000 }
555 /* l.ori $rD,$rA,$uimm16 */
558 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (UIMM16
), 0 } },
559 & ifmt_l_mfspr
, { 0xa8000000 }
561 /* l.xori $rD,$rA,$simm16 */
564 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (SIMM16
), 0 } },
565 & ifmt_l_lwz
, { 0xac000000 }
567 /* l.addi $rD,$rA,$simm16 */
570 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (SIMM16
), 0 } },
571 & ifmt_l_lwz
, { 0x9c000000 }
573 /* l.addic $rD,$rA,$simm16 */
576 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (SIMM16
), 0 } },
577 & ifmt_l_lwz
, { 0xa0000000 }
579 /* l.muli $rD,$rA,$simm16 */
582 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (SIMM16
), 0 } },
583 & ifmt_l_lwz
, { 0xb0000000 }
585 /* l.exths $rD,$rA */
588 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
589 & ifmt_l_exths
, { 0xe000000c }
591 /* l.extbs $rD,$rA */
594 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
595 & ifmt_l_exths
, { 0xe000004c }
597 /* l.exthz $rD,$rA */
600 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
601 & ifmt_l_exths
, { 0xe000008c }
603 /* l.extbz $rD,$rA */
606 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
607 & ifmt_l_exths
, { 0xe00000cc }
609 /* l.extws $rD,$rA */
612 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
613 & ifmt_l_exths
, { 0xe000000d }
615 /* l.extwz $rD,$rA */
618 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), 0 } },
619 & ifmt_l_exths
, { 0xe000004d }
621 /* l.cmov $rD,$rA,$rB */
624 { { MNEM
, ' ', OP (RD
), ',', OP (RA
), ',', OP (RB
), 0 } },
625 & ifmt_l_cmov
, { 0xe000000e }
627 /* l.sfgts $rA,$rB */
630 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
631 & ifmt_l_sfgts
, { 0xe5400000 }
633 /* l.sfgtsi $rA,$simm16 */
636 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
637 & ifmt_l_sfgtsi
, { 0xbd400000 }
639 /* l.sfgtu $rA,$rB */
642 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
643 & ifmt_l_sfgts
, { 0xe4400000 }
645 /* l.sfgtui $rA,$simm16 */
648 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
649 & ifmt_l_sfgtsi
, { 0xbc400000 }
651 /* l.sfges $rA,$rB */
654 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
655 & ifmt_l_sfgts
, { 0xe5600000 }
657 /* l.sfgesi $rA,$simm16 */
660 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
661 & ifmt_l_sfgtsi
, { 0xbd600000 }
663 /* l.sfgeu $rA,$rB */
666 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
667 & ifmt_l_sfgts
, { 0xe4600000 }
669 /* l.sfgeui $rA,$simm16 */
672 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
673 & ifmt_l_sfgtsi
, { 0xbc600000 }
675 /* l.sflts $rA,$rB */
678 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
679 & ifmt_l_sfgts
, { 0xe5800000 }
681 /* l.sfltsi $rA,$simm16 */
684 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
685 & ifmt_l_sfgtsi
, { 0xbd800000 }
687 /* l.sfltu $rA,$rB */
690 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
691 & ifmt_l_sfgts
, { 0xe4800000 }
693 /* l.sfltui $rA,$simm16 */
696 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
697 & ifmt_l_sfgtsi
, { 0xbc800000 }
699 /* l.sfles $rA,$rB */
702 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
703 & ifmt_l_sfgts
, { 0xe5a00000 }
705 /* l.sflesi $rA,$simm16 */
708 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
709 & ifmt_l_sfgtsi
, { 0xbda00000 }
711 /* l.sfleu $rA,$rB */
714 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
715 & ifmt_l_sfgts
, { 0xe4a00000 }
717 /* l.sfleui $rA,$simm16 */
720 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
721 & ifmt_l_sfgtsi
, { 0xbca00000 }
726 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
727 & ifmt_l_sfgts
, { 0xe4000000 }
729 /* l.sfeqi $rA,$simm16 */
732 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
733 & ifmt_l_sfgtsi
, { 0xbc000000 }
738 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
739 & ifmt_l_sfgts
, { 0xe4200000 }
741 /* l.sfnei $rA,$simm16 */
744 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
745 & ifmt_l_sfgtsi
, { 0xbc200000 }
750 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
751 & ifmt_l_mac
, { 0xc4000001 }
753 /* l.maci $rA,${simm16} */
756 { { MNEM
, ' ', OP (RA
), ',', OP (SIMM16
), 0 } },
757 & ifmt_l_maci
, { 0x4c000000 }
762 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
763 & ifmt_l_mac
, { 0xc4000003 }
768 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
769 & ifmt_l_mac
, { 0xc4000002 }
774 { { MNEM
, ' ', OP (RA
), ',', OP (RB
), 0 } },
775 & ifmt_l_mac
, { 0xc4000004 }
781 & ifmt_l_rfe
, { 0x70000000 }
787 & ifmt_l_rfe
, { 0x74000000 }
793 & ifmt_l_rfe
, { 0x78000000 }
799 & ifmt_l_rfe
, { 0x7c000000 }
805 & ifmt_l_rfe
, { 0xf0000000 }
811 & ifmt_l_rfe
, { 0xf4000000 }
817 & ifmt_l_rfe
, { 0xf8000000 }
823 & ifmt_l_rfe
, { 0xfc000000 }
825 /* lf.add.s $rDSF,$rASF,$rBSF */
828 { { MNEM
, ' ', OP (RDSF
), ',', OP (RASF
), ',', OP (RBSF
), 0 } },
829 & ifmt_lf_add_s
, { 0xc8000000 }
831 /* lf.add.d $rDDF,$rADF,$rBDF */
834 { { MNEM
, ' ', OP (RDDF
), ',', OP (RADF
), ',', OP (RBDF
), 0 } },
835 & ifmt_lf_add_d
, { 0xc8000010 }
837 /* lf.add.d $rDD32F,$rAD32F,$rBD32F */
840 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
841 & ifmt_lf_add_d32
, { 0xc8000010 }
843 /* lf.sub.s $rDSF,$rASF,$rBSF */
846 { { MNEM
, ' ', OP (RDSF
), ',', OP (RASF
), ',', OP (RBSF
), 0 } },
847 & ifmt_lf_add_s
, { 0xc8000001 }
849 /* lf.sub.d $rDDF,$rADF,$rBDF */
852 { { MNEM
, ' ', OP (RDDF
), ',', OP (RADF
), ',', OP (RBDF
), 0 } },
853 & ifmt_lf_add_d
, { 0xc8000011 }
855 /* lf.sub.d $rDD32F,$rAD32F,$rBD32F */
858 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
859 & ifmt_lf_add_d32
, { 0xc8000011 }
861 /* lf.mul.s $rDSF,$rASF,$rBSF */
864 { { MNEM
, ' ', OP (RDSF
), ',', OP (RASF
), ',', OP (RBSF
), 0 } },
865 & ifmt_lf_add_s
, { 0xc8000002 }
867 /* lf.mul.d $rDDF,$rADF,$rBDF */
870 { { MNEM
, ' ', OP (RDDF
), ',', OP (RADF
), ',', OP (RBDF
), 0 } },
871 & ifmt_lf_add_d
, { 0xc8000012 }
873 /* lf.mul.d $rDD32F,$rAD32F,$rBD32F */
876 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
877 & ifmt_lf_add_d32
, { 0xc8000012 }
879 /* lf.div.s $rDSF,$rASF,$rBSF */
882 { { MNEM
, ' ', OP (RDSF
), ',', OP (RASF
), ',', OP (RBSF
), 0 } },
883 & ifmt_lf_add_s
, { 0xc8000003 }
885 /* lf.div.d $rDDF,$rADF,$rBDF */
888 { { MNEM
, ' ', OP (RDDF
), ',', OP (RADF
), ',', OP (RBDF
), 0 } },
889 & ifmt_lf_add_d
, { 0xc8000013 }
891 /* lf.div.d $rDD32F,$rAD32F,$rBD32F */
894 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
895 & ifmt_lf_add_d32
, { 0xc8000013 }
897 /* lf.rem.s $rDSF,$rASF,$rBSF */
900 { { MNEM
, ' ', OP (RDSF
), ',', OP (RASF
), ',', OP (RBSF
), 0 } },
901 & ifmt_lf_add_s
, { 0xc8000006 }
903 /* lf.rem.d $rDDF,$rADF,$rBDF */
906 { { MNEM
, ' ', OP (RDDF
), ',', OP (RADF
), ',', OP (RBDF
), 0 } },
907 & ifmt_lf_add_d
, { 0xc8000016 }
909 /* lf.rem.d $rDD32F,$rAD32F,$rBD32F */
912 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
913 & ifmt_lf_add_d32
, { 0xc8000016 }
915 /* lf.itof.s $rDSF,$rA */
918 { { MNEM
, ' ', OP (RDSF
), ',', OP (RA
), 0 } },
919 & ifmt_lf_itof_s
, { 0xc8000004 }
921 /* lf.itof.d $rDDF,$rA */
924 { { MNEM
, ' ', OP (RDDF
), ',', OP (RA
), 0 } },
925 & ifmt_lf_itof_d
, { 0xc8000014 }
927 /* lf.itof.d $rDD32F,$rADI */
930 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RADI
), 0 } },
931 & ifmt_lf_itof_d32
, { 0xc8000014 }
933 /* lf.ftoi.s $rD,$rASF */
936 { { MNEM
, ' ', OP (RD
), ',', OP (RASF
), 0 } },
937 & ifmt_lf_ftoi_s
, { 0xc8000005 }
939 /* lf.ftoi.d $rD,$rADF */
942 { { MNEM
, ' ', OP (RD
), ',', OP (RADF
), 0 } },
943 & ifmt_lf_ftoi_d
, { 0xc8000015 }
945 /* lf.ftoi.d $rDDI,$rAD32F */
948 { { MNEM
, ' ', OP (RDDI
), ',', OP (RAD32F
), 0 } },
949 & ifmt_lf_ftoi_d32
, { 0xc8000015 }
951 /* lf.sfeq.s $rASF,$rBSF */
954 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
955 & ifmt_lf_sfeq_s
, { 0xc8000008 }
957 /* lf.sfeq.d $rADF,$rBDF */
960 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
961 & ifmt_lf_sfeq_d
, { 0xc8000018 }
963 /* lf.sfeq.d $rAD32F,$rBD32F */
966 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
967 & ifmt_lf_sfeq_d32
, { 0xc8000018 }
969 /* lf.sfne.s $rASF,$rBSF */
972 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
973 & ifmt_lf_sfeq_s
, { 0xc8000009 }
975 /* lf.sfne.d $rADF,$rBDF */
978 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
979 & ifmt_lf_sfeq_d
, { 0xc8000019 }
981 /* lf.sfne.d $rAD32F,$rBD32F */
984 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
985 & ifmt_lf_sfeq_d32
, { 0xc8000019 }
987 /* lf.sfge.s $rASF,$rBSF */
990 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
991 & ifmt_lf_sfeq_s
, { 0xc800000b }
993 /* lf.sfge.d $rADF,$rBDF */
996 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
997 & ifmt_lf_sfeq_d
, { 0xc800001b }
999 /* lf.sfge.d $rAD32F,$rBD32F */
1002 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1003 & ifmt_lf_sfeq_d32
, { 0xc800001b }
1005 /* lf.sfgt.s $rASF,$rBSF */
1008 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1009 & ifmt_lf_sfeq_s
, { 0xc800000a }
1011 /* lf.sfgt.d $rADF,$rBDF */
1014 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1015 & ifmt_lf_sfeq_d
, { 0xc800001a }
1017 /* lf.sfgt.d $rAD32F,$rBD32F */
1020 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1021 & ifmt_lf_sfeq_d32
, { 0xc800001a }
1023 /* lf.sflt.s $rASF,$rBSF */
1026 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1027 & ifmt_lf_sfeq_s
, { 0xc800000c }
1029 /* lf.sflt.d $rADF,$rBDF */
1032 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1033 & ifmt_lf_sfeq_d
, { 0xc800001c }
1035 /* lf.sflt.d $rAD32F,$rBD32F */
1038 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1039 & ifmt_lf_sfeq_d32
, { 0xc800001c }
1041 /* lf.sfle.s $rASF,$rBSF */
1044 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1045 & ifmt_lf_sfeq_s
, { 0xc800000d }
1047 /* lf.sfle.d $rADF,$rBDF */
1050 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1051 & ifmt_lf_sfeq_d
, { 0xc800001d }
1053 /* lf.sfle.d $rAD32F,$rBD32F */
1056 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1057 & ifmt_lf_sfeq_d32
, { 0xc800001d }
1059 /* lf.sfueq.s $rASF,$rBSF */
1062 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1063 & ifmt_lf_sfeq_s
, { 0xc8000028 }
1065 /* lf.sfueq.d $rADF,$rBDF */
1068 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1069 & ifmt_lf_sfeq_d
, { 0xc8000038 }
1071 /* lf.sfueq.d $rAD32F,$rBD32F */
1074 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1075 & ifmt_lf_sfeq_d32
, { 0xc8000038 }
1077 /* lf.sfune.s $rASF,$rBSF */
1080 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1081 & ifmt_lf_sfeq_s
, { 0xc8000029 }
1083 /* lf.sfune.d $rADF,$rBDF */
1086 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1087 & ifmt_lf_sfeq_d
, { 0xc8000039 }
1089 /* lf.sfune.d $rAD32F,$rBD32F */
1092 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1093 & ifmt_lf_sfeq_d32
, { 0xc8000039 }
1095 /* lf.sfugt.s $rASF,$rBSF */
1098 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1099 & ifmt_lf_sfeq_s
, { 0xc800002a }
1101 /* lf.sfugt.d $rADF,$rBDF */
1104 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1105 & ifmt_lf_sfeq_d
, { 0xc800003a }
1107 /* lf.sfugt.d $rAD32F,$rBD32F */
1110 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1111 & ifmt_lf_sfeq_d32
, { 0xc800003a }
1113 /* lf.sfuge.s $rASF,$rBSF */
1116 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1117 & ifmt_lf_sfeq_s
, { 0xc800002b }
1119 /* lf.sfuge.d $rADF,$rBDF */
1122 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1123 & ifmt_lf_sfeq_d
, { 0xc800003b }
1125 /* lf.sfuge.d $rAD32F,$rBD32F */
1128 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1129 & ifmt_lf_sfeq_d32
, { 0xc800003b }
1131 /* lf.sfult.s $rASF,$rBSF */
1134 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1135 & ifmt_lf_sfeq_s
, { 0xc800002c }
1137 /* lf.sfult.d $rADF,$rBDF */
1140 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1141 & ifmt_lf_sfeq_d
, { 0xc800003c }
1143 /* lf.sfult.d $rAD32F,$rBD32F */
1146 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1147 & ifmt_lf_sfeq_d32
, { 0xc800003c }
1149 /* lf.sfule.s $rASF,$rBSF */
1152 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1153 & ifmt_lf_sfeq_s
, { 0xc800002d }
1155 /* lf.sfule.d $rADF,$rBDF */
1158 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1159 & ifmt_lf_sfeq_d
, { 0xc800003d }
1161 /* lf.sfule.d $rAD32F,$rBD32F */
1164 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1165 & ifmt_lf_sfeq_d32
, { 0xc800003d }
1167 /* lf.sfun.s $rASF,$rBSF */
1170 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1171 & ifmt_lf_sfeq_s
, { 0xc800002e }
1173 /* lf.sfun.d $rADF,$rBDF */
1176 { { MNEM
, ' ', OP (RADF
), ',', OP (RBDF
), 0 } },
1177 & ifmt_lf_sfeq_d
, { 0xc800003e }
1179 /* lf.sfun.d $rAD32F,$rBD32F */
1182 { { MNEM
, ' ', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1183 & ifmt_lf_sfeq_d32
, { 0xc800003e }
1185 /* lf.madd.s $rDSF,$rASF,$rBSF */
1188 { { MNEM
, ' ', OP (RDSF
), ',', OP (RASF
), ',', OP (RBSF
), 0 } },
1189 & ifmt_lf_add_s
, { 0xc8000007 }
1191 /* lf.madd.d $rDDF,$rADF,$rBDF */
1194 { { MNEM
, ' ', OP (RDDF
), ',', OP (RADF
), ',', OP (RBDF
), 0 } },
1195 & ifmt_lf_add_d
, { 0xc8000017 }
1197 /* lf.madd.d $rDD32F,$rAD32F,$rBD32F */
1200 { { MNEM
, ' ', OP (RDD32F
), ',', OP (RAD32F
), ',', OP (RBD32F
), 0 } },
1201 & ifmt_lf_add_d32
, { 0xc8000017 }
1203 /* lf.cust1.s $rASF,$rBSF */
1206 { { MNEM
, ' ', OP (RASF
), ',', OP (RBSF
), 0 } },
1207 & ifmt_lf_cust1_s
, { 0xc80000d0 }
1213 & ifmt_lf_cust1_d
, { 0xc80000e0 }
1219 & ifmt_lf_cust1_d32
, { 0xc80000e0 }
1228 /* Formats for ALIAS macro-insns. */
1230 #define F(f) & or1k_cgen_ifld_table[OR1K_##f]
1233 /* Each non-simple macro entry points to an array of expansion possibilities. */
1235 #define A(a) (1 << CGEN_INSN_##a)
1236 #define OPERAND(op) OR1K_OPERAND_##op
1237 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1238 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1240 /* The macro instruction table. */
1242 static const CGEN_IBASE or1k_cgen_macro_insn_table
[] =
1246 /* The macro instruction opcode table. */
1248 static const CGEN_OPCODE or1k_cgen_macro_insn_opcode_table
[] =
1257 #ifndef CGEN_ASM_HASH_P
1258 #define CGEN_ASM_HASH_P(insn) 1
1261 #ifndef CGEN_DIS_HASH_P
1262 #define CGEN_DIS_HASH_P(insn) 1
1265 /* Return non-zero if INSN is to be added to the hash table.
1266 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1269 asm_hash_insn_p (const CGEN_INSN
*insn ATTRIBUTE_UNUSED
)
1271 return CGEN_ASM_HASH_P (insn
);
1275 dis_hash_insn_p (const CGEN_INSN
*insn
)
1277 /* If building the hash table and the NO-DIS attribute is present,
1279 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
1281 return CGEN_DIS_HASH_P (insn
);
1284 #ifndef CGEN_ASM_HASH
1285 #define CGEN_ASM_HASH_SIZE 127
1286 #ifdef CGEN_MNEMONIC_OPERANDS
1287 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1289 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1293 /* It doesn't make much sense to provide a default here,
1294 but while this is under development we do.
1295 BUFFER is a pointer to the bytes of the insn, target order.
1296 VALUE is the first base_insn_bitsize bits as an int in host order. */
1298 #ifndef CGEN_DIS_HASH
1299 #define CGEN_DIS_HASH_SIZE 256
1300 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1303 /* The result is the hash value of the insn.
1304 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1307 asm_hash_insn (const char *mnem
)
1309 return CGEN_ASM_HASH (mnem
);
1312 /* BUF is a pointer to the bytes of the insn, target order.
1313 VALUE is the first base_insn_bitsize bits as an int in host order. */
1316 dis_hash_insn (const char *buf ATTRIBUTE_UNUSED
,
1317 CGEN_INSN_INT value ATTRIBUTE_UNUSED
)
1319 return CGEN_DIS_HASH (buf
, value
);
1322 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1325 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
1327 CGEN_FIELDS_BITSIZE (fields
) = size
;
1330 /* Function to call before using the operand instance table.
1331 This plugs the opcode entries and macro instructions into the cpu table. */
1334 or1k_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
1337 int num_macros
= (sizeof (or1k_cgen_macro_insn_table
) /
1338 sizeof (or1k_cgen_macro_insn_table
[0]));
1339 const CGEN_IBASE
*ib
= & or1k_cgen_macro_insn_table
[0];
1340 const CGEN_OPCODE
*oc
= & or1k_cgen_macro_insn_opcode_table
[0];
1341 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
1343 /* This test has been added to avoid a warning generated
1344 if memset is called with a third argument of value zero. */
1345 if (num_macros
>= 1)
1346 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
1347 for (i
= 0; i
< num_macros
; ++i
)
1349 insns
[i
].base
= &ib
[i
];
1350 insns
[i
].opcode
= &oc
[i
];
1351 or1k_cgen_build_insn_regex (& insns
[i
]);
1353 cd
->macro_insn_table
.init_entries
= insns
;
1354 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
1355 cd
->macro_insn_table
.num_init_entries
= num_macros
;
1357 oc
= & or1k_cgen_insn_opcode_table
[0];
1358 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
1359 for (i
= 0; i
< MAX_INSNS
; ++i
)
1361 insns
[i
].opcode
= &oc
[i
];
1362 or1k_cgen_build_insn_regex (& insns
[i
]);
1365 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
1366 cd
->set_fields_bitsize
= set_fields_bitsize
;
1368 cd
->asm_hash_p
= asm_hash_insn_p
;
1369 cd
->asm_hash
= asm_hash_insn
;
1370 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
1372 cd
->dis_hash_p
= dis_hash_insn_p
;
1373 cd
->dis_hash
= dis_hash_insn
;
1374 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;