1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
27 #include "opcode/ppc.h"
29 /* This file provides several disassembler functions, all of which use
30 the disassembler interface defined in dis-asm.h. Several functions
31 are provided because this file handles disassembly for the PowerPC
32 in both big and little endian mode and also for the POWER (RS/6000)
34 static int print_insn_powerpc (bfd_vma
, struct disassemble_info
*, int,
39 /* Stash the result of parsing disassembler_options here. */
43 #define POWERPC_DIALECT(INFO) \
44 (((struct dis_private *) ((INFO)->private_data))->dialect)
52 struct ppc_mopt ppc_opts
[] = {
53 { "403", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_403
56 { "405", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_403
57 | PPC_OPCODE_405
| PPC_OPCODE_32
),
59 { "440", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
60 | PPC_OPCODE_440
| PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
62 { "464", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
63 | PPC_OPCODE_440
| PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
65 { "476", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ISEL
66 | PPC_OPCODE_440
| PPC_OPCODE_476
| PPC_OPCODE_POWER4
69 { "601", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_601
72 { "603", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
74 { "604", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
76 { "620", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
),
78 { "7400", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
81 { "7410", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
84 { "7450", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
87 { "7455", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
90 { "750cl", (PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
)
92 { "altivec", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
),
96 { "booke", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
),
98 { "booke32", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
),
100 { "cell", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
101 | PPC_OPCODE_POWER4
| PPC_OPCODE_CELL
| PPC_OPCODE_ALTIVEC
),
103 { "com", (PPC_OPCODE_COMMON
| PPC_OPCODE_32
),
105 { "e300", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
108 { "e500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
109 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
110 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
111 | PPC_OPCODE_E500MC
),
113 { "e500mc", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
114 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
115 | PPC_OPCODE_E500MC
),
117 { "e500mc64", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
118 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
119 | PPC_OPCODE_64
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
120 | PPC_OPCODE_POWER7
),
122 { "e500x2", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
123 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
124 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
125 | PPC_OPCODE_E500MC
),
127 { "efs", (PPC_OPCODE_PPC
| PPC_OPCODE_EFS
),
129 { "power4", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
130 | PPC_OPCODE_POWER4
),
132 { "power5", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
133 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
),
135 { "power6", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
136 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
137 | PPC_OPCODE_ALTIVEC
),
139 { "power7", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ISEL
140 | PPC_OPCODE_64
| PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
141 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
144 { "ppc", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
146 { "ppc32", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
148 { "ppc64", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
),
150 { "ppc64bridge", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64_BRIDGE
153 { "a2", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ISEL
154 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_CACHELCK
155 | PPC_OPCODE_64
| PPC_OPCODE_A2
),
157 { "ppcps", (PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
),
159 { "pwr", (PPC_OPCODE_POWER
| PPC_OPCODE_32
),
161 { "pwr2", (PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
| PPC_OPCODE_32
),
163 { "pwrx", (PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
| PPC_OPCODE_32
),
165 { "spe", (PPC_OPCODE_PPC
| PPC_OPCODE_EFS
),
167 { "titan", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
168 | PPC_OPCODE_PMR
| PPC_OPCODE_RFMCI
| PPC_OPCODE_TITAN
),
170 { "vsx", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
),
174 /* Handle -m and -M options that set cpu type, and .machine arg. */
177 ppc_parse_cpu (ppc_cpu_t ppc_cpu
, const char *arg
)
180 ppc_cpu_t retain_flags
= ppc_cpu
& (PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
181 | PPC_OPCODE_SPE
| PPC_OPCODE_ANY
);
184 for (i
= 0; i
< sizeof (ppc_opts
) / sizeof (ppc_opts
[0]); i
++)
185 if (strcmp (ppc_opts
[i
].opt
, arg
) == 0)
187 if (ppc_opts
[i
].sticky
)
189 retain_flags
|= ppc_opts
[i
].sticky
;
190 if ((ppc_cpu
& ~(PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
191 | PPC_OPCODE_SPE
| PPC_OPCODE_ANY
)) != 0)
194 ppc_cpu
= ppc_opts
[i
].cpu
;
197 if (i
>= sizeof (ppc_opts
) / sizeof (ppc_opts
[0]))
200 ppc_cpu
|= retain_flags
;
204 /* Determine which set of machines to disassemble for. */
207 powerpc_init_dialect (struct disassemble_info
*info
)
209 ppc_cpu_t dialect
= 0;
211 struct dis_private
*priv
= calloc (sizeof (*priv
), 1);
216 arg
= info
->disassembler_options
;
219 ppc_cpu_t new_cpu
= 0;
220 char *end
= strchr (arg
, ',');
225 if ((new_cpu
= ppc_parse_cpu (dialect
, arg
)) != 0)
227 else if (strcmp (arg
, "32") == 0)
229 dialect
&= ~PPC_OPCODE_64
;
230 dialect
|= PPC_OPCODE_32
;
232 else if (strcmp (arg
, "64") == 0)
234 dialect
|= PPC_OPCODE_64
;
235 dialect
&= ~PPC_OPCODE_32
;
238 fprintf (stderr
, _("warning: ignoring unknown -M%s option\n"), arg
);
245 if ((dialect
& ~(PPC_OPCODE_32
| PPC_OPCODE_64
)) == 0)
247 if (info
->mach
== bfd_mach_ppc64
)
248 dialect
|= PPC_OPCODE_64
;
250 dialect
|= PPC_OPCODE_32
;
251 /* Choose a reasonable default. */
252 dialect
|= (PPC_OPCODE_PPC
| PPC_OPCODE_COMMON
| PPC_OPCODE_CLASSIC
253 | PPC_OPCODE_601
| PPC_OPCODE_ALTIVEC
);
256 info
->private_data
= priv
;
257 POWERPC_DIALECT(info
) = dialect
;
262 /* Print a big endian PowerPC instruction. */
265 print_insn_big_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
267 if (info
->private_data
== NULL
&& !powerpc_init_dialect (info
))
269 return print_insn_powerpc (memaddr
, info
, 1, POWERPC_DIALECT(info
));
272 /* Print a little endian PowerPC instruction. */
275 print_insn_little_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
277 if (info
->private_data
== NULL
&& !powerpc_init_dialect (info
))
279 return print_insn_powerpc (memaddr
, info
, 0, POWERPC_DIALECT(info
));
282 /* Print a POWER (RS/6000) instruction. */
285 print_insn_rs6000 (bfd_vma memaddr
, struct disassemble_info
*info
)
287 return print_insn_powerpc (memaddr
, info
, 1, PPC_OPCODE_POWER
);
290 /* Extract the operand value from the PowerPC or POWER instruction. */
293 operand_value_powerpc (const struct powerpc_operand
*operand
,
294 unsigned long insn
, ppc_cpu_t dialect
)
298 /* Extract the value from the instruction. */
299 if (operand
->extract
)
300 value
= (*operand
->extract
) (insn
, dialect
, &invalid
);
303 value
= (insn
>> operand
->shift
) & operand
->bitm
;
304 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
306 /* BITM is always some number of zeros followed by some
307 number of ones, followed by some numer of zeros. */
308 unsigned long top
= operand
->bitm
;
309 /* top & -top gives the rightmost 1 bit, so this
310 fills in any trailing zeros. */
311 top
|= (top
& -top
) - 1;
313 value
= (value
^ top
) - top
;
320 /* Determine whether the optional operand(s) should be printed. */
323 skip_optional_operands (const unsigned char *opindex
,
324 unsigned long insn
, ppc_cpu_t dialect
)
326 const struct powerpc_operand
*operand
;
328 for (; *opindex
!= 0; opindex
++)
330 operand
= &powerpc_operands
[*opindex
];
331 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0
332 || ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
333 && operand_value_powerpc (operand
, insn
, dialect
) != 0))
340 /* Print a PowerPC or POWER instruction. */
343 print_insn_powerpc (bfd_vma memaddr
,
344 struct disassemble_info
*info
,
351 const struct powerpc_opcode
*opcode
;
352 const struct powerpc_opcode
*opcode_end
;
354 ppc_cpu_t dialect_orig
= dialect
;
356 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
359 (*info
->memory_error_func
) (status
, memaddr
, info
);
364 insn
= bfd_getb32 (buffer
);
366 insn
= bfd_getl32 (buffer
);
368 /* Get the major opcode of the instruction. */
371 /* Find the first match in the opcode table. We could speed this up
372 a bit by doing a binary search on the major opcode. */
373 opcode_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
375 for (opcode
= powerpc_opcodes
; opcode
< opcode_end
; opcode
++)
377 unsigned long table_op
;
378 const unsigned char *opindex
;
379 const struct powerpc_operand
*operand
;
385 table_op
= PPC_OP (opcode
->opcode
);
391 if ((insn
& opcode
->mask
) != opcode
->opcode
392 || (opcode
->flags
& dialect
) == 0
393 || (opcode
->deprecated
& dialect_orig
) != 0)
396 /* Make two passes over the operands. First see if any of them
397 have extraction functions, and, if they do, make sure the
398 instruction is valid. */
400 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
402 operand
= powerpc_operands
+ *opindex
;
403 if (operand
->extract
)
404 (*operand
->extract
) (insn
, dialect
, &invalid
);
409 /* The instruction is valid. */
410 if (opcode
->operands
[0] != 0)
411 (*info
->fprintf_func
) (info
->stream
, "%-7s ", opcode
->name
);
413 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
415 /* Now extract and print the operands. */
419 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
423 operand
= powerpc_operands
+ *opindex
;
425 /* Operands that are marked FAKE are simply ignored. We
426 already made sure that the extract function considered
427 the instruction to be valid. */
428 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
431 /* If all of the optional operands have the value zero,
432 then don't print any of them. */
433 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
435 if (skip_optional
< 0)
436 skip_optional
= skip_optional_operands (opindex
, insn
,
442 value
= operand_value_powerpc (operand
, insn
, dialect
);
446 (*info
->fprintf_func
) (info
->stream
, ",");
450 /* Print the operand as directed by the flags. */
451 if ((operand
->flags
& PPC_OPERAND_GPR
) != 0
452 || ((operand
->flags
& PPC_OPERAND_GPR_0
) != 0 && value
!= 0))
453 (*info
->fprintf_func
) (info
->stream
, "r%ld", value
);
454 else if ((operand
->flags
& PPC_OPERAND_FPR
) != 0)
455 (*info
->fprintf_func
) (info
->stream
, "f%ld", value
);
456 else if ((operand
->flags
& PPC_OPERAND_VR
) != 0)
457 (*info
->fprintf_func
) (info
->stream
, "v%ld", value
);
458 else if ((operand
->flags
& PPC_OPERAND_VSR
) != 0)
459 (*info
->fprintf_func
) (info
->stream
, "vs%ld", value
);
460 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0)
461 (*info
->print_address_func
) (memaddr
+ value
, info
);
462 else if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
463 (*info
->print_address_func
) ((bfd_vma
) value
& 0xffffffff, info
);
464 else if ((operand
->flags
& PPC_OPERAND_FSL
) != 0)
465 (*info
->fprintf_func
) (info
->stream
, "fsl%ld", value
);
466 else if ((operand
->flags
& PPC_OPERAND_FCR
) != 0)
467 (*info
->fprintf_func
) (info
->stream
, "fcr%ld", value
);
468 else if ((operand
->flags
& PPC_OPERAND_UDI
) != 0)
469 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
470 else if ((operand
->flags
& PPC_OPERAND_CR
) != 0
471 && (dialect
& PPC_OPCODE_PPC
) != 0)
473 if (operand
->bitm
== 7)
474 (*info
->fprintf_func
) (info
->stream
, "cr%ld", value
);
477 static const char *cbnames
[4] = { "lt", "gt", "eq", "so" };
483 (*info
->fprintf_func
) (info
->stream
, "4*cr%d+", cr
);
485 (*info
->fprintf_func
) (info
->stream
, "%s", cbnames
[cc
]);
489 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
493 (*info
->fprintf_func
) (info
->stream
, ")");
497 if ((operand
->flags
& PPC_OPERAND_PARENS
) == 0)
501 (*info
->fprintf_func
) (info
->stream
, "(");
506 /* We have found and printed an instruction; return. */
510 if ((dialect
& PPC_OPCODE_ANY
) != 0)
512 dialect
= ~PPC_OPCODE_ANY
;
516 /* We could not find a match. */
517 (*info
->fprintf_func
) (info
->stream
, ".long 0x%lx", insn
);
523 print_ppc_disassembler_options (FILE *stream
)
527 fprintf (stream
, _("\n\
528 The following PPC specific disassembler options are supported for use with\n\
531 for (col
= 0, i
= 0; i
< sizeof (ppc_opts
) / sizeof (ppc_opts
[0]); i
++)
533 col
+= fprintf (stream
, " %s,", ppc_opts
[i
].opt
);
536 fprintf (stream
, "\n");
540 fprintf (stream
, " 32, 64\n");
This page took 0.039825 seconds and 4 git commands to generate.