1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright (C) 1994-2020 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
24 #include "disassemble.h"
28 #include "opcode/ppc.h"
29 #include "libiberty.h"
31 /* This file provides several disassembler functions, all of which use
32 the disassembler interface defined in dis-asm.h. Several functions
33 are provided because this file handles disassembly for the PowerPC
34 in both big and little endian mode and also for the POWER (RS/6000)
36 static int print_insn_powerpc (bfd_vma
, struct disassemble_info
*, int,
41 /* Stash the result of parsing disassembler_options here. */
45 #define POWERPC_DIALECT(INFO) \
46 (((struct dis_private *) ((INFO)->private_data))->dialect)
49 /* Option string, without -m or -M prefix. */
51 /* CPU option flags. */
53 /* Flags that should stay on, even when combined with another cpu
54 option. This should only be used for generic options like
55 "-many" or "-maltivec" where it is reasonable to add some
56 capability to another cpu selection. The added flags are sticky
57 so that, for example, "-many -me500" and "-me500 -many" result in
58 the same assembler or disassembler behaviour. Do not use
59 "sticky" for specific cpus, as this will prevent that cpu's flags
60 from overriding the defaults set in powerpc_init_dialect or a
65 struct ppc_mopt ppc_opts
[] = {
66 { "403", PPC_OPCODE_PPC
| PPC_OPCODE_403
,
68 { "405", PPC_OPCODE_PPC
| PPC_OPCODE_403
| PPC_OPCODE_405
,
70 { "440", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_440
71 | PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
73 { "464", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_440
74 | PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
76 { "476", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_476
77 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
),
79 { "601", PPC_OPCODE_PPC
| PPC_OPCODE_601
,
81 { "603", PPC_OPCODE_PPC
,
83 { "604", PPC_OPCODE_PPC
,
85 { "620", PPC_OPCODE_PPC
| PPC_OPCODE_64
,
87 { "7400", PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
,
89 { "7410", PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
,
91 { "7450", PPC_OPCODE_PPC
| PPC_OPCODE_7450
| PPC_OPCODE_ALTIVEC
,
93 { "7455", PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
,
95 { "750cl", PPC_OPCODE_PPC
| PPC_OPCODE_750
| PPC_OPCODE_PPCPS
97 { "gekko", PPC_OPCODE_PPC
| PPC_OPCODE_750
| PPC_OPCODE_PPCPS
99 { "broadway", PPC_OPCODE_PPC
| PPC_OPCODE_750
| PPC_OPCODE_PPCPS
101 { "821", PPC_OPCODE_PPC
| PPC_OPCODE_860
,
103 { "850", PPC_OPCODE_PPC
| PPC_OPCODE_860
,
105 { "860", PPC_OPCODE_PPC
| PPC_OPCODE_860
,
107 { "a2", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_POWER4
108 | PPC_OPCODE_POWER5
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_64
111 { "altivec", PPC_OPCODE_PPC
,
112 PPC_OPCODE_ALTIVEC
},
113 { "any", PPC_OPCODE_PPC
,
115 { "booke", PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
,
117 { "booke32", PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
,
119 { "cell", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
120 | PPC_OPCODE_CELL
| PPC_OPCODE_ALTIVEC
),
122 { "com", PPC_OPCODE_COMMON
,
124 { "e200z4", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
125 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
126 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
127 | PPC_OPCODE_E500
| PPC_OPCODE_VLE
| PPC_OPCODE_E200Z4
128 | PPC_OPCODE_EFS2
| PPC_OPCODE_LSP
),
130 { "e300", PPC_OPCODE_PPC
| PPC_OPCODE_E300
,
132 { "e500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
133 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
134 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
137 { "e500mc", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
138 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
139 | PPC_OPCODE_E500MC
),
141 { "e500mc64", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
142 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
143 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_POWER5
144 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
146 { "e5500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
147 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
148 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
149 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
151 { "e6500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
152 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
153 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_ALTIVEC
154 | PPC_OPCODE_E6500
| PPC_OPCODE_TMR
| PPC_OPCODE_POWER4
155 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
157 { "e500x2", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
158 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
159 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
162 { "efs", PPC_OPCODE_PPC
| PPC_OPCODE_EFS
,
164 { "efs2", PPC_OPCODE_PPC
| PPC_OPCODE_EFS
| PPC_OPCODE_EFS2
,
166 { "power4", PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
,
168 { "power5", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
169 | PPC_OPCODE_POWER5
),
171 { "power6", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
172 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_ALTIVEC
),
174 { "power7", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
175 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
176 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
178 { "power8", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
179 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
180 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
181 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
183 { "power9", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
184 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
185 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_POWER9
186 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
188 { "power10", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
189 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
190 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_POWER9
191 | PPC_OPCODE_POWER10
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
193 { "future", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
194 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
195 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_POWER9
196 | PPC_OPCODE_POWER10
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
198 { "ppc", PPC_OPCODE_PPC
,
200 { "ppc32", PPC_OPCODE_PPC
,
202 { "32", PPC_OPCODE_PPC
,
204 { "ppc64", PPC_OPCODE_PPC
| PPC_OPCODE_64
,
206 { "64", PPC_OPCODE_PPC
| PPC_OPCODE_64
,
208 { "ppc64bridge", PPC_OPCODE_PPC
| PPC_OPCODE_64_BRIDGE
,
210 { "ppcps", PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
,
212 { "pwr", PPC_OPCODE_POWER
,
214 { "pwr2", PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
,
216 { "pwr4", PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
,
218 { "pwr5", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
219 | PPC_OPCODE_POWER5
),
221 { "pwr5x", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
222 | PPC_OPCODE_POWER5
),
224 { "pwr6", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
225 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_ALTIVEC
),
227 { "pwr7", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
228 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
229 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
231 { "pwr8", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
232 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
233 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
234 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
236 { "pwr9", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
237 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
238 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_POWER9
239 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
241 { "pwrx", PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
,
243 { "raw", PPC_OPCODE_PPC
,
245 { "spe", PPC_OPCODE_PPC
| PPC_OPCODE_EFS
,
247 { "spe2", PPC_OPCODE_PPC
| PPC_OPCODE_EFS
| PPC_OPCODE_EFS2
| PPC_OPCODE_SPE
,
249 { "titan", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_PMR
250 | PPC_OPCODE_RFMCI
| PPC_OPCODE_TITAN
),
252 { "vle", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
253 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
254 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
255 | PPC_OPCODE_LSP
| PPC_OPCODE_EFS2
| PPC_OPCODE_SPE2
),
257 { "vsx", PPC_OPCODE_PPC
,
261 /* Switch between Booke and VLE dialects for interlinked dumps. */
263 get_powerpc_dialect (struct disassemble_info
*info
)
265 ppc_cpu_t dialect
= 0;
267 if (info
->private_data
)
268 dialect
= POWERPC_DIALECT (info
);
270 /* Disassemble according to the section headers flags for VLE-mode. */
271 if (dialect
& PPC_OPCODE_VLE
272 && info
->section
!= NULL
&& info
->section
->owner
!= NULL
273 && bfd_get_flavour (info
->section
->owner
) == bfd_target_elf_flavour
274 && elf_object_id (info
->section
->owner
) == PPC32_ELF_DATA
275 && (elf_section_flags (info
->section
) & SHF_PPC_VLE
) != 0)
278 return dialect
& ~ PPC_OPCODE_VLE
;
281 /* Handle -m and -M options that set cpu type, and .machine arg. */
284 ppc_parse_cpu (ppc_cpu_t ppc_cpu
, ppc_cpu_t
*sticky
, const char *arg
)
288 for (i
= 0; i
< ARRAY_SIZE (ppc_opts
); i
++)
289 if (disassembler_options_cmp (ppc_opts
[i
].opt
, arg
) == 0)
291 if (ppc_opts
[i
].sticky
)
293 *sticky
|= ppc_opts
[i
].sticky
;
294 if ((ppc_cpu
& ~*sticky
) != 0)
297 ppc_cpu
= ppc_opts
[i
].cpu
;
300 if (i
>= ARRAY_SIZE (ppc_opts
))
307 /* Determine which set of machines to disassemble for. */
310 powerpc_init_dialect (struct disassemble_info
*info
)
312 ppc_cpu_t dialect
= 0;
313 ppc_cpu_t sticky
= 0;
314 struct dis_private
*priv
= calloc (sizeof (*priv
), 1);
321 case bfd_mach_ppc_403
:
322 case bfd_mach_ppc_403gc
:
323 dialect
= ppc_parse_cpu (dialect
, &sticky
, "403");
325 case bfd_mach_ppc_405
:
326 dialect
= ppc_parse_cpu (dialect
, &sticky
, "405");
328 case bfd_mach_ppc_601
:
329 dialect
= ppc_parse_cpu (dialect
, &sticky
, "601");
331 case bfd_mach_ppc_750
:
332 dialect
= ppc_parse_cpu (dialect
, &sticky
, "750cl");
334 case bfd_mach_ppc_a35
:
335 case bfd_mach_ppc_rs64ii
:
336 case bfd_mach_ppc_rs64iii
:
337 dialect
= ppc_parse_cpu (dialect
, &sticky
, "pwr2") | PPC_OPCODE_64
;
339 case bfd_mach_ppc_e500
:
340 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e500");
342 case bfd_mach_ppc_e500mc
:
343 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e500mc");
345 case bfd_mach_ppc_e500mc64
:
346 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e500mc64");
348 case bfd_mach_ppc_e5500
:
349 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e5500");
351 case bfd_mach_ppc_e6500
:
352 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e6500");
354 case bfd_mach_ppc_titan
:
355 dialect
= ppc_parse_cpu (dialect
, &sticky
, "titan");
357 case bfd_mach_ppc_vle
:
358 dialect
= ppc_parse_cpu (dialect
, &sticky
, "vle");
361 if (info
->arch
== bfd_arch_powerpc
)
362 dialect
= ppc_parse_cpu (dialect
, &sticky
, "power10") | PPC_OPCODE_ANY
;
364 dialect
= ppc_parse_cpu (dialect
, &sticky
, "pwr");
369 FOR_EACH_DISASSEMBLER_OPTION (opt
, info
->disassembler_options
)
371 ppc_cpu_t new_cpu
= 0;
373 if (disassembler_options_cmp (opt
, "32") == 0)
374 dialect
&= ~(ppc_cpu_t
) PPC_OPCODE_64
;
375 else if (disassembler_options_cmp (opt
, "64") == 0)
376 dialect
|= PPC_OPCODE_64
;
377 else if ((new_cpu
= ppc_parse_cpu (dialect
, &sticky
, opt
)) != 0)
380 /* xgettext: c-format */
381 opcodes_error_handler (_("warning: ignoring unknown -M%s option"), opt
);
384 info
->private_data
= priv
;
385 POWERPC_DIALECT(info
) = dialect
;
388 #define PPC_OPCD_SEGS (1 + PPC_OP (-1))
389 static unsigned short powerpc_opcd_indices
[PPC_OPCD_SEGS
+ 1];
390 #define PREFIX_OPCD_SEGS (1 + PPC_PREFIX_SEG (-1))
391 static unsigned short prefix_opcd_indices
[PREFIX_OPCD_SEGS
+ 1];
392 #define VLE_OPCD_SEGS (1 + VLE_OP_TO_SEG (VLE_OP (-1, 0xffff)))
393 static unsigned short vle_opcd_indices
[VLE_OPCD_SEGS
+ 1];
394 #define SPE2_OPCD_SEGS (1 + SPE2_XOP_TO_SEG (SPE2_XOP (-1)))
395 static unsigned short spe2_opcd_indices
[SPE2_OPCD_SEGS
+ 1];
397 /* Calculate opcode table indices to speed up disassembly,
401 disassemble_init_powerpc (struct disassemble_info
*info
)
403 if (powerpc_opcd_indices
[PPC_OPCD_SEGS
] == 0)
405 unsigned seg
, idx
, op
;
408 for (seg
= 0, idx
= 0; seg
<= PPC_OPCD_SEGS
; seg
++)
410 powerpc_opcd_indices
[seg
] = idx
;
411 for (; idx
< powerpc_num_opcodes
; idx
++)
412 if (seg
< PPC_OP (powerpc_opcodes
[idx
].opcode
))
416 /* 64-bit prefix opcodes */
417 for (seg
= 0, idx
= 0; seg
<= PREFIX_OPCD_SEGS
; seg
++)
419 prefix_opcd_indices
[seg
] = idx
;
420 for (; idx
< prefix_num_opcodes
; idx
++)
421 if (seg
< PPC_PREFIX_SEG (prefix_opcodes
[idx
].opcode
))
426 for (seg
= 0, idx
= 0; seg
<= VLE_OPCD_SEGS
; seg
++)
428 vle_opcd_indices
[seg
] = idx
;
429 for (; idx
< vle_num_opcodes
; idx
++)
431 op
= VLE_OP (vle_opcodes
[idx
].opcode
, vle_opcodes
[idx
].mask
);
432 if (seg
< VLE_OP_TO_SEG (op
))
438 for (seg
= 0, idx
= 0; seg
<= SPE2_OPCD_SEGS
; seg
++)
440 spe2_opcd_indices
[seg
] = idx
;
441 for (; idx
< spe2_num_opcodes
; idx
++)
443 op
= SPE2_XOP (spe2_opcodes
[idx
].opcode
);
444 if (seg
< SPE2_XOP_TO_SEG (op
))
450 powerpc_init_dialect (info
);
453 /* Print a big endian PowerPC instruction. */
456 print_insn_big_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
458 return print_insn_powerpc (memaddr
, info
, 1, get_powerpc_dialect (info
));
461 /* Print a little endian PowerPC instruction. */
464 print_insn_little_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
466 return print_insn_powerpc (memaddr
, info
, 0, get_powerpc_dialect (info
));
469 /* Extract the operand value from the PowerPC or POWER instruction. */
472 operand_value_powerpc (const struct powerpc_operand
*operand
,
473 uint64_t insn
, ppc_cpu_t dialect
)
477 /* Extract the value from the instruction. */
478 if (operand
->extract
)
479 value
= (*operand
->extract
) (insn
, dialect
, &invalid
);
482 if (operand
->shift
>= 0)
483 value
= (insn
>> operand
->shift
) & operand
->bitm
;
485 value
= (insn
<< -operand
->shift
) & operand
->bitm
;
486 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
488 /* BITM is always some number of zeros followed by some
489 number of ones, followed by some number of zeros. */
490 uint64_t top
= operand
->bitm
;
491 /* top & -top gives the rightmost 1 bit, so this
492 fills in any trailing zeros. */
493 top
|= (top
& -top
) - 1;
495 value
= (value
^ top
) - top
;
502 /* Determine whether the optional operand(s) should be printed. */
505 skip_optional_operands (const unsigned char *opindex
,
506 uint64_t insn
, ppc_cpu_t dialect
)
508 const struct powerpc_operand
*operand
;
511 for (num_optional
= 0; *opindex
!= 0; opindex
++)
513 operand
= &powerpc_operands
[*opindex
];
514 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
516 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
518 /* Negative count is used as a flag to extract function. */
520 if (operand_value_powerpc (operand
, insn
, dialect
)
521 != ppc_optional_operand_value (operand
, insn
, dialect
,
530 /* Find a match for INSN in the opcode table, given machine DIALECT. */
532 static const struct powerpc_opcode
*
533 lookup_powerpc (uint64_t insn
, ppc_cpu_t dialect
)
535 const struct powerpc_opcode
*opcode
, *opcode_end
, *last
;
538 /* Get the major opcode of the instruction. */
541 /* Find the first match in the opcode table for this major opcode. */
542 opcode_end
= powerpc_opcodes
+ powerpc_opcd_indices
[op
+ 1];
544 for (opcode
= powerpc_opcodes
+ powerpc_opcd_indices
[op
];
548 const unsigned char *opindex
;
549 const struct powerpc_operand
*operand
;
552 if ((insn
& opcode
->mask
) != opcode
->opcode
553 || ((dialect
& PPC_OPCODE_ANY
) == 0
554 && ((opcode
->flags
& dialect
) == 0
555 || (opcode
->deprecated
& dialect
) != 0)))
558 /* Check validity of operands. */
560 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
562 operand
= powerpc_operands
+ *opindex
;
563 if (operand
->extract
)
564 (*operand
->extract
) (insn
, dialect
, &invalid
);
569 if ((dialect
& PPC_OPCODE_RAW
) == 0)
572 /* The raw machine insn is one that is not a specialization. */
574 || (last
->mask
& ~opcode
->mask
) != 0)
581 /* Find a match for INSN in the PREFIX opcode table. */
583 static const struct powerpc_opcode
*
584 lookup_prefix (uint64_t insn
, ppc_cpu_t dialect
)
586 const struct powerpc_opcode
*opcode
, *opcode_end
, *last
;
589 /* Get the opcode segment of the instruction. */
590 seg
= PPC_PREFIX_SEG (insn
);
592 /* Find the first match in the opcode table for this major opcode. */
593 opcode_end
= prefix_opcodes
+ prefix_opcd_indices
[seg
+ 1];
595 for (opcode
= prefix_opcodes
+ prefix_opcd_indices
[seg
];
599 const unsigned char *opindex
;
600 const struct powerpc_operand
*operand
;
603 if ((insn
& opcode
->mask
) != opcode
->opcode
604 || ((dialect
& PPC_OPCODE_ANY
) == 0
605 && ((opcode
->flags
& dialect
) == 0
606 || (opcode
->deprecated
& dialect
) != 0)))
609 /* Check validity of operands. */
611 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
613 operand
= powerpc_operands
+ *opindex
;
614 if (operand
->extract
)
615 (*operand
->extract
) (insn
, dialect
, &invalid
);
620 if ((dialect
& PPC_OPCODE_RAW
) == 0)
623 /* The raw machine insn is one that is not a specialization. */
625 || (last
->mask
& ~opcode
->mask
) != 0)
632 /* Find a match for INSN in the VLE opcode table. */
634 static const struct powerpc_opcode
*
635 lookup_vle (uint64_t insn
)
637 const struct powerpc_opcode
*opcode
;
638 const struct powerpc_opcode
*opcode_end
;
642 if (op
>= 0x20 && op
<= 0x37)
644 /* This insn has a 4-bit opcode. */
647 seg
= VLE_OP_TO_SEG (op
);
649 /* Find the first match in the opcode table for this major opcode. */
650 opcode_end
= vle_opcodes
+ vle_opcd_indices
[seg
+ 1];
651 for (opcode
= vle_opcodes
+ vle_opcd_indices
[seg
];
655 uint64_t table_opcd
= opcode
->opcode
;
656 uint64_t table_mask
= opcode
->mask
;
657 bfd_boolean table_op_is_short
= PPC_OP_SE_VLE(table_mask
);
659 const unsigned char *opindex
;
660 const struct powerpc_operand
*operand
;
664 if (table_op_is_short
)
666 if ((insn2
& table_mask
) != table_opcd
)
669 /* Check validity of operands. */
671 for (opindex
= opcode
->operands
; *opindex
!= 0; ++opindex
)
673 operand
= powerpc_operands
+ *opindex
;
674 if (operand
->extract
)
675 (*operand
->extract
) (insn
, (ppc_cpu_t
)0, &invalid
);
686 /* Find a match for INSN in the SPE2 opcode table. */
688 static const struct powerpc_opcode
*
689 lookup_spe2 (uint64_t insn
)
691 const struct powerpc_opcode
*opcode
, *opcode_end
;
692 unsigned op
, xop
, seg
;
697 /* This is not SPE2 insn.
698 * All SPE2 instructions have OP=4 and differs by XOP */
701 xop
= SPE2_XOP (insn
);
702 seg
= SPE2_XOP_TO_SEG (xop
);
704 /* Find the first match in the opcode table for this major opcode. */
705 opcode_end
= spe2_opcodes
+ spe2_opcd_indices
[seg
+ 1];
706 for (opcode
= spe2_opcodes
+ spe2_opcd_indices
[seg
];
710 uint64_t table_opcd
= opcode
->opcode
;
711 uint64_t table_mask
= opcode
->mask
;
713 const unsigned char *opindex
;
714 const struct powerpc_operand
*operand
;
718 if ((insn2
& table_mask
) != table_opcd
)
721 /* Check validity of operands. */
723 for (opindex
= opcode
->operands
; *opindex
!= 0; ++opindex
)
725 operand
= powerpc_operands
+ *opindex
;
726 if (operand
->extract
)
727 (*operand
->extract
) (insn
, (ppc_cpu_t
)0, &invalid
);
738 /* Print a PowerPC or POWER instruction. */
741 print_insn_powerpc (bfd_vma memaddr
,
742 struct disassemble_info
*info
,
749 const struct powerpc_opcode
*opcode
;
750 int insn_length
= 4; /* Assume we have a normal 4-byte instruction. */
752 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
754 /* The final instruction may be a 2-byte VLE insn. */
755 if (status
!= 0 && (dialect
& PPC_OPCODE_VLE
) != 0)
757 /* Clear buffer so unused bytes will not have garbage in them. */
758 buffer
[2] = buffer
[3] = 0;
759 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 2, info
);
765 (*info
->memory_error_func
) (status
, memaddr
, info
);
770 insn
= bfd_getb32 (buffer
);
772 insn
= bfd_getl32 (buffer
);
774 /* Get the major opcode of the insn. */
776 if ((dialect
& PPC_OPCODE_POWER10
) != 0
777 && PPC_OP (insn
) == 0x1)
779 uint64_t temp_insn
, suffix
;
780 status
= (*info
->read_memory_func
) (memaddr
+ 4, buffer
, 4, info
);
784 suffix
= bfd_getb32 (buffer
);
786 suffix
= bfd_getl32 (buffer
);
787 temp_insn
= (insn
<< 32) | suffix
;
788 opcode
= lookup_prefix (temp_insn
, dialect
& ~PPC_OPCODE_ANY
);
789 if (opcode
== NULL
&& (dialect
& PPC_OPCODE_ANY
) != 0)
790 opcode
= lookup_prefix (temp_insn
, dialect
);
795 if ((info
->flags
& WIDE_OUTPUT
) != 0)
796 info
->bytes_per_line
= 8;
800 if (opcode
== NULL
&& (dialect
& PPC_OPCODE_VLE
) != 0)
802 opcode
= lookup_vle (insn
);
803 if (opcode
!= NULL
&& PPC_OP_SE_VLE (opcode
->mask
))
805 /* The operands will be fetched out of the 16-bit instruction. */
810 if (opcode
== NULL
&& insn_length
== 4)
812 if ((dialect
& PPC_OPCODE_SPE2
) != 0)
813 opcode
= lookup_spe2 (insn
);
815 opcode
= lookup_powerpc (insn
, dialect
& ~PPC_OPCODE_ANY
);
816 if (opcode
== NULL
&& (dialect
& PPC_OPCODE_ANY
) != 0)
817 opcode
= lookup_powerpc (insn
, dialect
);
822 const unsigned char *opindex
;
823 const struct powerpc_operand
*operand
;
835 bfd_boolean skip_optional
;
838 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
839 /* gdb fprintf_func doesn't return count printed. */
840 blanks
= 8 - strlen (opcode
->name
);
844 /* Now extract and print the operands. */
845 op_separator
= blanks
;
846 skip_optional
= FALSE
;
847 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
851 operand
= powerpc_operands
+ *opindex
;
853 /* If all of the optional operands past this one have their
854 default value, then don't print any of them. Except in
855 raw mode, print them all. */
856 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
857 && (dialect
& PPC_OPCODE_RAW
) == 0)
860 skip_optional
= skip_optional_operands (opindex
, insn
, dialect
);
865 value
= operand_value_powerpc (operand
, insn
, dialect
);
867 if (op_separator
== need_comma
)
868 (*info
->fprintf_func
) (info
->stream
, ",");
869 else if (op_separator
== need_paren
)
870 (*info
->fprintf_func
) (info
->stream
, "(");
872 (*info
->fprintf_func
) (info
->stream
, "%*s", op_separator
, " ");
874 /* Print the operand as directed by the flags. */
875 if ((operand
->flags
& PPC_OPERAND_GPR
) != 0
876 || ((operand
->flags
& PPC_OPERAND_GPR_0
) != 0 && value
!= 0))
877 (*info
->fprintf_func
) (info
->stream
, "r%" PRId64
, value
);
878 else if ((operand
->flags
& PPC_OPERAND_FPR
) != 0)
879 (*info
->fprintf_func
) (info
->stream
, "f%" PRId64
, value
);
880 else if ((operand
->flags
& PPC_OPERAND_VR
) != 0)
881 (*info
->fprintf_func
) (info
->stream
, "v%" PRId64
, value
);
882 else if ((operand
->flags
& PPC_OPERAND_VSR
) != 0)
883 (*info
->fprintf_func
) (info
->stream
, "vs%" PRId64
, value
);
884 else if ((operand
->flags
& PPC_OPERAND_ACC
) != 0)
885 (*info
->fprintf_func
) (info
->stream
, "a%" PRId64
, value
);
886 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0)
887 (*info
->print_address_func
) (memaddr
+ value
, info
);
888 else if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
889 (*info
->print_address_func
) ((bfd_vma
) value
& 0xffffffff, info
);
890 else if ((operand
->flags
& PPC_OPERAND_FSL
) != 0)
891 (*info
->fprintf_func
) (info
->stream
, "fsl%" PRId64
, value
);
892 else if ((operand
->flags
& PPC_OPERAND_FCR
) != 0)
893 (*info
->fprintf_func
) (info
->stream
, "fcr%" PRId64
, value
);
894 else if ((operand
->flags
& PPC_OPERAND_UDI
) != 0)
895 (*info
->fprintf_func
) (info
->stream
, "%" PRId64
, value
);
896 else if ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0
897 && (operand
->flags
& PPC_OPERAND_CR_BIT
) == 0
898 && (((dialect
& PPC_OPCODE_PPC
) != 0)
899 || ((dialect
& PPC_OPCODE_VLE
) != 0)))
900 (*info
->fprintf_func
) (info
->stream
, "cr%" PRId64
, value
);
901 else if ((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0
902 && (operand
->flags
& PPC_OPERAND_CR_REG
) == 0
903 && (((dialect
& PPC_OPCODE_PPC
) != 0)
904 || ((dialect
& PPC_OPCODE_VLE
) != 0)))
906 static const char *cbnames
[4] = { "lt", "gt", "eq", "so" };
912 (*info
->fprintf_func
) (info
->stream
, "4*cr%d+", cr
);
914 (*info
->fprintf_func
) (info
->stream
, "%s", cbnames
[cc
]);
917 (*info
->fprintf_func
) (info
->stream
, "%" PRId64
, value
);
919 if (op_separator
== need_paren
)
920 (*info
->fprintf_func
) (info
->stream
, ")");
922 op_separator
= need_comma
;
923 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
924 op_separator
= need_paren
;
927 /* We have found and printed an instruction. */
931 /* We could not find a match. */
932 if (insn_length
== 4)
933 (*info
->fprintf_func
) (info
->stream
, ".long 0x%x",
934 (unsigned int) insn
);
936 (*info
->fprintf_func
) (info
->stream
, ".word 0x%x",
937 (unsigned int) insn
>> 16);
941 const disasm_options_and_args_t
*
942 disassembler_options_powerpc (void)
944 static disasm_options_and_args_t
*opts_and_args
;
946 if (opts_and_args
== NULL
)
948 size_t i
, num_options
= ARRAY_SIZE (ppc_opts
);
949 disasm_options_t
*opts
;
951 opts_and_args
= XNEW (disasm_options_and_args_t
);
952 opts_and_args
->args
= NULL
;
954 opts
= &opts_and_args
->options
;
955 opts
->name
= XNEWVEC (const char *, num_options
+ 1);
956 opts
->description
= NULL
;
958 for (i
= 0; i
< num_options
; i
++)
959 opts
->name
[i
] = ppc_opts
[i
].opt
;
960 /* The array we return must be NULL terminated. */
961 opts
->name
[i
] = NULL
;
964 return opts_and_args
;
968 print_ppc_disassembler_options (FILE *stream
)
972 fprintf (stream
, _("\n\
973 The following PPC specific disassembler options are supported for use with\n\
976 for (col
= 0, i
= 0; i
< ARRAY_SIZE (ppc_opts
); i
++)
978 col
+= fprintf (stream
, " %s,", ppc_opts
[i
].opt
);
981 fprintf (stream
, "\n");
985 fprintf (stream
, "\n");