opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright (C) 1994-2017 Free Software Foundation, Inc.
   3    Written by Ian Lance Taylor, Cygnus Support
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this file; see the file COPYING.  If not, write to the
  19    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22 #include "sysdep.h"
  23 #include <stdio.h>
  24 #include "dis-asm.h"
  25 #include "elf-bfd.h"
  26 #include "elf/ppc.h"
  27 #include "opintl.h"
  28 #include "opcode/ppc.h"
  29 #include "libiberty.h"
  30
  31 /* This file provides several disassembler functions, all of which use
  32    the disassembler interface defined in dis-asm.h.  Several functions
  33    are provided because this file handles disassembly for the PowerPC
  34    in both big and little endian mode and also for the POWER (RS/6000)
  35    chip.  */
  36 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  37                                ppc_cpu_t);
  38
  39 struct dis_private
  40 {
  41   /* Stash the result of parsing disassembler_options here.  */
  42   ppc_cpu_t dialect;
  43 } private;
  44
  45 #define POWERPC_DIALECT(INFO) \
  46   (((struct dis_private *) ((INFO)->private_data))->dialect)
  47
  48 struct ppc_mopt {
  49   /* Option string, without -m or -M prefix.  */
  50   const char *opt;
  51   /* CPU option flags.  */
  52   ppc_cpu_t cpu;
  53   /* Flags that should stay on, even when combined with another cpu
  54      option.  This should only be used for generic options like
  55      "-many" or "-maltivec" where it is reasonable to add some
  56      capability to another cpu selection.  The added flags are sticky
  57      so that, for example, "-many -me500" and "-me500 -many" result in
  58      the same assembler or disassembler behaviour.  Do not use
  59      "sticky" for specific cpus, as this will prevent that cpu's flags
  60      from overriding the defaults set in powerpc_init_dialect or a
  61      prior -m option.  */
  62   ppc_cpu_t sticky;
  63 };
  64
  65 struct ppc_mopt ppc_opts[] = {
  66   { "403",     PPC_OPCODE_PPC | PPC_OPCODE_403,
  67     0 },
  68   { "405",     PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405,
  69     0 },
  70   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  71                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  72     0 },
  73   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  74                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  75     0 },
  76   { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_476
  77                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
  78     0 },
  79   { "601",     PPC_OPCODE_PPC | PPC_OPCODE_601,
  80     0 },
  81   { "603",     PPC_OPCODE_PPC,
  82     0 },
  83   { "604",     PPC_OPCODE_PPC,
  84     0 },
  85   { "620",     PPC_OPCODE_PPC | PPC_OPCODE_64,
  86     0 },
  87   { "7400",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  88     0 },
  89   { "7410",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  90     0 },
  91   { "7450",    PPC_OPCODE_PPC | PPC_OPCODE_7450 | PPC_OPCODE_ALTIVEC,
  92     0 },
  93   { "7455",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  94     0 },
  95   { "750cl",   PPC_OPCODE_PPC | PPC_OPCODE_750 | PPC_OPCODE_PPCPS
  96     , 0 },
  97   { "821",     PPC_OPCODE_PPC | PPC_OPCODE_860,
  98     0 },
  99   { "850",     PPC_OPCODE_PPC | PPC_OPCODE_860,
 100     0 },
 101   { "860",     PPC_OPCODE_PPC | PPC_OPCODE_860,
 102     0 },
 103   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
 104                 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
 105                 | PPC_OPCODE_A2),
 106     0 },
 107   { "altivec", PPC_OPCODE_PPC,
 108     PPC_OPCODE_ALTIVEC },
 109   { "any",     PPC_OPCODE_PPC,
 110     PPC_OPCODE_ANY },
 111   { "booke",   PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
 112     0 },
 113   { "booke32", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
 114     0 },
 115   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 116                 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
 117     0 },
 118   { "com",     PPC_OPCODE_COMMON,
 119     0 },
 120   { "e200z4",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
 121                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 122                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 123                 | PPC_OPCODE_E500 | PPC_OPCODE_VLE | PPC_OPCODE_E200Z4),
 124     0 },
 125   { "e300",    PPC_OPCODE_PPC | PPC_OPCODE_E300,
 126     0 },
 127   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 128                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 129                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 130                 | PPC_OPCODE_E500),
 131     0 },
 132   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 133                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 134                 | PPC_OPCODE_E500MC),
 135     0 },
 136   { "e500mc64",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 137                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 138                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
 139                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 140     0 },
 141   { "e5500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 142                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 143                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 144                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 145                 | PPC_OPCODE_POWER7),
 146     0 },
 147   { "e6500",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 148                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 149                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
 150                 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
 151                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 152     0 },
 153   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 154                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 155                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 156                 | PPC_OPCODE_E500),
 157     0 },
 158   { "efs",     PPC_OPCODE_PPC | PPC_OPCODE_EFS,
 159     0 },
 160   { "power4",  PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
 161     0 },
 162   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 163                 | PPC_OPCODE_POWER5),
 164     0 },
 165   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 166                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 167     0 },
 168   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 169                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 170                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 171     0 },
 172   { "power8",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 173                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 174                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
 175                 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 176     0 },
 177   { "power9",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 178                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 179                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
 180                 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 181     0 },
 182   { "ppc",     PPC_OPCODE_PPC,
 183     0 },
 184   { "ppc32",   PPC_OPCODE_PPC,
 185     0 },
 186   { "32",      PPC_OPCODE_PPC,
 187     0 },
 188   { "ppc64",   PPC_OPCODE_PPC | PPC_OPCODE_64,
 189     0 },
 190   { "64",      PPC_OPCODE_PPC | PPC_OPCODE_64,
 191     0 },
 192   { "ppc64bridge", PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE,
 193     0 },
 194   { "ppcps",   PPC_OPCODE_PPC | PPC_OPCODE_PPCPS,
 195     0 },
 196   { "pwr",     PPC_OPCODE_POWER,
 197     0 },
 198   { "pwr2",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
 199     0 },
 200   { "pwr4",    PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
 201     0 },
 202   { "pwr5",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 203                 | PPC_OPCODE_POWER5),
 204     0 },
 205   { "pwr5x",   (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 206                 | PPC_OPCODE_POWER5),
 207     0 },
 208   { "pwr6",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 209                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 210     0 },
 211   { "pwr7",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 212                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 213                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 214     0 },
 215   { "pwr8",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 216                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 217                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
 218                 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 219     0 },
 220   { "pwr9",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 221                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 222                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
 223                 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 224     0 },
 225   { "pwrx",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
 226     0 },
 227   { "raw",     PPC_OPCODE_PPC,
 228     PPC_OPCODE_RAW },
 229   { "spe",     PPC_OPCODE_PPC | PPC_OPCODE_EFS,
 230     PPC_OPCODE_SPE },
 231   { "titan",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
 232                 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
 233     0 },
 234   { "vle",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
 235                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 236                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 237                 | PPC_OPCODE_E500),
 238     PPC_OPCODE_VLE },
 239   { "vsx",     PPC_OPCODE_PPC,
 240     PPC_OPCODE_VSX },
 241   { "htm",     PPC_OPCODE_PPC,
 242     PPC_OPCODE_HTM },
 243 };
 244
 245 /* Switch between Booke and VLE dialects for interlinked dumps.  */
 246 static ppc_cpu_t
 247 get_powerpc_dialect (struct disassemble_info *info)
 248 {
 249   ppc_cpu_t dialect = 0;
 250
 251   dialect = POWERPC_DIALECT (info);
 252
 253   /* Disassemble according to the section headers flags for VLE-mode.  */
 254   if (dialect & PPC_OPCODE_VLE
 255       && info->section != NULL && info->section->owner != NULL
 256       && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour
 257       && elf_object_id (info->section->owner) == PPC32_ELF_DATA
 258       && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0)
 259     return dialect;
 260   else
 261     return dialect & ~ PPC_OPCODE_VLE;
 262 }
 263
 264 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 265
 266 ppc_cpu_t
 267 ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
 268 {
 269   unsigned int i;
 270
 271   for (i = 0; i < ARRAY_SIZE (ppc_opts); i++)
 272     if (disassembler_options_cmp (ppc_opts[i].opt, arg) == 0)
 273       {
 274         if (ppc_opts[i].sticky)
 275           {
 276             *sticky |= ppc_opts[i].sticky;
 277             if ((ppc_cpu & ~*sticky) != 0)
 278               break;
 279           }
 280         ppc_cpu = ppc_opts[i].cpu;
 281         break;
 282       }
 283   if (i >= ARRAY_SIZE (ppc_opts))
 284     return 0;
 285
 286   ppc_cpu |= *sticky;
 287   return ppc_cpu;
 288 }
 289
 290 /* Determine which set of machines to disassemble for.  */
 291
 292 static void
 293 powerpc_init_dialect (struct disassemble_info *info)
 294 {
 295   ppc_cpu_t dialect = 0;
 296   ppc_cpu_t sticky = 0;
 297   struct dis_private *priv = calloc (sizeof (*priv), 1);
 298
 299   if (priv == NULL)
 300     priv = &private;
 301
 302   switch (info->mach)
 303     {
 304     case bfd_mach_ppc_403:
 305     case bfd_mach_ppc_403gc:
 306       dialect = ppc_parse_cpu (dialect, &sticky, "403");
 307       break;
 308     case bfd_mach_ppc_405:
 309       dialect = ppc_parse_cpu (dialect, &sticky, "405");
 310       break;
 311     case bfd_mach_ppc_601:
 312       dialect = ppc_parse_cpu (dialect, &sticky, "601");
 313       break;
 314     case bfd_mach_ppc_a35:
 315     case bfd_mach_ppc_rs64ii:
 316     case bfd_mach_ppc_rs64iii:
 317       dialect = ppc_parse_cpu (dialect, &sticky, "pwr2") | PPC_OPCODE_64;
 318       break;
 319     case bfd_mach_ppc_e500:
 320       dialect = ppc_parse_cpu (dialect, &sticky, "e500");
 321       break;
 322     case bfd_mach_ppc_e500mc:
 323       dialect = ppc_parse_cpu (dialect, &sticky, "e500mc");
 324       break;
 325     case bfd_mach_ppc_e500mc64:
 326       dialect = ppc_parse_cpu (dialect, &sticky, "e500mc64");
 327       break;
 328     case bfd_mach_ppc_e5500:
 329       dialect = ppc_parse_cpu (dialect, &sticky, "e5500");
 330       break;
 331     case bfd_mach_ppc_e6500:
 332       dialect = ppc_parse_cpu (dialect, &sticky, "e6500");
 333       break;
 334     case bfd_mach_ppc_titan:
 335       dialect = ppc_parse_cpu (dialect, &sticky, "titan");
 336       break;
 337     case bfd_mach_ppc_vle:
 338       dialect = ppc_parse_cpu (dialect, &sticky, "vle");
 339       break;
 340     default:
 341       dialect = ppc_parse_cpu (dialect, &sticky, "power9") | PPC_OPCODE_ANY;
 342       break;
 343     }
 344
 345   const char *opt;
 346   FOR_EACH_DISASSEMBLER_OPTION (opt, info->disassembler_options)
 347     {
 348       ppc_cpu_t new_cpu = 0;
 349
 350       if (disassembler_options_cmp (opt, "32") == 0)
 351         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 352       else if (disassembler_options_cmp (opt, "64") == 0)
 353         dialect |= PPC_OPCODE_64;
 354       else if ((new_cpu = ppc_parse_cpu (dialect, &sticky, opt)) != 0)
 355         dialect = new_cpu;
 356       else
 357         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), opt);
 358     }
 359
 360   info->private_data = priv;
 361   POWERPC_DIALECT(info) = dialect;
 362 }
 363
 364 #define PPC_OPCD_SEGS 64
 365 static unsigned short powerpc_opcd_indices[PPC_OPCD_SEGS+1];
 366 #define VLE_OPCD_SEGS 32
 367 static unsigned short vle_opcd_indices[VLE_OPCD_SEGS+1];
 368
 369 /* Calculate opcode table indices to speed up disassembly,
 370    and init dialect.  */
 371
 372 void
 373 disassemble_init_powerpc (struct disassemble_info *info)
 374 {
 375   int i;
 376   unsigned short last;
 377
 378   if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
 379     {
 380
 381       i = powerpc_num_opcodes;
 382       while (--i >= 0)
 383         {
 384           unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
 385
 386           powerpc_opcd_indices[op] = i;
 387         }
 388
 389       last = powerpc_num_opcodes;
 390       for (i = PPC_OPCD_SEGS; i > 0; --i)
 391         {
 392           if (powerpc_opcd_indices[i] == 0)
 393             powerpc_opcd_indices[i] = last;
 394           last = powerpc_opcd_indices[i];
 395         }
 396
 397       i = vle_num_opcodes;
 398       while (--i >= 0)
 399         {
 400           unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
 401           unsigned seg = VLE_OP_TO_SEG (op);
 402
 403           vle_opcd_indices[seg] = i;
 404         }
 405
 406       last = vle_num_opcodes;
 407       for (i = VLE_OPCD_SEGS; i > 0; --i)
 408         {
 409           if (vle_opcd_indices[i] == 0)
 410             vle_opcd_indices[i] = last;
 411           last = vle_opcd_indices[i];
 412         }
 413     }
 414
 415   if (info->arch == bfd_arch_powerpc)
 416     powerpc_init_dialect (info);
 417 }
 418
 419 /* Print a big endian PowerPC instruction.  */
 420
 421 int
 422 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 423 {
 424   return print_insn_powerpc (memaddr, info, 1, get_powerpc_dialect (info));
 425 }
 426
 427 /* Print a little endian PowerPC instruction.  */
 428
 429 int
 430 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 431 {
 432   return print_insn_powerpc (memaddr, info, 0, get_powerpc_dialect (info));
 433 }
 434
 435 /* Print a POWER (RS/6000) instruction.  */
 436
 437 int
 438 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 439 {
 440   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 441 }
 442
 443 /* Extract the operand value from the PowerPC or POWER instruction.  */
 444
 445 static long
 446 operand_value_powerpc (const struct powerpc_operand *operand,
 447                        unsigned long insn, ppc_cpu_t dialect)
 448 {
 449   long value;
 450   int invalid;
 451   /* Extract the value from the instruction.  */
 452   if (operand->extract)
 453     value = (*operand->extract) (insn, dialect, &invalid);
 454   else
 455     {
 456       if (operand->shift >= 0)
 457         value = (insn >> operand->shift) & operand->bitm;
 458       else
 459         value = (insn << -operand->shift) & operand->bitm;
 460       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 461         {
 462           /* BITM is always some number of zeros followed by some
 463              number of ones, followed by some number of zeros.  */
 464           unsigned long top = operand->bitm;
 465           /* top & -top gives the rightmost 1 bit, so this
 466              fills in any trailing zeros.  */
 467           top |= (top & -top) - 1;
 468           top &= ~(top >> 1);
 469           value = (value ^ top) - top;
 470         }
 471     }
 472
 473   return value;
 474 }
 475
 476 /* Determine whether the optional operand(s) should be printed.  */
 477
 478 static int
 479 skip_optional_operands (const unsigned char *opindex,
 480                         unsigned long insn, ppc_cpu_t dialect)
 481 {
 482   const struct powerpc_operand *operand;
 483
 484   for (; *opindex != 0; opindex++)
 485     {
 486       operand = &powerpc_operands[*opindex];
 487       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 488           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 489               && operand_value_powerpc (operand, insn, dialect) !=
 490                  ppc_optional_operand_value (operand)))
 491         return 0;
 492     }
 493
 494   return 1;
 495 }
 496
 497 /* Find a match for INSN in the opcode table, given machine DIALECT.  */
 498
 499 static const struct powerpc_opcode *
 500 lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
 501 {
 502   const struct powerpc_opcode *opcode, *opcode_end, *last;
 503   unsigned long op;
 504
 505   /* Get the major opcode of the instruction.  */
 506   op = PPC_OP (insn);
 507
 508   /* Find the first match in the opcode table for this major opcode.  */
 509   opcode_end = powerpc_opcodes + powerpc_opcd_indices[op + 1];
 510   last = NULL;
 511   for (opcode = powerpc_opcodes + powerpc_opcd_indices[op];
 512        opcode < opcode_end;
 513        ++opcode)
 514     {
 515       const unsigned char *opindex;
 516       const struct powerpc_operand *operand;
 517       int invalid;
 518
 519       if ((insn & opcode->mask) != opcode->opcode
 520           || ((dialect & PPC_OPCODE_ANY) == 0
 521               && ((opcode->flags & dialect) == 0
 522                   || (opcode->deprecated & dialect) != 0)))
 523         continue;
 524
 525       /* Check validity of operands.  */
 526       invalid = 0;
 527       for (opindex = opcode->operands; *opindex != 0; opindex++)
 528         {
 529           operand = powerpc_operands + *opindex;
 530           if (operand->extract)
 531             (*operand->extract) (insn, dialect, &invalid);
 532         }
 533       if (invalid)
 534         continue;
 535
 536       if ((dialect & PPC_OPCODE_RAW) == 0)
 537         return opcode;
 538
 539       /* The raw machine insn is one that is not a specialization.  */
 540       if (last == NULL
 541           || (last->mask & ~opcode->mask) != 0)
 542         last = opcode;
 543     }
 544
 545   return last;
 546 }
 547
 548 /* Find a match for INSN in the VLE opcode table.  */
 549
 550 static const struct powerpc_opcode *
 551 lookup_vle (unsigned long insn)
 552 {
 553   const struct powerpc_opcode *opcode;
 554   const struct powerpc_opcode *opcode_end;
 555   unsigned op, seg;
 556
 557   op = PPC_OP (insn);
 558   if (op >= 0x20 && op <= 0x37)
 559     {
 560       /* This insn has a 4-bit opcode.  */
 561       op &= 0x3c;
 562     }
 563   seg = VLE_OP_TO_SEG (op);
 564
 565   /* Find the first match in the opcode table for this major opcode.  */
 566   opcode_end = vle_opcodes + vle_opcd_indices[seg + 1];
 567   for (opcode = vle_opcodes + vle_opcd_indices[seg];
 568        opcode < opcode_end;
 569        ++opcode)
 570     {
 571       unsigned long table_opcd = opcode->opcode;
 572       unsigned long table_mask = opcode->mask;
 573       bfd_boolean table_op_is_short = PPC_OP_SE_VLE(table_mask);
 574       unsigned long insn2;
 575       const unsigned char *opindex;
 576       const struct powerpc_operand *operand;
 577       int invalid;
 578
 579       insn2 = insn;
 580       if (table_op_is_short)
 581         insn2 >>= 16;
 582       if ((insn2 & table_mask) != table_opcd)
 583         continue;
 584
 585       /* Check validity of operands.  */
 586       invalid = 0;
 587       for (opindex = opcode->operands; *opindex != 0; ++opindex)
 588         {
 589           operand = powerpc_operands + *opindex;
 590           if (operand->extract)
 591             (*operand->extract) (insn, (ppc_cpu_t)0, &invalid);
 592         }
 593       if (invalid)
 594         continue;
 595
 596       return opcode;
 597     }
 598
 599   return NULL;
 600 }
 601
 602 /* Print a PowerPC or POWER instruction.  */
 603
 604 static int
 605 print_insn_powerpc (bfd_vma memaddr,
 606                     struct disassemble_info *info,
 607                     int bigendian,
 608                     ppc_cpu_t dialect)
 609 {
 610   bfd_byte buffer[4];
 611   int status;
 612   unsigned long insn;
 613   const struct powerpc_opcode *opcode;
 614   bfd_boolean insn_is_short;
 615
 616   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 617   if (status != 0)
 618     {
 619       /* The final instruction may be a 2-byte VLE insn.  */
 620       if ((dialect & PPC_OPCODE_VLE) != 0)
 621         {
 622           /* Clear buffer so unused bytes will not have garbage in them.  */
 623           buffer[0] = buffer[1] = buffer[2] = buffer[3] = 0;
 624           status = (*info->read_memory_func) (memaddr, buffer, 2, info);
 625           if (status != 0)
 626             {
 627               (*info->memory_error_func) (status, memaddr, info);
 628               return -1;
 629             }
 630         }
 631       else
 632         {
 633           (*info->memory_error_func) (status, memaddr, info);
 634           return -1;
 635         }
 636     }
 637
 638   if (bigendian)
 639     insn = bfd_getb32 (buffer);
 640   else
 641     insn = bfd_getl32 (buffer);
 642
 643   /* Get the major opcode of the insn.  */
 644   opcode = NULL;
 645   insn_is_short = FALSE;
 646   if ((dialect & PPC_OPCODE_VLE) != 0)
 647     {
 648       opcode = lookup_vle (insn);
 649       if (opcode != NULL)
 650         insn_is_short = PPC_OP_SE_VLE(opcode->mask);
 651     }
 652   if (opcode == NULL)
 653     opcode = lookup_powerpc (insn, dialect & ~PPC_OPCODE_ANY);
 654   if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
 655     opcode = lookup_powerpc (insn, dialect);
 656
 657   if (opcode != NULL)
 658     {
 659       const unsigned char *opindex;
 660       const struct powerpc_operand *operand;
 661       int need_comma;
 662       int need_paren;
 663       int skip_optional;
 664
 665       if (opcode->operands[0] != 0)
 666         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 667       else
 668         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 669
 670       if (insn_is_short)
 671         /* The operands will be fetched out of the 16-bit instruction.  */
 672         insn >>= 16;
 673
 674       /* Now extract and print the operands.  */
 675       need_comma = 0;
 676       need_paren = 0;
 677       skip_optional = -1;
 678       for (opindex = opcode->operands; *opindex != 0; opindex++)
 679         {
 680           long value;
 681
 682           operand = powerpc_operands + *opindex;
 683
 684           /* Operands that are marked FAKE are simply ignored.  We
 685              already made sure that the extract function considered
 686              the instruction to be valid.  */
 687           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 688             continue;
 689
 690           /* If all of the optional operands have the value zero,
 691              then don't print any of them.  */
 692           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 693             {
 694               if (skip_optional < 0)
 695                 skip_optional = skip_optional_operands (opindex, insn,
 696                                                         dialect);
 697               if (skip_optional)
 698                 continue;
 699             }
 700
 701           value = operand_value_powerpc (operand, insn, dialect);
 702
 703           if (need_comma)
 704             {
 705               (*info->fprintf_func) (info->stream, ",");
 706               need_comma = 0;
 707             }
 708
 709           /* Print the operand as directed by the flags.  */
 710           if ((operand->flags & PPC_OPERAND_GPR) != 0
 711               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 712             (*info->fprintf_func) (info->stream, "r%ld", value);
 713           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 714             (*info->fprintf_func) (info->stream, "f%ld", value);
 715           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 716             (*info->fprintf_func) (info->stream, "v%ld", value);
 717           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 718             (*info->fprintf_func) (info->stream, "vs%ld", value);
 719           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 720             (*info->print_address_func) (memaddr + value, info);
 721           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 722             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 723           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 724             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 725           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 726             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 727           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 728             (*info->fprintf_func) (info->stream, "%ld", value);
 729           else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
 730                    && (((dialect & PPC_OPCODE_PPC) != 0)
 731                        || ((dialect & PPC_OPCODE_VLE) != 0)))
 732             (*info->fprintf_func) (info->stream, "cr%ld", value);
 733           else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
 734                    && (((dialect & PPC_OPCODE_PPC) != 0)
 735                        || ((dialect & PPC_OPCODE_VLE) != 0)))
 736             {
 737               static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 738               int cr;
 739               int cc;
 740
 741               cr = value >> 2;
 742               if (cr != 0)
 743                 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 744               cc = value & 3;
 745               (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 746             }
 747           else
 748             (*info->fprintf_func) (info->stream, "%d", (int) value);
 749
 750           if (need_paren)
 751             {
 752               (*info->fprintf_func) (info->stream, ")");
 753               need_paren = 0;
 754             }
 755
 756           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 757             need_comma = 1;
 758           else
 759             {
 760               (*info->fprintf_func) (info->stream, "(");
 761               need_paren = 1;
 762             }
 763         }
 764
 765       /* We have found and printed an instruction.
 766          If it was a short VLE instruction we have more to do.  */
 767       if (insn_is_short)
 768         {
 769           memaddr += 2;
 770           return 2;
 771         }
 772       else
 773         /* Otherwise, return.  */
 774         return 4;
 775     }
 776
 777   /* We could not find a match.  */
 778   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 779
 780   return 4;
 781 }
 782
 783 const disasm_options_t *
 784 disassembler_options_powerpc (void)
 785 {
 786   static disasm_options_t *opts = NULL;
 787
 788   if (opts == NULL)
 789     {
 790       size_t i, num_options = ARRAY_SIZE (ppc_opts);
 791       opts = XNEW (disasm_options_t);
 792       opts->name = XNEWVEC (const char *, num_options + 1);
 793       for (i = 0; i < num_options; i++)
 794         opts->name[i] = ppc_opts[i].opt;
 795       /* The array we return must be NULL terminated.  */
 796       opts->name[i] = NULL;
 797       opts->description = NULL;
 798     }
 799
 800   return opts;
 801 }
 802
 803 void
 804 print_ppc_disassembler_options (FILE *stream)
 805 {
 806   unsigned int i, col;
 807
 808   fprintf (stream, _("\n\
 809 The following PPC specific disassembler options are supported for use with\n\
 810 the -M switch:\n"));
 811
 812   for (col = 0, i = 0; i < ARRAY_SIZE (ppc_opts); i++)
 813     {
 814       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 815       if (col > 66)
 816         {
 817           fprintf (stream, "\n");
 818           col = 0;
 819         }
 820     }
 821   fprintf (stream, "\n");
 822 }