opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright (C) 1994-2017 Free Software Foundation, Inc.
   3    Written by Ian Lance Taylor, Cygnus Support
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this file; see the file COPYING.  If not, write to the
  19    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22 #include "sysdep.h"
  23 #include <stdio.h>
  24 #include "dis-asm.h"
  25 #include "elf-bfd.h"
  26 #include "elf/ppc.h"
  27 #include "opintl.h"
  28 #include "opcode/ppc.h"
  29 #include "libiberty.h"
  30
  31 /* This file provides several disassembler functions, all of which use
  32    the disassembler interface defined in dis-asm.h.  Several functions
  33    are provided because this file handles disassembly for the PowerPC
  34    in both big and little endian mode and also for the POWER (RS/6000)
  35    chip.  */
  36 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  37                                ppc_cpu_t);
  38
  39 struct dis_private
  40 {
  41   /* Stash the result of parsing disassembler_options here.  */
  42   ppc_cpu_t dialect;
  43 } private;
  44
  45 #define POWERPC_DIALECT(INFO) \
  46   (((struct dis_private *) ((INFO)->private_data))->dialect)
  47
  48 struct ppc_mopt {
  49   /* Option string, without -m or -M prefix.  */
  50   const char *opt;
  51   /* CPU option flags.  */
  52   ppc_cpu_t cpu;
  53   /* Flags that should stay on, even when combined with another cpu
  54      option.  This should only be used for generic options like
  55      "-many" or "-maltivec" where it is reasonable to add some
  56      capability to another cpu selection.  The added flags are sticky
  57      so that, for example, "-many -me500" and "-me500 -many" result in
  58      the same assembler or disassembler behaviour.  Do not use
  59      "sticky" for specific cpus, as this will prevent that cpu's flags
  60      from overriding the defaults set in powerpc_init_dialect or a
  61      prior -m option.  */
  62   ppc_cpu_t sticky;
  63 };
  64
  65 struct ppc_mopt ppc_opts[] = {
  66   { "403",     PPC_OPCODE_PPC | PPC_OPCODE_403,
  67     0 },
  68   { "405",     PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405,
  69     0 },
  70   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  71                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  72     0 },
  73   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  74                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  75     0 },
  76   { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
  77                 | PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
  78     0 },
  79   { "601",     PPC_OPCODE_PPC | PPC_OPCODE_601,
  80     0 },
  81   { "603",     PPC_OPCODE_PPC,
  82     0 },
  83   { "604",     PPC_OPCODE_PPC,
  84     0 },
  85   { "620",     PPC_OPCODE_PPC | PPC_OPCODE_64,
  86     0 },
  87   { "7400",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  88     0 },
  89   { "7410",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  90     0 },
  91   { "7450",    PPC_OPCODE_PPC | PPC_OPCODE_7450 | PPC_OPCODE_ALTIVEC,
  92     0 },
  93   { "7455",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  94     0 },
  95   { "750cl",   PPC_OPCODE_PPC | PPC_OPCODE_750 | PPC_OPCODE_PPCPS
  96     , 0 },
  97   { "821",     PPC_OPCODE_PPC | PPC_OPCODE_860,
  98     0 },
  99   { "850",     PPC_OPCODE_PPC | PPC_OPCODE_860,
 100     0 },
 101   { "860",     PPC_OPCODE_PPC | PPC_OPCODE_860,
 102     0 },
 103   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
 104                 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
 105                 | PPC_OPCODE_A2),
 106     0 },
 107   { "altivec", PPC_OPCODE_PPC,
 108     PPC_OPCODE_ALTIVEC },
 109   { "any",     0,
 110     PPC_OPCODE_ANY },
 111   { "booke",   PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
 112     0 },
 113   { "booke32", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
 114     0 },
 115   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 116                 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
 117     0 },
 118   { "com",     PPC_OPCODE_COMMON,
 119     0 },
 120   { "e200z4",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
 121                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 122                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 123                 | PPC_OPCODE_E500 | PPC_OPCODE_VLE | PPC_OPCODE_E200Z4),
 124     0 },
 125   { "e300",    PPC_OPCODE_PPC | PPC_OPCODE_E300,
 126     0 },
 127   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 128                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 129                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 130                 | PPC_OPCODE_E500),
 131     0 },
 132   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 133                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 134                 | PPC_OPCODE_E500MC),
 135     0 },
 136   { "e500mc64",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 137                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 138                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
 139                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 140     0 },
 141   { "e5500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 142                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 143                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 144                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 145                 | PPC_OPCODE_POWER7),
 146     0 },
 147   { "e6500",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 148                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 149                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
 150                 | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
 151                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 152     0 },
 153   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 154                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 155                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 156                 | PPC_OPCODE_E500),
 157     0 },
 158   { "efs",     PPC_OPCODE_PPC | PPC_OPCODE_EFS,
 159     0 },
 160   { "power4",  PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
 161     0 },
 162   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 163                 | PPC_OPCODE_POWER5),
 164     0 },
 165   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 166                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 167     0 },
 168   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 169                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 170                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 171     0 },
 172   { "power8",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 173                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 174                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
 175                 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX),
 176     0 },
 177   { "power9",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 178                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 179                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
 180                 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
 181                 | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
 182     0 },
 183   { "ppc",     PPC_OPCODE_PPC,
 184     0 },
 185   { "ppc32",   PPC_OPCODE_PPC,
 186     0 },
 187   { "32",      PPC_OPCODE_PPC,
 188     0 },
 189   { "ppc64",   PPC_OPCODE_PPC | PPC_OPCODE_64,
 190     0 },
 191   { "64",      PPC_OPCODE_PPC | PPC_OPCODE_64,
 192     0 },
 193   { "ppc64bridge", PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE,
 194     0 },
 195   { "ppcps",   PPC_OPCODE_PPC | PPC_OPCODE_PPCPS,
 196     0 },
 197   { "pwr",     PPC_OPCODE_POWER,
 198     0 },
 199   { "pwr2",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
 200     0 },
 201   { "pwr4",    PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
 202     0 },
 203   { "pwr5",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 204                 | PPC_OPCODE_POWER5),
 205     0 },
 206   { "pwr5x",   (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 207                 | PPC_OPCODE_POWER5),
 208     0 },
 209   { "pwr6",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 210                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 211     0 },
 212   { "pwr7",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 213                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 214                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 215     0 },
 216   { "pwr8",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 217                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 218                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
 219                 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX),
 220     0 },
 221   { "pwr9",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 222                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 223                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
 224                 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
 225                 | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
 226     0 },
 227   { "pwrx",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
 228     0 },
 229   { "spe",     PPC_OPCODE_PPC | PPC_OPCODE_EFS,
 230     PPC_OPCODE_SPE },
 231   { "titan",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
 232                 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
 233     0 },
 234   { "vle",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
 235                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 236                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 237                 | PPC_OPCODE_E500),
 238     PPC_OPCODE_VLE },
 239   { "vsx",     PPC_OPCODE_PPC,
 240     PPC_OPCODE_VSX },
 241   { "htm",     PPC_OPCODE_PPC,
 242     PPC_OPCODE_HTM },
 243 };
 244
 245 /* Switch between Booke and VLE dialects for interlinked dumps.  */
 246 static ppc_cpu_t
 247 get_powerpc_dialect (struct disassemble_info *info)
 248 {
 249   ppc_cpu_t dialect = 0;
 250
 251   dialect = POWERPC_DIALECT (info);
 252
 253   /* Disassemble according to the section headers flags for VLE-mode.  */
 254   if (dialect & PPC_OPCODE_VLE
 255       && info->section != NULL && info->section->owner != NULL
 256       && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour
 257       && elf_object_id (info->section->owner) == PPC32_ELF_DATA
 258       && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0)
 259     return dialect;
 260   else
 261     return dialect & ~ PPC_OPCODE_VLE;
 262 }
 263
 264 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 265
 266 ppc_cpu_t
 267 ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
 268 {
 269   unsigned int i;
 270
 271   for (i = 0; i < ARRAY_SIZE (ppc_opts); i++)
 272     if (disassembler_options_cmp (ppc_opts[i].opt, arg) == 0)
 273       {
 274         if (ppc_opts[i].sticky)
 275           {
 276             *sticky |= ppc_opts[i].sticky;
 277             if ((ppc_cpu & ~*sticky) != 0)
 278               break;
 279           }
 280         ppc_cpu = ppc_opts[i].cpu;
 281         break;
 282       }
 283   if (i >= ARRAY_SIZE (ppc_opts))
 284     return 0;
 285
 286   ppc_cpu |= *sticky;
 287   return ppc_cpu;
 288 }
 289
 290 /* Determine which set of machines to disassemble for.  */
 291
 292 static void
 293 powerpc_init_dialect (struct disassemble_info *info)
 294 {
 295   ppc_cpu_t dialect = 0;
 296   ppc_cpu_t sticky = 0;
 297   struct dis_private *priv = calloc (sizeof (*priv), 1);
 298
 299   if (priv == NULL)
 300     priv = &private;
 301
 302   switch (info->mach)
 303     {
 304     case bfd_mach_ppc_403:
 305     case bfd_mach_ppc_403gc:
 306       dialect = ppc_parse_cpu (dialect, &sticky, "403");
 307       break;
 308     case bfd_mach_ppc_405:
 309       dialect = ppc_parse_cpu (dialect, &sticky, "405");
 310       break;
 311     case bfd_mach_ppc_601:
 312       dialect = ppc_parse_cpu (dialect, &sticky, "601");
 313       break;
 314     case bfd_mach_ppc_a35:
 315     case bfd_mach_ppc_rs64ii:
 316     case bfd_mach_ppc_rs64iii:
 317       dialect = ppc_parse_cpu (dialect, &sticky, "pwr2") | PPC_OPCODE_64;
 318       break;
 319     case bfd_mach_ppc_e500:
 320       dialect = ppc_parse_cpu (dialect, &sticky, "e500");
 321       break;
 322     case bfd_mach_ppc_e500mc:
 323       dialect = ppc_parse_cpu (dialect, &sticky, "e500mc");
 324       break;
 325     case bfd_mach_ppc_e500mc64:
 326       dialect = ppc_parse_cpu (dialect, &sticky, "e500mc64");
 327       break;
 328     case bfd_mach_ppc_e5500:
 329       dialect = ppc_parse_cpu (dialect, &sticky, "e5500");
 330       break;
 331     case bfd_mach_ppc_e6500:
 332       dialect = ppc_parse_cpu (dialect, &sticky, "e6500");
 333       break;
 334     case bfd_mach_ppc_titan:
 335       dialect = ppc_parse_cpu (dialect, &sticky, "titan");
 336       break;
 337     case bfd_mach_ppc_vle:
 338       dialect = ppc_parse_cpu (dialect, &sticky, "vle");
 339       break;
 340     default:
 341       dialect = ppc_parse_cpu (dialect, &sticky, "power9") | PPC_OPCODE_ANY;
 342       break;
 343     }
 344
 345   char *opt;
 346   FOR_EACH_DISASSEMBLER_OPTION (opt, info->disassembler_options)
 347     {
 348       ppc_cpu_t new_cpu = 0;
 349
 350       if (disassembler_options_cmp (opt, "32") == 0)
 351         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 352       else if (disassembler_options_cmp (opt, "64") == 0)
 353         dialect |= PPC_OPCODE_64;
 354       else if ((new_cpu = ppc_parse_cpu (dialect, &sticky, opt)) != 0)
 355         dialect = new_cpu;
 356       else
 357         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), opt);
 358     }
 359
 360   info->private_data = priv;
 361   POWERPC_DIALECT(info) = dialect;
 362 }
 363
 364 #define PPC_OPCD_SEGS 64
 365 static unsigned short powerpc_opcd_indices[PPC_OPCD_SEGS+1];
 366 #define VLE_OPCD_SEGS 32
 367 static unsigned short vle_opcd_indices[VLE_OPCD_SEGS+1];
 368
 369 /* Calculate opcode table indices to speed up disassembly,
 370    and init dialect.  */
 371
 372 void
 373 disassemble_init_powerpc (struct disassemble_info *info)
 374 {
 375   int i;
 376   unsigned short last;
 377
 378   if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
 379     {
 380
 381       i = powerpc_num_opcodes;
 382       while (--i >= 0)
 383         {
 384           unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
 385
 386           powerpc_opcd_indices[op] = i;
 387         }
 388
 389       last = powerpc_num_opcodes;
 390       for (i = PPC_OPCD_SEGS; i > 0; --i)
 391         {
 392           if (powerpc_opcd_indices[i] == 0)
 393             powerpc_opcd_indices[i] = last;
 394           last = powerpc_opcd_indices[i];
 395         }
 396
 397       i = vle_num_opcodes;
 398       while (--i >= 0)
 399         {
 400           unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
 401           unsigned seg = VLE_OP_TO_SEG (op);
 402
 403           vle_opcd_indices[seg] = i;
 404         }
 405
 406       last = vle_num_opcodes;
 407       for (i = VLE_OPCD_SEGS; i > 0; --i)
 408         {
 409           if (vle_opcd_indices[i] == 0)
 410             vle_opcd_indices[i] = last;
 411           last = vle_opcd_indices[i];
 412         }
 413     }
 414
 415   if (info->arch == bfd_arch_powerpc)
 416     powerpc_init_dialect (info);
 417 }
 418
 419 /* Print a big endian PowerPC instruction.  */
 420
 421 int
 422 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 423 {
 424   return print_insn_powerpc (memaddr, info, 1, get_powerpc_dialect (info));
 425 }
 426
 427 /* Print a little endian PowerPC instruction.  */
 428
 429 int
 430 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 431 {
 432   return print_insn_powerpc (memaddr, info, 0, get_powerpc_dialect (info));
 433 }
 434
 435 /* Print a POWER (RS/6000) instruction.  */
 436
 437 int
 438 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 439 {
 440   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 441 }
 442
 443 /* Extract the operand value from the PowerPC or POWER instruction.  */
 444
 445 static long
 446 operand_value_powerpc (const struct powerpc_operand *operand,
 447                        unsigned long insn, ppc_cpu_t dialect)
 448 {
 449   long value;
 450   int invalid;
 451   /* Extract the value from the instruction.  */
 452   if (operand->extract)
 453     value = (*operand->extract) (insn, dialect, &invalid);
 454   else
 455     {
 456       if (operand->shift >= 0)
 457         value = (insn >> operand->shift) & operand->bitm;
 458       else
 459         value = (insn << -operand->shift) & operand->bitm;
 460       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 461         {
 462           /* BITM is always some number of zeros followed by some
 463              number of ones, followed by some number of zeros.  */
 464           unsigned long top = operand->bitm;
 465           /* top & -top gives the rightmost 1 bit, so this
 466              fills in any trailing zeros.  */
 467           top |= (top & -top) - 1;
 468           top &= ~(top >> 1);
 469           value = (value ^ top) - top;
 470         }
 471     }
 472
 473   return value;
 474 }
 475
 476 /* Determine whether the optional operand(s) should be printed.  */
 477
 478 static int
 479 skip_optional_operands (const unsigned char *opindex,
 480                         unsigned long insn, ppc_cpu_t dialect)
 481 {
 482   const struct powerpc_operand *operand;
 483
 484   for (; *opindex != 0; opindex++)
 485     {
 486       operand = &powerpc_operands[*opindex];
 487       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 488           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 489               && operand_value_powerpc (operand, insn, dialect) !=
 490                  ppc_optional_operand_value (operand)))
 491         return 0;
 492     }
 493
 494   return 1;
 495 }
 496
 497 /* Find a match for INSN in the opcode table, given machine DIALECT.
 498    A DIALECT of -1 is special, matching all machine opcode variations.  */
 499
 500 static const struct powerpc_opcode *
 501 lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
 502 {
 503   const struct powerpc_opcode *opcode;
 504   const struct powerpc_opcode *opcode_end;
 505   unsigned long op;
 506
 507   /* Get the major opcode of the instruction.  */
 508   op = PPC_OP (insn);
 509
 510   /* Find the first match in the opcode table for this major opcode.  */
 511   opcode_end = powerpc_opcodes + powerpc_opcd_indices[op + 1];
 512   for (opcode = powerpc_opcodes + powerpc_opcd_indices[op];
 513        opcode < opcode_end;
 514        ++opcode)
 515     {
 516       const unsigned char *opindex;
 517       const struct powerpc_operand *operand;
 518       int invalid;
 519
 520       if ((insn & opcode->mask) != opcode->opcode
 521           || (dialect != (ppc_cpu_t) -1
 522               && ((opcode->flags & dialect) == 0
 523                   || (opcode->deprecated & dialect) != 0)))
 524         continue;
 525
 526       /* Check validity of operands.  */
 527       invalid = 0;
 528       for (opindex = opcode->operands; *opindex != 0; opindex++)
 529         {
 530           operand = powerpc_operands + *opindex;
 531           if (operand->extract)
 532             (*operand->extract) (insn, dialect, &invalid);
 533         }
 534       if (invalid)
 535         continue;
 536
 537       return opcode;
 538     }
 539
 540   return NULL;
 541 }
 542
 543 /* Find a match for INSN in the VLE opcode table.  */
 544
 545 static const struct powerpc_opcode *
 546 lookup_vle (unsigned long insn)
 547 {
 548   const struct powerpc_opcode *opcode;
 549   const struct powerpc_opcode *opcode_end;
 550   unsigned op, seg;
 551
 552   op = PPC_OP (insn);
 553   if (op >= 0x20 && op <= 0x37)
 554     {
 555       /* This insn has a 4-bit opcode.  */
 556       op &= 0x3c;
 557     }
 558   seg = VLE_OP_TO_SEG (op);
 559
 560   /* Find the first match in the opcode table for this major opcode.  */
 561   opcode_end = vle_opcodes + vle_opcd_indices[seg + 1];
 562   for (opcode = vle_opcodes + vle_opcd_indices[seg];
 563        opcode < opcode_end;
 564        ++opcode)
 565     {
 566       unsigned long table_opcd = opcode->opcode;
 567       unsigned long table_mask = opcode->mask;
 568       bfd_boolean table_op_is_short = PPC_OP_SE_VLE(table_mask);
 569       unsigned long insn2;
 570       const unsigned char *opindex;
 571       const struct powerpc_operand *operand;
 572       int invalid;
 573
 574       insn2 = insn;
 575       if (table_op_is_short)
 576         insn2 >>= 16;
 577       if ((insn2 & table_mask) != table_opcd)
 578         continue;
 579
 580       /* Check validity of operands.  */
 581       invalid = 0;
 582       for (opindex = opcode->operands; *opindex != 0; ++opindex)
 583         {
 584           operand = powerpc_operands + *opindex;
 585           if (operand->extract)
 586             (*operand->extract) (insn, (ppc_cpu_t)0, &invalid);
 587         }
 588       if (invalid)
 589         continue;
 590
 591       return opcode;
 592     }
 593
 594   return NULL;
 595 }
 596
 597 /* Print a PowerPC or POWER instruction.  */
 598
 599 static int
 600 print_insn_powerpc (bfd_vma memaddr,
 601                     struct disassemble_info *info,
 602                     int bigendian,
 603                     ppc_cpu_t dialect)
 604 {
 605   bfd_byte buffer[4];
 606   int status;
 607   unsigned long insn;
 608   const struct powerpc_opcode *opcode;
 609   bfd_boolean insn_is_short;
 610
 611   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 612   if (status != 0)
 613     {
 614       /* The final instruction may be a 2-byte VLE insn.  */
 615       if ((dialect & PPC_OPCODE_VLE) != 0)
 616         {
 617           /* Clear buffer so unused bytes will not have garbage in them.  */
 618           buffer[0] = buffer[1] = buffer[2] = buffer[3] = 0;
 619           status = (*info->read_memory_func) (memaddr, buffer, 2, info);
 620           if (status != 0)
 621             {
 622               (*info->memory_error_func) (status, memaddr, info);
 623               return -1;
 624             }
 625         }
 626       else
 627         {
 628           (*info->memory_error_func) (status, memaddr, info);
 629           return -1;
 630         }
 631     }
 632
 633   if (bigendian)
 634     insn = bfd_getb32 (buffer);
 635   else
 636     insn = bfd_getl32 (buffer);
 637
 638   /* Get the major opcode of the insn.  */
 639   opcode = NULL;
 640   insn_is_short = FALSE;
 641   if ((dialect & PPC_OPCODE_VLE) != 0)
 642     {
 643       opcode = lookup_vle (insn);
 644       if (opcode != NULL)
 645         insn_is_short = PPC_OP_SE_VLE(opcode->mask);
 646     }
 647   if (opcode == NULL)
 648     opcode = lookup_powerpc (insn, dialect);
 649   if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
 650     opcode = lookup_powerpc (insn, (ppc_cpu_t) -1);
 651
 652   if (opcode != NULL)
 653     {
 654       const unsigned char *opindex;
 655       const struct powerpc_operand *operand;
 656       int need_comma;
 657       int need_paren;
 658       int skip_optional;
 659
 660       if (opcode->operands[0] != 0)
 661         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 662       else
 663         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 664
 665       if (insn_is_short)
 666         /* The operands will be fetched out of the 16-bit instruction.  */
 667         insn >>= 16;
 668
 669       /* Now extract and print the operands.  */
 670       need_comma = 0;
 671       need_paren = 0;
 672       skip_optional = -1;
 673       for (opindex = opcode->operands; *opindex != 0; opindex++)
 674         {
 675           long value;
 676
 677           operand = powerpc_operands + *opindex;
 678
 679           /* Operands that are marked FAKE are simply ignored.  We
 680              already made sure that the extract function considered
 681              the instruction to be valid.  */
 682           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 683             continue;
 684
 685           /* If all of the optional operands have the value zero,
 686              then don't print any of them.  */
 687           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 688             {
 689               if (skip_optional < 0)
 690                 skip_optional = skip_optional_operands (opindex, insn,
 691                                                         dialect);
 692               if (skip_optional)
 693                 continue;
 694             }
 695
 696           value = operand_value_powerpc (operand, insn, dialect);
 697
 698           if (need_comma)
 699             {
 700               (*info->fprintf_func) (info->stream, ",");
 701               need_comma = 0;
 702             }
 703
 704           /* Print the operand as directed by the flags.  */
 705           if ((operand->flags & PPC_OPERAND_GPR) != 0
 706               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 707             (*info->fprintf_func) (info->stream, "r%ld", value);
 708           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 709             (*info->fprintf_func) (info->stream, "f%ld", value);
 710           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 711             (*info->fprintf_func) (info->stream, "v%ld", value);
 712           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 713             (*info->fprintf_func) (info->stream, "vs%ld", value);
 714           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 715             (*info->print_address_func) (memaddr + value, info);
 716           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 717             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 718           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 719             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 720           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 721             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 722           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 723             (*info->fprintf_func) (info->stream, "%ld", value);
 724           else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
 725                    && (((dialect & PPC_OPCODE_PPC) != 0)
 726                        || ((dialect & PPC_OPCODE_VLE) != 0)))
 727             (*info->fprintf_func) (info->stream, "cr%ld", value);
 728           else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
 729                    && (((dialect & PPC_OPCODE_PPC) != 0)
 730                        || ((dialect & PPC_OPCODE_VLE) != 0)))
 731             {
 732               static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 733               int cr;
 734               int cc;
 735
 736               cr = value >> 2;
 737               if (cr != 0)
 738                 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 739               cc = value & 3;
 740               (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 741             }
 742           else
 743             (*info->fprintf_func) (info->stream, "%d", (int) value);
 744
 745           if (need_paren)
 746             {
 747               (*info->fprintf_func) (info->stream, ")");
 748               need_paren = 0;
 749             }
 750
 751           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 752             need_comma = 1;
 753           else
 754             {
 755               (*info->fprintf_func) (info->stream, "(");
 756               need_paren = 1;
 757             }
 758         }
 759
 760       /* We have found and printed an instruction.
 761          If it was a short VLE instruction we have more to do.  */
 762       if (insn_is_short)
 763         {
 764           memaddr += 2;
 765           return 2;
 766         }
 767       else
 768         /* Otherwise, return.  */
 769         return 4;
 770     }
 771
 772   /* We could not find a match.  */
 773   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 774
 775   return 4;
 776 }
 777
 778 const disasm_options_t *
 779 disassembler_options_powerpc (void)
 780 {
 781   static disasm_options_t *opts = NULL;
 782
 783   if (opts == NULL)
 784     {
 785       size_t i, num_options = ARRAY_SIZE (ppc_opts);
 786       opts = XNEW (disasm_options_t);
 787       opts->name = XNEWVEC (const char *, num_options + 1);
 788       for (i = 0; i < num_options; i++)
 789         opts->name[i] = ppc_opts[i].opt;
 790       /* The array we return must be NULL terminated.  */
 791       opts->name[i] = NULL;
 792       opts->description = NULL;
 793     }
 794
 795   return opts;
 796 }
 797
 798 void
 799 print_ppc_disassembler_options (FILE *stream)
 800 {
 801   unsigned int i, col;
 802
 803   fprintf (stream, _("\n\
 804 The following PPC specific disassembler options are supported for use with\n\
 805 the -M switch:\n"));
 806
 807   for (col = 0, i = 0; i < ARRAY_SIZE (ppc_opts); i++)
 808     {
 809       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 810       if (col > 66)
 811         {
 812           fprintf (stream, "\n");
 813           col = 0;
 814         }
 815     }
 816   fprintf (stream, "\n");
 817 }