opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   3    2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include <stdio.h>
  24 #include "sysdep.h"
  25 #include "dis-asm.h"
  26 #include "opintl.h"
  27 #include "opcode/ppc.h"
  28
  29 /* This file provides several disassembler functions, all of which use
  30    the disassembler interface defined in dis-asm.h.  Several functions
  31    are provided because this file handles disassembly for the PowerPC
  32    in both big and little endian mode and also for the POWER (RS/6000)
  33    chip.  */
  34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  35                                ppc_cpu_t);
  36
  37 struct dis_private
  38 {
  39   /* Stash the result of parsing disassembler_options here.  */
  40   ppc_cpu_t dialect;
  41 } private;
  42
  43 #define POWERPC_DIALECT(INFO) \
  44   (((struct dis_private *) ((INFO)->private_data))->dialect)
  45
  46 struct ppc_mopt {
  47   const char *opt;
  48   ppc_cpu_t cpu;
  49   ppc_cpu_t sticky;
  50 };
  51
  52 struct ppc_mopt ppc_opts[] = {
  53   { "403",     (PPC_OPCODE_PPC | PPC_OPCODE_403),
  54     0 },
  55   { "405",     (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405),
  56     0 },
  57   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  58                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  59     0 },
  60   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  61                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  62     0 },
  63   { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
  64                 | PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
  65     0 },
  66   { "601",     (PPC_OPCODE_PPC | PPC_OPCODE_601),
  67     0 },
  68   { "603",     (PPC_OPCODE_PPC),
  69     0 },
  70   { "604",     (PPC_OPCODE_PPC),
  71     0 },
  72   { "620",     (PPC_OPCODE_PPC | PPC_OPCODE_64),
  73     0 },
  74   { "7400",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  75     0 },
  76   { "7410",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  77     0 },
  78   { "7450",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  79     0 },
  80   { "7455",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  81     0 },
  82   { "750cl",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
  83     , 0 },
  84   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
  85                 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
  86                 | PPC_OPCODE_A2),
  87     0 },
  88   { "altivec", (PPC_OPCODE_PPC),
  89     PPC_OPCODE_ALTIVEC },
  90   { "any",     0,
  91     PPC_OPCODE_ANY },
  92   { "booke",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
  93     0 },
  94   { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
  95     0 },
  96   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
  97                 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
  98     0 },
  99   { "com",     (PPC_OPCODE_COMMON),
 100     0 },
 101   { "e300",    (PPC_OPCODE_PPC | PPC_OPCODE_E300),
 102     0 },
 103   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 104                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 105                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 106                 | PPC_OPCODE_E500),
 107     0 },
 108   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 109                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 110                 | PPC_OPCODE_E500MC),
 111     0 },
 112   { "e500mc64",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 113                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 114                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
 115                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 116     0 },
 117   { "e5500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 118                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 119                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 120                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 121                 | PPC_OPCODE_POWER7),
 122     0 },
 123   { "e6500",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 124                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 125                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
 126                 | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
 127                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 128     0 },
 129   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 130                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 131                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 132                 | PPC_OPCODE_E500),
 133     0 },
 134   { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 135     0 },
 136   { "power4",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
 137     0 },
 138   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 139                 | PPC_OPCODE_POWER5),
 140     0 },
 141   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 142                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 143     0 },
 144   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 145                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 146                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 147     0 },
 148   { "ppc",     (PPC_OPCODE_PPC),
 149     0 },
 150   { "ppc32",   (PPC_OPCODE_PPC),
 151     0 },
 152   { "ppc64",   (PPC_OPCODE_PPC | PPC_OPCODE_64),
 153     0 },
 154   { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE),
 155     0 },
 156   { "ppcps",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
 157     0 },
 158   { "pwr",     (PPC_OPCODE_POWER),
 159     0 },
 160   { "pwr2",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
 161     0 },
 162   { "pwr4",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
 163     0 },
 164   { "pwr5",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 165                 | PPC_OPCODE_POWER5),
 166     0 },
 167   { "pwr5x",   (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 168                 | PPC_OPCODE_POWER5),
 169     0 },
 170   { "pwr6",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 171                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 172     0 },
 173   { "pwr7",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 174                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 175                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 176     0 },
 177   { "pwrx",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
 178     0 },
 179   { "spe",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 180     PPC_OPCODE_SPE },
 181   { "titan",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
 182                 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
 183     0 },
 184   { "vsx",     (PPC_OPCODE_PPC),
 185     PPC_OPCODE_VSX },
 186 };
 187
 188 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 189
 190 ppc_cpu_t
 191 ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
 192 {
 193   /* Sticky bits.  */
 194   ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 195                                       | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
 196   unsigned int i;
 197
 198   for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 199     if (strcmp (ppc_opts[i].opt, arg) == 0)
 200       {
 201         if (ppc_opts[i].sticky)
 202           {
 203             retain_flags |= ppc_opts[i].sticky;
 204             if ((ppc_cpu & ~(ppc_cpu_t) (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 205                                          | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
 206               break;
 207           }
 208         ppc_cpu = ppc_opts[i].cpu;
 209         break;
 210       }
 211   if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
 212     return 0;
 213
 214   ppc_cpu |= retain_flags;
 215   return ppc_cpu;
 216 }
 217
 218 /* Determine which set of machines to disassemble for.  */
 219
 220 static void
 221 powerpc_init_dialect (struct disassemble_info *info)
 222 {
 223   ppc_cpu_t dialect = 0;
 224   char *arg;
 225   struct dis_private *priv = calloc (sizeof (*priv), 1);
 226
 227   if (priv == NULL)
 228     priv = &private;
 229
 230   arg = info->disassembler_options;
 231   while (arg != NULL)
 232     {
 233       ppc_cpu_t new_cpu = 0;
 234       char *end = strchr (arg, ',');
 235
 236       if (end != NULL)
 237         *end = 0;
 238
 239       if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
 240         dialect = new_cpu;
 241       else if (strcmp (arg, "32") == 0)
 242         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 243       else if (strcmp (arg, "64") == 0)
 244         dialect |= PPC_OPCODE_64;
 245       else
 246         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
 247
 248       if (end != NULL)
 249         *end++ = ',';
 250       arg = end;
 251     }
 252
 253   if ((dialect & ~(ppc_cpu_t) PPC_OPCODE_64) == 0)
 254     {
 255       if (info->mach == bfd_mach_ppc64)
 256         dialect |= PPC_OPCODE_64;
 257       else
 258         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 259       /* Choose a reasonable default.  */
 260       dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
 261                   | PPC_OPCODE_ALTIVEC);
 262     }
 263
 264   info->private_data = priv;
 265   POWERPC_DIALECT(info) = dialect;
 266 }
 267
 268 static unsigned short powerpc_opcd_indices[65];
 269
 270 /* Calculate opcode table indices to speed up disassembly,
 271    and init dialect.  */
 272
 273 void
 274 disassemble_init_powerpc (struct disassemble_info *info)
 275 {
 276   int i;
 277   unsigned short last;
 278
 279   i = powerpc_num_opcodes;
 280   while (--i >= 0)
 281     {
 282       unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
 283
 284       powerpc_opcd_indices[op] = i;
 285     }
 286
 287   last = powerpc_num_opcodes;
 288   for (i = 64; i > 0; --i)
 289     {
 290       if (powerpc_opcd_indices[i] == 0)
 291         powerpc_opcd_indices[i] = last;
 292       last = powerpc_opcd_indices[i];
 293     }
 294
 295   if (info->arch == bfd_arch_powerpc)
 296     powerpc_init_dialect (info);
 297 }
 298
 299 /* Print a big endian PowerPC instruction.  */
 300
 301 int
 302 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 303 {
 304   return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
 305 }
 306
 307 /* Print a little endian PowerPC instruction.  */
 308
 309 int
 310 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 311 {
 312   return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
 313 }
 314
 315 /* Print a POWER (RS/6000) instruction.  */
 316
 317 int
 318 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 319 {
 320   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 321 }
 322
 323 /* Extract the operand value from the PowerPC or POWER instruction.  */
 324
 325 static long
 326 operand_value_powerpc (const struct powerpc_operand *operand,
 327                        unsigned long insn, ppc_cpu_t dialect)
 328 {
 329   long value;
 330   int invalid;
 331   /* Extract the value from the instruction.  */
 332   if (operand->extract)
 333     value = (*operand->extract) (insn, dialect, &invalid);
 334   else
 335     {
 336       value = (insn >> operand->shift) & operand->bitm;
 337       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 338         {
 339           /* BITM is always some number of zeros followed by some
 340              number of ones, followed by some numer of zeros.  */
 341           unsigned long top = operand->bitm;
 342           /* top & -top gives the rightmost 1 bit, so this
 343              fills in any trailing zeros.  */
 344           top |= (top & -top) - 1;
 345           top &= ~(top >> 1);
 346           value = (value ^ top) - top;
 347         }
 348     }
 349
 350   return value;
 351 }
 352
 353 /* Determine whether the optional operand(s) should be printed.  */
 354
 355 static int
 356 skip_optional_operands (const unsigned char *opindex,
 357                         unsigned long insn, ppc_cpu_t dialect)
 358 {
 359   const struct powerpc_operand *operand;
 360
 361   for (; *opindex != 0; opindex++)
 362     {
 363       operand = &powerpc_operands[*opindex];
 364       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 365           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 366               && operand_value_powerpc (operand, insn, dialect) != 0))
 367         return 0;
 368     }
 369
 370   return 1;
 371 }
 372
 373 /* Find a match for INSN in the opcode table, given machine DIALECT.
 374    A DIALECT of -1 is special, matching all machine opcode variations.  */
 375
 376 static const struct powerpc_opcode *
 377 lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
 378 {
 379   const struct powerpc_opcode *opcode;
 380   const struct powerpc_opcode *opcode_end;
 381   unsigned long op;
 382
 383   /* Get the major opcode of the instruction.  */
 384   op = PPC_OP (insn);
 385
 386   /* Find the first match in the opcode table for this major opcode.  */
 387   opcode_end = powerpc_opcodes + powerpc_opcd_indices[op + 1];
 388   for (opcode = powerpc_opcodes + powerpc_opcd_indices[op];
 389        opcode < opcode_end;
 390        ++opcode)
 391     {
 392       const unsigned char *opindex;
 393       const struct powerpc_operand *operand;
 394       int invalid;
 395
 396       if ((insn & opcode->mask) != opcode->opcode
 397           || (dialect != (ppc_cpu_t) -1
 398               && ((opcode->flags & dialect) == 0
 399                   || (opcode->deprecated & dialect) != 0)))
 400         continue;
 401
 402       /* Check validity of operands.  */
 403       invalid = 0;
 404       for (opindex = opcode->operands; *opindex != 0; opindex++)
 405         {
 406           operand = powerpc_operands + *opindex;
 407           if (operand->extract)
 408             (*operand->extract) (insn, dialect, &invalid);
 409         }
 410       if (invalid)
 411         continue;
 412
 413       return opcode;
 414     }
 415
 416   return NULL;
 417 }
 418
 419 /* Print a PowerPC or POWER instruction.  */
 420
 421 static int
 422 print_insn_powerpc (bfd_vma memaddr,
 423                     struct disassemble_info *info,
 424                     int bigendian,
 425                     ppc_cpu_t dialect)
 426 {
 427   bfd_byte buffer[4];
 428   int status;
 429   unsigned long insn;
 430   const struct powerpc_opcode *opcode;
 431
 432   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 433   if (status != 0)
 434     {
 435       (*info->memory_error_func) (status, memaddr, info);
 436       return -1;
 437     }
 438
 439   if (bigendian)
 440     insn = bfd_getb32 (buffer);
 441   else
 442     insn = bfd_getl32 (buffer);
 443
 444   opcode = lookup_powerpc (insn, dialect);
 445   if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
 446     opcode = lookup_powerpc (insn, (ppc_cpu_t) -1);
 447
 448   if (opcode != NULL)
 449     {
 450       const unsigned char *opindex;
 451       const struct powerpc_operand *operand;
 452       int need_comma;
 453       int need_paren;
 454       int skip_optional;
 455
 456       if (opcode->operands[0] != 0)
 457         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 458       else
 459         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 460
 461       /* Now extract and print the operands.  */
 462       need_comma = 0;
 463       need_paren = 0;
 464       skip_optional = -1;
 465       for (opindex = opcode->operands; *opindex != 0; opindex++)
 466         {
 467           long value;
 468
 469           operand = powerpc_operands + *opindex;
 470
 471           /* Operands that are marked FAKE are simply ignored.  We
 472              already made sure that the extract function considered
 473              the instruction to be valid.  */
 474           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 475             continue;
 476
 477           /* If all of the optional operands have the value zero,
 478              then don't print any of them.  */
 479           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 480             {
 481               if (skip_optional < 0)
 482                 skip_optional = skip_optional_operands (opindex, insn,
 483                                                         dialect);
 484               if (skip_optional)
 485                 continue;
 486             }
 487
 488           value = operand_value_powerpc (operand, insn, dialect);
 489
 490           if (need_comma)
 491             {
 492               (*info->fprintf_func) (info->stream, ",");
 493               need_comma = 0;
 494             }
 495
 496           /* Print the operand as directed by the flags.  */
 497           if ((operand->flags & PPC_OPERAND_GPR) != 0
 498               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 499             (*info->fprintf_func) (info->stream, "r%ld", value);
 500           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 501             (*info->fprintf_func) (info->stream, "f%ld", value);
 502           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 503             (*info->fprintf_func) (info->stream, "v%ld", value);
 504           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 505             (*info->fprintf_func) (info->stream, "vs%ld", value);
 506           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 507             (*info->print_address_func) (memaddr + value, info);
 508           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 509             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 510           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 511             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 512           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 513             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 514           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 515             (*info->fprintf_func) (info->stream, "%ld", value);
 516           else if ((operand->flags & PPC_OPERAND_CR) != 0
 517                    && (dialect & PPC_OPCODE_PPC) != 0)
 518             {
 519               if (operand->bitm == 7)
 520                 (*info->fprintf_func) (info->stream, "cr%ld", value);
 521               else
 522                 {
 523                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 524                   int cr;
 525                   int cc;
 526
 527                   cr = value >> 2;
 528                   if (cr != 0)
 529                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 530                   cc = value & 3;
 531                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 532                 }
 533             }
 534           else
 535             (*info->fprintf_func) (info->stream, "%ld", value);
 536
 537           if (need_paren)
 538             {
 539               (*info->fprintf_func) (info->stream, ")");
 540               need_paren = 0;
 541             }
 542
 543           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 544             need_comma = 1;
 545           else
 546             {
 547               (*info->fprintf_func) (info->stream, "(");
 548               need_paren = 1;
 549             }
 550         }
 551
 552       /* We have found and printed an instruction; return.  */
 553       return 4;
 554     }
 555
 556   /* We could not find a match.  */
 557   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 558
 559   return 4;
 560 }
 561
 562 void
 563 print_ppc_disassembler_options (FILE *stream)
 564 {
 565   unsigned int i, col;
 566
 567   fprintf (stream, _("\n\
 568 The following PPC specific disassembler options are supported for use with\n\
 569 the -M switch:\n"));
 570
 571   for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 572     {
 573       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 574       if (col > 66)
 575         {
 576           fprintf (stream, "\n");
 577           col = 0;
 578         }
 579     }
 580   fprintf (stream, " 32, 64\n");
 581 }