opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright (C) 1994-2017 Free Software Foundation, Inc.
   3    Written by Ian Lance Taylor, Cygnus Support
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this file; see the file COPYING.  If not, write to the
  19    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22 #include "sysdep.h"
  23 #include <stdio.h>
  24 #include "dis-asm.h"
  25 #include "elf-bfd.h"
  26 #include "elf/ppc.h"
  27 #include "opintl.h"
  28 #include "opcode/ppc.h"
  29 #include "libiberty.h"
  30
  31 /* This file provides several disassembler functions, all of which use
  32    the disassembler interface defined in dis-asm.h.  Several functions
  33    are provided because this file handles disassembly for the PowerPC
  34    in both big and little endian mode and also for the POWER (RS/6000)
  35    chip.  */
  36 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  37                                ppc_cpu_t);
  38
  39 struct dis_private
  40 {
  41   /* Stash the result of parsing disassembler_options here.  */
  42   ppc_cpu_t dialect;
  43 } private;
  44
  45 #define POWERPC_DIALECT(INFO) \
  46   (((struct dis_private *) ((INFO)->private_data))->dialect)
  47
  48 struct ppc_mopt {
  49   /* Option string, without -m or -M prefix.  */
  50   const char *opt;
  51   /* CPU option flags.  */
  52   ppc_cpu_t cpu;
  53   /* Flags that should stay on, even when combined with another cpu
  54      option.  This should only be used for generic options like
  55      "-many" or "-maltivec" where it is reasonable to add some
  56      capability to another cpu selection.  The added flags are sticky
  57      so that, for example, "-many -me500" and "-me500 -many" result in
  58      the same assembler or disassembler behaviour.  Do not use
  59      "sticky" for specific cpus, as this will prevent that cpu's flags
  60      from overriding the defaults set in powerpc_init_dialect or a
  61      prior -m option.  */
  62   ppc_cpu_t sticky;
  63 };
  64
  65 struct ppc_mopt ppc_opts[] = {
  66   { "403",     PPC_OPCODE_PPC | PPC_OPCODE_403,
  67     0 },
  68   { "405",     PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405,
  69     0 },
  70   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  71                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  72     0 },
  73   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  74                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  75     0 },
  76   { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
  77                 | PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
  78     0 },
  79   { "601",     PPC_OPCODE_PPC | PPC_OPCODE_601,
  80     0 },
  81   { "603",     PPC_OPCODE_PPC,
  82     0 },
  83   { "604",     PPC_OPCODE_PPC,
  84     0 },
  85   { "620",     PPC_OPCODE_PPC | PPC_OPCODE_64,
  86     0 },
  87   { "7400",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  88     0 },
  89   { "7410",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  90     0 },
  91   { "7450",    PPC_OPCODE_PPC | PPC_OPCODE_7450 | PPC_OPCODE_ALTIVEC,
  92     0 },
  93   { "7455",    PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC,
  94     0 },
  95   { "750cl",   PPC_OPCODE_PPC | PPC_OPCODE_750 | PPC_OPCODE_PPCPS
  96     , 0 },
  97   { "821",     PPC_OPCODE_PPC | PPC_OPCODE_860,
  98     0 },
  99   { "850",     PPC_OPCODE_PPC | PPC_OPCODE_860,
 100     0 },
 101   { "860",     PPC_OPCODE_PPC | PPC_OPCODE_860,
 102     0 },
 103   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
 104                 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
 105                 | PPC_OPCODE_A2),
 106     0 },
 107   { "altivec", PPC_OPCODE_PPC,
 108     PPC_OPCODE_ALTIVEC },
 109   { "any",     PPC_OPCODE_PPC,
 110     PPC_OPCODE_ANY },
 111   { "booke",   PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
 112     0 },
 113   { "booke32", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE,
 114     0 },
 115   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 116                 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
 117     0 },
 118   { "com",     PPC_OPCODE_COMMON,
 119     0 },
 120   { "e200z4",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
 121                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 122                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 123                 | PPC_OPCODE_E500 | PPC_OPCODE_VLE | PPC_OPCODE_E200Z4),
 124     0 },
 125   { "e300",    PPC_OPCODE_PPC | PPC_OPCODE_E300,
 126     0 },
 127   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 128                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 129                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 130                 | PPC_OPCODE_E500),
 131     0 },
 132   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 133                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 134                 | PPC_OPCODE_E500MC),
 135     0 },
 136   { "e500mc64",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 137                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 138                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
 139                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 140     0 },
 141   { "e5500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 142                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 143                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 144                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 145                 | PPC_OPCODE_POWER7),
 146     0 },
 147   { "e6500",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 148                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 149                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
 150                 | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
 151                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 152     0 },
 153   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 154                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 155                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 156                 | PPC_OPCODE_E500),
 157     0 },
 158   { "efs",     PPC_OPCODE_PPC | PPC_OPCODE_EFS,
 159     0 },
 160   { "power4",  PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
 161     0 },
 162   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 163                 | PPC_OPCODE_POWER5),
 164     0 },
 165   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 166                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 167     0 },
 168   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 169                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 170                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 171     0 },
 172   { "power8",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 173                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 174                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
 175                 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX),
 176     0 },
 177   { "power9",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 178                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 179                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
 180                 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
 181                 | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
 182     0 },
 183   { "ppc",     PPC_OPCODE_PPC,
 184     0 },
 185   { "ppc32",   PPC_OPCODE_PPC,
 186     0 },
 187   { "32",      PPC_OPCODE_PPC,
 188     0 },
 189   { "ppc64",   PPC_OPCODE_PPC | PPC_OPCODE_64,
 190     0 },
 191   { "64",      PPC_OPCODE_PPC | PPC_OPCODE_64,
 192     0 },
 193   { "ppc64bridge", PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE,
 194     0 },
 195   { "ppcps",   PPC_OPCODE_PPC | PPC_OPCODE_PPCPS,
 196     0 },
 197   { "pwr",     PPC_OPCODE_POWER,
 198     0 },
 199   { "pwr2",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
 200     0 },
 201   { "pwr4",    PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4,
 202     0 },
 203   { "pwr5",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 204                 | PPC_OPCODE_POWER5),
 205     0 },
 206   { "pwr5x",   (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 207                 | PPC_OPCODE_POWER5),
 208     0 },
 209   { "pwr6",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 210                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 211     0 },
 212   { "pwr7",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 213                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 214                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 215     0 },
 216   { "pwr8",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 217                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 218                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
 219                 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX),
 220     0 },
 221   { "pwr9",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 222                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 223                 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
 224                 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
 225                 | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
 226     0 },
 227   { "pwrx",    PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
 228     0 },
 229   { "raw",     PPC_OPCODE_PPC,
 230     PPC_OPCODE_RAW },
 231   { "spe",     PPC_OPCODE_PPC | PPC_OPCODE_EFS,
 232     PPC_OPCODE_SPE },
 233   { "titan",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
 234                 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
 235     0 },
 236   { "vle",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE
 237                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 238                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 239                 | PPC_OPCODE_E500),
 240     PPC_OPCODE_VLE },
 241   { "vsx",     PPC_OPCODE_PPC,
 242     PPC_OPCODE_VSX },
 243   { "htm",     PPC_OPCODE_PPC,
 244     PPC_OPCODE_HTM },
 245 };
 246
 247 /* Switch between Booke and VLE dialects for interlinked dumps.  */
 248 static ppc_cpu_t
 249 get_powerpc_dialect (struct disassemble_info *info)
 250 {
 251   ppc_cpu_t dialect = 0;
 252
 253   dialect = POWERPC_DIALECT (info);
 254
 255   /* Disassemble according to the section headers flags for VLE-mode.  */
 256   if (dialect & PPC_OPCODE_VLE
 257       && info->section != NULL && info->section->owner != NULL
 258       && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour
 259       && elf_object_id (info->section->owner) == PPC32_ELF_DATA
 260       && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0)
 261     return dialect;
 262   else
 263     return dialect & ~ PPC_OPCODE_VLE;
 264 }
 265
 266 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 267
 268 ppc_cpu_t
 269 ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
 270 {
 271   unsigned int i;
 272
 273   for (i = 0; i < ARRAY_SIZE (ppc_opts); i++)
 274     if (disassembler_options_cmp (ppc_opts[i].opt, arg) == 0)
 275       {
 276         if (ppc_opts[i].sticky)
 277           {
 278             *sticky |= ppc_opts[i].sticky;
 279             if ((ppc_cpu & ~*sticky) != 0)
 280               break;
 281           }
 282         ppc_cpu = ppc_opts[i].cpu;
 283         break;
 284       }
 285   if (i >= ARRAY_SIZE (ppc_opts))
 286     return 0;
 287
 288   ppc_cpu |= *sticky;
 289   return ppc_cpu;
 290 }
 291
 292 /* Determine which set of machines to disassemble for.  */
 293
 294 static void
 295 powerpc_init_dialect (struct disassemble_info *info)
 296 {
 297   ppc_cpu_t dialect = 0;
 298   ppc_cpu_t sticky = 0;
 299   struct dis_private *priv = calloc (sizeof (*priv), 1);
 300
 301   if (priv == NULL)
 302     priv = &private;
 303
 304   switch (info->mach)
 305     {
 306     case bfd_mach_ppc_403:
 307     case bfd_mach_ppc_403gc:
 308       dialect = ppc_parse_cpu (dialect, &sticky, "403");
 309       break;
 310     case bfd_mach_ppc_405:
 311       dialect = ppc_parse_cpu (dialect, &sticky, "405");
 312       break;
 313     case bfd_mach_ppc_601:
 314       dialect = ppc_parse_cpu (dialect, &sticky, "601");
 315       break;
 316     case bfd_mach_ppc_a35:
 317     case bfd_mach_ppc_rs64ii:
 318     case bfd_mach_ppc_rs64iii:
 319       dialect = ppc_parse_cpu (dialect, &sticky, "pwr2") | PPC_OPCODE_64;
 320       break;
 321     case bfd_mach_ppc_e500:
 322       dialect = ppc_parse_cpu (dialect, &sticky, "e500");
 323       break;
 324     case bfd_mach_ppc_e500mc:
 325       dialect = ppc_parse_cpu (dialect, &sticky, "e500mc");
 326       break;
 327     case bfd_mach_ppc_e500mc64:
 328       dialect = ppc_parse_cpu (dialect, &sticky, "e500mc64");
 329       break;
 330     case bfd_mach_ppc_e5500:
 331       dialect = ppc_parse_cpu (dialect, &sticky, "e5500");
 332       break;
 333     case bfd_mach_ppc_e6500:
 334       dialect = ppc_parse_cpu (dialect, &sticky, "e6500");
 335       break;
 336     case bfd_mach_ppc_titan:
 337       dialect = ppc_parse_cpu (dialect, &sticky, "titan");
 338       break;
 339     case bfd_mach_ppc_vle:
 340       dialect = ppc_parse_cpu (dialect, &sticky, "vle");
 341       break;
 342     default:
 343       dialect = ppc_parse_cpu (dialect, &sticky, "power9") | PPC_OPCODE_ANY;
 344       break;
 345     }
 346
 347   const char *opt;
 348   FOR_EACH_DISASSEMBLER_OPTION (opt, info->disassembler_options)
 349     {
 350       ppc_cpu_t new_cpu = 0;
 351
 352       if (disassembler_options_cmp (opt, "32") == 0)
 353         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 354       else if (disassembler_options_cmp (opt, "64") == 0)
 355         dialect |= PPC_OPCODE_64;
 356       else if ((new_cpu = ppc_parse_cpu (dialect, &sticky, opt)) != 0)
 357         dialect = new_cpu;
 358       else
 359         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), opt);
 360     }
 361
 362   info->private_data = priv;
 363   POWERPC_DIALECT(info) = dialect;
 364 }
 365
 366 #define PPC_OPCD_SEGS 64
 367 static unsigned short powerpc_opcd_indices[PPC_OPCD_SEGS+1];
 368 #define VLE_OPCD_SEGS 32
 369 static unsigned short vle_opcd_indices[VLE_OPCD_SEGS+1];
 370
 371 /* Calculate opcode table indices to speed up disassembly,
 372    and init dialect.  */
 373
 374 void
 375 disassemble_init_powerpc (struct disassemble_info *info)
 376 {
 377   int i;
 378   unsigned short last;
 379
 380   if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
 381     {
 382
 383       i = powerpc_num_opcodes;
 384       while (--i >= 0)
 385         {
 386           unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
 387
 388           powerpc_opcd_indices[op] = i;
 389         }
 390
 391       last = powerpc_num_opcodes;
 392       for (i = PPC_OPCD_SEGS; i > 0; --i)
 393         {
 394           if (powerpc_opcd_indices[i] == 0)
 395             powerpc_opcd_indices[i] = last;
 396           last = powerpc_opcd_indices[i];
 397         }
 398
 399       i = vle_num_opcodes;
 400       while (--i >= 0)
 401         {
 402           unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
 403           unsigned seg = VLE_OP_TO_SEG (op);
 404
 405           vle_opcd_indices[seg] = i;
 406         }
 407
 408       last = vle_num_opcodes;
 409       for (i = VLE_OPCD_SEGS; i > 0; --i)
 410         {
 411           if (vle_opcd_indices[i] == 0)
 412             vle_opcd_indices[i] = last;
 413           last = vle_opcd_indices[i];
 414         }
 415     }
 416
 417   if (info->arch == bfd_arch_powerpc)
 418     powerpc_init_dialect (info);
 419 }
 420
 421 /* Print a big endian PowerPC instruction.  */
 422
 423 int
 424 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 425 {
 426   return print_insn_powerpc (memaddr, info, 1, get_powerpc_dialect (info));
 427 }
 428
 429 /* Print a little endian PowerPC instruction.  */
 430
 431 int
 432 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 433 {
 434   return print_insn_powerpc (memaddr, info, 0, get_powerpc_dialect (info));
 435 }
 436
 437 /* Print a POWER (RS/6000) instruction.  */
 438
 439 int
 440 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 441 {
 442   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 443 }
 444
 445 /* Extract the operand value from the PowerPC or POWER instruction.  */
 446
 447 static long
 448 operand_value_powerpc (const struct powerpc_operand *operand,
 449                        unsigned long insn, ppc_cpu_t dialect)
 450 {
 451   long value;
 452   int invalid;
 453   /* Extract the value from the instruction.  */
 454   if (operand->extract)
 455     value = (*operand->extract) (insn, dialect, &invalid);
 456   else
 457     {
 458       if (operand->shift >= 0)
 459         value = (insn >> operand->shift) & operand->bitm;
 460       else
 461         value = (insn << -operand->shift) & operand->bitm;
 462       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 463         {
 464           /* BITM is always some number of zeros followed by some
 465              number of ones, followed by some number of zeros.  */
 466           unsigned long top = operand->bitm;
 467           /* top & -top gives the rightmost 1 bit, so this
 468              fills in any trailing zeros.  */
 469           top |= (top & -top) - 1;
 470           top &= ~(top >> 1);
 471           value = (value ^ top) - top;
 472         }
 473     }
 474
 475   return value;
 476 }
 477
 478 /* Determine whether the optional operand(s) should be printed.  */
 479
 480 static int
 481 skip_optional_operands (const unsigned char *opindex,
 482                         unsigned long insn, ppc_cpu_t dialect)
 483 {
 484   const struct powerpc_operand *operand;
 485
 486   for (; *opindex != 0; opindex++)
 487     {
 488       operand = &powerpc_operands[*opindex];
 489       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 490           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 491               && operand_value_powerpc (operand, insn, dialect) !=
 492                  ppc_optional_operand_value (operand)))
 493         return 0;
 494     }
 495
 496   return 1;
 497 }
 498
 499 /* Find a match for INSN in the opcode table, given machine DIALECT.  */
 500
 501 static const struct powerpc_opcode *
 502 lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
 503 {
 504   const struct powerpc_opcode *opcode, *opcode_end, *last;
 505   unsigned long op;
 506
 507   /* Get the major opcode of the instruction.  */
 508   op = PPC_OP (insn);
 509
 510   /* Find the first match in the opcode table for this major opcode.  */
 511   opcode_end = powerpc_opcodes + powerpc_opcd_indices[op + 1];
 512   last = NULL;
 513   for (opcode = powerpc_opcodes + powerpc_opcd_indices[op];
 514        opcode < opcode_end;
 515        ++opcode)
 516     {
 517       const unsigned char *opindex;
 518       const struct powerpc_operand *operand;
 519       int invalid;
 520
 521       if ((insn & opcode->mask) != opcode->opcode
 522           || ((dialect & PPC_OPCODE_ANY) == 0
 523               && ((opcode->flags & dialect) == 0
 524                   || (opcode->deprecated & dialect) != 0)))
 525         continue;
 526
 527       /* Check validity of operands.  */
 528       invalid = 0;
 529       for (opindex = opcode->operands; *opindex != 0; opindex++)
 530         {
 531           operand = powerpc_operands + *opindex;
 532           if (operand->extract)
 533             (*operand->extract) (insn, dialect, &invalid);
 534         }
 535       if (invalid)
 536         continue;
 537
 538       if ((dialect & PPC_OPCODE_RAW) == 0)
 539         return opcode;
 540
 541       /* The raw machine insn is one that is not a specialization.  */
 542       if (last == NULL
 543           || (last->mask & ~opcode->mask) != 0)
 544         last = opcode;
 545     }
 546
 547   return last;
 548 }
 549
 550 /* Find a match for INSN in the VLE opcode table.  */
 551
 552 static const struct powerpc_opcode *
 553 lookup_vle (unsigned long insn)
 554 {
 555   const struct powerpc_opcode *opcode;
 556   const struct powerpc_opcode *opcode_end;
 557   unsigned op, seg;
 558
 559   op = PPC_OP (insn);
 560   if (op >= 0x20 && op <= 0x37)
 561     {
 562       /* This insn has a 4-bit opcode.  */
 563       op &= 0x3c;
 564     }
 565   seg = VLE_OP_TO_SEG (op);
 566
 567   /* Find the first match in the opcode table for this major opcode.  */
 568   opcode_end = vle_opcodes + vle_opcd_indices[seg + 1];
 569   for (opcode = vle_opcodes + vle_opcd_indices[seg];
 570        opcode < opcode_end;
 571        ++opcode)
 572     {
 573       unsigned long table_opcd = opcode->opcode;
 574       unsigned long table_mask = opcode->mask;
 575       bfd_boolean table_op_is_short = PPC_OP_SE_VLE(table_mask);
 576       unsigned long insn2;
 577       const unsigned char *opindex;
 578       const struct powerpc_operand *operand;
 579       int invalid;
 580
 581       insn2 = insn;
 582       if (table_op_is_short)
 583         insn2 >>= 16;
 584       if ((insn2 & table_mask) != table_opcd)
 585         continue;
 586
 587       /* Check validity of operands.  */
 588       invalid = 0;
 589       for (opindex = opcode->operands; *opindex != 0; ++opindex)
 590         {
 591           operand = powerpc_operands + *opindex;
 592           if (operand->extract)
 593             (*operand->extract) (insn, (ppc_cpu_t)0, &invalid);
 594         }
 595       if (invalid)
 596         continue;
 597
 598       return opcode;
 599     }
 600
 601   return NULL;
 602 }
 603
 604 /* Print a PowerPC or POWER instruction.  */
 605
 606 static int
 607 print_insn_powerpc (bfd_vma memaddr,
 608                     struct disassemble_info *info,
 609                     int bigendian,
 610                     ppc_cpu_t dialect)
 611 {
 612   bfd_byte buffer[4];
 613   int status;
 614   unsigned long insn;
 615   const struct powerpc_opcode *opcode;
 616   bfd_boolean insn_is_short;
 617
 618   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 619   if (status != 0)
 620     {
 621       /* The final instruction may be a 2-byte VLE insn.  */
 622       if ((dialect & PPC_OPCODE_VLE) != 0)
 623         {
 624           /* Clear buffer so unused bytes will not have garbage in them.  */
 625           buffer[0] = buffer[1] = buffer[2] = buffer[3] = 0;
 626           status = (*info->read_memory_func) (memaddr, buffer, 2, info);
 627           if (status != 0)
 628             {
 629               (*info->memory_error_func) (status, memaddr, info);
 630               return -1;
 631             }
 632         }
 633       else
 634         {
 635           (*info->memory_error_func) (status, memaddr, info);
 636           return -1;
 637         }
 638     }
 639
 640   if (bigendian)
 641     insn = bfd_getb32 (buffer);
 642   else
 643     insn = bfd_getl32 (buffer);
 644
 645   /* Get the major opcode of the insn.  */
 646   opcode = NULL;
 647   insn_is_short = FALSE;
 648   if ((dialect & PPC_OPCODE_VLE) != 0)
 649     {
 650       opcode = lookup_vle (insn);
 651       if (opcode != NULL)
 652         insn_is_short = PPC_OP_SE_VLE(opcode->mask);
 653     }
 654   if (opcode == NULL)
 655     opcode = lookup_powerpc (insn, dialect & ~PPC_OPCODE_ANY);
 656   if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
 657     opcode = lookup_powerpc (insn, dialect);
 658
 659   if (opcode != NULL)
 660     {
 661       const unsigned char *opindex;
 662       const struct powerpc_operand *operand;
 663       int need_comma;
 664       int need_paren;
 665       int skip_optional;
 666
 667       if (opcode->operands[0] != 0)
 668         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 669       else
 670         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 671
 672       if (insn_is_short)
 673         /* The operands will be fetched out of the 16-bit instruction.  */
 674         insn >>= 16;
 675
 676       /* Now extract and print the operands.  */
 677       need_comma = 0;
 678       need_paren = 0;
 679       skip_optional = -1;
 680       for (opindex = opcode->operands; *opindex != 0; opindex++)
 681         {
 682           long value;
 683
 684           operand = powerpc_operands + *opindex;
 685
 686           /* Operands that are marked FAKE are simply ignored.  We
 687              already made sure that the extract function considered
 688              the instruction to be valid.  */
 689           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 690             continue;
 691
 692           /* If all of the optional operands have the value zero,
 693              then don't print any of them.  */
 694           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 695             {
 696               if (skip_optional < 0)
 697                 skip_optional = skip_optional_operands (opindex, insn,
 698                                                         dialect);
 699               if (skip_optional)
 700                 continue;
 701             }
 702
 703           value = operand_value_powerpc (operand, insn, dialect);
 704
 705           if (need_comma)
 706             {
 707               (*info->fprintf_func) (info->stream, ",");
 708               need_comma = 0;
 709             }
 710
 711           /* Print the operand as directed by the flags.  */
 712           if ((operand->flags & PPC_OPERAND_GPR) != 0
 713               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 714             (*info->fprintf_func) (info->stream, "r%ld", value);
 715           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 716             (*info->fprintf_func) (info->stream, "f%ld", value);
 717           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 718             (*info->fprintf_func) (info->stream, "v%ld", value);
 719           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 720             (*info->fprintf_func) (info->stream, "vs%ld", value);
 721           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 722             (*info->print_address_func) (memaddr + value, info);
 723           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 724             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 725           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 726             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 727           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 728             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 729           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 730             (*info->fprintf_func) (info->stream, "%ld", value);
 731           else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
 732                    && (((dialect & PPC_OPCODE_PPC) != 0)
 733                        || ((dialect & PPC_OPCODE_VLE) != 0)))
 734             (*info->fprintf_func) (info->stream, "cr%ld", value);
 735           else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
 736                    && (((dialect & PPC_OPCODE_PPC) != 0)
 737                        || ((dialect & PPC_OPCODE_VLE) != 0)))
 738             {
 739               static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 740               int cr;
 741               int cc;
 742
 743               cr = value >> 2;
 744               if (cr != 0)
 745                 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 746               cc = value & 3;
 747               (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 748             }
 749           else
 750             (*info->fprintf_func) (info->stream, "%d", (int) value);
 751
 752           if (need_paren)
 753             {
 754               (*info->fprintf_func) (info->stream, ")");
 755               need_paren = 0;
 756             }
 757
 758           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 759             need_comma = 1;
 760           else
 761             {
 762               (*info->fprintf_func) (info->stream, "(");
 763               need_paren = 1;
 764             }
 765         }
 766
 767       /* We have found and printed an instruction.
 768          If it was a short VLE instruction we have more to do.  */
 769       if (insn_is_short)
 770         {
 771           memaddr += 2;
 772           return 2;
 773         }
 774       else
 775         /* Otherwise, return.  */
 776         return 4;
 777     }
 778
 779   /* We could not find a match.  */
 780   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 781
 782   return 4;
 783 }
 784
 785 const disasm_options_t *
 786 disassembler_options_powerpc (void)
 787 {
 788   static disasm_options_t *opts = NULL;
 789
 790   if (opts == NULL)
 791     {
 792       size_t i, num_options = ARRAY_SIZE (ppc_opts);
 793       opts = XNEW (disasm_options_t);
 794       opts->name = XNEWVEC (const char *, num_options + 1);
 795       for (i = 0; i < num_options; i++)
 796         opts->name[i] = ppc_opts[i].opt;
 797       /* The array we return must be NULL terminated.  */
 798       opts->name[i] = NULL;
 799       opts->description = NULL;
 800     }
 801
 802   return opts;
 803 }
 804
 805 void
 806 print_ppc_disassembler_options (FILE *stream)
 807 {
 808   unsigned int i, col;
 809
 810   fprintf (stream, _("\n\
 811 The following PPC specific disassembler options are supported for use with\n\
 812 the -M switch:\n"));
 813
 814   for (col = 0, i = 0; i < ARRAY_SIZE (ppc_opts); i++)
 815     {
 816       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 817       if (col > 66)
 818         {
 819           fprintf (stream, "\n");
 820           col = 0;
 821         }
 822     }
 823   fprintf (stream, "\n");
 824 }