2 Copyright 2011-2016 Free Software Foundation, Inc.
4 Contributed by Andrew Waterman (andrew@sifive.com).
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
25 #include "libiberty.h"
26 #include "opcode/riscv.h"
29 #include "elf/riscv.h"
34 struct riscv_private_data
38 bfd_vma hi_addr
[OP_MASK_RD
+ 1];
41 static const char * const *riscv_gpr_names
;
42 static const char * const *riscv_fpr_names
;
45 static int no_aliases
; /* If set disassemble as most general inst. */
48 set_default_riscv_dis_options (void)
50 riscv_gpr_names
= riscv_gpr_names_abi
;
51 riscv_fpr_names
= riscv_fpr_names_abi
;
56 parse_riscv_dis_option (const char *option
)
58 if (strcmp (option
, "no-aliases") == 0)
60 else if (strcmp (option
, "numeric") == 0)
62 riscv_gpr_names
= riscv_gpr_names_numeric
;
63 riscv_fpr_names
= riscv_fpr_names_numeric
;
68 fprintf (stderr
, _("Unrecognized disassembler option: %s\n"), option
);
73 parse_riscv_dis_options (const char *opts_in
)
75 char *opts
= xstrdup (opts_in
), *opt
= opts
, *opt_end
= opts
;
77 set_default_riscv_dis_options ();
79 for ( ; opt_end
!= NULL
; opt
= opt_end
+ 1)
81 if ((opt_end
= strchr (opt
, ',')) != NULL
)
83 parse_riscv_dis_option (opt
);
89 /* Print one argument from an array. */
92 arg_print (struct disassemble_info
*info
, unsigned long val
,
93 const char* const* array
, size_t size
)
95 const char *s
= val
>= size
|| array
[val
] == NULL
? "unknown" : array
[val
];
96 (*info
->fprintf_func
) (info
->stream
, "%s", s
);
100 maybe_print_address (struct riscv_private_data
*pd
, int base_reg
, int offset
)
102 if (pd
->hi_addr
[base_reg
] != (bfd_vma
)-1)
104 pd
->print_addr
= pd
->hi_addr
[base_reg
] + offset
;
105 pd
->hi_addr
[base_reg
] = -1;
107 else if (base_reg
== X_GP
&& pd
->gp
!= (bfd_vma
)-1)
108 pd
->print_addr
= pd
->gp
+ offset
;
109 else if (base_reg
== X_TP
|| base_reg
== 0)
110 pd
->print_addr
= offset
;
113 /* Print insn arguments for 32/64-bit code. */
116 print_insn_args (const char *d
, insn_t l
, bfd_vma pc
, disassemble_info
*info
)
118 struct riscv_private_data
*pd
= info
->private_data
;
119 int rs1
= (l
>> OP_SH_RS1
) & OP_MASK_RS1
;
120 int rd
= (l
>> OP_SH_RD
) & OP_MASK_RD
;
121 fprintf_ftype print
= info
->fprintf_func
;
124 print (info
->stream
, "\t");
126 for (; *d
!= '\0'; d
++)
133 case 's': /* RS1 x8-x15 */
134 case 'w': /* RS1 x8-x15 */
135 print (info
->stream
, "%s",
136 riscv_gpr_names
[EXTRACT_OPERAND (CRS1S
, l
) + 8]);
138 case 't': /* RS2 x8-x15 */
139 case 'x': /* RS2 x8-x15 */
140 print (info
->stream
, "%s",
141 riscv_gpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
143 case 'U': /* RS1, constrained to equal RD */
144 print (info
->stream
, "%s", riscv_gpr_names
[rd
]);
146 case 'c': /* RS1, constrained to equal sp */
147 print (info
->stream
, "%s", riscv_gpr_names
[X_SP
]);
150 print (info
->stream
, "%s",
151 riscv_gpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
154 print (info
->stream
, "%d", (int)EXTRACT_RVC_SIMM3 (l
));
157 print (info
->stream
, "%d", (int)EXTRACT_RVC_IMM (l
));
160 print (info
->stream
, "%d", (int)EXTRACT_RVC_LW_IMM (l
));
163 print (info
->stream
, "%d", (int)EXTRACT_RVC_LD_IMM (l
));
166 print (info
->stream
, "%d", (int)EXTRACT_RVC_LWSP_IMM (l
));
169 print (info
->stream
, "%d", (int)EXTRACT_RVC_LDSP_IMM (l
));
172 print (info
->stream
, "%d", (int)EXTRACT_RVC_ADDI4SPN_IMM (l
));
175 print (info
->stream
, "%d", (int)EXTRACT_RVC_ADDI16SP_IMM (l
));
178 print (info
->stream
, "%d", (int)EXTRACT_RVC_SWSP_IMM (l
));
181 print (info
->stream
, "%d", (int)EXTRACT_RVC_SDSP_IMM (l
));
184 info
->target
= EXTRACT_RVC_B_IMM (l
) + pc
;
185 (*info
->print_address_func
) (info
->target
, info
);
188 info
->target
= EXTRACT_RVC_J_IMM (l
) + pc
;
189 (*info
->print_address_func
) (info
->target
, info
);
192 print (info
->stream
, "0x%x",
193 (int)(EXTRACT_RVC_IMM (l
) & (RISCV_BIGIMM_REACH
-1)));
196 print (info
->stream
, "0x%x", (int)EXTRACT_RVC_IMM (l
) & 0x3f);
199 print (info
->stream
, "0x%x", (int)EXTRACT_RVC_IMM (l
) & 0x1f);
201 case 'T': /* floating-point RS2 */
202 print (info
->stream
, "%s",
203 riscv_fpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
205 case 'D': /* floating-point RS2 x8-x15 */
206 print (info
->stream
, "%s",
207 riscv_fpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
217 print (info
->stream
, "%c", *d
);
221 /* Only print constant 0 if it is the last argument */
223 print (info
->stream
, "0");
228 print (info
->stream
, "%s", riscv_gpr_names
[rs1
]);
232 print (info
->stream
, "%s",
233 riscv_gpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
237 print (info
->stream
, "0x%x",
238 (unsigned)EXTRACT_UTYPE_IMM (l
) >> RISCV_IMM_BITS
);
242 arg_print (info
, EXTRACT_OPERAND (RM
, l
),
243 riscv_rm
, ARRAY_SIZE (riscv_rm
));
247 arg_print (info
, EXTRACT_OPERAND (PRED
, l
),
248 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
252 arg_print (info
, EXTRACT_OPERAND (SUCC
, l
),
253 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
257 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
));
259 if (((l
& MASK_ADDI
) == MATCH_ADDI
&& rs1
!= 0)
260 || (l
& MASK_JALR
) == MATCH_JALR
)
261 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
));
262 print (info
->stream
, "%d", (int)EXTRACT_ITYPE_IMM (l
));
266 maybe_print_address (pd
, rs1
, EXTRACT_STYPE_IMM (l
));
267 print (info
->stream
, "%d", (int)EXTRACT_STYPE_IMM (l
));
271 info
->target
= EXTRACT_UJTYPE_IMM (l
) + pc
;
272 (*info
->print_address_func
) (info
->target
, info
);
276 info
->target
= EXTRACT_SBTYPE_IMM (l
) + pc
;
277 (*info
->print_address_func
) (info
->target
, info
);
281 if ((l
& MASK_AUIPC
) == MATCH_AUIPC
)
282 pd
->hi_addr
[rd
] = pc
+ EXTRACT_UTYPE_IMM (l
);
283 else if ((l
& MASK_LUI
) == MATCH_LUI
)
284 pd
->hi_addr
[rd
] = EXTRACT_UTYPE_IMM (l
);
285 else if ((l
& MASK_C_LUI
) == MATCH_C_LUI
)
286 pd
->hi_addr
[rd
] = EXTRACT_RVC_LUI_IMM (l
);
287 print (info
->stream
, "%s", riscv_gpr_names
[rd
]);
291 print (info
->stream
, "%s", riscv_gpr_names
[0]);
295 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (SHAMT
, l
));
299 print (info
->stream
, "0x%x", (int)EXTRACT_OPERAND (SHAMTW
, l
));
304 print (info
->stream
, "%s", riscv_fpr_names
[rs1
]);
308 print (info
->stream
, "%s", riscv_fpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
312 print (info
->stream
, "%s", riscv_fpr_names
[rd
]);
316 print (info
->stream
, "%s", riscv_fpr_names
[EXTRACT_OPERAND (RS3
, l
)]);
321 const char* csr_name
= NULL
;
322 unsigned int csr
= EXTRACT_OPERAND (CSR
, l
);
325 #define DECLARE_CSR(name, num) case num: csr_name = #name; break;
326 #include "opcode/riscv-opc.h"
330 print (info
->stream
, "%s", csr_name
);
332 print (info
->stream
, "0x%x", csr
);
337 print (info
->stream
, "%d", rs1
);
341 /* xgettext:c-format */
342 print (info
->stream
, _("# internal error, undefined modifier (%c)"),
349 /* Print the RISC-V instruction at address MEMADDR in debugged memory,
350 on using INFO. Returns length of the instruction, in bytes.
351 BIGENDIAN must be 1 if this is big-endian code, 0 if
352 this is little-endian code. */
355 riscv_disassemble_insn (bfd_vma memaddr
, insn_t word
, disassemble_info
*info
)
357 const struct riscv_opcode
*op
;
358 static bfd_boolean init
= 0;
359 static const struct riscv_opcode
*riscv_hash
[OP_MASK_OP
+ 1];
360 struct riscv_private_data
*pd
;
363 #define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
365 /* Build a hash table to shorten the search time. */
368 for (op
= riscv_opcodes
; op
->name
; op
++)
369 if (!riscv_hash
[OP_HASH_IDX (op
->match
)])
370 riscv_hash
[OP_HASH_IDX (op
->match
)] = op
;
375 if (info
->private_data
== NULL
)
379 pd
= info
->private_data
= xcalloc (1, sizeof (struct riscv_private_data
));
382 for (i
= 0; i
< (int)ARRAY_SIZE (pd
->hi_addr
); i
++)
385 for (i
= 0; i
< info
->symtab_size
; i
++)
386 if (strcmp (bfd_asymbol_name (info
->symtab
[i
]), "_gp") == 0)
387 pd
->gp
= bfd_asymbol_value (info
->symtab
[i
]);
390 pd
= info
->private_data
;
392 insnlen
= riscv_insn_length (word
);
394 info
->bytes_per_chunk
= insnlen
% 4 == 0 ? 4 : 2;
395 info
->bytes_per_line
= 8;
396 info
->display_endian
= info
->endian
;
397 info
->insn_info_valid
= 1;
398 info
->branch_delay_insns
= 0;
400 info
->insn_type
= dis_nonbranch
;
404 op
= riscv_hash
[OP_HASH_IDX (word
)];
409 /* If XLEN is not known, get its value from the ELF class. */
410 if (info
->mach
== bfd_mach_riscv64
)
412 else if (info
->mach
== bfd_mach_riscv32
)
414 else if (info
->section
!= NULL
)
416 Elf_Internal_Ehdr
*ehdr
= elf_elfheader (info
->section
->owner
);
417 xlen
= ehdr
->e_ident
[EI_CLASS
] == ELFCLASS64
? 64 : 32;
420 for (; op
->name
; op
++)
422 /* Does the opcode match? */
423 if (! (op
->match_func
) (op
, word
))
425 /* Is this a pseudo-instruction and may we print it as such? */
426 if (no_aliases
&& (op
->pinfo
& INSN_ALIAS
))
428 /* Is this instruction restricted to a certain value of XLEN? */
429 if (isdigit (op
->subset
[0]) && atoi (op
->subset
) != xlen
)
433 (*info
->fprintf_func
) (info
->stream
, "%s", op
->name
);
434 print_insn_args (op
->args
, word
, memaddr
, info
);
436 /* Try to disassemble multi-instruction addressing sequences. */
437 if (pd
->print_addr
!= (bfd_vma
)-1)
439 info
->target
= pd
->print_addr
;
440 (*info
->fprintf_func
) (info
->stream
, " # ");
441 (*info
->print_address_func
) (info
->target
, info
);
449 /* We did not find a match, so just print the instruction bits. */
450 info
->insn_type
= dis_noninsn
;
451 (*info
->fprintf_func
) (info
->stream
, "0x%llx", (unsigned long long)word
);
456 print_insn_riscv (bfd_vma memaddr
, struct disassemble_info
*info
)
463 if (info
->disassembler_options
!= NULL
)
465 parse_riscv_dis_options (info
->disassembler_options
);
466 /* Avoid repeatedly parsing the options. */
467 info
->disassembler_options
= NULL
;
469 else if (riscv_gpr_names
== NULL
)
470 set_default_riscv_dis_options ();
472 /* Instructions are a sequence of 2-byte packets in little-endian order. */
473 for (n
= 0; n
< sizeof (insn
) && n
< riscv_insn_length (insn
); n
+= 2)
475 status
= (*info
->read_memory_func
) (memaddr
+ n
, packet
, 2, info
);
478 /* Don't fail just because we fell off the end. */
481 (*info
->memory_error_func
) (status
, memaddr
, info
);
485 insn
|= ((insn_t
) bfd_getl16 (packet
)) << (8 * n
);
488 return riscv_disassemble_insn (memaddr
, insn
, info
);
492 print_riscv_disassembler_options (FILE *stream
)
494 fprintf (stream
, _("\n\
495 The following RISC-V-specific disassembler options are supported for use\n\
496 with the -M switch (multiple options should be separated by commas):\n"));
498 fprintf (stream
, _("\n\
499 numeric Print numeric reigster names, rather than ABI names.\n"));
501 fprintf (stream
, _("\n\
502 no-aliases Disassemble only into canonical instructions, rather\n\
503 than into pseudoinstructions.\n"));
505 fprintf (stream
, _("\n"));
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