2 Copyright 2011-2016 Free Software Foundation, Inc.
4 Contributed by Andrew Waterman (andrew@sifive.com).
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
24 #include "opcode/riscv.h"
27 /* Register names used by gas and objdump. */
29 const char * const riscv_gpr_names_numeric
[NGPR
] =
31 "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
32 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
33 "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
34 "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31"
37 const char * const riscv_gpr_names_abi
[NGPR
] =
39 "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
40 "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
41 "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",
42 "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6"
45 const char * const riscv_fpr_names_numeric
[NFPR
] =
47 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
48 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
49 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
50 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
53 const char * const riscv_fpr_names_abi
[NFPR
] =
55 "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7",
56 "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5",
57 "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
58 "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11"
61 /* The order of overloaded instructions matters. Label arguments and
62 register arguments look the same. Instructions that can have either
63 for arguments must apear in the correct order in this table for the
64 assembler to pick the right one. In other words, entries with
65 immediate operands must apear after the same instruction with
68 Because of the lookup algorithm used, entries with the same opcode
69 name must be contiguous. */
71 #define MASK_RS1 (OP_MASK_RS1 << OP_SH_RS1)
72 #define MASK_RS2 (OP_MASK_RS2 << OP_SH_RS2)
73 #define MASK_RD (OP_MASK_RD << OP_SH_RD)
74 #define MASK_CRS2 (OP_MASK_CRS2 << OP_SH_CRS2)
75 #define MASK_IMM ENCODE_ITYPE_IMM(-1U)
76 #define MASK_RVC_IMM ENCODE_RVC_IMM(-1U)
77 #define MASK_UIMM ENCODE_UTYPE_IMM(-1U)
78 #define MASK_RM (OP_MASK_RM << OP_SH_RM)
79 #define MASK_PRED (OP_MASK_PRED << OP_SH_PRED)
80 #define MASK_SUCC (OP_MASK_SUCC << OP_SH_SUCC)
81 #define MASK_AQ (OP_MASK_AQ << OP_SH_AQ)
82 #define MASK_RL (OP_MASK_RL << OP_SH_RL)
83 #define MASK_AQRL (MASK_AQ | MASK_RL)
86 match_opcode (const struct riscv_opcode
*op
, insn_t insn
)
88 return ((insn
^ op
->match
) & op
->mask
) == 0;
92 match_never (const struct riscv_opcode
*op ATTRIBUTE_UNUSED
,
93 insn_t insn ATTRIBUTE_UNUSED
)
99 match_rs1_eq_rs2 (const struct riscv_opcode
*op
, insn_t insn
)
101 int rs1
= (insn
& MASK_RS1
) >> OP_SH_RS1
;
102 int rs2
= (insn
& MASK_RS2
) >> OP_SH_RS2
;
103 return match_opcode (op
, insn
) && rs1
== rs2
;
107 match_rd_nonzero (const struct riscv_opcode
*op
, insn_t insn
)
109 return match_opcode (op
, insn
) && ((insn
& MASK_RD
) != 0);
113 match_c_add (const struct riscv_opcode
*op
, insn_t insn
)
115 return match_rd_nonzero (op
, insn
) && ((insn
& MASK_CRS2
) != 0);
119 match_c_lui (const struct riscv_opcode
*op
, insn_t insn
)
121 return match_rd_nonzero (op
, insn
) && (((insn
& MASK_RD
) >> OP_SH_RD
) != 2);
124 const struct riscv_opcode riscv_opcodes
[] =
126 /* name, isa, operands, match, mask, match_func, pinfo. */
127 {"unimp", "C", "", 0, 0xffffU
, match_opcode
, 0 },
128 {"unimp", "I", "", MATCH_CSRRW
| (CSR_CYCLE
<< OP_SH_CSR
), 0xffffffffU
, match_opcode
, 0 }, /* csrw cycle, x0 */
129 {"ebreak", "C", "", MATCH_C_EBREAK
, MASK_C_EBREAK
, match_opcode
, INSN_ALIAS
},
130 {"ebreak", "I", "", MATCH_EBREAK
, MASK_EBREAK
, match_opcode
, 0 },
131 {"sbreak", "C", "", MATCH_C_EBREAK
, MASK_C_EBREAK
, match_opcode
, INSN_ALIAS
},
132 {"sbreak", "I", "", MATCH_EBREAK
, MASK_EBREAK
, match_opcode
, INSN_ALIAS
},
133 {"ret", "C", "", MATCH_C_JR
| (X_RA
<< OP_SH_RD
), MASK_C_JR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
134 {"ret", "I", "", MATCH_JALR
| (X_RA
<< OP_SH_RS1
), MASK_JALR
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
135 {"jr", "C", "d", MATCH_C_JR
, MASK_C_JR
, match_rd_nonzero
, INSN_ALIAS
},
136 {"jr", "I", "s", MATCH_JALR
, MASK_JALR
| MASK_RD
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
137 {"jr", "I", "s,j", MATCH_JALR
, MASK_JALR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
138 {"jalr", "C", "d", MATCH_C_JALR
, MASK_C_JALR
, match_rd_nonzero
, INSN_ALIAS
},
139 {"jalr", "I", "s", MATCH_JALR
| (X_RA
<< OP_SH_RD
), MASK_JALR
| MASK_RD
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
140 {"jalr", "I", "s,j", MATCH_JALR
| (X_RA
<< OP_SH_RD
), MASK_JALR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
141 {"jalr", "I", "d,s", MATCH_JALR
, MASK_JALR
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
142 {"jalr", "I", "d,s,j", MATCH_JALR
, MASK_JALR
, match_opcode
, 0 },
143 {"j", "C", "Ca", MATCH_C_J
, MASK_C_J
, match_opcode
, INSN_ALIAS
},
144 {"j", "I", "a", MATCH_JAL
, MASK_JAL
| MASK_RD
, match_opcode
, INSN_ALIAS
},
145 {"jal", "32C", "Ca", MATCH_C_JAL
, MASK_C_JAL
, match_opcode
, INSN_ALIAS
},
146 {"jal", "I", "a", MATCH_JAL
| (X_RA
<< OP_SH_RD
), MASK_JAL
| MASK_RD
, match_opcode
, INSN_ALIAS
},
147 {"jal", "I", "d,a", MATCH_JAL
, MASK_JAL
, match_opcode
, 0 },
148 {"call", "I", "c", (X_T1
<< OP_SH_RS1
) | (X_RA
<< OP_SH_RD
), (int) M_CALL
, match_never
, INSN_MACRO
},
149 {"call", "I", "d,c", (X_T1
<< OP_SH_RS1
), (int) M_CALL
, match_never
, INSN_MACRO
},
150 {"tail", "I", "c", (X_T1
<< OP_SH_RS1
), (int) M_CALL
, match_never
, INSN_MACRO
},
151 {"jump", "I", "c,s", 0, (int) M_CALL
, match_never
, INSN_MACRO
},
152 {"nop", "C", "", MATCH_C_ADDI
, 0xffff, match_opcode
, INSN_ALIAS
},
153 {"nop", "I", "", MATCH_ADDI
, MASK_ADDI
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
154 {"lui", "C", "d,Cu", MATCH_C_LUI
, MASK_C_LUI
, match_c_lui
, INSN_ALIAS
},
155 {"lui", "I", "d,u", MATCH_LUI
, MASK_LUI
, match_opcode
, 0 },
156 {"li", "C", "d,Cv", MATCH_C_LUI
, MASK_C_LUI
, match_c_lui
, INSN_ALIAS
},
157 {"li", "C", "d,Cj", MATCH_C_LI
, MASK_C_LI
, match_rd_nonzero
, INSN_ALIAS
},
158 {"li", "C", "d,0", MATCH_C_LI
, MASK_C_LI
| MASK_RVC_IMM
, match_rd_nonzero
, INSN_ALIAS
},
159 {"li", "I", "d,j", MATCH_ADDI
, MASK_ADDI
| MASK_RS1
, match_opcode
, INSN_ALIAS
}, /* addi */
160 {"li", "I", "d,I", 0, (int) M_LI
, match_never
, INSN_MACRO
},
161 {"mv", "C", "d,CV", MATCH_C_MV
, MASK_C_MV
, match_c_add
, INSN_ALIAS
},
162 {"mv", "I", "d,s", MATCH_ADDI
, MASK_ADDI
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
163 {"move", "C", "d,CV", MATCH_C_MV
, MASK_C_MV
, match_c_add
, INSN_ALIAS
},
164 {"move", "I", "d,s", MATCH_ADDI
, MASK_ADDI
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
165 {"andi", "C", "Cs,Cw,Cj", MATCH_C_ANDI
, MASK_C_ANDI
, match_opcode
, INSN_ALIAS
},
166 {"andi", "I", "d,s,j", MATCH_ANDI
, MASK_ANDI
, match_opcode
, 0 },
167 {"and", "C", "Cs,Cw,Ct", MATCH_C_AND
, MASK_C_AND
, match_opcode
, INSN_ALIAS
},
168 {"and", "C", "Cs,Ct,Cw", MATCH_C_AND
, MASK_C_AND
, match_opcode
, INSN_ALIAS
},
169 {"and", "C", "Cs,Cw,Cj", MATCH_C_ANDI
, MASK_C_ANDI
, match_opcode
, INSN_ALIAS
},
170 {"and", "I", "d,s,t", MATCH_AND
, MASK_AND
, match_opcode
, 0 },
171 {"and", "I", "d,s,j", MATCH_ANDI
, MASK_ANDI
, match_opcode
, INSN_ALIAS
},
172 {"beqz", "C", "Cs,Cp", MATCH_C_BEQZ
, MASK_C_BEQZ
, match_opcode
, INSN_ALIAS
},
173 {"beqz", "I", "s,p", MATCH_BEQ
, MASK_BEQ
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
174 {"beq", "I", "s,t,p", MATCH_BEQ
, MASK_BEQ
, match_opcode
, 0 },
175 {"blez", "I", "t,p", MATCH_BGE
, MASK_BGE
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
176 {"bgez", "I", "s,p", MATCH_BGE
, MASK_BGE
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
177 {"ble", "I", "t,s,p", MATCH_BGE
, MASK_BGE
, match_opcode
, INSN_ALIAS
},
178 {"bleu", "I", "t,s,p", MATCH_BGEU
, MASK_BGEU
, match_opcode
, INSN_ALIAS
},
179 {"bge", "I", "s,t,p", MATCH_BGE
, MASK_BGE
, match_opcode
, 0 },
180 {"bgeu", "I", "s,t,p", MATCH_BGEU
, MASK_BGEU
, match_opcode
, 0 },
181 {"bltz", "I", "s,p", MATCH_BLT
, MASK_BLT
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
182 {"bgtz", "I", "t,p", MATCH_BLT
, MASK_BLT
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
183 {"blt", "I", "s,t,p", MATCH_BLT
, MASK_BLT
, match_opcode
, 0 },
184 {"bltu", "I", "s,t,p", MATCH_BLTU
, MASK_BLTU
, match_opcode
, 0 },
185 {"bgt", "I", "t,s,p", MATCH_BLT
, MASK_BLT
, match_opcode
, INSN_ALIAS
},
186 {"bgtu", "I", "t,s,p", MATCH_BLTU
, MASK_BLTU
, match_opcode
, INSN_ALIAS
},
187 {"bnez", "C", "Cs,Cp", MATCH_C_BNEZ
, MASK_C_BNEZ
, match_opcode
, INSN_ALIAS
},
188 {"bnez", "I", "s,p", MATCH_BNE
, MASK_BNE
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
189 {"bne", "I", "s,t,p", MATCH_BNE
, MASK_BNE
, match_opcode
, 0 },
190 {"addi", "C", "Ct,Cc,CK", MATCH_C_ADDI4SPN
, MASK_C_ADDI4SPN
, match_opcode
, INSN_ALIAS
},
191 {"addi", "C", "d,CU,Cj", MATCH_C_ADDI
, MASK_C_ADDI
, match_rd_nonzero
, INSN_ALIAS
},
192 {"addi", "C", "Cc,Cc,CL", MATCH_C_ADDI16SP
, MASK_C_ADDI16SP
, match_opcode
, INSN_ALIAS
},
193 {"addi", "I", "d,s,j", MATCH_ADDI
, MASK_ADDI
, match_opcode
, 0 },
194 {"add", "C", "d,CU,CV", MATCH_C_ADD
, MASK_C_ADD
, match_c_add
, INSN_ALIAS
},
195 {"add", "C", "d,CV,CU", MATCH_C_ADD
, MASK_C_ADD
, match_c_add
, INSN_ALIAS
},
196 {"add", "C", "d,CU,Cj", MATCH_C_ADDI
, MASK_C_ADDI
, match_rd_nonzero
, INSN_ALIAS
},
197 {"add", "C", "Ct,Cc,CK", MATCH_C_ADDI4SPN
, MASK_C_ADDI4SPN
, match_opcode
, INSN_ALIAS
},
198 {"add", "C", "Cc,Cc,CL", MATCH_C_ADDI16SP
, MASK_C_ADDI16SP
, match_opcode
, INSN_ALIAS
},
199 {"add", "I", "d,s,t", MATCH_ADD
, MASK_ADD
, match_opcode
, 0 },
200 {"add", "I", "d,s,t,0",MATCH_ADD
, MASK_ADD
, match_opcode
, 0 },
201 {"add", "I", "d,s,j", MATCH_ADDI
, MASK_ADDI
, match_opcode
, INSN_ALIAS
},
202 {"la", "I", "d,A", 0, (int) M_LA
, match_never
, INSN_MACRO
},
203 {"lla", "I", "d,A", 0, (int) M_LLA
, match_never
, INSN_MACRO
},
204 {"la.tls.gd", "I", "d,A", 0, (int) M_LA_TLS_GD
, match_never
, INSN_MACRO
},
205 {"la.tls.ie", "I", "d,A", 0, (int) M_LA_TLS_IE
, match_never
, INSN_MACRO
},
206 {"neg", "I", "d,t", MATCH_SUB
, MASK_SUB
| MASK_RS1
, match_opcode
, INSN_ALIAS
}, /* sub 0 */
207 {"slli", "C", "d,CU,C>", MATCH_C_SLLI
, MASK_C_SLLI
, match_rd_nonzero
, INSN_ALIAS
},
208 {"slli", "I", "d,s,>", MATCH_SLLI
, MASK_SLLI
, match_opcode
, 0 },
209 {"sll", "C", "d,CU,C>", MATCH_C_SLLI
, MASK_C_SLLI
, match_rd_nonzero
, INSN_ALIAS
},
210 {"sll", "I", "d,s,t", MATCH_SLL
, MASK_SLL
, match_opcode
, 0 },
211 {"sll", "I", "d,s,>", MATCH_SLLI
, MASK_SLLI
, match_opcode
, INSN_ALIAS
},
212 {"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI
, MASK_C_SRLI
, match_rd_nonzero
, INSN_ALIAS
},
213 {"srli", "I", "d,s,>", MATCH_SRLI
, MASK_SRLI
, match_opcode
, 0 },
214 {"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI
, MASK_C_SRLI
, match_rd_nonzero
, INSN_ALIAS
},
215 {"srl", "I", "d,s,t", MATCH_SRL
, MASK_SRL
, match_opcode
, 0 },
216 {"srl", "I", "d,s,>", MATCH_SRLI
, MASK_SRLI
, match_opcode
, INSN_ALIAS
},
217 {"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI
, MASK_C_SRAI
, match_rd_nonzero
, INSN_ALIAS
},
218 {"srai", "I", "d,s,>", MATCH_SRAI
, MASK_SRAI
, match_opcode
, 0 },
219 {"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI
, MASK_C_SRAI
, match_rd_nonzero
, INSN_ALIAS
},
220 {"sra", "I", "d,s,t", MATCH_SRA
, MASK_SRA
, match_opcode
, 0 },
221 {"sra", "I", "d,s,>", MATCH_SRAI
, MASK_SRAI
, match_opcode
, INSN_ALIAS
},
222 {"sub", "C", "Cs,Cw,Ct", MATCH_C_SUB
, MASK_C_SUB
, match_opcode
, INSN_ALIAS
},
223 {"sub", "I", "d,s,t", MATCH_SUB
, MASK_SUB
, match_opcode
, 0 },
224 {"lb", "I", "d,o(s)", MATCH_LB
, MASK_LB
, match_opcode
, 0 },
225 {"lb", "I", "d,A", 0, (int) M_LB
, match_never
, INSN_MACRO
},
226 {"lbu", "I", "d,o(s)", MATCH_LBU
, MASK_LBU
, match_opcode
, 0 },
227 {"lbu", "I", "d,A", 0, (int) M_LBU
, match_never
, INSN_MACRO
},
228 {"lh", "I", "d,o(s)", MATCH_LH
, MASK_LH
, match_opcode
, 0 },
229 {"lh", "I", "d,A", 0, (int) M_LH
, match_never
, INSN_MACRO
},
230 {"lhu", "I", "d,o(s)", MATCH_LHU
, MASK_LHU
, match_opcode
, 0 },
231 {"lhu", "I", "d,A", 0, (int) M_LHU
, match_never
, INSN_MACRO
},
232 {"lw", "C", "d,Cm(Cc)", MATCH_C_LWSP
, MASK_C_LWSP
, match_rd_nonzero
, INSN_ALIAS
},
233 {"lw", "C", "Ct,Ck(Cs)", MATCH_C_LW
, MASK_C_LW
, match_opcode
, INSN_ALIAS
},
234 {"lw", "I", "d,o(s)", MATCH_LW
, MASK_LW
, match_opcode
, 0 },
235 {"lw", "I", "d,A", 0, (int) M_LW
, match_never
, INSN_MACRO
},
236 {"not", "I", "d,s", MATCH_XORI
| MASK_IMM
, MASK_XORI
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
237 {"ori", "I", "d,s,j", MATCH_ORI
, MASK_ORI
, match_opcode
, 0 },
238 {"or", "C", "Cs,Cw,Ct", MATCH_C_OR
, MASK_C_OR
, match_opcode
, INSN_ALIAS
},
239 {"or", "C", "Cs,Ct,Cw", MATCH_C_OR
, MASK_C_OR
, match_opcode
, INSN_ALIAS
},
240 {"or", "I", "d,s,t", MATCH_OR
, MASK_OR
, match_opcode
, 0 },
241 {"or", "I", "d,s,j", MATCH_ORI
, MASK_ORI
, match_opcode
, INSN_ALIAS
},
242 {"auipc", "I", "d,u", MATCH_AUIPC
, MASK_AUIPC
, match_opcode
, 0 },
243 {"seqz", "I", "d,s", MATCH_SLTIU
| ENCODE_ITYPE_IMM(1), MASK_SLTIU
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
244 {"snez", "I", "d,t", MATCH_SLTU
, MASK_SLTU
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
245 {"sltz", "I", "d,s", MATCH_SLT
, MASK_SLT
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
246 {"sgtz", "I", "d,t", MATCH_SLT
, MASK_SLT
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
247 {"slti", "I", "d,s,j", MATCH_SLTI
, MASK_SLTI
, match_opcode
, INSN_ALIAS
},
248 {"slt", "I", "d,s,t", MATCH_SLT
, MASK_SLT
, match_opcode
, 0 },
249 {"slt", "I", "d,s,j", MATCH_SLTI
, MASK_SLTI
, match_opcode
, 0 },
250 {"sltiu", "I", "d,s,j", MATCH_SLTIU
, MASK_SLTIU
, match_opcode
, 0 },
251 {"sltu", "I", "d,s,t", MATCH_SLTU
, MASK_SLTU
, match_opcode
, 0 },
252 {"sltu", "I", "d,s,j", MATCH_SLTIU
, MASK_SLTIU
, match_opcode
, INSN_ALIAS
},
253 {"sgt", "I", "d,t,s", MATCH_SLT
, MASK_SLT
, match_opcode
, INSN_ALIAS
},
254 {"sgtu", "I", "d,t,s", MATCH_SLTU
, MASK_SLTU
, match_opcode
, INSN_ALIAS
},
255 {"sb", "I", "t,q(s)", MATCH_SB
, MASK_SB
, match_opcode
, 0 },
256 {"sb", "I", "t,A,s", 0, (int) M_SB
, match_never
, INSN_MACRO
},
257 {"sh", "I", "t,q(s)", MATCH_SH
, MASK_SH
, match_opcode
, 0 },
258 {"sh", "I", "t,A,s", 0, (int) M_SH
, match_never
, INSN_MACRO
},
259 {"sw", "C", "CV,CM(Cc)", MATCH_C_SWSP
, MASK_C_SWSP
, match_opcode
, INSN_ALIAS
},
260 {"sw", "C", "Ct,Ck(Cs)", MATCH_C_SW
, MASK_C_SW
, match_opcode
, INSN_ALIAS
},
261 {"sw", "I", "t,q(s)", MATCH_SW
, MASK_SW
, match_opcode
, 0 },
262 {"sw", "I", "t,A,s", 0, (int) M_SW
, match_never
, INSN_MACRO
},
263 {"fence", "I", "", MATCH_FENCE
| MASK_PRED
| MASK_SUCC
, MASK_FENCE
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
264 {"fence", "I", "P,Q", MATCH_FENCE
, MASK_FENCE
| MASK_RD
| MASK_RS1
| (MASK_IMM
& ~MASK_PRED
& ~MASK_SUCC
), match_opcode
, 0 },
265 {"fence.i", "I", "", MATCH_FENCE_I
, MASK_FENCE
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, 0 },
266 {"rdcycle", "I", "d", MATCH_RDCYCLE
, MASK_RDCYCLE
, match_opcode
, 0 },
267 {"rdinstret", "I", "d", MATCH_RDINSTRET
, MASK_RDINSTRET
, match_opcode
, 0 },
268 {"rdtime", "I", "d", MATCH_RDTIME
, MASK_RDTIME
, match_opcode
, 0 },
269 {"rdcycleh", "32I", "d", MATCH_RDCYCLEH
, MASK_RDCYCLEH
, match_opcode
, 0 },
270 {"rdinstreth","32I", "d", MATCH_RDINSTRETH
, MASK_RDINSTRETH
, match_opcode
, 0 },
271 {"rdtimeh", "32I", "d", MATCH_RDTIMEH
, MASK_RDTIMEH
, match_opcode
, 0 },
272 {"ecall", "I", "", MATCH_SCALL
, MASK_SCALL
, match_opcode
, 0 },
273 {"scall", "I", "", MATCH_SCALL
, MASK_SCALL
, match_opcode
, 0 },
274 {"xori", "I", "d,s,j", MATCH_XORI
, MASK_XORI
, match_opcode
, 0 },
275 {"xor", "C", "Cs,Cw,Ct", MATCH_C_XOR
, MASK_C_XOR
, match_opcode
, INSN_ALIAS
},
276 {"xor", "C", "Cs,Ct,Cw", MATCH_C_XOR
, MASK_C_XOR
, match_opcode
, INSN_ALIAS
},
277 {"xor", "I", "d,s,t", MATCH_XOR
, MASK_XOR
, match_opcode
, 0 },
278 {"xor", "I", "d,s,j", MATCH_XORI
, MASK_XORI
, match_opcode
, INSN_ALIAS
},
279 {"lwu", "64I", "d,o(s)", MATCH_LWU
, MASK_LWU
, match_opcode
, 0 },
280 {"lwu", "64I", "d,A", 0, (int) M_LWU
, match_never
, INSN_MACRO
},
281 {"ld", "64C", "d,Cn(Cc)", MATCH_C_LDSP
, MASK_C_LDSP
, match_rd_nonzero
, INSN_ALIAS
},
282 {"ld", "64C", "Ct,Cl(Cs)", MATCH_C_LD
, MASK_C_LD
, match_opcode
, INSN_ALIAS
},
283 {"ld", "64I", "d,o(s)", MATCH_LD
, MASK_LD
, match_opcode
, 0 },
284 {"ld", "64I", "d,A", 0, (int) M_LD
, match_never
, INSN_MACRO
},
285 {"sd", "64C", "CV,CN(Cc)", MATCH_C_SDSP
, MASK_C_SDSP
, match_opcode
, INSN_ALIAS
},
286 {"sd", "64C", "Ct,Cl(Cs)", MATCH_C_SD
, MASK_C_SD
, match_opcode
, INSN_ALIAS
},
287 {"sd", "64I", "t,q(s)", MATCH_SD
, MASK_SD
, match_opcode
, 0 },
288 {"sd", "64I", "t,A,s", 0, (int) M_SD
, match_never
, INSN_MACRO
},
289 {"sext.w", "64C", "d,CU", MATCH_C_ADDIW
, MASK_C_ADDIW
| MASK_RVC_IMM
, match_rd_nonzero
, INSN_ALIAS
},
290 {"sext.w", "64I", "d,s", MATCH_ADDIW
, MASK_ADDIW
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
291 {"addiw", "64C", "d,CU,Cj", MATCH_C_ADDIW
, MASK_C_ADDIW
, match_rd_nonzero
, INSN_ALIAS
},
292 {"addiw", "64I", "d,s,j", MATCH_ADDIW
, MASK_ADDIW
, match_opcode
, 0 },
293 {"addw", "64C", "Cs,Cw,Ct", MATCH_C_ADDW
, MASK_C_ADDW
, match_opcode
, INSN_ALIAS
},
294 {"addw", "64C", "Cs,Ct,Cw", MATCH_C_ADDW
, MASK_C_ADDW
, match_opcode
, INSN_ALIAS
},
295 {"addw", "64C", "d,CU,Cj", MATCH_C_ADDIW
, MASK_C_ADDIW
, match_rd_nonzero
, INSN_ALIAS
},
296 {"addw", "64I", "d,s,t", MATCH_ADDW
, MASK_ADDW
, match_opcode
, 0 },
297 {"addw", "64I", "d,s,j", MATCH_ADDIW
, MASK_ADDIW
, match_opcode
, INSN_ALIAS
},
298 {"negw", "64I", "d,t", MATCH_SUBW
, MASK_SUBW
| MASK_RS1
, match_opcode
, INSN_ALIAS
}, /* sub 0 */
299 {"slliw", "64I", "d,s,<", MATCH_SLLIW
, MASK_SLLIW
, match_opcode
, 0 },
300 {"sllw", "64I", "d,s,t", MATCH_SLLW
, MASK_SLLW
, match_opcode
, 0 },
301 {"sllw", "64I", "d,s,<", MATCH_SLLIW
, MASK_SLLIW
, match_opcode
, INSN_ALIAS
},
302 {"srliw", "64I", "d,s,<", MATCH_SRLIW
, MASK_SRLIW
, match_opcode
, 0 },
303 {"srlw", "64I", "d,s,t", MATCH_SRLW
, MASK_SRLW
, match_opcode
, 0 },
304 {"srlw", "64I", "d,s,<", MATCH_SRLIW
, MASK_SRLIW
, match_opcode
, INSN_ALIAS
},
305 {"sraiw", "64I", "d,s,<", MATCH_SRAIW
, MASK_SRAIW
, match_opcode
, 0 },
306 {"sraw", "64I", "d,s,t", MATCH_SRAW
, MASK_SRAW
, match_opcode
, 0 },
307 {"sraw", "64I", "d,s,<", MATCH_SRAIW
, MASK_SRAIW
, match_opcode
, INSN_ALIAS
},
308 {"subw", "64C", "Cs,Cw,Ct", MATCH_C_SUBW
, MASK_C_SUBW
, match_opcode
, INSN_ALIAS
},
309 {"subw", "64I", "d,s,t", MATCH_SUBW
, MASK_SUBW
, match_opcode
, 0 },
311 /* Atomic memory operation instruction subset */
312 {"lr.w", "A", "d,0(s)", MATCH_LR_W
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
313 {"sc.w", "A", "d,t,0(s)", MATCH_SC_W
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
314 {"amoadd.w", "A", "d,t,0(s)", MATCH_AMOADD_W
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
315 {"amoswap.w", "A", "d,t,0(s)", MATCH_AMOSWAP_W
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
316 {"amoand.w", "A", "d,t,0(s)", MATCH_AMOAND_W
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
317 {"amoor.w", "A", "d,t,0(s)", MATCH_AMOOR_W
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
318 {"amoxor.w", "A", "d,t,0(s)", MATCH_AMOXOR_W
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
319 {"amomax.w", "A", "d,t,0(s)", MATCH_AMOMAX_W
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
320 {"amomaxu.w", "A", "d,t,0(s)", MATCH_AMOMAXU_W
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
321 {"amomin.w", "A", "d,t,0(s)", MATCH_AMOMIN_W
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
322 {"amominu.w", "A", "d,t,0(s)", MATCH_AMOMINU_W
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
323 {"lr.w.aq", "A", "d,0(s)", MATCH_LR_W
| MASK_AQ
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
324 {"sc.w.aq", "A", "d,t,0(s)", MATCH_SC_W
| MASK_AQ
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
325 {"amoadd.w.aq", "A", "d,t,0(s)", MATCH_AMOADD_W
| MASK_AQ
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
326 {"amoswap.w.aq", "A", "d,t,0(s)", MATCH_AMOSWAP_W
| MASK_AQ
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
327 {"amoand.w.aq", "A", "d,t,0(s)", MATCH_AMOAND_W
| MASK_AQ
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
328 {"amoor.w.aq", "A", "d,t,0(s)", MATCH_AMOOR_W
| MASK_AQ
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
329 {"amoxor.w.aq", "A", "d,t,0(s)", MATCH_AMOXOR_W
| MASK_AQ
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
330 {"amomax.w.aq", "A", "d,t,0(s)", MATCH_AMOMAX_W
| MASK_AQ
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
331 {"amomaxu.w.aq", "A", "d,t,0(s)", MATCH_AMOMAXU_W
| MASK_AQ
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
332 {"amomin.w.aq", "A", "d,t,0(s)", MATCH_AMOMIN_W
| MASK_AQ
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
333 {"amominu.w.aq", "A", "d,t,0(s)", MATCH_AMOMINU_W
| MASK_AQ
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
334 {"lr.w.rl", "A", "d,0(s)", MATCH_LR_W
| MASK_RL
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
335 {"sc.w.rl", "A", "d,t,0(s)", MATCH_SC_W
| MASK_RL
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
336 {"amoadd.w.rl", "A", "d,t,0(s)", MATCH_AMOADD_W
| MASK_RL
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
337 {"amoswap.w.rl", "A", "d,t,0(s)", MATCH_AMOSWAP_W
| MASK_RL
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
338 {"amoand.w.rl", "A", "d,t,0(s)", MATCH_AMOAND_W
| MASK_RL
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
339 {"amoor.w.rl", "A", "d,t,0(s)", MATCH_AMOOR_W
| MASK_RL
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
340 {"amoxor.w.rl", "A", "d,t,0(s)", MATCH_AMOXOR_W
| MASK_RL
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
341 {"amomax.w.rl", "A", "d,t,0(s)", MATCH_AMOMAX_W
| MASK_RL
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
342 {"amomaxu.w.rl", "A", "d,t,0(s)", MATCH_AMOMAXU_W
| MASK_RL
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
343 {"amomin.w.rl", "A", "d,t,0(s)", MATCH_AMOMIN_W
| MASK_RL
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
344 {"amominu.w.rl", "A", "d,t,0(s)", MATCH_AMOMINU_W
| MASK_RL
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
345 {"lr.w.sc", "A", "d,0(s)", MATCH_LR_W
| MASK_AQRL
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
346 {"sc.w.sc", "A", "d,t,0(s)", MATCH_SC_W
| MASK_AQRL
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
347 {"amoadd.w.sc", "A", "d,t,0(s)", MATCH_AMOADD_W
| MASK_AQRL
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
348 {"amoswap.w.sc", "A", "d,t,0(s)", MATCH_AMOSWAP_W
| MASK_AQRL
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
349 {"amoand.w.sc", "A", "d,t,0(s)", MATCH_AMOAND_W
| MASK_AQRL
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
350 {"amoor.w.sc", "A", "d,t,0(s)", MATCH_AMOOR_W
| MASK_AQRL
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
351 {"amoxor.w.sc", "A", "d,t,0(s)", MATCH_AMOXOR_W
| MASK_AQRL
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
352 {"amomax.w.sc", "A", "d,t,0(s)", MATCH_AMOMAX_W
| MASK_AQRL
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
353 {"amomaxu.w.sc", "A", "d,t,0(s)", MATCH_AMOMAXU_W
| MASK_AQRL
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
354 {"amomin.w.sc", "A", "d,t,0(s)", MATCH_AMOMIN_W
| MASK_AQRL
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
355 {"amominu.w.sc", "A", "d,t,0(s)", MATCH_AMOMINU_W
| MASK_AQRL
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
356 {"lr.d", "64A", "d,0(s)", MATCH_LR_D
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
357 {"sc.d", "64A", "d,t,0(s)", MATCH_SC_D
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
358 {"amoadd.d", "64A", "d,t,0(s)", MATCH_AMOADD_D
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
359 {"amoswap.d", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
360 {"amoand.d", "64A", "d,t,0(s)", MATCH_AMOAND_D
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
361 {"amoor.d", "64A", "d,t,0(s)", MATCH_AMOOR_D
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
362 {"amoxor.d", "64A", "d,t,0(s)", MATCH_AMOXOR_D
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
363 {"amomax.d", "64A", "d,t,0(s)", MATCH_AMOMAX_D
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
364 {"amomaxu.d", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
365 {"amomin.d", "64A", "d,t,0(s)", MATCH_AMOMIN_D
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
366 {"amominu.d", "64A", "d,t,0(s)", MATCH_AMOMINU_D
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
367 {"lr.d.aq", "64A", "d,0(s)", MATCH_LR_D
| MASK_AQ
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
368 {"sc.d.aq", "64A", "d,t,0(s)", MATCH_SC_D
| MASK_AQ
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
369 {"amoadd.d.aq", "64A", "d,t,0(s)", MATCH_AMOADD_D
| MASK_AQ
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
370 {"amoswap.d.aq", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
| MASK_AQ
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
371 {"amoand.d.aq", "64A", "d,t,0(s)", MATCH_AMOAND_D
| MASK_AQ
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
372 {"amoor.d.aq", "64A", "d,t,0(s)", MATCH_AMOOR_D
| MASK_AQ
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
373 {"amoxor.d.aq", "64A", "d,t,0(s)", MATCH_AMOXOR_D
| MASK_AQ
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
374 {"amomax.d.aq", "64A", "d,t,0(s)", MATCH_AMOMAX_D
| MASK_AQ
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
375 {"amomaxu.d.aq", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
| MASK_AQ
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
376 {"amomin.d.aq", "64A", "d,t,0(s)", MATCH_AMOMIN_D
| MASK_AQ
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
377 {"amominu.d.aq", "64A", "d,t,0(s)", MATCH_AMOMINU_D
| MASK_AQ
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
378 {"lr.d.rl", "64A", "d,0(s)", MATCH_LR_D
| MASK_RL
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
379 {"sc.d.rl", "64A", "d,t,0(s)", MATCH_SC_D
| MASK_RL
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
380 {"amoadd.d.rl", "64A", "d,t,0(s)", MATCH_AMOADD_D
| MASK_RL
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
381 {"amoswap.d.rl", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
| MASK_RL
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
382 {"amoand.d.rl", "64A", "d,t,0(s)", MATCH_AMOAND_D
| MASK_RL
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
383 {"amoor.d.rl", "64A", "d,t,0(s)", MATCH_AMOOR_D
| MASK_RL
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
384 {"amoxor.d.rl", "64A", "d,t,0(s)", MATCH_AMOXOR_D
| MASK_RL
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
385 {"amomax.d.rl", "64A", "d,t,0(s)", MATCH_AMOMAX_D
| MASK_RL
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
386 {"amomaxu.d.rl", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
| MASK_RL
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
387 {"amomin.d.rl", "64A", "d,t,0(s)", MATCH_AMOMIN_D
| MASK_RL
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
388 {"amominu.d.rl", "64A", "d,t,0(s)", MATCH_AMOMINU_D
| MASK_RL
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
389 {"lr.d.sc", "64A", "d,0(s)", MATCH_LR_D
| MASK_AQRL
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
390 {"sc.d.sc", "64A", "d,t,0(s)", MATCH_SC_D
| MASK_AQRL
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
391 {"amoadd.d.sc", "64A", "d,t,0(s)", MATCH_AMOADD_D
| MASK_AQRL
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
392 {"amoswap.d.sc", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
| MASK_AQRL
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
393 {"amoand.d.sc", "64A", "d,t,0(s)", MATCH_AMOAND_D
| MASK_AQRL
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
394 {"amoor.d.sc", "64A", "d,t,0(s)", MATCH_AMOOR_D
| MASK_AQRL
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
395 {"amoxor.d.sc", "64A", "d,t,0(s)", MATCH_AMOXOR_D
| MASK_AQRL
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
396 {"amomax.d.sc", "64A", "d,t,0(s)", MATCH_AMOMAX_D
| MASK_AQRL
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
397 {"amomaxu.d.sc", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
| MASK_AQRL
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
398 {"amomin.d.sc", "64A", "d,t,0(s)", MATCH_AMOMIN_D
| MASK_AQRL
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
399 {"amominu.d.sc", "64A", "d,t,0(s)", MATCH_AMOMINU_D
| MASK_AQRL
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
401 /* Multiply/Divide instruction subset */
402 {"mul", "M", "d,s,t", MATCH_MUL
, MASK_MUL
, match_opcode
, 0 },
403 {"mulh", "M", "d,s,t", MATCH_MULH
, MASK_MULH
, match_opcode
, 0 },
404 {"mulhu", "M", "d,s,t", MATCH_MULHU
, MASK_MULHU
, match_opcode
, 0 },
405 {"mulhsu", "M", "d,s,t", MATCH_MULHSU
, MASK_MULHSU
, match_opcode
, 0 },
406 {"div", "M", "d,s,t", MATCH_DIV
, MASK_DIV
, match_opcode
, 0 },
407 {"divu", "M", "d,s,t", MATCH_DIVU
, MASK_DIVU
, match_opcode
, 0 },
408 {"rem", "M", "d,s,t", MATCH_REM
, MASK_REM
, match_opcode
, 0 },
409 {"remu", "M", "d,s,t", MATCH_REMU
, MASK_REMU
, match_opcode
, 0 },
410 {"mulw", "64M", "d,s,t", MATCH_MULW
, MASK_MULW
, match_opcode
, 0 },
411 {"divw", "64M", "d,s,t", MATCH_DIVW
, MASK_DIVW
, match_opcode
, 0 },
412 {"divuw", "64M", "d,s,t", MATCH_DIVUW
, MASK_DIVUW
, match_opcode
, 0 },
413 {"remw", "64M", "d,s,t", MATCH_REMW
, MASK_REMW
, match_opcode
, 0 },
414 {"remuw", "64M", "d,s,t", MATCH_REMUW
, MASK_REMUW
, match_opcode
, 0 },
416 /* Single-precision floating-point instruction subset */
417 {"frsr", "F", "d", MATCH_FRCSR
, MASK_FRCSR
, match_opcode
, 0 },
418 {"fssr", "F", "s", MATCH_FSCSR
, MASK_FSCSR
| MASK_RD
, match_opcode
, 0 },
419 {"fssr", "F", "d,s", MATCH_FSCSR
, MASK_FSCSR
, match_opcode
, 0 },
420 {"frcsr", "F", "d", MATCH_FRCSR
, MASK_FRCSR
, match_opcode
, 0 },
421 {"fscsr", "F", "s", MATCH_FSCSR
, MASK_FSCSR
| MASK_RD
, match_opcode
, 0 },
422 {"fscsr", "F", "d,s", MATCH_FSCSR
, MASK_FSCSR
, match_opcode
, 0 },
423 {"frrm", "F", "d", MATCH_FRRM
, MASK_FRRM
, match_opcode
, 0 },
424 {"fsrm", "F", "s", MATCH_FSRM
, MASK_FSRM
| MASK_RD
, match_opcode
, 0 },
425 {"fsrm", "F", "d,s", MATCH_FSRM
, MASK_FSRM
, match_opcode
, 0 },
426 {"frflags", "F", "d", MATCH_FRFLAGS
, MASK_FRFLAGS
, match_opcode
, 0 },
427 {"fsflags", "F", "s", MATCH_FSFLAGS
, MASK_FSFLAGS
| MASK_RD
, match_opcode
, 0 },
428 {"fsflags", "F", "d,s", MATCH_FSFLAGS
, MASK_FSFLAGS
, match_opcode
, 0 },
429 {"flw", "32C", "D,Cm(Cc)", MATCH_C_FLWSP
, MASK_C_FLWSP
, match_opcode
, INSN_ALIAS
},
430 {"flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW
, MASK_C_FLW
, match_opcode
, INSN_ALIAS
},
431 {"flw", "F", "D,o(s)", MATCH_FLW
, MASK_FLW
, match_opcode
, 0 },
432 {"flw", "F", "D,A,s", 0, (int) M_FLW
, match_never
, INSN_MACRO
},
433 {"fsw", "32C", "CT,CM(Cc)", MATCH_C_FSWSP
, MASK_C_FSWSP
, match_opcode
, INSN_ALIAS
},
434 {"fsw", "32C", "CD,Ck(Cs)", MATCH_C_FSW
, MASK_C_FSW
, match_opcode
, INSN_ALIAS
},
435 {"fsw", "F", "T,q(s)", MATCH_FSW
, MASK_FSW
, match_opcode
, 0 },
436 {"fsw", "F", "T,A,s", 0, (int) M_FSW
, match_never
, INSN_MACRO
},
437 {"fmv.x.s", "F", "d,S", MATCH_FMV_X_S
, MASK_FMV_X_S
, match_opcode
, 0 },
438 {"fmv.s.x", "F", "D,s", MATCH_FMV_S_X
, MASK_FMV_S_X
, match_opcode
, 0 },
439 {"fmv.s", "F", "D,U", MATCH_FSGNJ_S
, MASK_FSGNJ_S
, match_rs1_eq_rs2
, INSN_ALIAS
},
440 {"fneg.s", "F", "D,U", MATCH_FSGNJN_S
, MASK_FSGNJN_S
, match_rs1_eq_rs2
, INSN_ALIAS
},
441 {"fabs.s", "F", "D,U", MATCH_FSGNJX_S
, MASK_FSGNJX_S
, match_rs1_eq_rs2
, INSN_ALIAS
},
442 {"fsgnj.s", "F", "D,S,T", MATCH_FSGNJ_S
, MASK_FSGNJ_S
, match_opcode
, 0 },
443 {"fsgnjn.s", "F", "D,S,T", MATCH_FSGNJN_S
, MASK_FSGNJN_S
, match_opcode
, 0 },
444 {"fsgnjx.s", "F", "D,S,T", MATCH_FSGNJX_S
, MASK_FSGNJX_S
, match_opcode
, 0 },
445 {"fadd.s", "F", "D,S,T", MATCH_FADD_S
| MASK_RM
, MASK_FADD_S
| MASK_RM
, match_opcode
, 0 },
446 {"fadd.s", "F", "D,S,T,m", MATCH_FADD_S
, MASK_FADD_S
, match_opcode
, 0 },
447 {"fsub.s", "F", "D,S,T", MATCH_FSUB_S
| MASK_RM
, MASK_FSUB_S
| MASK_RM
, match_opcode
, 0 },
448 {"fsub.s", "F", "D,S,T,m", MATCH_FSUB_S
, MASK_FSUB_S
, match_opcode
, 0 },
449 {"fmul.s", "F", "D,S,T", MATCH_FMUL_S
| MASK_RM
, MASK_FMUL_S
| MASK_RM
, match_opcode
, 0 },
450 {"fmul.s", "F", "D,S,T,m", MATCH_FMUL_S
, MASK_FMUL_S
, match_opcode
, 0 },
451 {"fdiv.s", "F", "D,S,T", MATCH_FDIV_S
| MASK_RM
, MASK_FDIV_S
| MASK_RM
, match_opcode
, 0 },
452 {"fdiv.s", "F", "D,S,T,m", MATCH_FDIV_S
, MASK_FDIV_S
, match_opcode
, 0 },
453 {"fsqrt.s", "F", "D,S", MATCH_FSQRT_S
| MASK_RM
, MASK_FSQRT_S
| MASK_RM
, match_opcode
, 0 },
454 {"fsqrt.s", "F", "D,S,m", MATCH_FSQRT_S
, MASK_FSQRT_S
, match_opcode
, 0 },
455 {"fmin.s", "F", "D,S,T", MATCH_FMIN_S
, MASK_FMIN_S
, match_opcode
, 0 },
456 {"fmax.s", "F", "D,S,T", MATCH_FMAX_S
, MASK_FMAX_S
, match_opcode
, 0 },
457 {"fmadd.s", "F", "D,S,T,R", MATCH_FMADD_S
| MASK_RM
, MASK_FMADD_S
| MASK_RM
, match_opcode
, 0 },
458 {"fmadd.s", "F", "D,S,T,R,m", MATCH_FMADD_S
, MASK_FMADD_S
, match_opcode
, 0 },
459 {"fnmadd.s", "F", "D,S,T,R", MATCH_FNMADD_S
| MASK_RM
, MASK_FNMADD_S
| MASK_RM
, match_opcode
, 0 },
460 {"fnmadd.s", "F", "D,S,T,R,m", MATCH_FNMADD_S
, MASK_FNMADD_S
, match_opcode
, 0 },
461 {"fmsub.s", "F", "D,S,T,R", MATCH_FMSUB_S
| MASK_RM
, MASK_FMSUB_S
| MASK_RM
, match_opcode
, 0 },
462 {"fmsub.s", "F", "D,S,T,R,m", MATCH_FMSUB_S
, MASK_FMSUB_S
, match_opcode
, 0 },
463 {"fnmsub.s", "F", "D,S,T,R", MATCH_FNMSUB_S
| MASK_RM
, MASK_FNMSUB_S
| MASK_RM
, match_opcode
, 0 },
464 {"fnmsub.s", "F", "D,S,T,R,m", MATCH_FNMSUB_S
, MASK_FNMSUB_S
, match_opcode
, 0 },
465 {"fcvt.w.s", "F", "d,S", MATCH_FCVT_W_S
| MASK_RM
, MASK_FCVT_W_S
| MASK_RM
, match_opcode
, 0 },
466 {"fcvt.w.s", "F", "d,S,m", MATCH_FCVT_W_S
, MASK_FCVT_W_S
, match_opcode
, 0 },
467 {"fcvt.wu.s", "F", "d,S", MATCH_FCVT_WU_S
| MASK_RM
, MASK_FCVT_WU_S
| MASK_RM
, match_opcode
, 0 },
468 {"fcvt.wu.s", "F", "d,S,m", MATCH_FCVT_WU_S
, MASK_FCVT_WU_S
, match_opcode
, 0 },
469 {"fcvt.s.w", "F", "D,s", MATCH_FCVT_S_W
| MASK_RM
, MASK_FCVT_S_W
| MASK_RM
, match_opcode
, 0 },
470 {"fcvt.s.w", "F", "D,s,m", MATCH_FCVT_S_W
, MASK_FCVT_S_W
, match_opcode
, 0 },
471 {"fcvt.s.wu", "F", "D,s", MATCH_FCVT_S_WU
| MASK_RM
, MASK_FCVT_S_W
| MASK_RM
, match_opcode
, 0 },
472 {"fcvt.s.wu", "F", "D,s,m", MATCH_FCVT_S_WU
, MASK_FCVT_S_WU
, match_opcode
, 0 },
473 {"fclass.s", "F", "d,S", MATCH_FCLASS_S
, MASK_FCLASS_S
, match_opcode
, 0 },
474 {"feq.s", "F", "d,S,T", MATCH_FEQ_S
, MASK_FEQ_S
, match_opcode
, 0 },
475 {"flt.s", "F", "d,S,T", MATCH_FLT_S
, MASK_FLT_S
, match_opcode
, 0 },
476 {"fle.s", "F", "d,S,T", MATCH_FLE_S
, MASK_FLE_S
, match_opcode
, 0 },
477 {"fgt.s", "F", "d,T,S", MATCH_FLT_S
, MASK_FLT_S
, match_opcode
, 0 },
478 {"fge.s", "F", "d,T,S", MATCH_FLE_S
, MASK_FLE_S
, match_opcode
, 0 },
479 {"fcvt.l.s", "64F", "d,S", MATCH_FCVT_L_S
| MASK_RM
, MASK_FCVT_L_S
| MASK_RM
, match_opcode
, 0 },
480 {"fcvt.l.s", "64F", "d,S,m", MATCH_FCVT_L_S
, MASK_FCVT_L_S
, match_opcode
, 0 },
481 {"fcvt.lu.s", "64F", "d,S", MATCH_FCVT_LU_S
| MASK_RM
, MASK_FCVT_LU_S
| MASK_RM
, match_opcode
, 0 },
482 {"fcvt.lu.s", "64F", "d,S,m", MATCH_FCVT_LU_S
, MASK_FCVT_LU_S
, match_opcode
, 0 },
483 {"fcvt.s.l", "64F", "D,s", MATCH_FCVT_S_L
| MASK_RM
, MASK_FCVT_S_L
| MASK_RM
, match_opcode
, 0 },
484 {"fcvt.s.l", "64F", "D,s,m", MATCH_FCVT_S_L
, MASK_FCVT_S_L
, match_opcode
, 0 },
485 {"fcvt.s.lu", "64F", "D,s", MATCH_FCVT_S_LU
| MASK_RM
, MASK_FCVT_S_L
| MASK_RM
, match_opcode
, 0 },
486 {"fcvt.s.lu", "64F", "D,s,m", MATCH_FCVT_S_LU
, MASK_FCVT_S_LU
, match_opcode
, 0 },
488 /* Double-precision floating-point instruction subset */
489 {"fld", "C", "D,Cn(Cc)", MATCH_C_FLDSP
, MASK_C_FLDSP
, match_opcode
, INSN_ALIAS
},
490 {"fld", "C", "CD,Cl(Cs)", MATCH_C_FLD
, MASK_C_FLD
, match_opcode
, INSN_ALIAS
},
491 {"fld", "D", "D,o(s)", MATCH_FLD
, MASK_FLD
, match_opcode
, 0 },
492 {"fld", "D", "D,A,s", 0, (int) M_FLD
, match_never
, INSN_MACRO
},
493 {"fsd", "C", "CT,CN(Cc)", MATCH_C_FSDSP
, MASK_C_FSDSP
, match_opcode
, INSN_ALIAS
},
494 {"fsd", "C", "CD,Cl(Cs)", MATCH_C_FSD
, MASK_C_FSD
, match_opcode
, INSN_ALIAS
},
495 {"fsd", "D", "T,q(s)", MATCH_FSD
, MASK_FSD
, match_opcode
, 0 },
496 {"fsd", "D", "T,A,s", 0, (int) M_FSD
, match_never
, INSN_MACRO
},
497 {"fmv.d", "D", "D,U", MATCH_FSGNJ_D
, MASK_FSGNJ_D
, match_rs1_eq_rs2
, INSN_ALIAS
},
498 {"fneg.d", "D", "D,U", MATCH_FSGNJN_D
, MASK_FSGNJN_D
, match_rs1_eq_rs2
, INSN_ALIAS
},
499 {"fabs.d", "D", "D,U", MATCH_FSGNJX_D
, MASK_FSGNJX_D
, match_rs1_eq_rs2
, INSN_ALIAS
},
500 {"fsgnj.d", "D", "D,S,T", MATCH_FSGNJ_D
, MASK_FSGNJ_D
, match_opcode
, 0 },
501 {"fsgnjn.d", "D", "D,S,T", MATCH_FSGNJN_D
, MASK_FSGNJN_D
, match_opcode
, 0 },
502 {"fsgnjx.d", "D", "D,S,T", MATCH_FSGNJX_D
, MASK_FSGNJX_D
, match_opcode
, 0 },
503 {"fadd.d", "D", "D,S,T", MATCH_FADD_D
| MASK_RM
, MASK_FADD_D
| MASK_RM
, match_opcode
, 0 },
504 {"fadd.d", "D", "D,S,T,m", MATCH_FADD_D
, MASK_FADD_D
, match_opcode
, 0 },
505 {"fsub.d", "D", "D,S,T", MATCH_FSUB_D
| MASK_RM
, MASK_FSUB_D
| MASK_RM
, match_opcode
, 0 },
506 {"fsub.d", "D", "D,S,T,m", MATCH_FSUB_D
, MASK_FSUB_D
, match_opcode
, 0 },
507 {"fmul.d", "D", "D,S,T", MATCH_FMUL_D
| MASK_RM
, MASK_FMUL_D
| MASK_RM
, match_opcode
, 0 },
508 {"fmul.d", "D", "D,S,T,m", MATCH_FMUL_D
, MASK_FMUL_D
, match_opcode
, 0 },
509 {"fdiv.d", "D", "D,S,T", MATCH_FDIV_D
| MASK_RM
, MASK_FDIV_D
| MASK_RM
, match_opcode
, 0 },
510 {"fdiv.d", "D", "D,S,T,m", MATCH_FDIV_D
, MASK_FDIV_D
, match_opcode
, 0 },
511 {"fsqrt.d", "D", "D,S", MATCH_FSQRT_D
| MASK_RM
, MASK_FSQRT_D
| MASK_RM
, match_opcode
, 0 },
512 {"fsqrt.d", "D", "D,S,m", MATCH_FSQRT_D
, MASK_FSQRT_D
, match_opcode
, 0 },
513 {"fmin.d", "D", "D,S,T", MATCH_FMIN_D
, MASK_FMIN_D
, match_opcode
, 0 },
514 {"fmax.d", "D", "D,S,T", MATCH_FMAX_D
, MASK_FMAX_D
, match_opcode
, 0 },
515 {"fmadd.d", "D", "D,S,T,R", MATCH_FMADD_D
| MASK_RM
, MASK_FMADD_D
| MASK_RM
, match_opcode
, 0 },
516 {"fmadd.d", "D", "D,S,T,R,m", MATCH_FMADD_D
, MASK_FMADD_D
, match_opcode
, 0 },
517 {"fnmadd.d", "D", "D,S,T,R", MATCH_FNMADD_D
| MASK_RM
, MASK_FNMADD_D
| MASK_RM
, match_opcode
, 0 },
518 {"fnmadd.d", "D", "D,S,T,R,m", MATCH_FNMADD_D
, MASK_FNMADD_D
, match_opcode
, 0 },
519 {"fmsub.d", "D", "D,S,T,R", MATCH_FMSUB_D
| MASK_RM
, MASK_FMSUB_D
| MASK_RM
, match_opcode
, 0 },
520 {"fmsub.d", "D", "D,S,T,R,m", MATCH_FMSUB_D
, MASK_FMSUB_D
, match_opcode
, 0 },
521 {"fnmsub.d", "D", "D,S,T,R", MATCH_FNMSUB_D
| MASK_RM
, MASK_FNMSUB_D
| MASK_RM
, match_opcode
, 0 },
522 {"fnmsub.d", "D", "D,S,T,R,m", MATCH_FNMSUB_D
, MASK_FNMSUB_D
, match_opcode
, 0 },
523 {"fcvt.w.d", "D", "d,S", MATCH_FCVT_W_D
| MASK_RM
, MASK_FCVT_W_D
| MASK_RM
, match_opcode
, 0 },
524 {"fcvt.w.d", "D", "d,S,m", MATCH_FCVT_W_D
, MASK_FCVT_W_D
, match_opcode
, 0 },
525 {"fcvt.wu.d", "D", "d,S", MATCH_FCVT_WU_D
| MASK_RM
, MASK_FCVT_WU_D
| MASK_RM
, match_opcode
, 0 },
526 {"fcvt.wu.d", "D", "d,S,m", MATCH_FCVT_WU_D
, MASK_FCVT_WU_D
, match_opcode
, 0 },
527 {"fcvt.d.w", "D", "D,s", MATCH_FCVT_D_W
, MASK_FCVT_D_W
| MASK_RM
, match_opcode
, 0 },
528 {"fcvt.d.wu", "D", "D,s", MATCH_FCVT_D_WU
, MASK_FCVT_D_WU
| MASK_RM
, match_opcode
, 0 },
529 {"fcvt.d.s", "D", "D,S", MATCH_FCVT_D_S
, MASK_FCVT_D_S
| MASK_RM
, match_opcode
, 0 },
530 {"fcvt.s.d", "D", "D,S", MATCH_FCVT_S_D
| MASK_RM
, MASK_FCVT_S_D
| MASK_RM
, match_opcode
, 0 },
531 {"fcvt.s.d", "D", "D,S,m", MATCH_FCVT_S_D
, MASK_FCVT_S_D
, match_opcode
, 0 },
532 {"fclass.d", "D", "d,S", MATCH_FCLASS_D
, MASK_FCLASS_D
, match_opcode
, 0 },
533 {"feq.d", "D", "d,S,T", MATCH_FEQ_D
, MASK_FEQ_D
, match_opcode
, 0 },
534 {"flt.d", "D", "d,S,T", MATCH_FLT_D
, MASK_FLT_D
, match_opcode
, 0 },
535 {"fle.d", "D", "d,S,T", MATCH_FLE_D
, MASK_FLE_D
, match_opcode
, 0 },
536 {"fgt.d", "D", "d,T,S", MATCH_FLT_D
, MASK_FLT_D
, match_opcode
, 0 },
537 {"fge.d", "D", "d,T,S", MATCH_FLE_D
, MASK_FLE_D
, match_opcode
, 0 },
538 {"fmv.x.d", "64D", "d,S", MATCH_FMV_X_D
, MASK_FMV_X_D
, match_opcode
, 0 },
539 {"fmv.d.x", "64D", "D,s", MATCH_FMV_D_X
, MASK_FMV_D_X
, match_opcode
, 0 },
540 {"fcvt.l.d", "64D", "d,S", MATCH_FCVT_L_D
| MASK_RM
, MASK_FCVT_L_D
| MASK_RM
, match_opcode
, 0 },
541 {"fcvt.l.d", "64D", "d,S,m", MATCH_FCVT_L_D
, MASK_FCVT_L_D
, match_opcode
, 0 },
542 {"fcvt.lu.d", "64D", "d,S", MATCH_FCVT_LU_D
| MASK_RM
, MASK_FCVT_LU_D
| MASK_RM
, match_opcode
, 0 },
543 {"fcvt.lu.d", "64D", "d,S,m", MATCH_FCVT_LU_D
, MASK_FCVT_LU_D
, match_opcode
, 0 },
544 {"fcvt.d.l", "64D", "D,s", MATCH_FCVT_D_L
| MASK_RM
, MASK_FCVT_D_L
| MASK_RM
, match_opcode
, 0 },
545 {"fcvt.d.l", "64D", "D,s,m", MATCH_FCVT_D_L
, MASK_FCVT_D_L
, match_opcode
, 0 },
546 {"fcvt.d.lu", "64D", "D,s", MATCH_FCVT_D_LU
| MASK_RM
, MASK_FCVT_D_L
| MASK_RM
, match_opcode
, 0 },
547 {"fcvt.d.lu", "64D", "D,s,m", MATCH_FCVT_D_LU
, MASK_FCVT_D_LU
, match_opcode
, 0 },
549 /* Compressed instructions. */
550 {"c.ebreak", "C", "", MATCH_C_EBREAK
, MASK_C_EBREAK
, match_opcode
, 0 },
551 {"c.jr", "C", "d", MATCH_C_JR
, MASK_C_JR
, match_rd_nonzero
, 0 },
552 {"c.jalr", "C", "d", MATCH_C_JALR
, MASK_C_JALR
, match_rd_nonzero
, 0 },
553 {"c.j", "C", "Ca", MATCH_C_J
, MASK_C_J
, match_opcode
, 0 },
554 {"c.jal", "32C", "Ca", MATCH_C_JAL
, MASK_C_JAL
, match_opcode
, 0 },
555 {"c.beqz", "C", "Cs,Cp", MATCH_C_BEQZ
, MASK_C_BEQZ
, match_opcode
, 0 },
556 {"c.bnez", "C", "Cs,Cp", MATCH_C_BNEZ
, MASK_C_BNEZ
, match_opcode
, 0 },
557 {"c.lwsp", "C", "d,Cm(Cc)", MATCH_C_LWSP
, MASK_C_LWSP
, match_rd_nonzero
, 0 },
558 {"c.lw", "C", "Ct,Ck(Cs)", MATCH_C_LW
, MASK_C_LW
, match_opcode
, 0 },
559 {"c.swsp", "C", "CV,CM(Cc)", MATCH_C_SWSP
, MASK_C_SWSP
, match_opcode
, 0 },
560 {"c.sw", "C", "Ct,Ck(Cs)", MATCH_C_SW
, MASK_C_SW
, match_opcode
, 0 },
561 {"c.nop", "C", "", MATCH_C_ADDI
, 0xffff, match_opcode
, 0 },
562 {"c.mv", "C", "d,CV", MATCH_C_MV
, MASK_C_MV
, match_c_add
, 0 },
563 {"c.lui", "C", "d,Cu", MATCH_C_LUI
, MASK_C_LUI
, match_c_lui
, 0 },
564 {"c.li", "C", "d,Cj", MATCH_C_LI
, MASK_C_LI
, match_rd_nonzero
, 0 },
565 {"c.addi4spn","C", "Ct,Cc,CK", MATCH_C_ADDI4SPN
, MASK_C_ADDI4SPN
, match_opcode
, 0 },
566 {"c.addi16sp","C", "Cc,CL", MATCH_C_ADDI16SP
, MASK_C_ADDI16SP
, match_opcode
, 0 },
567 {"c.addi", "C", "d,Cj", MATCH_C_ADDI
, MASK_C_ADDI
, match_rd_nonzero
, 0 },
568 {"c.add", "C", "d,CV", MATCH_C_ADD
, MASK_C_ADD
, match_c_add
, 0 },
569 {"c.sub", "C", "Cs,Ct", MATCH_C_SUB
, MASK_C_SUB
, match_opcode
, 0 },
570 {"c.and", "C", "Cs,Ct", MATCH_C_AND
, MASK_C_AND
, match_opcode
, 0 },
571 {"c.or", "C", "Cs,Ct", MATCH_C_OR
, MASK_C_OR
, match_opcode
, 0 },
572 {"c.xor", "C", "Cs,Ct", MATCH_C_XOR
, MASK_C_XOR
, match_opcode
, 0 },
573 {"c.slli", "C", "d,C>", MATCH_C_SLLI
, MASK_C_SLLI
, match_rd_nonzero
, 0 },
574 {"c.srli", "C", "Cs,C>", MATCH_C_SRLI
, MASK_C_SRLI
, match_opcode
, 0 },
575 {"c.srai", "C", "Cs,C>", MATCH_C_SRAI
, MASK_C_SRAI
, match_opcode
, 0 },
576 {"c.andi", "C", "Cs,Cj", MATCH_C_ANDI
, MASK_C_ANDI
, match_opcode
, 0 },
577 {"c.addiw", "64C", "d,Cj", MATCH_C_ADDIW
, MASK_C_ADDIW
, match_rd_nonzero
, 0 },
578 {"c.addw", "64C", "Cs,Ct", MATCH_C_ADDW
, MASK_C_ADDW
, match_opcode
, 0 },
579 {"c.subw", "64C", "Cs,Ct", MATCH_C_SUBW
, MASK_C_SUBW
, match_opcode
, 0 },
580 {"c.ldsp", "64C", "d,Cn(Cc)", MATCH_C_LDSP
, MASK_C_LDSP
, match_rd_nonzero
, 0 },
581 {"c.ld", "64C", "Ct,Cl(Cs)", MATCH_C_LD
, MASK_C_LD
, match_opcode
, 0 },
582 {"c.sdsp", "64C", "CV,CN(Cc)", MATCH_C_SDSP
, MASK_C_SDSP
, match_opcode
, 0 },
583 {"c.sd", "64C", "Ct,Cl(Cs)", MATCH_C_SD
, MASK_C_SD
, match_opcode
, 0 },
584 {"c.fldsp", "C", "D,Cn(Cc)", MATCH_C_FLDSP
, MASK_C_FLDSP
, match_opcode
, 0 },
585 {"c.fld", "C", "CD,Cl(Cs)", MATCH_C_FLD
, MASK_C_FLD
, match_opcode
, 0 },
586 {"c.fsdsp", "C", "CT,CN(Cc)", MATCH_C_FSDSP
, MASK_C_FSDSP
, match_opcode
, 0 },
587 {"c.fsd", "C", "CD,Cl(Cs)", MATCH_C_FSD
, MASK_C_FSD
, match_opcode
, 0 },
588 {"c.flwsp", "32C", "D,Cm(Cc)", MATCH_C_FLWSP
, MASK_C_FLWSP
, match_opcode
, 0 },
589 {"c.flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW
, MASK_C_FLW
, match_opcode
, 0 },
590 {"c.fswsp", "32C", "CT,CM(Cc)", MATCH_C_FSWSP
, MASK_C_FSWSP
, match_opcode
, 0 },
591 {"c.fsw", "32C", "CD,Ck(Cs)", MATCH_C_FSW
, MASK_C_FSW
, match_opcode
, 0 },
593 /* Supervisor instructions */
594 {"csrr", "I", "d,E", MATCH_CSRRS
, MASK_CSRRS
| MASK_RS1
, match_opcode
, 0 },
595 {"csrwi", "I", "E,Z", MATCH_CSRRWI
, MASK_CSRRWI
| MASK_RD
, match_opcode
, 0 },
596 {"csrw", "I", "E,s", MATCH_CSRRW
, MASK_CSRRW
| MASK_RD
, match_opcode
, 0 },
597 {"csrw", "I", "E,Z", MATCH_CSRRWI
, MASK_CSRRWI
| MASK_RD
, match_opcode
, 0 },
598 {"csrsi", "I", "E,Z", MATCH_CSRRSI
, MASK_CSRRSI
| MASK_RD
, match_opcode
, 0 },
599 {"csrs", "I", "E,s", MATCH_CSRRS
, MASK_CSRRS
| MASK_RD
, match_opcode
, 0 },
600 {"csrs", "I", "E,Z", MATCH_CSRRSI
, MASK_CSRRSI
| MASK_RD
, match_opcode
, 0 },
601 {"csrci", "I", "E,Z", MATCH_CSRRCI
, MASK_CSRRCI
| MASK_RD
, match_opcode
, 0 },
602 {"csrc", "I", "E,s", MATCH_CSRRC
, MASK_CSRRC
| MASK_RD
, match_opcode
, 0 },
603 {"csrc", "I", "E,Z", MATCH_CSRRCI
, MASK_CSRRCI
| MASK_RD
, match_opcode
, 0 },
604 {"csrrw", "I", "d,E,s", MATCH_CSRRW
, MASK_CSRRW
, match_opcode
, 0 },
605 {"csrrw", "I", "d,E,Z", MATCH_CSRRWI
, MASK_CSRRWI
, match_opcode
, 0 },
606 {"csrrs", "I", "d,E,s", MATCH_CSRRS
, MASK_CSRRS
, match_opcode
, 0 },
607 {"csrrs", "I", "d,E,Z", MATCH_CSRRSI
, MASK_CSRRSI
, match_opcode
, 0 },
608 {"csrrc", "I", "d,E,s", MATCH_CSRRC
, MASK_CSRRC
, match_opcode
, 0 },
609 {"csrrc", "I", "d,E,Z", MATCH_CSRRCI
, MASK_CSRRCI
, match_opcode
, 0 },
610 {"csrrwi", "I", "d,E,Z", MATCH_CSRRWI
, MASK_CSRRWI
, match_opcode
, 0 },
611 {"csrrsi", "I", "d,E,Z", MATCH_CSRRSI
, MASK_CSRRSI
, match_opcode
, 0 },
612 {"csrrci", "I", "d,E,Z", MATCH_CSRRCI
, MASK_CSRRCI
, match_opcode
, 0 },
613 {"uret", "I", "", MATCH_URET
, MASK_URET
, match_opcode
, 0 },
614 {"sret", "I", "", MATCH_SRET
, MASK_SRET
, match_opcode
, 0 },
615 {"hret", "I", "", MATCH_HRET
, MASK_HRET
, match_opcode
, 0 },
616 {"mret", "I", "", MATCH_MRET
, MASK_MRET
, match_opcode
, 0 },
617 {"dret", "I", "", MATCH_DRET
, MASK_DRET
, match_opcode
, 0 },
618 {"sfence.vm", "I", "", MATCH_SFENCE_VM
, MASK_SFENCE_VM
| MASK_RS1
, match_opcode
, 0 },
619 {"sfence.vm", "I", "s", MATCH_SFENCE_VM
, MASK_SFENCE_VM
, match_opcode
, 0 },
620 {"wfi", "I", "", MATCH_WFI
, MASK_WFI
, match_opcode
, 0 },
622 /* Terminate the list. */
623 {0, 0, 0, 0, 0, 0, 0}