2 Copyright (C) 2011-2018 Free Software Foundation, Inc.
4 Contributed by Andrew Waterman (andrew@sifive.com).
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
24 #include "opcode/riscv.h"
27 /* Register names used by gas and objdump. */
29 const char * const riscv_gpr_names_numeric
[NGPR
] =
31 "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
32 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
33 "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
34 "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31"
37 const char * const riscv_gpr_names_abi
[NGPR
] = {
38 "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
39 "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
40 "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",
41 "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6"
44 const char * const riscv_fpr_names_numeric
[NFPR
] =
46 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
47 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
48 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
49 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
52 const char * const riscv_fpr_names_abi
[NFPR
] = {
53 "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7",
54 "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5",
55 "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
56 "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11"
59 /* The order of overloaded instructions matters. Label arguments and
60 register arguments look the same. Instructions that can have either
61 for arguments must apear in the correct order in this table for the
62 assembler to pick the right one. In other words, entries with
63 immediate operands must apear after the same instruction with
66 Because of the lookup algorithm used, entries with the same opcode
67 name must be contiguous. */
69 #define MASK_RS1 (OP_MASK_RS1 << OP_SH_RS1)
70 #define MASK_RS2 (OP_MASK_RS2 << OP_SH_RS2)
71 #define MASK_RD (OP_MASK_RD << OP_SH_RD)
72 #define MASK_CRS2 (OP_MASK_CRS2 << OP_SH_CRS2)
73 #define MASK_IMM ENCODE_ITYPE_IMM (-1U)
74 #define MASK_RVC_IMM ENCODE_RVC_IMM (-1U)
75 #define MASK_UIMM ENCODE_UTYPE_IMM (-1U)
76 #define MASK_RM (OP_MASK_RM << OP_SH_RM)
77 #define MASK_PRED (OP_MASK_PRED << OP_SH_PRED)
78 #define MASK_SUCC (OP_MASK_SUCC << OP_SH_SUCC)
79 #define MASK_AQ (OP_MASK_AQ << OP_SH_AQ)
80 #define MASK_RL (OP_MASK_RL << OP_SH_RL)
81 #define MASK_AQRL (MASK_AQ | MASK_RL)
84 match_opcode (const struct riscv_opcode
*op
, insn_t insn
)
86 return ((insn
^ op
->match
) & op
->mask
) == 0;
90 match_never (const struct riscv_opcode
*op ATTRIBUTE_UNUSED
,
91 insn_t insn ATTRIBUTE_UNUSED
)
97 match_rs1_eq_rs2 (const struct riscv_opcode
*op
, insn_t insn
)
99 int rs1
= (insn
& MASK_RS1
) >> OP_SH_RS1
;
100 int rs2
= (insn
& MASK_RS2
) >> OP_SH_RS2
;
101 return match_opcode (op
, insn
) && rs1
== rs2
;
105 match_rd_nonzero (const struct riscv_opcode
*op
, insn_t insn
)
107 return match_opcode (op
, insn
) && ((insn
& MASK_RD
) != 0);
111 match_c_add (const struct riscv_opcode
*op
, insn_t insn
)
113 return match_rd_nonzero (op
, insn
) && ((insn
& MASK_CRS2
) != 0);
116 /* We don't allow mv zero,X to become a c.mv hint, so we need a separate
117 matching function for this. */
120 match_c_add_with_hint (const struct riscv_opcode
*op
, insn_t insn
)
122 return match_opcode (op
, insn
) && ((insn
& MASK_CRS2
) != 0);
126 match_c_nop (const struct riscv_opcode
*op
, insn_t insn
)
128 return (match_opcode (op
, insn
)
129 && (((insn
& MASK_RD
) >> OP_SH_RD
) == 0));
133 match_c_addi16sp (const struct riscv_opcode
*op
, insn_t insn
)
135 return (match_opcode (op
, insn
)
136 && (((insn
& MASK_RD
) >> OP_SH_RD
) == 2)
137 && EXTRACT_RVC_ADDI16SP_IMM (insn
) != 0);
141 match_c_lui (const struct riscv_opcode
*op
, insn_t insn
)
143 return (match_rd_nonzero (op
, insn
)
144 && (((insn
& MASK_RD
) >> OP_SH_RD
) != 2)
145 && EXTRACT_RVC_LUI_IMM (insn
) != 0);
148 /* We don't allow lui zero,X to become a c.lui hint, so we need a separate
149 matching function for this. */
152 match_c_lui_with_hint (const struct riscv_opcode
*op
, insn_t insn
)
154 return (match_opcode (op
, insn
)
155 && (((insn
& MASK_RD
) >> OP_SH_RD
) != 2)
156 && EXTRACT_RVC_LUI_IMM (insn
) != 0);
160 match_c_addi4spn (const struct riscv_opcode
*op
, insn_t insn
)
162 return match_opcode (op
, insn
) && EXTRACT_RVC_ADDI4SPN_IMM (insn
) != 0;
165 const struct riscv_opcode riscv_opcodes
[] =
167 /* name, isa, operands, match, mask, match_func, pinfo. */
168 {"unimp", "C", "", 0, 0xffffU
, match_opcode
, 0 },
169 {"unimp", "I", "", MATCH_CSRRW
| (CSR_CYCLE
<< OP_SH_CSR
), 0xffffffffU
, match_opcode
, 0 }, /* csrw cycle, x0 */
170 {"ebreak", "C", "", MATCH_C_EBREAK
, MASK_C_EBREAK
, match_opcode
, INSN_ALIAS
},
171 {"ebreak", "I", "", MATCH_EBREAK
, MASK_EBREAK
, match_opcode
, 0 },
172 {"sbreak", "C", "", MATCH_C_EBREAK
, MASK_C_EBREAK
, match_opcode
, INSN_ALIAS
},
173 {"sbreak", "I", "", MATCH_EBREAK
, MASK_EBREAK
, match_opcode
, INSN_ALIAS
},
174 {"ret", "C", "", MATCH_C_JR
| (X_RA
<< OP_SH_RD
), MASK_C_JR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
175 {"ret", "I", "", MATCH_JALR
| (X_RA
<< OP_SH_RS1
), MASK_JALR
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
176 {"jr", "C", "d", MATCH_C_JR
, MASK_C_JR
, match_rd_nonzero
, INSN_ALIAS
},
177 {"jr", "I", "s", MATCH_JALR
, MASK_JALR
| MASK_RD
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
178 {"jr", "I", "o(s)", MATCH_JALR
, MASK_JALR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
179 {"jr", "I", "s,j", MATCH_JALR
, MASK_JALR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
180 {"jalr", "C", "d", MATCH_C_JALR
, MASK_C_JALR
, match_rd_nonzero
, INSN_ALIAS
},
181 {"jalr", "I", "s", MATCH_JALR
| (X_RA
<< OP_SH_RD
), MASK_JALR
| MASK_RD
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
182 {"jalr", "I", "o(s)", MATCH_JALR
| (X_RA
<< OP_SH_RD
), MASK_JALR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
183 {"jalr", "I", "s,j", MATCH_JALR
| (X_RA
<< OP_SH_RD
), MASK_JALR
| MASK_RD
, match_opcode
, INSN_ALIAS
},
184 {"jalr", "I", "d,s", MATCH_JALR
, MASK_JALR
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
185 {"jalr", "I", "d,o(s)", MATCH_JALR
, MASK_JALR
, match_opcode
, 0 },
186 {"jalr", "I", "d,s,j", MATCH_JALR
, MASK_JALR
, match_opcode
, 0 },
187 {"j", "C", "Ca", MATCH_C_J
, MASK_C_J
, match_opcode
, INSN_ALIAS
},
188 {"j", "I", "a", MATCH_JAL
, MASK_JAL
| MASK_RD
, match_opcode
, INSN_ALIAS
},
189 {"jal", "I", "d,a", MATCH_JAL
, MASK_JAL
, match_opcode
, 0 },
190 {"jal", "32C", "Ca", MATCH_C_JAL
, MASK_C_JAL
, match_opcode
, INSN_ALIAS
},
191 {"jal", "I", "a", MATCH_JAL
| (X_RA
<< OP_SH_RD
), MASK_JAL
| MASK_RD
, match_opcode
, INSN_ALIAS
},
192 {"call", "I", "d,c", (X_T1
<< OP_SH_RS1
), (int) M_CALL
, match_never
, INSN_MACRO
},
193 {"call", "I", "c", (X_RA
<< OP_SH_RS1
) | (X_RA
<< OP_SH_RD
), (int) M_CALL
, match_never
, INSN_MACRO
},
194 {"tail", "I", "c", (X_T1
<< OP_SH_RS1
), (int) M_CALL
, match_never
, INSN_MACRO
},
195 {"jump", "I", "c,s", 0, (int) M_CALL
, match_never
, INSN_MACRO
},
196 {"nop", "C", "", MATCH_C_ADDI
, 0xffff, match_opcode
, INSN_ALIAS
},
197 {"nop", "I", "", MATCH_ADDI
, MASK_ADDI
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
198 {"lui", "C", "d,Cu", MATCH_C_LUI
, MASK_C_LUI
, match_c_lui
, INSN_ALIAS
},
199 {"lui", "I", "d,u", MATCH_LUI
, MASK_LUI
, match_opcode
, 0 },
200 {"li", "C", "d,Cv", MATCH_C_LUI
, MASK_C_LUI
, match_c_lui
, INSN_ALIAS
},
201 {"li", "C", "d,Co", MATCH_C_LI
, MASK_C_LI
, match_rd_nonzero
, INSN_ALIAS
},
202 {"li", "I", "d,j", MATCH_ADDI
, MASK_ADDI
| MASK_RS1
, match_opcode
, INSN_ALIAS
}, /* addi */
203 {"li", "I", "d,I", 0, (int) M_LI
, match_never
, INSN_MACRO
},
204 {"mv", "C", "d,CV", MATCH_C_MV
, MASK_C_MV
, match_c_add
, INSN_ALIAS
},
205 {"mv", "I", "d,s", MATCH_ADDI
, MASK_ADDI
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
206 {"move", "C", "d,CV", MATCH_C_MV
, MASK_C_MV
, match_c_add
, INSN_ALIAS
},
207 {"move", "I", "d,s", MATCH_ADDI
, MASK_ADDI
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
208 {"andi", "C", "Cs,Cw,Co", MATCH_C_ANDI
, MASK_C_ANDI
, match_opcode
, INSN_ALIAS
},
209 {"andi", "I", "d,s,j", MATCH_ANDI
, MASK_ANDI
, match_opcode
, 0 },
210 {"and", "C", "Cs,Cw,Ct", MATCH_C_AND
, MASK_C_AND
, match_opcode
, INSN_ALIAS
},
211 {"and", "C", "Cs,Ct,Cw", MATCH_C_AND
, MASK_C_AND
, match_opcode
, INSN_ALIAS
},
212 {"and", "C", "Cs,Cw,Co", MATCH_C_ANDI
, MASK_C_ANDI
, match_opcode
, INSN_ALIAS
},
213 {"and", "I", "d,s,t", MATCH_AND
, MASK_AND
, match_opcode
, 0 },
214 {"and", "I", "d,s,j", MATCH_ANDI
, MASK_ANDI
, match_opcode
, INSN_ALIAS
},
215 {"beqz", "C", "Cs,Cp", MATCH_C_BEQZ
, MASK_C_BEQZ
, match_opcode
, INSN_ALIAS
},
216 {"beqz", "I", "s,p", MATCH_BEQ
, MASK_BEQ
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
217 {"beq", "I", "s,t,p", MATCH_BEQ
, MASK_BEQ
, match_opcode
, 0 },
218 {"blez", "I", "t,p", MATCH_BGE
, MASK_BGE
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
219 {"bgez", "I", "s,p", MATCH_BGE
, MASK_BGE
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
220 {"ble", "I", "t,s,p", MATCH_BGE
, MASK_BGE
, match_opcode
, INSN_ALIAS
},
221 {"bleu", "I", "t,s,p", MATCH_BGEU
, MASK_BGEU
, match_opcode
, INSN_ALIAS
},
222 {"bge", "I", "s,t,p", MATCH_BGE
, MASK_BGE
, match_opcode
, 0 },
223 {"bgeu", "I", "s,t,p", MATCH_BGEU
, MASK_BGEU
, match_opcode
, 0 },
224 {"bltz", "I", "s,p", MATCH_BLT
, MASK_BLT
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
225 {"bgtz", "I", "t,p", MATCH_BLT
, MASK_BLT
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
226 {"blt", "I", "s,t,p", MATCH_BLT
, MASK_BLT
, match_opcode
, 0 },
227 {"bltu", "I", "s,t,p", MATCH_BLTU
, MASK_BLTU
, match_opcode
, 0 },
228 {"bgt", "I", "t,s,p", MATCH_BLT
, MASK_BLT
, match_opcode
, INSN_ALIAS
},
229 {"bgtu", "I", "t,s,p", MATCH_BLTU
, MASK_BLTU
, match_opcode
, INSN_ALIAS
},
230 {"bnez", "C", "Cs,Cp", MATCH_C_BNEZ
, MASK_C_BNEZ
, match_opcode
, INSN_ALIAS
},
231 {"bnez", "I", "s,p", MATCH_BNE
, MASK_BNE
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
232 {"bne", "I", "s,t,p", MATCH_BNE
, MASK_BNE
, match_opcode
, 0 },
233 {"addi", "C", "Ct,Cc,CK", MATCH_C_ADDI4SPN
, MASK_C_ADDI4SPN
, match_c_addi4spn
, INSN_ALIAS
},
234 {"addi", "C", "d,CU,Cj", MATCH_C_ADDI
, MASK_C_ADDI
, match_rd_nonzero
, INSN_ALIAS
},
235 {"addi", "C", "d,CU,z", MATCH_C_NOP
, MASK_C_ADDI
| MASK_RVC_IMM
, match_c_nop
, INSN_ALIAS
},
236 {"addi", "C", "Cc,Cc,CL", MATCH_C_ADDI16SP
, MASK_C_ADDI16SP
, match_c_addi16sp
, INSN_ALIAS
},
237 {"addi", "I", "d,s,j", MATCH_ADDI
, MASK_ADDI
, match_opcode
, 0 },
238 {"add", "C", "d,CU,CV", MATCH_C_ADD
, MASK_C_ADD
, match_c_add
, INSN_ALIAS
},
239 {"add", "C", "d,CV,CU", MATCH_C_ADD
, MASK_C_ADD
, match_c_add
, INSN_ALIAS
},
240 {"add", "C", "d,CU,Co", MATCH_C_ADDI
, MASK_C_ADDI
, match_rd_nonzero
, INSN_ALIAS
},
241 {"add", "C", "Ct,Cc,CK", MATCH_C_ADDI4SPN
, MASK_C_ADDI4SPN
, match_c_addi4spn
, INSN_ALIAS
},
242 {"add", "C", "Cc,Cc,CL", MATCH_C_ADDI16SP
, MASK_C_ADDI16SP
, match_c_addi16sp
, INSN_ALIAS
},
243 {"add", "I", "d,s,t", MATCH_ADD
, MASK_ADD
, match_opcode
, 0 },
244 /* This is used for TLS, where the fourth arg is %tprel_add, to get a reloc
245 applied to an add instruction, for relaxation to use. */
246 {"add", "I", "d,s,t,0",MATCH_ADD
, MASK_ADD
, match_opcode
, 0 },
247 {"add", "I", "d,s,j", MATCH_ADDI
, MASK_ADDI
, match_opcode
, INSN_ALIAS
},
248 {"la", "I", "d,A", 0, (int) M_LA
, match_never
, INSN_MACRO
},
249 {"lla", "I", "d,A", 0, (int) M_LLA
, match_never
, INSN_MACRO
},
250 {"la.tls.gd", "I", "d,A", 0, (int) M_LA_TLS_GD
, match_never
, INSN_MACRO
},
251 {"la.tls.ie", "I", "d,A", 0, (int) M_LA_TLS_IE
, match_never
, INSN_MACRO
},
252 {"neg", "I", "d,t", MATCH_SUB
, MASK_SUB
| MASK_RS1
, match_opcode
, INSN_ALIAS
}, /* sub 0 */
253 {"slli", "C", "d,CU,C>", MATCH_C_SLLI
, MASK_C_SLLI
, match_rd_nonzero
, INSN_ALIAS
},
254 {"slli", "I", "d,s,>", MATCH_SLLI
, MASK_SLLI
, match_opcode
, 0 },
255 {"sll", "C", "d,CU,C>", MATCH_C_SLLI
, MASK_C_SLLI
, match_rd_nonzero
, INSN_ALIAS
},
256 {"sll", "I", "d,s,t", MATCH_SLL
, MASK_SLL
, match_opcode
, 0 },
257 {"sll", "I", "d,s,>", MATCH_SLLI
, MASK_SLLI
, match_opcode
, INSN_ALIAS
},
258 {"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI
, MASK_C_SRLI
, match_opcode
, INSN_ALIAS
},
259 {"srli", "I", "d,s,>", MATCH_SRLI
, MASK_SRLI
, match_opcode
, 0 },
260 {"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI
, MASK_C_SRLI
, match_opcode
, INSN_ALIAS
},
261 {"srl", "I", "d,s,t", MATCH_SRL
, MASK_SRL
, match_opcode
, 0 },
262 {"srl", "I", "d,s,>", MATCH_SRLI
, MASK_SRLI
, match_opcode
, INSN_ALIAS
},
263 {"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI
, MASK_C_SRAI
, match_opcode
, INSN_ALIAS
},
264 {"srai", "I", "d,s,>", MATCH_SRAI
, MASK_SRAI
, match_opcode
, 0 },
265 {"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI
, MASK_C_SRAI
, match_opcode
, INSN_ALIAS
},
266 {"sra", "I", "d,s,t", MATCH_SRA
, MASK_SRA
, match_opcode
, 0 },
267 {"sra", "I", "d,s,>", MATCH_SRAI
, MASK_SRAI
, match_opcode
, INSN_ALIAS
},
268 {"sub", "C", "Cs,Cw,Ct", MATCH_C_SUB
, MASK_C_SUB
, match_opcode
, INSN_ALIAS
},
269 {"sub", "I", "d,s,t", MATCH_SUB
, MASK_SUB
, match_opcode
, 0 },
270 {"lb", "I", "d,o(s)", MATCH_LB
, MASK_LB
, match_opcode
, 0 },
271 {"lb", "I", "d,A", 0, (int) M_LB
, match_never
, INSN_MACRO
},
272 {"lbu", "I", "d,o(s)", MATCH_LBU
, MASK_LBU
, match_opcode
, 0 },
273 {"lbu", "I", "d,A", 0, (int) M_LBU
, match_never
, INSN_MACRO
},
274 {"lh", "I", "d,o(s)", MATCH_LH
, MASK_LH
, match_opcode
, 0 },
275 {"lh", "I", "d,A", 0, (int) M_LH
, match_never
, INSN_MACRO
},
276 {"lhu", "I", "d,o(s)", MATCH_LHU
, MASK_LHU
, match_opcode
, 0 },
277 {"lhu", "I", "d,A", 0, (int) M_LHU
, match_never
, INSN_MACRO
},
278 {"lw", "C", "d,Cm(Cc)", MATCH_C_LWSP
, MASK_C_LWSP
, match_rd_nonzero
, INSN_ALIAS
},
279 {"lw", "C", "Ct,Ck(Cs)", MATCH_C_LW
, MASK_C_LW
, match_opcode
, INSN_ALIAS
},
280 {"lw", "I", "d,o(s)", MATCH_LW
, MASK_LW
, match_opcode
, 0 },
281 {"lw", "I", "d,A", 0, (int) M_LW
, match_never
, INSN_MACRO
},
282 {"not", "I", "d,s", MATCH_XORI
| MASK_IMM
, MASK_XORI
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
283 {"ori", "I", "d,s,j", MATCH_ORI
, MASK_ORI
, match_opcode
, 0 },
284 {"or", "C", "Cs,Cw,Ct", MATCH_C_OR
, MASK_C_OR
, match_opcode
, INSN_ALIAS
},
285 {"or", "C", "Cs,Ct,Cw", MATCH_C_OR
, MASK_C_OR
, match_opcode
, INSN_ALIAS
},
286 {"or", "I", "d,s,t", MATCH_OR
, MASK_OR
, match_opcode
, 0 },
287 {"or", "I", "d,s,j", MATCH_ORI
, MASK_ORI
, match_opcode
, INSN_ALIAS
},
288 {"auipc", "I", "d,u", MATCH_AUIPC
, MASK_AUIPC
, match_opcode
, 0 },
289 {"seqz", "I", "d,s", MATCH_SLTIU
| ENCODE_ITYPE_IMM (1), MASK_SLTIU
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
290 {"snez", "I", "d,t", MATCH_SLTU
, MASK_SLTU
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
291 {"sltz", "I", "d,s", MATCH_SLT
, MASK_SLT
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
292 {"sgtz", "I", "d,t", MATCH_SLT
, MASK_SLT
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
293 {"slti", "I", "d,s,j", MATCH_SLTI
, MASK_SLTI
, match_opcode
, 0 },
294 {"slt", "I", "d,s,t", MATCH_SLT
, MASK_SLT
, match_opcode
, 0 },
295 {"slt", "I", "d,s,j", MATCH_SLTI
, MASK_SLTI
, match_opcode
, INSN_ALIAS
},
296 {"sltiu", "I", "d,s,j", MATCH_SLTIU
, MASK_SLTIU
, match_opcode
, 0 },
297 {"sltu", "I", "d,s,t", MATCH_SLTU
, MASK_SLTU
, match_opcode
, 0 },
298 {"sltu", "I", "d,s,j", MATCH_SLTIU
, MASK_SLTIU
, match_opcode
, INSN_ALIAS
},
299 {"sgt", "I", "d,t,s", MATCH_SLT
, MASK_SLT
, match_opcode
, INSN_ALIAS
},
300 {"sgtu", "I", "d,t,s", MATCH_SLTU
, MASK_SLTU
, match_opcode
, INSN_ALIAS
},
301 {"sb", "I", "t,q(s)", MATCH_SB
, MASK_SB
, match_opcode
, 0 },
302 {"sb", "I", "t,A,s", 0, (int) M_SB
, match_never
, INSN_MACRO
},
303 {"sh", "I", "t,q(s)", MATCH_SH
, MASK_SH
, match_opcode
, 0 },
304 {"sh", "I", "t,A,s", 0, (int) M_SH
, match_never
, INSN_MACRO
},
305 {"sw", "C", "CV,CM(Cc)", MATCH_C_SWSP
, MASK_C_SWSP
, match_opcode
, INSN_ALIAS
},
306 {"sw", "C", "Ct,Ck(Cs)", MATCH_C_SW
, MASK_C_SW
, match_opcode
, INSN_ALIAS
},
307 {"sw", "I", "t,q(s)", MATCH_SW
, MASK_SW
, match_opcode
, 0 },
308 {"sw", "I", "t,A,s", 0, (int) M_SW
, match_never
, INSN_MACRO
},
309 {"fence", "I", "", MATCH_FENCE
| MASK_PRED
| MASK_SUCC
, MASK_FENCE
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
310 {"fence", "I", "P,Q", MATCH_FENCE
, MASK_FENCE
| MASK_RD
| MASK_RS1
| (MASK_IMM
& ~MASK_PRED
& ~MASK_SUCC
), match_opcode
, 0 },
311 {"fence.i", "I", "", MATCH_FENCE_I
, MASK_FENCE
| MASK_RD
| MASK_RS1
| MASK_IMM
, match_opcode
, 0 },
312 {"rdcycle", "I", "d", MATCH_RDCYCLE
, MASK_RDCYCLE
, match_opcode
, INSN_ALIAS
},
313 {"rdinstret", "I", "d", MATCH_RDINSTRET
, MASK_RDINSTRET
, match_opcode
, INSN_ALIAS
},
314 {"rdtime", "I", "d", MATCH_RDTIME
, MASK_RDTIME
, match_opcode
, INSN_ALIAS
},
315 {"rdcycleh", "32I", "d", MATCH_RDCYCLEH
, MASK_RDCYCLEH
, match_opcode
, INSN_ALIAS
},
316 {"rdinstreth","32I", "d", MATCH_RDINSTRETH
, MASK_RDINSTRETH
, match_opcode
, INSN_ALIAS
},
317 {"rdtimeh", "32I", "d", MATCH_RDTIMEH
, MASK_RDTIMEH
, match_opcode
, INSN_ALIAS
},
318 {"ecall", "I", "", MATCH_SCALL
, MASK_SCALL
, match_opcode
, 0 },
319 {"scall", "I", "", MATCH_SCALL
, MASK_SCALL
, match_opcode
, 0 },
320 {"xori", "I", "d,s,j", MATCH_XORI
, MASK_XORI
, match_opcode
, 0 },
321 {"xor", "C", "Cs,Cw,Ct", MATCH_C_XOR
, MASK_C_XOR
, match_opcode
, INSN_ALIAS
},
322 {"xor", "C", "Cs,Ct,Cw", MATCH_C_XOR
, MASK_C_XOR
, match_opcode
, INSN_ALIAS
},
323 {"xor", "I", "d,s,t", MATCH_XOR
, MASK_XOR
, match_opcode
, 0 },
324 {"xor", "I", "d,s,j", MATCH_XORI
, MASK_XORI
, match_opcode
, INSN_ALIAS
},
325 {"lwu", "64I", "d,o(s)", MATCH_LWU
, MASK_LWU
, match_opcode
, 0 },
326 {"lwu", "64I", "d,A", 0, (int) M_LWU
, match_never
, INSN_MACRO
},
327 {"ld", "64C", "d,Cn(Cc)", MATCH_C_LDSP
, MASK_C_LDSP
, match_rd_nonzero
, INSN_ALIAS
},
328 {"ld", "64C", "Ct,Cl(Cs)", MATCH_C_LD
, MASK_C_LD
, match_opcode
, INSN_ALIAS
},
329 {"ld", "64I", "d,o(s)", MATCH_LD
, MASK_LD
, match_opcode
, 0 },
330 {"ld", "64I", "d,A", 0, (int) M_LD
, match_never
, INSN_MACRO
},
331 {"sd", "64C", "CV,CN(Cc)", MATCH_C_SDSP
, MASK_C_SDSP
, match_opcode
, INSN_ALIAS
},
332 {"sd", "64C", "Ct,Cl(Cs)", MATCH_C_SD
, MASK_C_SD
, match_opcode
, INSN_ALIAS
},
333 {"sd", "64I", "t,q(s)", MATCH_SD
, MASK_SD
, match_opcode
, 0 },
334 {"sd", "64I", "t,A,s", 0, (int) M_SD
, match_never
, INSN_MACRO
},
335 {"sext.w", "64C", "d,CU", MATCH_C_ADDIW
, MASK_C_ADDIW
| MASK_RVC_IMM
, match_rd_nonzero
, INSN_ALIAS
},
336 {"sext.w", "64I", "d,s", MATCH_ADDIW
, MASK_ADDIW
| MASK_IMM
, match_opcode
, INSN_ALIAS
},
337 {"addiw", "64C", "d,CU,Co", MATCH_C_ADDIW
, MASK_C_ADDIW
, match_rd_nonzero
, INSN_ALIAS
},
338 {"addiw", "64I", "d,s,j", MATCH_ADDIW
, MASK_ADDIW
, match_opcode
, 0 },
339 {"addw", "64C", "Cs,Cw,Ct", MATCH_C_ADDW
, MASK_C_ADDW
, match_opcode
, INSN_ALIAS
},
340 {"addw", "64C", "Cs,Ct,Cw", MATCH_C_ADDW
, MASK_C_ADDW
, match_opcode
, INSN_ALIAS
},
341 {"addw", "64C", "d,CU,Co", MATCH_C_ADDIW
, MASK_C_ADDIW
, match_rd_nonzero
, INSN_ALIAS
},
342 {"addw", "64I", "d,s,t", MATCH_ADDW
, MASK_ADDW
, match_opcode
, 0 },
343 {"addw", "64I", "d,s,j", MATCH_ADDIW
, MASK_ADDIW
, match_opcode
, INSN_ALIAS
},
344 {"negw", "64I", "d,t", MATCH_SUBW
, MASK_SUBW
| MASK_RS1
, match_opcode
, INSN_ALIAS
}, /* sub 0 */
345 {"slliw", "64I", "d,s,<", MATCH_SLLIW
, MASK_SLLIW
, match_opcode
, 0 },
346 {"sllw", "64I", "d,s,t", MATCH_SLLW
, MASK_SLLW
, match_opcode
, 0 },
347 {"sllw", "64I", "d,s,<", MATCH_SLLIW
, MASK_SLLIW
, match_opcode
, INSN_ALIAS
},
348 {"srliw", "64I", "d,s,<", MATCH_SRLIW
, MASK_SRLIW
, match_opcode
, 0 },
349 {"srlw", "64I", "d,s,t", MATCH_SRLW
, MASK_SRLW
, match_opcode
, 0 },
350 {"srlw", "64I", "d,s,<", MATCH_SRLIW
, MASK_SRLIW
, match_opcode
, INSN_ALIAS
},
351 {"sraiw", "64I", "d,s,<", MATCH_SRAIW
, MASK_SRAIW
, match_opcode
, 0 },
352 {"sraw", "64I", "d,s,t", MATCH_SRAW
, MASK_SRAW
, match_opcode
, 0 },
353 {"sraw", "64I", "d,s,<", MATCH_SRAIW
, MASK_SRAIW
, match_opcode
, INSN_ALIAS
},
354 {"subw", "64C", "Cs,Cw,Ct", MATCH_C_SUBW
, MASK_C_SUBW
, match_opcode
, INSN_ALIAS
},
355 {"subw", "64I", "d,s,t", MATCH_SUBW
, MASK_SUBW
, match_opcode
, 0 },
357 /* Atomic memory operation instruction subset */
358 {"lr.w", "A", "d,0(s)", MATCH_LR_W
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
359 {"sc.w", "A", "d,t,0(s)", MATCH_SC_W
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
360 {"amoadd.w", "A", "d,t,0(s)", MATCH_AMOADD_W
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
361 {"amoswap.w", "A", "d,t,0(s)", MATCH_AMOSWAP_W
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
362 {"amoand.w", "A", "d,t,0(s)", MATCH_AMOAND_W
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
363 {"amoor.w", "A", "d,t,0(s)", MATCH_AMOOR_W
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
364 {"amoxor.w", "A", "d,t,0(s)", MATCH_AMOXOR_W
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
365 {"amomax.w", "A", "d,t,0(s)", MATCH_AMOMAX_W
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
366 {"amomaxu.w", "A", "d,t,0(s)", MATCH_AMOMAXU_W
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
367 {"amomin.w", "A", "d,t,0(s)", MATCH_AMOMIN_W
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
368 {"amominu.w", "A", "d,t,0(s)", MATCH_AMOMINU_W
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
369 {"lr.w.aq", "A", "d,0(s)", MATCH_LR_W
| MASK_AQ
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
370 {"sc.w.aq", "A", "d,t,0(s)", MATCH_SC_W
| MASK_AQ
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
371 {"amoadd.w.aq", "A", "d,t,0(s)", MATCH_AMOADD_W
| MASK_AQ
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
372 {"amoswap.w.aq", "A", "d,t,0(s)", MATCH_AMOSWAP_W
| MASK_AQ
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
373 {"amoand.w.aq", "A", "d,t,0(s)", MATCH_AMOAND_W
| MASK_AQ
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
374 {"amoor.w.aq", "A", "d,t,0(s)", MATCH_AMOOR_W
| MASK_AQ
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
375 {"amoxor.w.aq", "A", "d,t,0(s)", MATCH_AMOXOR_W
| MASK_AQ
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
376 {"amomax.w.aq", "A", "d,t,0(s)", MATCH_AMOMAX_W
| MASK_AQ
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
377 {"amomaxu.w.aq", "A", "d,t,0(s)", MATCH_AMOMAXU_W
| MASK_AQ
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
378 {"amomin.w.aq", "A", "d,t,0(s)", MATCH_AMOMIN_W
| MASK_AQ
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
379 {"amominu.w.aq", "A", "d,t,0(s)", MATCH_AMOMINU_W
| MASK_AQ
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
380 {"lr.w.rl", "A", "d,0(s)", MATCH_LR_W
| MASK_RL
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
381 {"sc.w.rl", "A", "d,t,0(s)", MATCH_SC_W
| MASK_RL
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
382 {"amoadd.w.rl", "A", "d,t,0(s)", MATCH_AMOADD_W
| MASK_RL
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
383 {"amoswap.w.rl", "A", "d,t,0(s)", MATCH_AMOSWAP_W
| MASK_RL
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
384 {"amoand.w.rl", "A", "d,t,0(s)", MATCH_AMOAND_W
| MASK_RL
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
385 {"amoor.w.rl", "A", "d,t,0(s)", MATCH_AMOOR_W
| MASK_RL
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
386 {"amoxor.w.rl", "A", "d,t,0(s)", MATCH_AMOXOR_W
| MASK_RL
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
387 {"amomax.w.rl", "A", "d,t,0(s)", MATCH_AMOMAX_W
| MASK_RL
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
388 {"amomaxu.w.rl", "A", "d,t,0(s)", MATCH_AMOMAXU_W
| MASK_RL
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
389 {"amomin.w.rl", "A", "d,t,0(s)", MATCH_AMOMIN_W
| MASK_RL
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
390 {"amominu.w.rl", "A", "d,t,0(s)", MATCH_AMOMINU_W
| MASK_RL
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
391 {"lr.w.aqrl", "A", "d,0(s)", MATCH_LR_W
| MASK_AQRL
, MASK_LR_W
| MASK_AQRL
, match_opcode
, 0 },
392 {"sc.w.aqrl", "A", "d,t,0(s)", MATCH_SC_W
| MASK_AQRL
, MASK_SC_W
| MASK_AQRL
, match_opcode
, 0 },
393 {"amoadd.w.aqrl", "A", "d,t,0(s)", MATCH_AMOADD_W
| MASK_AQRL
, MASK_AMOADD_W
| MASK_AQRL
, match_opcode
, 0 },
394 {"amoswap.w.aqrl", "A", "d,t,0(s)", MATCH_AMOSWAP_W
| MASK_AQRL
, MASK_AMOSWAP_W
| MASK_AQRL
, match_opcode
, 0 },
395 {"amoand.w.aqrl", "A", "d,t,0(s)", MATCH_AMOAND_W
| MASK_AQRL
, MASK_AMOAND_W
| MASK_AQRL
, match_opcode
, 0 },
396 {"amoor.w.aqrl", "A", "d,t,0(s)", MATCH_AMOOR_W
| MASK_AQRL
, MASK_AMOOR_W
| MASK_AQRL
, match_opcode
, 0 },
397 {"amoxor.w.aqrl", "A", "d,t,0(s)", MATCH_AMOXOR_W
| MASK_AQRL
, MASK_AMOXOR_W
| MASK_AQRL
, match_opcode
, 0 },
398 {"amomax.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMAX_W
| MASK_AQRL
, MASK_AMOMAX_W
| MASK_AQRL
, match_opcode
, 0 },
399 {"amomaxu.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMAXU_W
| MASK_AQRL
, MASK_AMOMAXU_W
| MASK_AQRL
, match_opcode
, 0 },
400 {"amomin.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMIN_W
| MASK_AQRL
, MASK_AMOMIN_W
| MASK_AQRL
, match_opcode
, 0 },
401 {"amominu.w.aqrl", "A", "d,t,0(s)", MATCH_AMOMINU_W
| MASK_AQRL
, MASK_AMOMINU_W
| MASK_AQRL
, match_opcode
, 0 },
402 {"lr.d", "64A", "d,0(s)", MATCH_LR_D
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
403 {"sc.d", "64A", "d,t,0(s)", MATCH_SC_D
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
404 {"amoadd.d", "64A", "d,t,0(s)", MATCH_AMOADD_D
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
405 {"amoswap.d", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
406 {"amoand.d", "64A", "d,t,0(s)", MATCH_AMOAND_D
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
407 {"amoor.d", "64A", "d,t,0(s)", MATCH_AMOOR_D
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
408 {"amoxor.d", "64A", "d,t,0(s)", MATCH_AMOXOR_D
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
409 {"amomax.d", "64A", "d,t,0(s)", MATCH_AMOMAX_D
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
410 {"amomaxu.d", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
411 {"amomin.d", "64A", "d,t,0(s)", MATCH_AMOMIN_D
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
412 {"amominu.d", "64A", "d,t,0(s)", MATCH_AMOMINU_D
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
413 {"lr.d.aq", "64A", "d,0(s)", MATCH_LR_D
| MASK_AQ
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
414 {"sc.d.aq", "64A", "d,t,0(s)", MATCH_SC_D
| MASK_AQ
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
415 {"amoadd.d.aq", "64A", "d,t,0(s)", MATCH_AMOADD_D
| MASK_AQ
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
416 {"amoswap.d.aq", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
| MASK_AQ
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
417 {"amoand.d.aq", "64A", "d,t,0(s)", MATCH_AMOAND_D
| MASK_AQ
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
418 {"amoor.d.aq", "64A", "d,t,0(s)", MATCH_AMOOR_D
| MASK_AQ
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
419 {"amoxor.d.aq", "64A", "d,t,0(s)", MATCH_AMOXOR_D
| MASK_AQ
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
420 {"amomax.d.aq", "64A", "d,t,0(s)", MATCH_AMOMAX_D
| MASK_AQ
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
421 {"amomaxu.d.aq", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
| MASK_AQ
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
422 {"amomin.d.aq", "64A", "d,t,0(s)", MATCH_AMOMIN_D
| MASK_AQ
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
423 {"amominu.d.aq", "64A", "d,t,0(s)", MATCH_AMOMINU_D
| MASK_AQ
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
424 {"lr.d.rl", "64A", "d,0(s)", MATCH_LR_D
| MASK_RL
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
425 {"sc.d.rl", "64A", "d,t,0(s)", MATCH_SC_D
| MASK_RL
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
426 {"amoadd.d.rl", "64A", "d,t,0(s)", MATCH_AMOADD_D
| MASK_RL
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
427 {"amoswap.d.rl", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
| MASK_RL
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
428 {"amoand.d.rl", "64A", "d,t,0(s)", MATCH_AMOAND_D
| MASK_RL
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
429 {"amoor.d.rl", "64A", "d,t,0(s)", MATCH_AMOOR_D
| MASK_RL
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
430 {"amoxor.d.rl", "64A", "d,t,0(s)", MATCH_AMOXOR_D
| MASK_RL
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
431 {"amomax.d.rl", "64A", "d,t,0(s)", MATCH_AMOMAX_D
| MASK_RL
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
432 {"amomaxu.d.rl", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
| MASK_RL
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
433 {"amomin.d.rl", "64A", "d,t,0(s)", MATCH_AMOMIN_D
| MASK_RL
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
434 {"amominu.d.rl", "64A", "d,t,0(s)", MATCH_AMOMINU_D
| MASK_RL
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
435 {"lr.d.aqrl", "64A", "d,0(s)", MATCH_LR_D
| MASK_AQRL
, MASK_LR_D
| MASK_AQRL
, match_opcode
, 0 },
436 {"sc.d.aqrl", "64A", "d,t,0(s)", MATCH_SC_D
| MASK_AQRL
, MASK_SC_D
| MASK_AQRL
, match_opcode
, 0 },
437 {"amoadd.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOADD_D
| MASK_AQRL
, MASK_AMOADD_D
| MASK_AQRL
, match_opcode
, 0 },
438 {"amoswap.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOSWAP_D
| MASK_AQRL
, MASK_AMOSWAP_D
| MASK_AQRL
, match_opcode
, 0 },
439 {"amoand.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOAND_D
| MASK_AQRL
, MASK_AMOAND_D
| MASK_AQRL
, match_opcode
, 0 },
440 {"amoor.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOOR_D
| MASK_AQRL
, MASK_AMOOR_D
| MASK_AQRL
, match_opcode
, 0 },
441 {"amoxor.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOXOR_D
| MASK_AQRL
, MASK_AMOXOR_D
| MASK_AQRL
, match_opcode
, 0 },
442 {"amomax.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMAX_D
| MASK_AQRL
, MASK_AMOMAX_D
| MASK_AQRL
, match_opcode
, 0 },
443 {"amomaxu.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMAXU_D
| MASK_AQRL
, MASK_AMOMAXU_D
| MASK_AQRL
, match_opcode
, 0 },
444 {"amomin.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMIN_D
| MASK_AQRL
, MASK_AMOMIN_D
| MASK_AQRL
, match_opcode
, 0 },
445 {"amominu.d.aqrl", "64A", "d,t,0(s)", MATCH_AMOMINU_D
| MASK_AQRL
, MASK_AMOMINU_D
| MASK_AQRL
, match_opcode
, 0 },
447 /* Multiply/Divide instruction subset */
448 {"mul", "M", "d,s,t", MATCH_MUL
, MASK_MUL
, match_opcode
, 0 },
449 {"mulh", "M", "d,s,t", MATCH_MULH
, MASK_MULH
, match_opcode
, 0 },
450 {"mulhu", "M", "d,s,t", MATCH_MULHU
, MASK_MULHU
, match_opcode
, 0 },
451 {"mulhsu", "M", "d,s,t", MATCH_MULHSU
, MASK_MULHSU
, match_opcode
, 0 },
452 {"div", "M", "d,s,t", MATCH_DIV
, MASK_DIV
, match_opcode
, 0 },
453 {"divu", "M", "d,s,t", MATCH_DIVU
, MASK_DIVU
, match_opcode
, 0 },
454 {"rem", "M", "d,s,t", MATCH_REM
, MASK_REM
, match_opcode
, 0 },
455 {"remu", "M", "d,s,t", MATCH_REMU
, MASK_REMU
, match_opcode
, 0 },
456 {"mulw", "64M", "d,s,t", MATCH_MULW
, MASK_MULW
, match_opcode
, 0 },
457 {"divw", "64M", "d,s,t", MATCH_DIVW
, MASK_DIVW
, match_opcode
, 0 },
458 {"divuw", "64M", "d,s,t", MATCH_DIVUW
, MASK_DIVUW
, match_opcode
, 0 },
459 {"remw", "64M", "d,s,t", MATCH_REMW
, MASK_REMW
, match_opcode
, 0 },
460 {"remuw", "64M", "d,s,t", MATCH_REMUW
, MASK_REMUW
, match_opcode
, 0 },
462 /* Single-precision floating-point instruction subset */
463 {"frsr", "F", "d", MATCH_FRCSR
, MASK_FRCSR
, match_opcode
, 0 },
464 {"fssr", "F", "s", MATCH_FSCSR
, MASK_FSCSR
| MASK_RD
, match_opcode
, 0 },
465 {"fssr", "F", "d,s", MATCH_FSCSR
, MASK_FSCSR
, match_opcode
, 0 },
466 {"frcsr", "F", "d", MATCH_FRCSR
, MASK_FRCSR
, match_opcode
, 0 },
467 {"fscsr", "F", "s", MATCH_FSCSR
, MASK_FSCSR
| MASK_RD
, match_opcode
, 0 },
468 {"fscsr", "F", "d,s", MATCH_FSCSR
, MASK_FSCSR
, match_opcode
, 0 },
469 {"frrm", "F", "d", MATCH_FRRM
, MASK_FRRM
, match_opcode
, 0 },
470 {"fsrm", "F", "s", MATCH_FSRM
, MASK_FSRM
| MASK_RD
, match_opcode
, 0 },
471 {"fsrm", "F", "d,s", MATCH_FSRM
, MASK_FSRM
, match_opcode
, 0 },
472 {"fsrmi", "F", "d,Z", MATCH_FSRMI
, MASK_FSRMI
, match_opcode
, 0 },
473 {"fsrmi", "F", "Z", MATCH_FSRMI
, MASK_FSRMI
| MASK_RD
, match_opcode
, 0 },
474 {"frflags", "F", "d", MATCH_FRFLAGS
, MASK_FRFLAGS
, match_opcode
, 0 },
475 {"fsflags", "F", "s", MATCH_FSFLAGS
, MASK_FSFLAGS
| MASK_RD
, match_opcode
, 0 },
476 {"fsflags", "F", "d,s", MATCH_FSFLAGS
, MASK_FSFLAGS
, match_opcode
, 0 },
477 {"fsflagsi", "F", "d,Z", MATCH_FSFLAGSI
, MASK_FSFLAGSI
, match_opcode
, 0 },
478 {"fsflagsi", "F", "Z", MATCH_FSFLAGSI
, MASK_FSFLAGSI
| MASK_RD
, match_opcode
, 0 },
479 {"flw", "32C", "D,Cm(Cc)", MATCH_C_FLWSP
, MASK_C_FLWSP
, match_opcode
, INSN_ALIAS
},
480 {"flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW
, MASK_C_FLW
, match_opcode
, INSN_ALIAS
},
481 {"flw", "F", "D,o(s)", MATCH_FLW
, MASK_FLW
, match_opcode
, 0 },
482 {"flw", "F", "D,A,s", 0, (int) M_FLW
, match_never
, INSN_MACRO
},
483 {"fsw", "32C", "CT,CM(Cc)", MATCH_C_FSWSP
, MASK_C_FSWSP
, match_opcode
, INSN_ALIAS
},
484 {"fsw", "32C", "CD,Ck(Cs)", MATCH_C_FSW
, MASK_C_FSW
, match_opcode
, INSN_ALIAS
},
485 {"fsw", "F", "T,q(s)", MATCH_FSW
, MASK_FSW
, match_opcode
, 0 },
486 {"fsw", "F", "T,A,s", 0, (int) M_FSW
, match_never
, INSN_MACRO
},
488 {"fmv.x.w", "F", "d,S", MATCH_FMV_X_S
, MASK_FMV_X_S
, match_opcode
, 0 },
489 {"fmv.w.x", "F", "D,s", MATCH_FMV_S_X
, MASK_FMV_S_X
, match_opcode
, 0 },
491 {"fmv.x.s", "F", "d,S", MATCH_FMV_X_S
, MASK_FMV_X_S
, match_opcode
, 0 },
492 {"fmv.s.x", "F", "D,s", MATCH_FMV_S_X
, MASK_FMV_S_X
, match_opcode
, 0 },
494 {"fmv.s", "F", "D,U", MATCH_FSGNJ_S
, MASK_FSGNJ_S
, match_rs1_eq_rs2
, INSN_ALIAS
},
495 {"fneg.s", "F", "D,U", MATCH_FSGNJN_S
, MASK_FSGNJN_S
, match_rs1_eq_rs2
, INSN_ALIAS
},
496 {"fabs.s", "F", "D,U", MATCH_FSGNJX_S
, MASK_FSGNJX_S
, match_rs1_eq_rs2
, INSN_ALIAS
},
497 {"fsgnj.s", "F", "D,S,T", MATCH_FSGNJ_S
, MASK_FSGNJ_S
, match_opcode
, 0 },
498 {"fsgnjn.s", "F", "D,S,T", MATCH_FSGNJN_S
, MASK_FSGNJN_S
, match_opcode
, 0 },
499 {"fsgnjx.s", "F", "D,S,T", MATCH_FSGNJX_S
, MASK_FSGNJX_S
, match_opcode
, 0 },
500 {"fadd.s", "F", "D,S,T", MATCH_FADD_S
| MASK_RM
, MASK_FADD_S
| MASK_RM
, match_opcode
, 0 },
501 {"fadd.s", "F", "D,S,T,m", MATCH_FADD_S
, MASK_FADD_S
, match_opcode
, 0 },
502 {"fsub.s", "F", "D,S,T", MATCH_FSUB_S
| MASK_RM
, MASK_FSUB_S
| MASK_RM
, match_opcode
, 0 },
503 {"fsub.s", "F", "D,S,T,m", MATCH_FSUB_S
, MASK_FSUB_S
, match_opcode
, 0 },
504 {"fmul.s", "F", "D,S,T", MATCH_FMUL_S
| MASK_RM
, MASK_FMUL_S
| MASK_RM
, match_opcode
, 0 },
505 {"fmul.s", "F", "D,S,T,m", MATCH_FMUL_S
, MASK_FMUL_S
, match_opcode
, 0 },
506 {"fdiv.s", "F", "D,S,T", MATCH_FDIV_S
| MASK_RM
, MASK_FDIV_S
| MASK_RM
, match_opcode
, 0 },
507 {"fdiv.s", "F", "D,S,T,m", MATCH_FDIV_S
, MASK_FDIV_S
, match_opcode
, 0 },
508 {"fsqrt.s", "F", "D,S", MATCH_FSQRT_S
| MASK_RM
, MASK_FSQRT_S
| MASK_RM
, match_opcode
, 0 },
509 {"fsqrt.s", "F", "D,S,m", MATCH_FSQRT_S
, MASK_FSQRT_S
, match_opcode
, 0 },
510 {"fmin.s", "F", "D,S,T", MATCH_FMIN_S
, MASK_FMIN_S
, match_opcode
, 0 },
511 {"fmax.s", "F", "D,S,T", MATCH_FMAX_S
, MASK_FMAX_S
, match_opcode
, 0 },
512 {"fmadd.s", "F", "D,S,T,R", MATCH_FMADD_S
| MASK_RM
, MASK_FMADD_S
| MASK_RM
, match_opcode
, 0 },
513 {"fmadd.s", "F", "D,S,T,R,m", MATCH_FMADD_S
, MASK_FMADD_S
, match_opcode
, 0 },
514 {"fnmadd.s", "F", "D,S,T,R", MATCH_FNMADD_S
| MASK_RM
, MASK_FNMADD_S
| MASK_RM
, match_opcode
, 0 },
515 {"fnmadd.s", "F", "D,S,T,R,m", MATCH_FNMADD_S
, MASK_FNMADD_S
, match_opcode
, 0 },
516 {"fmsub.s", "F", "D,S,T,R", MATCH_FMSUB_S
| MASK_RM
, MASK_FMSUB_S
| MASK_RM
, match_opcode
, 0 },
517 {"fmsub.s", "F", "D,S,T,R,m", MATCH_FMSUB_S
, MASK_FMSUB_S
, match_opcode
, 0 },
518 {"fnmsub.s", "F", "D,S,T,R", MATCH_FNMSUB_S
| MASK_RM
, MASK_FNMSUB_S
| MASK_RM
, match_opcode
, 0 },
519 {"fnmsub.s", "F", "D,S,T,R,m", MATCH_FNMSUB_S
, MASK_FNMSUB_S
, match_opcode
, 0 },
520 {"fcvt.w.s", "F", "d,S", MATCH_FCVT_W_S
| MASK_RM
, MASK_FCVT_W_S
| MASK_RM
, match_opcode
, 0 },
521 {"fcvt.w.s", "F", "d,S,m", MATCH_FCVT_W_S
, MASK_FCVT_W_S
, match_opcode
, 0 },
522 {"fcvt.wu.s", "F", "d,S", MATCH_FCVT_WU_S
| MASK_RM
, MASK_FCVT_WU_S
| MASK_RM
, match_opcode
, 0 },
523 {"fcvt.wu.s", "F", "d,S,m", MATCH_FCVT_WU_S
, MASK_FCVT_WU_S
, match_opcode
, 0 },
524 {"fcvt.s.w", "F", "D,s", MATCH_FCVT_S_W
| MASK_RM
, MASK_FCVT_S_W
| MASK_RM
, match_opcode
, 0 },
525 {"fcvt.s.w", "F", "D,s,m", MATCH_FCVT_S_W
, MASK_FCVT_S_W
, match_opcode
, 0 },
526 {"fcvt.s.wu", "F", "D,s", MATCH_FCVT_S_WU
| MASK_RM
, MASK_FCVT_S_W
| MASK_RM
, match_opcode
, 0 },
527 {"fcvt.s.wu", "F", "D,s,m", MATCH_FCVT_S_WU
, MASK_FCVT_S_WU
, match_opcode
, 0 },
528 {"fclass.s", "F", "d,S", MATCH_FCLASS_S
, MASK_FCLASS_S
, match_opcode
, 0 },
529 {"feq.s", "F", "d,S,T", MATCH_FEQ_S
, MASK_FEQ_S
, match_opcode
, 0 },
530 {"flt.s", "F", "d,S,T", MATCH_FLT_S
, MASK_FLT_S
, match_opcode
, 0 },
531 {"fle.s", "F", "d,S,T", MATCH_FLE_S
, MASK_FLE_S
, match_opcode
, 0 },
532 {"fgt.s", "F", "d,T,S", MATCH_FLT_S
, MASK_FLT_S
, match_opcode
, 0 },
533 {"fge.s", "F", "d,T,S", MATCH_FLE_S
, MASK_FLE_S
, match_opcode
, 0 },
534 {"fcvt.l.s", "64F", "d,S", MATCH_FCVT_L_S
| MASK_RM
, MASK_FCVT_L_S
| MASK_RM
, match_opcode
, 0 },
535 {"fcvt.l.s", "64F", "d,S,m", MATCH_FCVT_L_S
, MASK_FCVT_L_S
, match_opcode
, 0 },
536 {"fcvt.lu.s", "64F", "d,S", MATCH_FCVT_LU_S
| MASK_RM
, MASK_FCVT_LU_S
| MASK_RM
, match_opcode
, 0 },
537 {"fcvt.lu.s", "64F", "d,S,m", MATCH_FCVT_LU_S
, MASK_FCVT_LU_S
, match_opcode
, 0 },
538 {"fcvt.s.l", "64F", "D,s", MATCH_FCVT_S_L
| MASK_RM
, MASK_FCVT_S_L
| MASK_RM
, match_opcode
, 0 },
539 {"fcvt.s.l", "64F", "D,s,m", MATCH_FCVT_S_L
, MASK_FCVT_S_L
, match_opcode
, 0 },
540 {"fcvt.s.lu", "64F", "D,s", MATCH_FCVT_S_LU
| MASK_RM
, MASK_FCVT_S_L
| MASK_RM
, match_opcode
, 0 },
541 {"fcvt.s.lu", "64F", "D,s,m", MATCH_FCVT_S_LU
, MASK_FCVT_S_LU
, match_opcode
, 0 },
543 /* Double-precision floating-point instruction subset */
544 {"fld", "C", "D,Cn(Cc)", MATCH_C_FLDSP
, MASK_C_FLDSP
, match_opcode
, INSN_ALIAS
},
545 {"fld", "C", "CD,Cl(Cs)", MATCH_C_FLD
, MASK_C_FLD
, match_opcode
, INSN_ALIAS
},
546 {"fld", "D", "D,o(s)", MATCH_FLD
, MASK_FLD
, match_opcode
, 0 },
547 {"fld", "D", "D,A,s", 0, (int) M_FLD
, match_never
, INSN_MACRO
},
548 {"fsd", "C", "CT,CN(Cc)", MATCH_C_FSDSP
, MASK_C_FSDSP
, match_opcode
, INSN_ALIAS
},
549 {"fsd", "C", "CD,Cl(Cs)", MATCH_C_FSD
, MASK_C_FSD
, match_opcode
, INSN_ALIAS
},
550 {"fsd", "D", "T,q(s)", MATCH_FSD
, MASK_FSD
, match_opcode
, 0 },
551 {"fsd", "D", "T,A,s", 0, (int) M_FSD
, match_never
, INSN_MACRO
},
552 {"fmv.d", "D", "D,U", MATCH_FSGNJ_D
, MASK_FSGNJ_D
, match_rs1_eq_rs2
, INSN_ALIAS
},
553 {"fneg.d", "D", "D,U", MATCH_FSGNJN_D
, MASK_FSGNJN_D
, match_rs1_eq_rs2
, INSN_ALIAS
},
554 {"fabs.d", "D", "D,U", MATCH_FSGNJX_D
, MASK_FSGNJX_D
, match_rs1_eq_rs2
, INSN_ALIAS
},
555 {"fsgnj.d", "D", "D,S,T", MATCH_FSGNJ_D
, MASK_FSGNJ_D
, match_opcode
, 0 },
556 {"fsgnjn.d", "D", "D,S,T", MATCH_FSGNJN_D
, MASK_FSGNJN_D
, match_opcode
, 0 },
557 {"fsgnjx.d", "D", "D,S,T", MATCH_FSGNJX_D
, MASK_FSGNJX_D
, match_opcode
, 0 },
558 {"fadd.d", "D", "D,S,T", MATCH_FADD_D
| MASK_RM
, MASK_FADD_D
| MASK_RM
, match_opcode
, 0 },
559 {"fadd.d", "D", "D,S,T,m", MATCH_FADD_D
, MASK_FADD_D
, match_opcode
, 0 },
560 {"fsub.d", "D", "D,S,T", MATCH_FSUB_D
| MASK_RM
, MASK_FSUB_D
| MASK_RM
, match_opcode
, 0 },
561 {"fsub.d", "D", "D,S,T,m", MATCH_FSUB_D
, MASK_FSUB_D
, match_opcode
, 0 },
562 {"fmul.d", "D", "D,S,T", MATCH_FMUL_D
| MASK_RM
, MASK_FMUL_D
| MASK_RM
, match_opcode
, 0 },
563 {"fmul.d", "D", "D,S,T,m", MATCH_FMUL_D
, MASK_FMUL_D
, match_opcode
, 0 },
564 {"fdiv.d", "D", "D,S,T", MATCH_FDIV_D
| MASK_RM
, MASK_FDIV_D
| MASK_RM
, match_opcode
, 0 },
565 {"fdiv.d", "D", "D,S,T,m", MATCH_FDIV_D
, MASK_FDIV_D
, match_opcode
, 0 },
566 {"fsqrt.d", "D", "D,S", MATCH_FSQRT_D
| MASK_RM
, MASK_FSQRT_D
| MASK_RM
, match_opcode
, 0 },
567 {"fsqrt.d", "D", "D,S,m", MATCH_FSQRT_D
, MASK_FSQRT_D
, match_opcode
, 0 },
568 {"fmin.d", "D", "D,S,T", MATCH_FMIN_D
, MASK_FMIN_D
, match_opcode
, 0 },
569 {"fmax.d", "D", "D,S,T", MATCH_FMAX_D
, MASK_FMAX_D
, match_opcode
, 0 },
570 {"fmadd.d", "D", "D,S,T,R", MATCH_FMADD_D
| MASK_RM
, MASK_FMADD_D
| MASK_RM
, match_opcode
, 0 },
571 {"fmadd.d", "D", "D,S,T,R,m", MATCH_FMADD_D
, MASK_FMADD_D
, match_opcode
, 0 },
572 {"fnmadd.d", "D", "D,S,T,R", MATCH_FNMADD_D
| MASK_RM
, MASK_FNMADD_D
| MASK_RM
, match_opcode
, 0 },
573 {"fnmadd.d", "D", "D,S,T,R,m", MATCH_FNMADD_D
, MASK_FNMADD_D
, match_opcode
, 0 },
574 {"fmsub.d", "D", "D,S,T,R", MATCH_FMSUB_D
| MASK_RM
, MASK_FMSUB_D
| MASK_RM
, match_opcode
, 0 },
575 {"fmsub.d", "D", "D,S,T,R,m", MATCH_FMSUB_D
, MASK_FMSUB_D
, match_opcode
, 0 },
576 {"fnmsub.d", "D", "D,S,T,R", MATCH_FNMSUB_D
| MASK_RM
, MASK_FNMSUB_D
| MASK_RM
, match_opcode
, 0 },
577 {"fnmsub.d", "D", "D,S,T,R,m", MATCH_FNMSUB_D
, MASK_FNMSUB_D
, match_opcode
, 0 },
578 {"fcvt.w.d", "D", "d,S", MATCH_FCVT_W_D
| MASK_RM
, MASK_FCVT_W_D
| MASK_RM
, match_opcode
, 0 },
579 {"fcvt.w.d", "D", "d,S,m", MATCH_FCVT_W_D
, MASK_FCVT_W_D
, match_opcode
, 0 },
580 {"fcvt.wu.d", "D", "d,S", MATCH_FCVT_WU_D
| MASK_RM
, MASK_FCVT_WU_D
| MASK_RM
, match_opcode
, 0 },
581 {"fcvt.wu.d", "D", "d,S,m", MATCH_FCVT_WU_D
, MASK_FCVT_WU_D
, match_opcode
, 0 },
582 {"fcvt.d.w", "D", "D,s", MATCH_FCVT_D_W
, MASK_FCVT_D_W
| MASK_RM
, match_opcode
, 0 },
583 {"fcvt.d.wu", "D", "D,s", MATCH_FCVT_D_WU
, MASK_FCVT_D_WU
| MASK_RM
, match_opcode
, 0 },
584 {"fcvt.d.s", "D", "D,S", MATCH_FCVT_D_S
, MASK_FCVT_D_S
| MASK_RM
, match_opcode
, 0 },
585 {"fcvt.s.d", "D", "D,S", MATCH_FCVT_S_D
| MASK_RM
, MASK_FCVT_S_D
| MASK_RM
, match_opcode
, 0 },
586 {"fcvt.s.d", "D", "D,S,m", MATCH_FCVT_S_D
, MASK_FCVT_S_D
, match_opcode
, 0 },
587 {"fclass.d", "D", "d,S", MATCH_FCLASS_D
, MASK_FCLASS_D
, match_opcode
, 0 },
588 {"feq.d", "D", "d,S,T", MATCH_FEQ_D
, MASK_FEQ_D
, match_opcode
, 0 },
589 {"flt.d", "D", "d,S,T", MATCH_FLT_D
, MASK_FLT_D
, match_opcode
, 0 },
590 {"fle.d", "D", "d,S,T", MATCH_FLE_D
, MASK_FLE_D
, match_opcode
, 0 },
591 {"fgt.d", "D", "d,T,S", MATCH_FLT_D
, MASK_FLT_D
, match_opcode
, 0 },
592 {"fge.d", "D", "d,T,S", MATCH_FLE_D
, MASK_FLE_D
, match_opcode
, 0 },
593 {"fmv.x.d", "64D", "d,S", MATCH_FMV_X_D
, MASK_FMV_X_D
, match_opcode
, 0 },
594 {"fmv.d.x", "64D", "D,s", MATCH_FMV_D_X
, MASK_FMV_D_X
, match_opcode
, 0 },
595 {"fcvt.l.d", "64D", "d,S", MATCH_FCVT_L_D
| MASK_RM
, MASK_FCVT_L_D
| MASK_RM
, match_opcode
, 0 },
596 {"fcvt.l.d", "64D", "d,S,m", MATCH_FCVT_L_D
, MASK_FCVT_L_D
, match_opcode
, 0 },
597 {"fcvt.lu.d", "64D", "d,S", MATCH_FCVT_LU_D
| MASK_RM
, MASK_FCVT_LU_D
| MASK_RM
, match_opcode
, 0 },
598 {"fcvt.lu.d", "64D", "d,S,m", MATCH_FCVT_LU_D
, MASK_FCVT_LU_D
, match_opcode
, 0 },
599 {"fcvt.d.l", "64D", "D,s", MATCH_FCVT_D_L
| MASK_RM
, MASK_FCVT_D_L
| MASK_RM
, match_opcode
, 0 },
600 {"fcvt.d.l", "64D", "D,s,m", MATCH_FCVT_D_L
, MASK_FCVT_D_L
, match_opcode
, 0 },
601 {"fcvt.d.lu", "64D", "D,s", MATCH_FCVT_D_LU
| MASK_RM
, MASK_FCVT_D_L
| MASK_RM
, match_opcode
, 0 },
602 {"fcvt.d.lu", "64D", "D,s,m", MATCH_FCVT_D_LU
, MASK_FCVT_D_LU
, match_opcode
, 0 },
604 /* Quad-precision floating-point instruction subset */
605 {"flq", "Q", "D,o(s)", MATCH_FLQ
, MASK_FLQ
, match_opcode
, 0 },
606 {"flq", "Q", "D,A,s", 0, (int) M_FLQ
, match_never
, INSN_MACRO
},
607 {"fsq", "Q", "T,q(s)", MATCH_FSQ
, MASK_FSQ
, match_opcode
, 0 },
608 {"fsq", "Q", "T,A,s", 0, (int) M_FSQ
, match_never
, INSN_MACRO
},
609 {"fmv.q", "Q", "D,U", MATCH_FSGNJ_Q
, MASK_FSGNJ_Q
, match_rs1_eq_rs2
, INSN_ALIAS
},
610 {"fneg.q", "Q", "D,U", MATCH_FSGNJN_Q
, MASK_FSGNJN_Q
, match_rs1_eq_rs2
, INSN_ALIAS
},
611 {"fabs.q", "Q", "D,U", MATCH_FSGNJX_Q
, MASK_FSGNJX_Q
, match_rs1_eq_rs2
, INSN_ALIAS
},
612 {"fsgnj.q", "Q", "D,S,T", MATCH_FSGNJ_Q
, MASK_FSGNJ_Q
, match_opcode
, 0 },
613 {"fsgnjn.q", "Q", "D,S,T", MATCH_FSGNJN_Q
, MASK_FSGNJN_Q
, match_opcode
, 0 },
614 {"fsgnjx.q", "Q", "D,S,T", MATCH_FSGNJX_Q
, MASK_FSGNJX_Q
, match_opcode
, 0 },
615 {"fadd.q", "Q", "D,S,T", MATCH_FADD_Q
| MASK_RM
, MASK_FADD_Q
| MASK_RM
, match_opcode
, 0 },
616 {"fadd.q", "Q", "D,S,T,m", MATCH_FADD_Q
, MASK_FADD_Q
, match_opcode
, 0 },
617 {"fsub.q", "Q", "D,S,T", MATCH_FSUB_Q
| MASK_RM
, MASK_FSUB_Q
| MASK_RM
, match_opcode
, 0 },
618 {"fsub.q", "Q", "D,S,T,m", MATCH_FSUB_Q
, MASK_FSUB_Q
, match_opcode
, 0 },
619 {"fmul.q", "Q", "D,S,T", MATCH_FMUL_Q
| MASK_RM
, MASK_FMUL_Q
| MASK_RM
, match_opcode
, 0 },
620 {"fmul.q", "Q", "D,S,T,m", MATCH_FMUL_Q
, MASK_FMUL_Q
, match_opcode
, 0 },
621 {"fdiv.q", "Q", "D,S,T", MATCH_FDIV_Q
| MASK_RM
, MASK_FDIV_Q
| MASK_RM
, match_opcode
, 0 },
622 {"fdiv.q", "Q", "D,S,T,m", MATCH_FDIV_Q
, MASK_FDIV_Q
, match_opcode
, 0 },
623 {"fsqrt.q", "Q", "D,S", MATCH_FSQRT_Q
| MASK_RM
, MASK_FSQRT_Q
| MASK_RM
, match_opcode
, 0 },
624 {"fsqrt.q", "Q", "D,S,m", MATCH_FSQRT_Q
, MASK_FSQRT_Q
, match_opcode
, 0 },
625 {"fmin.q", "Q", "D,S,T", MATCH_FMIN_Q
, MASK_FMIN_Q
, match_opcode
, 0 },
626 {"fmax.q", "Q", "D,S,T", MATCH_FMAX_Q
, MASK_FMAX_Q
, match_opcode
, 0 },
627 {"fmadd.q", "Q", "D,S,T,R", MATCH_FMADD_Q
| MASK_RM
, MASK_FMADD_Q
| MASK_RM
, match_opcode
, 0 },
628 {"fmadd.q", "Q", "D,S,T,R,m", MATCH_FMADD_Q
, MASK_FMADD_Q
, match_opcode
, 0 },
629 {"fnmadd.q", "Q", "D,S,T,R", MATCH_FNMADD_Q
| MASK_RM
, MASK_FNMADD_Q
| MASK_RM
, match_opcode
, 0 },
630 {"fnmadd.q", "Q", "D,S,T,R,m", MATCH_FNMADD_Q
, MASK_FNMADD_Q
, match_opcode
, 0 },
631 {"fmsub.q", "Q", "D,S,T,R", MATCH_FMSUB_Q
| MASK_RM
, MASK_FMSUB_Q
| MASK_RM
, match_opcode
, 0 },
632 {"fmsub.q", "Q", "D,S,T,R,m", MATCH_FMSUB_Q
, MASK_FMSUB_Q
, match_opcode
, 0 },
633 {"fnmsub.q", "Q", "D,S,T,R", MATCH_FNMSUB_Q
| MASK_RM
, MASK_FNMSUB_Q
| MASK_RM
, match_opcode
, 0 },
634 {"fnmsub.q", "Q", "D,S,T,R,m", MATCH_FNMSUB_Q
, MASK_FNMSUB_Q
, match_opcode
, 0 },
635 {"fcvt.w.q", "Q", "d,S", MATCH_FCVT_W_Q
| MASK_RM
, MASK_FCVT_W_Q
| MASK_RM
, match_opcode
, 0 },
636 {"fcvt.w.q", "Q", "d,S,m", MATCH_FCVT_W_Q
, MASK_FCVT_W_Q
, match_opcode
, 0 },
637 {"fcvt.wu.q", "Q", "d,S", MATCH_FCVT_WU_Q
| MASK_RM
, MASK_FCVT_WU_Q
| MASK_RM
, match_opcode
, 0 },
638 {"fcvt.wu.q", "Q", "d,S,m", MATCH_FCVT_WU_Q
, MASK_FCVT_WU_Q
, match_opcode
, 0 },
639 {"fcvt.q.w", "Q", "D,s", MATCH_FCVT_Q_W
, MASK_FCVT_Q_W
| MASK_RM
, match_opcode
, 0 },
640 {"fcvt.q.wu", "Q", "D,s", MATCH_FCVT_Q_WU
, MASK_FCVT_Q_WU
| MASK_RM
, match_opcode
, 0 },
641 {"fcvt.q.s", "Q", "D,S", MATCH_FCVT_Q_S
, MASK_FCVT_Q_S
| MASK_RM
, match_opcode
, 0 },
642 {"fcvt.q.d", "Q", "D,S", MATCH_FCVT_Q_D
, MASK_FCVT_Q_D
| MASK_RM
, match_opcode
, 0 },
643 {"fcvt.s.q", "Q", "D,S", MATCH_FCVT_S_Q
| MASK_RM
, MASK_FCVT_S_Q
| MASK_RM
, match_opcode
, 0 },
644 {"fcvt.s.q", "Q", "D,S,m", MATCH_FCVT_S_Q
, MASK_FCVT_S_Q
, match_opcode
, 0 },
645 {"fcvt.d.q", "Q", "D,S", MATCH_FCVT_D_Q
| MASK_RM
, MASK_FCVT_D_Q
| MASK_RM
, match_opcode
, 0 },
646 {"fcvt.d.q", "Q", "D,S,m", MATCH_FCVT_D_Q
, MASK_FCVT_D_Q
, match_opcode
, 0 },
647 {"fclass.q", "Q", "d,S", MATCH_FCLASS_Q
, MASK_FCLASS_Q
, match_opcode
, 0 },
648 {"feq.q", "Q", "d,S,T", MATCH_FEQ_Q
, MASK_FEQ_Q
, match_opcode
, 0 },
649 {"flt.q", "Q", "d,S,T", MATCH_FLT_Q
, MASK_FLT_Q
, match_opcode
, 0 },
650 {"fle.q", "Q", "d,S,T", MATCH_FLE_Q
, MASK_FLE_Q
, match_opcode
, 0 },
651 {"fgt.q", "Q", "d,T,S", MATCH_FLT_Q
, MASK_FLT_Q
, match_opcode
, 0 },
652 {"fge.q", "Q", "d,T,S", MATCH_FLE_Q
, MASK_FLE_Q
, match_opcode
, 0 },
653 {"fmv.x.q", "64Q", "d,S", MATCH_FMV_X_Q
, MASK_FMV_X_Q
, match_opcode
, 0 },
654 {"fmv.q.x", "64Q", "D,s", MATCH_FMV_Q_X
, MASK_FMV_Q_X
, match_opcode
, 0 },
655 {"fcvt.l.q", "64Q", "d,S", MATCH_FCVT_L_Q
| MASK_RM
, MASK_FCVT_L_Q
| MASK_RM
, match_opcode
, 0 },
656 {"fcvt.l.q", "64Q", "d,S,m", MATCH_FCVT_L_Q
, MASK_FCVT_L_Q
, match_opcode
, 0 },
657 {"fcvt.lu.q", "64Q", "d,S", MATCH_FCVT_LU_Q
| MASK_RM
, MASK_FCVT_LU_Q
| MASK_RM
, match_opcode
, 0 },
658 {"fcvt.lu.q", "64Q", "d,S,m", MATCH_FCVT_LU_Q
, MASK_FCVT_LU_Q
, match_opcode
, 0 },
659 {"fcvt.q.l", "64Q", "D,s", MATCH_FCVT_Q_L
| MASK_RM
, MASK_FCVT_Q_L
| MASK_RM
, match_opcode
, 0 },
660 {"fcvt.q.l", "64Q", "D,s,m", MATCH_FCVT_Q_L
, MASK_FCVT_Q_L
, match_opcode
, 0 },
661 {"fcvt.q.lu", "64Q", "D,s", MATCH_FCVT_Q_LU
| MASK_RM
, MASK_FCVT_Q_L
| MASK_RM
, match_opcode
, 0 },
662 {"fcvt.q.lu", "64Q", "D,s,m", MATCH_FCVT_Q_LU
, MASK_FCVT_Q_LU
, match_opcode
, 0 },
664 /* Compressed instructions. */
665 {"c.ebreak", "C", "", MATCH_C_EBREAK
, MASK_C_EBREAK
, match_opcode
, 0 },
666 {"c.jr", "C", "d", MATCH_C_JR
, MASK_C_JR
, match_rd_nonzero
, 0 },
667 {"c.jalr", "C", "d", MATCH_C_JALR
, MASK_C_JALR
, match_rd_nonzero
, 0 },
668 {"c.j", "C", "Ca", MATCH_C_J
, MASK_C_J
, match_opcode
, 0 },
669 {"c.jal", "32C", "Ca", MATCH_C_JAL
, MASK_C_JAL
, match_opcode
, 0 },
670 {"c.beqz", "C", "Cs,Cp", MATCH_C_BEQZ
, MASK_C_BEQZ
, match_opcode
, 0 },
671 {"c.bnez", "C", "Cs,Cp", MATCH_C_BNEZ
, MASK_C_BNEZ
, match_opcode
, 0 },
672 {"c.lwsp", "C", "d,Cm(Cc)", MATCH_C_LWSP
, MASK_C_LWSP
, match_rd_nonzero
, 0 },
673 {"c.lw", "C", "Ct,Ck(Cs)", MATCH_C_LW
, MASK_C_LW
, match_opcode
, 0 },
674 {"c.swsp", "C", "CV,CM(Cc)", MATCH_C_SWSP
, MASK_C_SWSP
, match_opcode
, 0 },
675 {"c.sw", "C", "Ct,Ck(Cs)", MATCH_C_SW
, MASK_C_SW
, match_opcode
, 0 },
676 {"c.nop", "C", "", MATCH_C_ADDI
, 0xffff, match_opcode
, INSN_ALIAS
},
677 {"c.nop", "C", "Cj", MATCH_C_ADDI
, MASK_C_ADDI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
678 {"c.mv", "C", "d,CV", MATCH_C_MV
, MASK_C_MV
, match_c_add_with_hint
, 0 },
679 {"c.lui", "C", "d,Cu", MATCH_C_LUI
, MASK_C_LUI
, match_c_lui_with_hint
, 0 },
680 {"c.li", "C", "d,Co", MATCH_C_LI
, MASK_C_LI
, match_opcode
, 0 },
681 {"c.addi4spn","C", "Ct,Cc,CK", MATCH_C_ADDI4SPN
, MASK_C_ADDI4SPN
, match_c_addi4spn
, 0 },
682 {"c.addi16sp","C", "Cc,CL", MATCH_C_ADDI16SP
, MASK_C_ADDI16SP
, match_c_addi16sp
, 0 },
683 {"c.addi", "C", "d,Co", MATCH_C_ADDI
, MASK_C_ADDI
, match_opcode
, 0 },
684 {"c.add", "C", "d,CV", MATCH_C_ADD
, MASK_C_ADD
, match_c_add_with_hint
, 0 },
685 {"c.sub", "C", "Cs,Ct", MATCH_C_SUB
, MASK_C_SUB
, match_opcode
, 0 },
686 {"c.and", "C", "Cs,Ct", MATCH_C_AND
, MASK_C_AND
, match_opcode
, 0 },
687 {"c.or", "C", "Cs,Ct", MATCH_C_OR
, MASK_C_OR
, match_opcode
, 0 },
688 {"c.xor", "C", "Cs,Ct", MATCH_C_XOR
, MASK_C_XOR
, match_opcode
, 0 },
689 {"c.slli", "C", "d,C>", MATCH_C_SLLI
, MASK_C_SLLI
, match_opcode
, 0 },
690 {"c.srli", "C", "Cs,C>", MATCH_C_SRLI
, MASK_C_SRLI
, match_opcode
, 0 },
691 {"c.srai", "C", "Cs,C>", MATCH_C_SRAI
, MASK_C_SRAI
, match_opcode
, 0 },
692 {"c.andi", "C", "Cs,Co", MATCH_C_ANDI
, MASK_C_ANDI
, match_opcode
, 0 },
693 {"c.addiw", "64C", "d,Co", MATCH_C_ADDIW
, MASK_C_ADDIW
, match_rd_nonzero
, 0 },
694 {"c.addw", "64C", "Cs,Ct", MATCH_C_ADDW
, MASK_C_ADDW
, match_opcode
, 0 },
695 {"c.subw", "64C", "Cs,Ct", MATCH_C_SUBW
, MASK_C_SUBW
, match_opcode
, 0 },
696 {"c.ldsp", "64C", "d,Cn(Cc)", MATCH_C_LDSP
, MASK_C_LDSP
, match_rd_nonzero
, 0 },
697 {"c.ld", "64C", "Ct,Cl(Cs)", MATCH_C_LD
, MASK_C_LD
, match_opcode
, 0 },
698 {"c.sdsp", "64C", "CV,CN(Cc)", MATCH_C_SDSP
, MASK_C_SDSP
, match_opcode
, 0 },
699 {"c.sd", "64C", "Ct,Cl(Cs)", MATCH_C_SD
, MASK_C_SD
, match_opcode
, 0 },
700 {"c.fldsp", "C", "D,Cn(Cc)", MATCH_C_FLDSP
, MASK_C_FLDSP
, match_opcode
, 0 },
701 {"c.fld", "C", "CD,Cl(Cs)", MATCH_C_FLD
, MASK_C_FLD
, match_opcode
, 0 },
702 {"c.fsdsp", "C", "CT,CN(Cc)", MATCH_C_FSDSP
, MASK_C_FSDSP
, match_opcode
, 0 },
703 {"c.fsd", "C", "CD,Cl(Cs)", MATCH_C_FSD
, MASK_C_FSD
, match_opcode
, 0 },
704 {"c.flwsp", "32C", "D,Cm(Cc)", MATCH_C_FLWSP
, MASK_C_FLWSP
, match_opcode
, 0 },
705 {"c.flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW
, MASK_C_FLW
, match_opcode
, 0 },
706 {"c.fswsp", "32C", "CT,CM(Cc)", MATCH_C_FSWSP
, MASK_C_FSWSP
, match_opcode
, 0 },
707 {"c.fsw", "32C", "CD,Ck(Cs)", MATCH_C_FSW
, MASK_C_FSW
, match_opcode
, 0 },
709 /* Supervisor instructions */
710 {"csrr", "I", "d,E", MATCH_CSRRS
, MASK_CSRRS
| MASK_RS1
, match_opcode
, INSN_ALIAS
},
711 {"csrwi", "I", "E,Z", MATCH_CSRRWI
, MASK_CSRRWI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
712 {"csrsi", "I", "E,Z", MATCH_CSRRSI
, MASK_CSRRSI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
713 {"csrci", "I", "E,Z", MATCH_CSRRCI
, MASK_CSRRCI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
714 {"csrw", "I", "E,s", MATCH_CSRRW
, MASK_CSRRW
| MASK_RD
, match_opcode
, INSN_ALIAS
},
715 {"csrw", "I", "E,Z", MATCH_CSRRWI
, MASK_CSRRWI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
716 {"csrs", "I", "E,s", MATCH_CSRRS
, MASK_CSRRS
| MASK_RD
, match_opcode
, INSN_ALIAS
},
717 {"csrs", "I", "E,Z", MATCH_CSRRSI
, MASK_CSRRSI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
718 {"csrc", "I", "E,s", MATCH_CSRRC
, MASK_CSRRC
| MASK_RD
, match_opcode
, INSN_ALIAS
},
719 {"csrc", "I", "E,Z", MATCH_CSRRCI
, MASK_CSRRCI
| MASK_RD
, match_opcode
, INSN_ALIAS
},
720 {"csrrwi", "I", "d,E,Z", MATCH_CSRRWI
, MASK_CSRRWI
, match_opcode
, 0 },
721 {"csrrsi", "I", "d,E,Z", MATCH_CSRRSI
, MASK_CSRRSI
, match_opcode
, 0 },
722 {"csrrci", "I", "d,E,Z", MATCH_CSRRCI
, MASK_CSRRCI
, match_opcode
, 0 },
723 {"csrrw", "I", "d,E,s", MATCH_CSRRW
, MASK_CSRRW
, match_opcode
, 0 },
724 {"csrrw", "I", "d,E,Z", MATCH_CSRRWI
, MASK_CSRRWI
, match_opcode
, INSN_ALIAS
},
725 {"csrrs", "I", "d,E,s", MATCH_CSRRS
, MASK_CSRRS
, match_opcode
, 0 },
726 {"csrrs", "I", "d,E,Z", MATCH_CSRRSI
, MASK_CSRRSI
, match_opcode
, INSN_ALIAS
},
727 {"csrrc", "I", "d,E,s", MATCH_CSRRC
, MASK_CSRRC
, match_opcode
, 0 },
728 {"csrrc", "I", "d,E,Z", MATCH_CSRRCI
, MASK_CSRRCI
, match_opcode
, INSN_ALIAS
},
729 {"uret", "I", "", MATCH_URET
, MASK_URET
, match_opcode
, 0 },
730 {"sret", "I", "", MATCH_SRET
, MASK_SRET
, match_opcode
, 0 },
731 {"hret", "I", "", MATCH_HRET
, MASK_HRET
, match_opcode
, 0 },
732 {"mret", "I", "", MATCH_MRET
, MASK_MRET
, match_opcode
, 0 },
733 {"dret", "I", "", MATCH_DRET
, MASK_DRET
, match_opcode
, 0 },
734 {"sfence.vm", "I", "", MATCH_SFENCE_VM
, MASK_SFENCE_VM
| MASK_RS1
, match_opcode
, 0 },
735 {"sfence.vm", "I", "s", MATCH_SFENCE_VM
, MASK_SFENCE_VM
, match_opcode
, 0 },
736 {"sfence.vma","I", "", MATCH_SFENCE_VMA
, MASK_SFENCE_VMA
| MASK_RS1
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
737 {"sfence.vma","I", "s", MATCH_SFENCE_VMA
, MASK_SFENCE_VMA
| MASK_RS2
, match_opcode
, INSN_ALIAS
},
738 {"sfence.vma","I", "s,t", MATCH_SFENCE_VMA
, MASK_SFENCE_VMA
, match_opcode
, 0 },
739 {"wfi", "I", "", MATCH_WFI
, MASK_WFI
, match_opcode
, 0 },
741 /* Terminate the list. */
742 {0, 0, 0, 0, 0, 0, 0}