1 /* s12z-decode.c -- Freescale S12Z disassembly
2 Copyright (C) 2018 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
27 #include "opcode/s12z.h"
34 typedef int (* insn_bytes_f
) (struct mem_read_abstraction_base
*);
36 typedef void (*operands_f
) (struct mem_read_abstraction_base
*,
37 int *n_operands
, struct operand
**operand
);
39 typedef enum optr (*discriminator_f
) (struct mem_read_abstraction_base
*,
76 static const struct opr_pb opr_pb
[] = {
77 {0xF0, 0x70, 1, OPR_IMMe4
},
78 {0xF8, 0xB8, 1, OPR_REG
},
79 {0xC0, 0x40, 1, OPR_OFXYS
},
80 {0xEF, 0xE3, 1, OPR_XY_PRE_INC
},
81 {0xEF, 0xE7, 1, OPR_XY_POST_INC
},
82 {0xEF, 0xC3, 1, OPR_XY_PRE_DEC
},
83 {0xEF, 0xC7, 1, OPR_XY_POST_DEC
},
84 {0xFF, 0xFB, 1, OPR_S_PRE_DEC
},
85 {0xFF, 0xFF, 1, OPR_S_POST_INC
},
86 {0xC8, 0x88, 1, OPR_REG_DIRECT
},
87 {0xE8, 0xC8, 1, OPR_REG_INDIRECT
},
89 {0xCE, 0xC0, 2, OPR_IDX_DIRECT
},
90 {0xCE, 0xC4, 2, OPR_IDX_INDIRECT
},
91 {0xC0, 0x00, 2, OPR_EXT1
},
93 {0xC8, 0x80, 3, OPR_IDX2_REG
},
94 {0xFA, 0xF8, 3, OPR_EXT18
},
96 {0xCF, 0xC2, 4, OPR_IDX3_DIRECT
},
97 {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT
},
99 {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG
},
100 {0xFF, 0xFA, 4, OPR_EXT3_DIRECT
},
101 {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT
},
104 /* Return the number of bytes in a OPR operand, including the XB postbyte.
105 It does not include any preceeding opcodes. */
107 x_opr_n_bytes (struct mem_read_abstraction_base
*mra
, int offset
)
110 int status
= mra
->read (mra
, offset
, 1, &xb
);
115 for (i
= 0; i
< sizeof (opr_pb
) / sizeof (opr_pb
[0]); ++i
)
117 const struct opr_pb
*pb
= opr_pb
+ i
;
118 if ((xb
& pb
->mask
) == pb
->value
)
120 return pb
->n_operands
;
128 opr_n_bytes_p1 (struct mem_read_abstraction_base
*mra
)
130 return 1 + x_opr_n_bytes (mra
, 0);
134 opr_n_bytes2 (struct mem_read_abstraction_base
*mra
)
136 int s
= x_opr_n_bytes (mra
, 0);
137 s
+= x_opr_n_bytes (mra
, s
);
160 static const struct opr_bb bb_modes
[] =
162 {0x60, 0x00, 2, false, BB_REG_REG_REG
},
163 {0x60, 0x20, 3, false, BB_REG_REG_IMM
},
164 {0x70, 0x40, 2, true, BB_REG_OPR_REG
},
165 {0x70, 0x50, 2, true, BB_OPR_REG_REG
},
166 {0x70, 0x60, 3, true, BB_REG_OPR_IMM
},
167 {0x70, 0x70, 3, true, BB_OPR_REG_IMM
}
171 bfextins_n_bytes (struct mem_read_abstraction_base
*mra
)
174 int status
= mra
->read (mra
, 0, 1, &bb
);
179 const struct opr_bb
*bbs
= 0;
180 for (i
= 0; i
< sizeof (bb_modes
) / sizeof (bb_modes
[0]); ++i
)
183 if ((bb
& bbs
->mask
) == bbs
->value
)
189 int n
= bbs
->n_operands
;
191 n
+= x_opr_n_bytes (mra
, n
- 1);
197 single (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
)
203 two (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
)
209 three (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
)
215 four (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
)
221 five (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
)
227 pcrel_15bit (struct mem_read_abstraction_base
*mra
)
230 int status
= mra
->read (mra
, 0, 1, &byte
);
233 return (byte
& 0x80) ? 3 : 2;
239 xysp_reg_from_postbyte (uint8_t postbyte
)
242 switch ((postbyte
& 0x30) >> 4)
259 static struct operand
*
260 create_immediate_operand (int value
)
262 struct immediate_operand
*op
= malloc (sizeof (*op
));
264 ((struct operand
*)op
)->cl
= OPND_CL_IMMEDIATE
;
266 ((struct operand
*)op
)->osize
= -1;
268 return (struct operand
*) op
;
271 static struct operand
*
272 create_bitfield_operand (int width
, int offset
)
274 struct bitfield_operand
*op
= malloc (sizeof (*op
));
276 ((struct operand
*)op
)->cl
= OPND_CL_BIT_FIELD
;
279 ((struct operand
*)op
)->osize
= -1;
281 return (struct operand
*) op
;
284 static struct operand
*
285 create_register_operand_with_size (int reg
, short osize
)
287 struct register_operand
*op
= malloc (sizeof (*op
));
289 ((struct operand
*)op
)->cl
= OPND_CL_REGISTER
;
291 ((struct operand
*)op
)->osize
= osize
;
293 return (struct operand
*) op
;
296 static struct operand
*
297 create_register_operand (int reg
)
299 return create_register_operand_with_size (reg
, -1);
302 static struct operand
*
303 create_register_all_operand (void)
305 struct register_operand
*op
= malloc (sizeof (*op
));
307 ((struct operand
*)op
)->cl
= OPND_CL_REGISTER_ALL
;
308 ((struct operand
*)op
)->osize
= -1;
310 return (struct operand
*) op
;
313 static struct operand
*
314 create_register_all16_operand (void)
316 struct register_operand
*op
= malloc (sizeof (*op
));
318 ((struct operand
*)op
)->cl
= OPND_CL_REGISTER_ALL16
;
319 ((struct operand
*)op
)->osize
= -1;
321 return (struct operand
*) op
;
325 static struct operand
*
326 create_simple_memory_operand (bfd_vma addr
, bfd_vma base
, bool relative
)
328 struct simple_memory_operand
*op
= malloc (sizeof (*op
));
330 ((struct operand
*)op
)->cl
= OPND_CL_SIMPLE_MEMORY
;
333 op
->relative
= relative
;
334 ((struct operand
*)op
)->osize
= -1;
336 assert (relative
|| base
== 0);
338 return (struct operand
*) op
;
341 static struct operand
*
342 create_memory_operand (bool indirect
, int base
, int n_regs
, int reg0
, int reg1
)
344 struct memory_operand
*op
= malloc (sizeof (*op
));
346 ((struct operand
*)op
)->cl
= OPND_CL_MEMORY
;
347 op
->indirect
= indirect
;
348 op
->base_offset
= base
;
349 op
->mutation
= OPND_RM_NONE
;
353 ((struct operand
*)op
)->osize
= -1;
355 return (struct operand
*) op
;
358 static struct operand
*
359 create_memory_auto_operand (enum op_reg_mutation mutation
, int reg
)
361 struct memory_operand
*op
= malloc (sizeof (*op
));
363 ((struct operand
*)op
)->cl
= OPND_CL_MEMORY
;
364 op
->indirect
= false;
366 op
->mutation
= mutation
;
370 ((struct operand
*)op
)->osize
= -1;
372 return (struct operand
*) op
;
378 z_ext24_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
,
379 struct operand
**operand
)
382 int status
= mra
->read (mra
, 0, 3, buffer
);
388 for (i
= 0; i
< 3; ++i
)
394 operand
[(*n_operands
)++] = create_simple_memory_operand (addr
, 0, false);
399 z_decode_signed_value (struct mem_read_abstraction_base
*mra
, int offset
,
405 if (0 > mra
->read (mra
, offset
, size
, buffer
))
412 for (i
= 0; i
< size
; ++i
)
414 value
|= buffer
[i
] << (8 * (size
- i
- 1));
417 if (buffer
[0] & 0x80)
419 /* Deal with negative values */
420 value
-= 0x1UL
<< (size
* 8);
426 decode_signed_value (struct mem_read_abstraction_base
*mra
, short size
)
428 return z_decode_signed_value (mra
, 0, size
);
432 x_imm1 (struct mem_read_abstraction_base
*mra
,
434 int *n_operands
, struct operand
**operand
)
437 int status
= mra
->read (mra
, offset
, 1, &byte
);
441 operand
[(*n_operands
)++] = create_immediate_operand (byte
);
444 /* An eight bit immediate operand. */
446 imm1_decode (struct mem_read_abstraction_base
*mra
,
447 int *n_operands
, struct operand
**operand
)
449 x_imm1 (mra
, 0, n_operands
, operand
);
453 trap_decode (struct mem_read_abstraction_base
*mra
,
454 int *n_operands
, struct operand
**operand
)
456 x_imm1 (mra
, -1, n_operands
, operand
);
460 static struct operand
*
461 x_opr_decode_with_size (struct mem_read_abstraction_base
*mra
, int offset
,
465 int status
= mra
->read (mra
, offset
, 1, &postbyte
);
470 enum OPR_MODE mode
= -1;
472 for (i
= 0; i
< sizeof (opr_pb
) / sizeof (opr_pb
[0]); ++i
)
474 const struct opr_pb
*pb
= opr_pb
+ i
;
475 if ((postbyte
& pb
->mask
) == pb
->value
)
482 struct operand
*operand
= NULL
;
488 uint8_t x
= (postbyte
& 0x0F);
494 operand
= create_immediate_operand (n
);
499 uint8_t x
= (postbyte
& 0x07);
500 operand
= create_register_operand (x
);
505 operand
= create_memory_operand (false, postbyte
& 0x0F, 1,
506 xysp_reg_from_postbyte (postbyte
), -1);
511 operand
= create_memory_operand (false, 0, 2, postbyte
& 0x07,
512 xysp_reg_from_postbyte (postbyte
));
515 case OPR_REG_INDIRECT
:
517 operand
= create_memory_operand (true, 0, 2, postbyte
& 0x07,
518 (postbyte
& 0x10) ? REG_Y
: REG_X
);
522 case OPR_IDX_INDIRECT
:
525 mra
->read (mra
, offset
, 1, &x1
);
530 /* Deal with negative values */
534 operand
= create_memory_operand (true, idx
, 1,
535 xysp_reg_from_postbyte (postbyte
), -1);
539 case OPR_IDX3_DIRECT
:
542 mra
->read (mra
, offset
, 3, x
);
543 int idx
= x
[0] << 16 | x
[1] << 8 | x
[2];
547 /* Deal with negative values */
551 operand
= create_memory_operand (false, idx
, 1,
552 xysp_reg_from_postbyte (postbyte
), -1);
556 case OPR_IDX3_DIRECT_REG
:
559 mra
->read (mra
, offset
, 3, x
);
560 int idx
= x
[0] << 16 | x
[1] << 8 | x
[2];
564 /* Deal with negative values */
568 operand
= create_memory_operand (false, idx
, 1, postbyte
& 0x07, -1);
572 case OPR_IDX3_INDIRECT
:
575 mra
->read (mra
, offset
, 3, x
);
576 int idx
= x
[0] << 16 | x
[1] << 8 | x
[2];
580 /* Deal with negative values */
584 operand
= create_memory_operand (true, idx
, 1,
585 xysp_reg_from_postbyte (postbyte
), -1);
592 mra
->read (mra
, offset
, 1, &x1
);
597 /* Deal with negative values */
601 operand
= create_memory_operand (false, idx
, 1,
602 xysp_reg_from_postbyte (postbyte
), -1);
609 mra
->read (mra
, offset
, 2, x
);
610 uint32_t idx
= x
[1] | x
[0] << 8 ;
611 idx
|= (postbyte
& 0x30) << 12;
613 operand
= create_memory_operand (false, idx
, 1, postbyte
& 0x07, -1);
619 operand
= create_memory_auto_operand (OPND_RM_PRE_INC
,
620 (postbyte
& 0x10) ? REG_Y
: REG_X
);
623 case OPR_XY_POST_INC
:
625 operand
= create_memory_auto_operand (OPND_RM_POST_INC
,
626 (postbyte
& 0x10) ? REG_Y
: REG_X
);
631 operand
= create_memory_auto_operand (OPND_RM_PRE_DEC
,
632 (postbyte
& 0x10) ? REG_Y
: REG_X
);
635 case OPR_XY_POST_DEC
:
637 operand
= create_memory_auto_operand (OPND_RM_POST_DEC
,
638 (postbyte
& 0x10) ? REG_Y
: REG_X
);
643 operand
= create_memory_auto_operand (OPND_RM_PRE_DEC
, REG_S
);
648 operand
= create_memory_auto_operand (OPND_RM_POST_INC
, REG_S
);
654 const size_t size
= 2;
656 status
= mra
->read (mra
, offset
, size
, buffer
);
661 for (i
= 0; i
< size
; ++i
)
667 ext18
|= (postbyte
& 0x01) << 16;
668 ext18
|= (postbyte
& 0x04) << 15;
670 operand
= create_simple_memory_operand (ext18
, 0, false);
677 mra
->read (mra
, offset
, 1, &x1
);
680 addr
|= (postbyte
& 0x3f) << 8;
682 operand
= create_simple_memory_operand (addr
, 0, false);
686 case OPR_EXT3_DIRECT
:
688 const size_t size
= 3;
690 status
= mra
->read (mra
, offset
, size
, buffer
);
695 for (i
= 0; i
< size
; ++i
)
697 ext24
|= buffer
[i
] << (8 * (size
- i
- 1));
700 operand
= create_simple_memory_operand (ext24
, 0, false);
704 case OPR_EXT3_INDIRECT
:
706 const size_t size
= 3;
708 status
= mra
->read (mra
, offset
, size
, buffer
);
713 for (i
= 0; i
< size
; ++i
)
715 ext24
|= buffer
[i
] << (8 * (size
- i
- 1));
718 operand
= create_memory_operand (true, ext24
, 0, -1, -1);
723 printf ("Unknown OPR mode #0x%x (%d)", postbyte
, mode
);
727 operand
->osize
= osize
;
732 static struct operand
*
733 x_opr_decode (struct mem_read_abstraction_base
*mra
, int offset
)
735 return x_opr_decode_with_size (mra
, offset
, -1);
739 z_opr_decode (struct mem_read_abstraction_base
*mra
,
740 int *n_operands
, struct operand
**operand
)
742 operand
[(*n_operands
)++] = x_opr_decode (mra
, 0);
746 z_opr_decode2 (struct mem_read_abstraction_base
*mra
,
747 int *n_operands
, struct operand
**operand
)
749 int n
= x_opr_n_bytes (mra
, 0);
751 operand
[(*n_operands
)++] = x_opr_decode (mra
, 0);
752 operand
[(*n_operands
)++] = x_opr_decode (mra
, n
);
756 imm1234 (struct mem_read_abstraction_base
*mra
, int base
,
757 int *n_operands
, struct operand
**operand
)
760 int status
= mra
->read (mra
, -1, 1, &opcode
);
766 int size
= registers
[opcode
& 0xF].bytes
;
768 uint32_t imm
= decode_signed_value (mra
, size
);
770 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
774 /* Special case of LD and CMP with register S and IMM operand */
776 reg_s_imm (struct mem_read_abstraction_base
*mra
, int *n_operands
,
777 struct operand
**operand
)
779 operand
[(*n_operands
)++] = create_register_operand (REG_S
);
781 uint32_t imm
= decode_signed_value (mra
, 3);
782 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
785 /* Special case of LD, CMP and ST with register S and OPR operand */
787 reg_s_opr (struct mem_read_abstraction_base
*mra
, int *n_operands
,
788 struct operand
**operand
)
790 operand
[(*n_operands
)++] = create_register_operand (REG_S
);
791 operand
[(*n_operands
)++] = x_opr_decode (mra
, 0);
795 z_imm1234_8base (struct mem_read_abstraction_base
*mra
, int *n_operands
,
796 struct operand
**operand
)
798 imm1234 (mra
, 8, n_operands
, operand
);
802 z_imm1234_0base (struct mem_read_abstraction_base
*mra
, int *n_operands
,
803 struct operand
**operand
)
805 imm1234 (mra
, 0, n_operands
, operand
);
810 z_tfr (struct mem_read_abstraction_base
*mra
, int *n_operands
,
811 struct operand
**operand
)
814 int status
= mra
->read (mra
, 0, 1, &byte
);
818 operand
[(*n_operands
)++] = create_register_operand (byte
>> 4);
819 operand
[(*n_operands
)++] = create_register_operand (byte
& 0x0F);
823 z_reg (struct mem_read_abstraction_base
*mra
, int *n_operands
,
824 struct operand
**operand
)
827 int status
= mra
->read (mra
, -1, 1, &byte
);
831 operand
[(*n_operands
)++] = create_register_operand (byte
& 0x07);
836 reg_xy (struct mem_read_abstraction_base
*mra
,
837 int *n_operands
, struct operand
**operand
)
840 int status
= mra
->read (mra
, -1, 1, &byte
);
844 operand
[(*n_operands
)++] =
845 create_register_operand ((byte
& 0x01) ? REG_Y
: REG_X
);
849 lea_reg_xys_opr (struct mem_read_abstraction_base
*mra
,
850 int *n_operands
, struct operand
**operand
)
853 int status
= mra
->read (mra
, -1, 1, &byte
);
871 operand
[(*n_operands
)++] = create_register_operand (reg_xys
);
872 operand
[(*n_operands
)++] = x_opr_decode (mra
, 0);
876 lea_reg_xys (struct mem_read_abstraction_base
*mra
,
877 int *n_operands
, struct operand
**operand
)
880 int status
= mra
->read (mra
, -1, 1, &byte
);
898 status
= mra
->read (mra
, 0, 1, &byte
);
902 operand
[(*n_operands
)++] = create_register_operand (reg_n
);
903 operand
[(*n_operands
)++] = create_memory_operand (false, (int8_t) byte
,
908 /* PC Relative offsets of size 15 or 7 bits */
910 rel_15_7 (struct mem_read_abstraction_base
*mra
, int offset
,
911 int *n_operands
, struct operand
**operands
)
914 int status
= mra
->read (mra
, offset
- 1, 1, &upper
);
918 bool rel_size
= (upper
& 0x80);
920 int16_t addr
= upper
;
923 /* 15 bits. Get the next byte */
925 status
= mra
->read (mra
, offset
, 1, &lower
);
933 bool negative
= (addr
& 0x4000);
936 addr
= addr
- 0x4000;
941 bool negative
= (addr
& 0x40);
947 operands
[(*n_operands
)++] =
948 create_simple_memory_operand (addr
, mra
->posn (mra
) - 1, true);
952 /* PC Relative offsets of size 15 or 7 bits */
954 decode_rel_15_7 (struct mem_read_abstraction_base
*mra
,
955 int *n_operands
, struct operand
**operand
)
957 rel_15_7 (mra
, 1, n_operands
, operand
);
960 static int shift_n_bytes (struct mem_read_abstraction_base
*);
961 static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base
*);
962 static int loop_prim_n_bytes (struct mem_read_abstraction_base
*);
963 static int bm_rel_n_bytes (struct mem_read_abstraction_base
*);
964 static int mul_n_bytes (struct mem_read_abstraction_base
*);
965 static int bm_n_bytes (struct mem_read_abstraction_base
*);
967 static void psh_pul_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operand
);
968 static void shift_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operand
);
969 static void mul_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operand
);
970 static void bm_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operand
);
971 static void bm_rel_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operand
);
972 static void mov_imm_opr (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operand
);
973 static void loop_primitive_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operands
);
974 static void bit_field_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operands
);
975 static void exg_sex_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
, struct operand
**operands
);
978 static enum optr
shift_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
);
979 static enum optr
psh_pul_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
);
980 static enum optr
mul_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
);
981 static enum optr
loop_primitive_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
);
982 static enum optr
bit_field_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
);
983 static enum optr
exg_sex_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
);
987 cmp_xy (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
,
988 int *n_operands
, struct operand
**operand
)
990 operand
[(*n_operands
)++] = create_register_operand (REG_X
);
991 operand
[(*n_operands
)++] = create_register_operand (REG_Y
);
995 sub_d6_x_y (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
,
996 int *n_operands
, struct operand
**operand
)
998 operand
[(*n_operands
)++] = create_register_operand (REG_D6
);
999 operand
[(*n_operands
)++] = create_register_operand (REG_X
);
1000 operand
[(*n_operands
)++] = create_register_operand (REG_Y
);
1004 sub_d6_y_x (struct mem_read_abstraction_base
*mra ATTRIBUTE_UNUSED
,
1005 int *n_operands
, struct operand
**operand
)
1007 operand
[(*n_operands
)++] = create_register_operand (REG_D6
);
1008 operand
[(*n_operands
)++] = create_register_operand (REG_Y
);
1009 operand
[(*n_operands
)++] = create_register_operand (REG_X
);
1013 ld_18bit_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
,
1014 struct operand
**operand
);
1017 mul_discrim (struct mem_read_abstraction_base
*mra
, enum optr hint
)
1020 int status
= mra
->read (mra
, 0, 1, &mb
);
1024 bool signed_op
= (mb
& 0x80);
1029 return signed_op
? OP_muls
: OP_mulu
;
1032 return signed_op
? OP_divs
: OP_divu
;
1035 return signed_op
? OP_mods
: OP_modu
;
1038 return signed_op
? OP_macs
: OP_macu
;
1041 return signed_op
? OP_qmuls
: OP_qmulu
;
1052 /* The operation that this opcode performs. */
1055 /* The size of this operation. May be -1 if it is implied
1056 in the operands or if size is not applicable. */
1059 /* Some operations need this function to work out which operation
1061 discriminator_f discriminator
;
1063 /* A function returning the number of bytes in this instruction. */
1064 insn_bytes_f insn_bytes
;
1066 operands_f operands
;
1067 operands_f operands2
;
1070 static const struct opcode page2
[] =
1072 [0x00] = {OP_ld
, -1, 0, opr_n_bytes_p1
, reg_s_opr
, 0},
1073 [0x01] = {OP_st
, -1, 0, opr_n_bytes_p1
, reg_s_opr
, 0},
1074 [0x02] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, reg_s_opr
, 0},
1075 [0x03] = {OP_ld
, -1, 0, four
, reg_s_imm
, 0},
1076 [0x04] = {OP_cmp
, -1, 0, four
, reg_s_imm
, 0},
1077 [0x05] = {OP_stop
, -1, 0, single
, 0, 0},
1078 [0x06] = {OP_wai
, -1, 0, single
, 0, 0},
1079 [0x07] = {OP_sys
, -1, 0, single
, 0, 0},
1080 [0x08] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0}, /* BFEXT / BFINS */
1081 [0x09] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1082 [0x0a] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1083 [0x0b] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1084 [0x0c] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1085 [0x0d] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1086 [0x0e] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1087 [0x0f] = {0xFFFF, -1, bit_field_discrim
, bfextins_n_bytes
, bit_field_decode
, 0},
1088 [0x10] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1089 [0x11] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1090 [0x12] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1091 [0x13] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1092 [0x14] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1093 [0x15] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1094 [0x16] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1095 [0x17] = {OP_minu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1096 [0x18] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1097 [0x19] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1098 [0x1a] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1099 [0x1b] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1100 [0x1c] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1101 [0x1d] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1102 [0x1e] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1103 [0x1f] = {OP_maxu
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1104 [0x20] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1105 [0x21] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1106 [0x22] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1107 [0x23] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1108 [0x24] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1109 [0x25] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1110 [0x26] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1111 [0x27] = {OP_mins
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1112 [0x28] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1113 [0x29] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1114 [0x2a] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1115 [0x2b] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1116 [0x2c] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1117 [0x2d] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1118 [0x2e] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1119 [0x2f] = {OP_maxs
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1120 [0x30] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1121 [0x31] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1122 [0x32] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1123 [0x33] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1124 [0x34] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1125 [0x35] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1126 [0x36] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1127 [0x37] = {OPBASE_div
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1128 [0x38] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1129 [0x39] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1130 [0x3a] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1131 [0x3b] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1132 [0x3c] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1133 [0x3d] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1134 [0x3e] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1135 [0x3f] = {OPBASE_mod
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1136 [0x40] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1137 [0x41] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1138 [0x42] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1139 [0x43] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1140 [0x44] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1141 [0x45] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1142 [0x46] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1143 [0x47] = {OP_abs
, -1, 0, single
, z_reg
, 0},
1144 [0x48] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1145 [0x49] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1146 [0x4a] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1147 [0x4b] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1148 [0x4c] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1149 [0x4d] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1150 [0x4e] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1151 [0x4f] = {OPBASE_mac
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1152 [0x50] = {OP_adc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1153 [0x51] = {OP_adc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1154 [0x52] = {OP_adc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1155 [0x53] = {OP_adc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1156 [0x54] = {OP_adc
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1157 [0x55] = {OP_adc
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1158 [0x56] = {OP_adc
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1159 [0x57] = {OP_adc
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1160 [0x58] = {OP_bit
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1161 [0x59] = {OP_bit
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1162 [0x5a] = {OP_bit
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1163 [0x5b] = {OP_bit
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1164 [0x5c] = {OP_bit
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1165 [0x5d] = {OP_bit
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1166 [0x5e] = {OP_bit
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1167 [0x5f] = {OP_bit
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1168 [0x60] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1169 [0x61] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1170 [0x62] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1171 [0x63] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1172 [0x64] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1173 [0x65] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1174 [0x66] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1175 [0x67] = {OP_adc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1176 [0x68] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1177 [0x69] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1178 [0x6a] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1179 [0x6b] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1180 [0x6c] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1181 [0x6d] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1182 [0x6e] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1183 [0x6f] = {OP_bit
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1184 [0x70] = {OP_sbc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1185 [0x71] = {OP_sbc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1186 [0x72] = {OP_sbc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1187 [0x73] = {OP_sbc
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1188 [0x74] = {OP_sbc
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1189 [0x75] = {OP_sbc
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1190 [0x76] = {OP_sbc
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1191 [0x77] = {OP_sbc
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1192 [0x78] = {OP_eor
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1193 [0x79] = {OP_eor
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1194 [0x7a] = {OP_eor
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1195 [0x7b] = {OP_eor
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1196 [0x7c] = {OP_eor
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1197 [0x7d] = {OP_eor
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1198 [0x7e] = {OP_eor
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1199 [0x7f] = {OP_eor
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1200 [0x80] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1201 [0x81] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1202 [0x82] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1203 [0x83] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1204 [0x84] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1205 [0x85] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1206 [0x86] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1207 [0x87] = {OP_sbc
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1208 [0x88] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1209 [0x89] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1210 [0x8a] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1211 [0x8b] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1212 [0x8c] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1213 [0x8d] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1214 [0x8e] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1215 [0x8f] = {OP_eor
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1216 [0x90] = {OP_rti
, -1, 0, single
, 0, 0},
1217 [0x91] = {OP_clb
, -1, 0, two
, z_tfr
, 0},
1218 [0x92] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1219 [0x93] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1220 [0x94] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1221 [0x95] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1222 [0x96] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1223 [0x97] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1224 [0x98] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1225 [0x99] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1226 [0x9a] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1227 [0x9b] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1228 [0x9c] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1229 [0x9d] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1230 [0x9e] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1231 [0x9f] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1232 [0xa0] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1233 [0xa1] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1234 [0xa2] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1235 [0xa3] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1236 [0xa4] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1237 [0xa5] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1238 [0xa6] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1239 [0xa7] = {OP_sat
, -1, 0, single
, z_reg
, 0},
1240 [0xa8] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1241 [0xa9] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1242 [0xaa] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1243 [0xab] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1244 [0xac] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1245 [0xad] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1246 [0xae] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1247 [0xaf] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1248 [0xb0] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1249 [0xb1] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1250 [0xb2] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1251 [0xb3] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1252 [0xb4] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1253 [0xb5] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1254 [0xb6] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1255 [0xb7] = {OPBASE_qmul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1256 [0xb8] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1257 [0xb9] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1258 [0xba] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1259 [0xbb] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1260 [0xbc] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1261 [0xbd] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1262 [0xbe] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1263 [0xbf] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1264 [0xc0] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1265 [0xc1] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1266 [0xc2] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1267 [0xc3] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1268 [0xc4] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1269 [0xc5] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1270 [0xc6] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1271 [0xc7] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1272 [0xc8] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1273 [0xc9] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1274 [0xca] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1275 [0xcb] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1276 [0xcc] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1277 [0xcd] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1278 [0xce] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1279 [0xcf] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1280 [0xd0] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1281 [0xd1] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1282 [0xd2] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1283 [0xd3] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1284 [0xd4] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1285 [0xd5] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1286 [0xd6] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1287 [0xd7] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1288 [0xd8] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1289 [0xd9] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1290 [0xda] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1291 [0xdb] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1292 [0xdc] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1293 [0xdd] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1294 [0xde] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1295 [0xdf] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1296 [0xe0] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1297 [0xe1] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1298 [0xe2] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1299 [0xe3] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1300 [0xe4] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1301 [0xe5] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1302 [0xe6] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1303 [0xe7] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1304 [0xe8] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1305 [0xe9] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1306 [0xea] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1307 [0xeb] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1308 [0xec] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1309 [0xed] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1310 [0xee] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1311 [0xef] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1312 [0xf0] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1313 [0xf1] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1314 [0xf2] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1315 [0xf3] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1316 [0xf4] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1317 [0xf5] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1318 [0xf6] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1319 [0xf7] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1320 [0xf8] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1321 [0xf9] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1322 [0xfa] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1323 [0xfb] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1324 [0xfc] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1325 [0xfd] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1326 [0xfe] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1327 [0xff] = {OP_trap
, -1, 0, single
, trap_decode
, 0},
1330 static const struct opcode page1
[] =
1332 [0x00] = {OP_bgnd
, -1, 0, single
, 0, 0},
1333 [0x01] = {OP_nop
, -1, 0, single
, 0, 0},
1334 [0x02] = {OP_brclr
, -1, 0, bm_rel_n_bytes
, bm_rel_decode
, 0},
1335 [0x03] = {OP_brset
, -1, 0, bm_rel_n_bytes
, bm_rel_decode
, 0},
1336 [0x04] = {0xFFFF, -1, psh_pul_discrim
, two
, psh_pul_decode
, 0}, /* psh/pul */
1337 [0x05] = {OP_rts
, -1, 0, single
, 0, 0},
1338 [0x06] = {OP_lea
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1339 [0x07] = {OP_lea
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1340 [0x08] = {OP_lea
, -1, 0, opr_n_bytes_p1
, lea_reg_xys_opr
, 0},
1341 [0x09] = {OP_lea
, -1, 0, opr_n_bytes_p1
, lea_reg_xys_opr
, 0},
1342 [0x0a] = {OP_lea
, -1, 0, opr_n_bytes_p1
, lea_reg_xys_opr
, 0},
1343 [0x0b] = {0xFFFF, -1, loop_primitive_discrim
, loop_prim_n_bytes
, loop_primitive_decode
, 0}, /* Loop primitives TBcc / DBcc */
1344 [0x0c] = {OP_mov
, 0, 0, mov_imm_opr_n_bytes
, mov_imm_opr
, 0},
1345 [0x0d] = {OP_mov
, 1, 0, mov_imm_opr_n_bytes
, mov_imm_opr
, 0},
1346 [0x0e] = {OP_mov
, 2, 0, mov_imm_opr_n_bytes
, mov_imm_opr
, 0},
1347 [0x0f] = {OP_mov
, 3, 0, mov_imm_opr_n_bytes
, mov_imm_opr
, 0},
1348 [0x10] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0}, /* lsr/lsl/asl/asr/rol/ror */
1349 [0x11] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1350 [0x12] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1351 [0x13] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1352 [0x14] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1353 [0x15] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1354 [0x16] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1355 [0x17] = {0xFFFF, -1, shift_discrim
, shift_n_bytes
, shift_decode
, 0},
1356 [0x18] = {OP_lea
, -1, 0, two
, lea_reg_xys
, NULL
},
1357 [0x19] = {OP_lea
, -1, 0, two
, lea_reg_xys
, NULL
},
1358 [0x1a] = {OP_lea
, -1, 0, two
, lea_reg_xys
, NULL
},
1360 [0x1c] = {OP_mov
, 0, 0, opr_n_bytes2
, z_opr_decode2
, 0},
1361 [0x1d] = {OP_mov
, 1, 0, opr_n_bytes2
, z_opr_decode2
, 0},
1362 [0x1e] = {OP_mov
, 2, 0, opr_n_bytes2
, z_opr_decode2
, 0},
1363 [0x1f] = {OP_mov
, 3, 0, opr_n_bytes2
, z_opr_decode2
, 0},
1364 [0x20] = {OP_bra
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1365 [0x21] = {OP_bsr
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1366 [0x22] = {OP_bhi
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1367 [0x23] = {OP_bls
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1368 [0x24] = {OP_bcc
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1369 [0x25] = {OP_bcs
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1370 [0x26] = {OP_bne
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1371 [0x27] = {OP_beq
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1372 [0x28] = {OP_bvc
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1373 [0x29] = {OP_bvs
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1374 [0x2a] = {OP_bpl
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1375 [0x2b] = {OP_bmi
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1376 [0x2c] = {OP_bge
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1377 [0x2d] = {OP_blt
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1378 [0x2e] = {OP_bgt
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1379 [0x2f] = {OP_ble
, -1, 0, pcrel_15bit
, decode_rel_15_7
, 0},
1380 [0x30] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1381 [0x31] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1382 [0x32] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1383 [0x33] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1384 [0x34] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1385 [0x35] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1386 [0x36] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1387 [0x37] = {OP_inc
, -1, 0, single
, z_reg
, 0},
1388 [0x38] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1389 [0x39] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1390 [0x3a] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1391 [0x3b] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1392 [0x3c] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1393 [0x3d] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1394 [0x3e] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1395 [0x3f] = {OP_clr
, -1, 0, single
, z_reg
, 0},
1396 [0x40] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1397 [0x41] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1398 [0x42] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1399 [0x43] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1400 [0x44] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1401 [0x45] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1402 [0x46] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1403 [0x47] = {OP_dec
, -1, 0, single
, z_reg
, 0},
1404 [0x48] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1405 [0x49] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1406 [0x4a] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1407 [0x4b] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1408 [0x4c] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1409 [0x4d] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1410 [0x4e] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1411 [0x4f] = {OPBASE_mul
, -1, mul_discrim
, mul_n_bytes
, mul_decode
, 0},
1412 [0x50] = {OP_add
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1413 [0x51] = {OP_add
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1414 [0x52] = {OP_add
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1415 [0x53] = {OP_add
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1416 [0x54] = {OP_add
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1417 [0x55] = {OP_add
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1418 [0x56] = {OP_add
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1419 [0x57] = {OP_add
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1420 [0x58] = {OP_and
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1421 [0x59] = {OP_and
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1422 [0x5a] = {OP_and
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1423 [0x5b] = {OP_and
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1424 [0x5c] = {OP_and
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1425 [0x5d] = {OP_and
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1426 [0x5e] = {OP_and
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1427 [0x5f] = {OP_and
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1428 [0x60] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1429 [0x61] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1430 [0x62] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1431 [0x63] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1432 [0x64] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1433 [0x65] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1434 [0x66] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1435 [0x67] = {OP_add
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1436 [0x68] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1437 [0x69] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1438 [0x6a] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1439 [0x6b] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1440 [0x6c] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1441 [0x6d] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1442 [0x6e] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1443 [0x6f] = {OP_and
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1444 [0x70] = {OP_sub
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1445 [0x71] = {OP_sub
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1446 [0x72] = {OP_sub
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1447 [0x73] = {OP_sub
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1448 [0x74] = {OP_sub
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1449 [0x75] = {OP_sub
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1450 [0x76] = {OP_sub
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1451 [0x77] = {OP_sub
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1452 [0x78] = {OP_or
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1453 [0x79] = {OP_or
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1454 [0x7a] = {OP_or
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1455 [0x7b] = {OP_or
, -1, 0, three
, z_reg
, z_imm1234_8base
},
1456 [0x7c] = {OP_or
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1457 [0x7d] = {OP_or
, -1, 0, two
, z_reg
, z_imm1234_8base
},
1458 [0x7e] = {OP_or
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1459 [0x7f] = {OP_or
, -1, 0, five
, z_reg
, z_imm1234_8base
},
1460 [0x80] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1461 [0x81] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1462 [0x82] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1463 [0x83] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1464 [0x84] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1465 [0x85] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1466 [0x86] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1467 [0x87] = {OP_sub
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1468 [0x88] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1469 [0x89] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1470 [0x8a] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1471 [0x8b] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1472 [0x8c] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1473 [0x8d] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1474 [0x8e] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1475 [0x8f] = {OP_or
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1476 [0x90] = {OP_ld
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1477 [0x91] = {OP_ld
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1478 [0x92] = {OP_ld
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1479 [0x93] = {OP_ld
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1480 [0x94] = {OP_ld
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1481 [0x95] = {OP_ld
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1482 [0x96] = {OP_ld
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1483 [0x97] = {OP_ld
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1484 [0x98] = {OP_ld
, -1, 0, four
, reg_xy
, z_imm1234_0base
},
1485 [0x99] = {OP_ld
, -1, 0, four
, reg_xy
, z_imm1234_0base
},
1486 [0x9a] = {OP_clr
, -1, 0, single
, reg_xy
, 0},
1487 [0x9b] = {OP_clr
, -1, 0, single
, reg_xy
, 0},
1488 [0x9c] = {OP_inc
, 0, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1489 [0x9d] = {OP_inc
, 1, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1490 [0x9e] = {OP_tfr
, -1, 0, two
, z_tfr
, NULL
},
1491 [0x9f] = {OP_inc
, 3, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1492 [0xa0] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1493 [0xa1] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1494 [0xa2] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1495 [0xa3] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1496 [0xa4] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1497 [0xa5] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1498 [0xa6] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1499 [0xa7] = {OP_ld
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1500 [0xa8] = {OP_ld
, -1, 0, opr_n_bytes_p1
, reg_xy
, z_opr_decode
},
1501 [0xa9] = {OP_ld
, -1, 0, opr_n_bytes_p1
, reg_xy
, z_opr_decode
},
1502 [0xaa] = {OP_jmp
, -1, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1503 [0xab] = {OP_jsr
, -1, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1504 [0xac] = {OP_dec
, 0, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1505 [0xad] = {OP_dec
, 1, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1506 [0xae] = {0xFFFF, -1, exg_sex_discrim
, two
, exg_sex_decode
, 0}, /* EXG / SEX */
1507 [0xaf] = {OP_dec
, 3, 0, opr_n_bytes_p1
, 0, z_opr_decode
},
1508 [0xb0] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1509 [0xb1] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1510 [0xb2] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1511 [0xb3] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1512 [0xb4] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1513 [0xb5] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1514 [0xb6] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1515 [0xb7] = {OP_ld
, -1, 0, four
, z_reg
, z_ext24_decode
},
1516 [0xb8] = {OP_ld
, -1, 0, four
, reg_xy
, z_ext24_decode
},
1517 [0xb9] = {OP_ld
, -1, 0, four
, reg_xy
, z_ext24_decode
},
1518 [0xba] = {OP_jmp
, -1, 0, four
, z_ext24_decode
, 0},
1519 [0xbb] = {OP_jsr
, -1, 0, four
, z_ext24_decode
, 0},
1520 [0xbc] = {OP_clr
, 0, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1521 [0xbd] = {OP_clr
, 1, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1522 [0xbe] = {OP_clr
, 2, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1523 [0xbf] = {OP_clr
, 3, 0, opr_n_bytes_p1
, z_opr_decode
, 0},
1524 [0xc0] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1525 [0xc1] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1526 [0xc2] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1527 [0xc3] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1528 [0xc4] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1529 [0xc5] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1530 [0xc6] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1531 [0xc7] = {OP_st
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1532 [0xc8] = {OP_st
, -1, 0, opr_n_bytes_p1
, reg_xy
, z_opr_decode
},
1533 [0xc9] = {OP_st
, -1, 0, opr_n_bytes_p1
, reg_xy
, z_opr_decode
},
1534 [0xca] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1535 [0xcb] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1536 [0xcc] = {OP_com
, 0, 0, opr_n_bytes_p1
, NULL
, z_opr_decode
},
1537 [0xcd] = {OP_com
, 1, 0, opr_n_bytes_p1
, NULL
, z_opr_decode
},
1538 [0xce] = {OP_andcc
, -1, 0, two
, imm1_decode
, 0},
1539 [0xcf] = {OP_com
, 3, 0, opr_n_bytes_p1
, NULL
, z_opr_decode
},
1540 [0xd0] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1541 [0xd1] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1542 [0xd2] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1543 [0xd3] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1544 [0xd4] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1545 [0xd5] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1546 [0xd6] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1547 [0xd7] = {OP_st
, -1, 0, four
, z_reg
, z_ext24_decode
},
1548 [0xd8] = {OP_st
, -1, 0, four
, reg_xy
, z_ext24_decode
},
1549 [0xd9] = {OP_st
, -1, 0, four
, reg_xy
, z_ext24_decode
},
1550 [0xda] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1551 [0xdb] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1552 [0xdc] = {OP_neg
, 0, 0, opr_n_bytes_p1
, NULL
, z_opr_decode
},
1553 [0xdd] = {OP_neg
, 1, 0, opr_n_bytes_p1
, NULL
, z_opr_decode
},
1554 [0xde] = {OP_orcc
, -1, 0, two
, imm1_decode
, 0},
1555 [0xdf] = {OP_neg
, 3, 0, opr_n_bytes_p1
, NULL
, z_opr_decode
},
1556 [0xe0] = {OP_cmp
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1557 [0xe1] = {OP_cmp
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1558 [0xe2] = {OP_cmp
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1559 [0xe3] = {OP_cmp
, -1, 0, three
, z_reg
, z_imm1234_0base
},
1560 [0xe4] = {OP_cmp
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1561 [0xe5] = {OP_cmp
, -1, 0, two
, z_reg
, z_imm1234_0base
},
1562 [0xe6] = {OP_cmp
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1563 [0xe7] = {OP_cmp
, -1, 0, five
, z_reg
, z_imm1234_0base
},
1564 [0xe8] = {OP_cmp
, -1, 0, four
, reg_xy
, z_imm1234_0base
},
1565 [0xe9] = {OP_cmp
, -1, 0, four
, reg_xy
, z_imm1234_0base
},
1566 [0xea] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1567 [0xeb] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1568 [0xec] = {OP_bclr
, -1, 0, bm_n_bytes
, bm_decode
, 0},
1569 [0xed] = {OP_bset
, -1, 0, bm_n_bytes
, bm_decode
, 0},
1570 [0xee] = {OP_btgl
, -1, 0, bm_n_bytes
, bm_decode
, 0},
1571 [0xef] = {OP_INVALID
, -1, 0, NULL
, NULL
, NULL
}, /* SPARE */
1572 [0xf0] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1573 [0xf1] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1574 [0xf2] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1575 [0xf3] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1576 [0xf4] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1577 [0xf5] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1578 [0xf6] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1579 [0xf7] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, z_reg
, z_opr_decode
},
1580 [0xf8] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, reg_xy
, z_opr_decode
},
1581 [0xf9] = {OP_cmp
, -1, 0, opr_n_bytes_p1
, reg_xy
, z_opr_decode
},
1582 [0xfa] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1583 [0xfb] = {OP_ld
, -1, 0, three
, reg_xy
, ld_18bit_decode
},
1584 [0xfc] = {OP_cmp
, -1, 0, single
, cmp_xy
, 0},
1585 [0xfd] = {OP_sub
, -1, 0, single
, sub_d6_x_y
, 0},
1586 [0xfe] = {OP_sub
, -1, 0, single
, sub_d6_y_x
, 0},
1587 [0xff] = {OP_swi
, -1, 0, single
, 0, 0}
1590 static const int oprregs1
[] =
1592 REG_D3
, REG_D2
, REG_D1
, REG_D0
, REG_CCL
, REG_CCH
1595 static const int oprregs2
[] =
1597 REG_Y
, REG_X
, REG_D7
, REG_D6
, REG_D5
, REG_D4
1618 static const struct mb mul_table
[] = {
1619 {0x40, 0x00, MUL_REG_REG
},
1621 {0x47, 0x40, MUL_REG_OPR
},
1622 {0x47, 0x41, MUL_REG_OPR
},
1623 {0x47, 0x43, MUL_REG_OPR
},
1625 {0x47, 0x44, MUL_REG_IMM
},
1626 {0x47, 0x45, MUL_REG_IMM
},
1627 {0x47, 0x47, MUL_REG_IMM
},
1629 {0x43, 0x42, MUL_OPR_OPR
},
1634 mul_decode (struct mem_read_abstraction_base
*mra
,
1635 int *n_operands
, struct operand
**operand
)
1638 int status
= mra
->read (mra
, 0, 1, &mb
);
1643 status
= mra
->read (mra
, -1, 1, &byte
);
1647 enum MUL_MODE mode
= -1;
1649 for (i
= 0; i
< sizeof (mul_table
) / sizeof (mul_table
[0]); ++i
)
1651 const struct mb
*mm
= mul_table
+ i
;
1652 if ((mb
& mm
->mask
) == mm
->value
)
1658 operand
[(*n_operands
)++] = create_register_operand (byte
& 0x07);
1664 int size
= (mb
& 0x3);
1665 operand
[(*n_operands
)++] =
1666 create_register_operand_with_size ((mb
& 0x38) >> 3, size
);
1667 uint32_t imm
= z_decode_signed_value (mra
, 1, size
+ 1);
1668 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
1672 operand
[(*n_operands
)++] = create_register_operand ((mb
& 0x38) >> 3);
1673 operand
[(*n_operands
)++] = create_register_operand (mb
& 0x07);
1676 operand
[(*n_operands
)++] = create_register_operand ((mb
& 0x38) >> 3);
1677 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, mb
& 0x3);
1681 int first
= x_opr_n_bytes (mra
, 1);
1682 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1,
1684 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, first
+ 1,
1693 mul_n_bytes (struct mem_read_abstraction_base
*mra
)
1697 int status
= mra
->read (mra
, 0, 1, &mb
);
1701 enum MUL_MODE mode
= -1;
1703 for (i
= 0; i
< sizeof (mul_table
) / sizeof (mul_table
[0]); ++i
)
1705 const struct mb
*mm
= mul_table
+ i
;
1706 if ((mb
& mm
->mask
) == mm
->value
)
1713 int size
= (mb
& 0x3) + 1;
1723 nx
+= x_opr_n_bytes (mra
, 1);
1727 int first
= x_opr_n_bytes (mra
, nx
- 1);
1729 int second
= x_opr_n_bytes (mra
, nx
- 1);
1739 /* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1,
1740 and contains obvious typos.
1741 However the Freescale tools and experiments with the chip itself
1742 seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG
1763 static const struct bm bm_table
[] = {
1764 { 0xC6, 0x04, BM_REG_IMM
},
1765 { 0x84, 0x00, BM_REG_IMM
},
1766 { 0x06, 0x06, BM_REG_IMM
},
1767 { 0xC6, 0x44, BM_RESERVED0
},
1769 { 0x8F, 0x80, BM_OPR_B
},
1770 { 0x8E, 0x82, BM_OPR_W
},
1771 { 0x8C, 0x88, BM_OPR_L
},
1773 { 0x83, 0x81, BM_OPR_REG
},
1774 { 0x87, 0x84, BM_RESERVED1
},
1778 bm_decode (struct mem_read_abstraction_base
*mra
,
1779 int *n_operands
, struct operand
**operand
)
1782 int status
= mra
->read (mra
, 0, 1, &bm
);
1787 enum BM_MODE mode
= -1;
1788 for (i
= 0; i
< sizeof (bm_table
) / sizeof (bm_table
[0]); ++i
)
1790 const struct bm
*bme
= bm_table
+ i
;
1791 if ((bm
& bme
->mask
) == bme
->value
)
1802 operand
[(*n_operands
)++] = create_register_operand (bm
& 0x07);
1805 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, 0);
1808 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, 1);
1811 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, 3);
1817 mra
->read (mra
, 1, 1, &xb
);
1818 /* Don't emit a size suffix for register operands */
1819 if ((xb
& 0xF8) != 0xB8)
1820 operand
[(*n_operands
)++] =
1821 x_opr_decode_with_size (mra
, 1, (bm
& 0x0c) >> 2);
1823 operand
[(*n_operands
)++] = x_opr_decode (mra
, 1);
1833 imm
= (bm
& 0x38) >> 3;
1834 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
1837 imm
|= (bm
& 0x03) << 3;
1840 imm
|= (bm
& 0x01) << 3;
1843 imm
|= (bm
& 0x70) >> 4;
1844 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
1848 operand
[(*n_operands
)++] = create_register_operand ((bm
& 0x70) >> 4);
1855 bm_rel_decode (struct mem_read_abstraction_base
*mra
,
1856 int *n_operands
, struct operand
**operand
)
1859 int status
= mra
->read (mra
, 0, 1, &bm
);
1864 enum BM_MODE mode
= -1;
1865 for (i
= 0; i
< sizeof (bm_table
) / sizeof (bm_table
[0]); ++i
)
1867 const struct bm
*bme
= bm_table
+ i
;
1868 if ((bm
& bme
->mask
) == bme
->value
)
1880 operand
[(*n_operands
)++] = create_register_operand (bm
& 0x07);
1883 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, 0);
1884 n
= 1 + x_opr_n_bytes (mra
, 1);
1887 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, 1);
1888 n
= 1 + x_opr_n_bytes (mra
, 1);
1891 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, 3);
1892 n
= 1 + x_opr_n_bytes (mra
, 1);
1898 mra
->read (mra
, +1, 1, &xb
);
1899 /* Don't emit a size suffix for register operands */
1900 if ((xb
& 0xF8) != 0xB8)
1902 short os
= (bm
& 0x0c) >> 2;
1903 operand
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, os
);
1906 operand
[(*n_operands
)++] = x_opr_decode (mra
, 1);
1916 imm
|= (bm
& 0x02) << 3;
1919 imm
|= (bm
& 0x01) << 3;
1922 imm
|= (bm
& 0x70) >> 4;
1923 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
1926 imm
= (bm
& 0x38) >> 3;
1927 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
1930 imm
= (bm
& 0xF8) >> 3;
1931 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
1935 operand
[(*n_operands
)++] = create_register_operand ((bm
& 0x70) >> 4);
1936 n
+= x_opr_n_bytes (mra
, 1);
1940 rel_15_7 (mra
, n
+ 1, n_operands
, operand
);
1944 bm_n_bytes (struct mem_read_abstraction_base
*mra
)
1947 int status
= mra
->read (mra
, 0, 1, &bm
);
1952 enum BM_MODE mode
= -1;
1953 for (i
= 0; i
< sizeof (bm_table
) / sizeof (bm_table
[0]); ++i
)
1955 const struct bm
*bme
= bm_table
+ i
;
1956 if ((bm
& bme
->mask
) == bme
->value
)
1973 n
+= x_opr_n_bytes (mra
, 1);
1977 n
+= x_opr_n_bytes (mra
, 1);
1985 bm_rel_n_bytes (struct mem_read_abstraction_base
*mra
)
1987 int n
= 1 + bm_n_bytes (mra
);
1990 int status
= mra
->read (mra
, n
- 2, 1, &rb
);
2004 /* shift direction */
2035 static const struct sb sb_table
[] = {
2036 {0x30, 0x00, SB_REG_REG_N_EFF
},
2037 {0x30, 0x10, SB_REG_REG_N
},
2038 {0x34, 0x20, SB_REG_OPR_EFF
},
2039 {0x34, 0x24, SB_ROT
},
2040 {0x34, 0x30, SB_REG_OPR_OPR
},
2041 {0x34, 0x34, SB_OPR_N
},
2045 shift_n_bytes (struct mem_read_abstraction_base
*mra
)
2048 int status
= mra
->read (mra
, 0, 1, &sb
);
2053 enum SB_MODE mode
= -1;
2054 for (i
= 0; i
< sizeof (sb_table
) / sizeof (sb_table
[0]); ++i
)
2056 const struct sb
*sbe
= sb_table
+ i
;
2057 if ((sb
& sbe
->mask
) == sbe
->value
)
2063 case SB_REG_REG_N_EFF
:
2066 case SB_REG_OPR_EFF
:
2068 return 2 + x_opr_n_bytes (mra
, 1);
2070 case SB_REG_OPR_OPR
:
2072 int opr1
= x_opr_n_bytes (mra
, 1);
2074 if ((sb
& 0x30) != 0x20)
2075 opr2
= x_opr_n_bytes (mra
, opr1
+ 1);
2076 return 2 + opr1
+ opr2
;
2090 mov_imm_opr_n_bytes (struct mem_read_abstraction_base
*mra
)
2093 int status
= mra
->read (mra
, -1, 1, &byte
);
2097 int size
= byte
- 0x0c + 1;
2099 return size
+ x_opr_n_bytes (mra
, size
) + 1;
2103 mov_imm_opr (struct mem_read_abstraction_base
*mra
,
2104 int *n_operands
, struct operand
**operand
)
2107 int status
= mra
->read (mra
, -1, 1, &byte
);
2111 int size
= byte
- 0x0c + 1;
2112 uint32_t imm
= decode_signed_value (mra
, size
);
2114 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
2115 operand
[(*n_operands
)++] = x_opr_decode (mra
, size
);
2121 ld_18bit_decode (struct mem_read_abstraction_base
*mra
,
2122 int *n_operands
, struct operand
**operand
)
2126 int status
= mra
->read (mra
, 0, 2, buffer
+ 1);
2130 status
= mra
->read (mra
, -1, 1, buffer
);
2134 buffer
[0] = (buffer
[0] & 0x30) >> 4;
2138 for (i
= 0; i
< size
; ++i
)
2140 imm
|= buffer
[i
] << (8 * (size
- i
- 1));
2143 operand
[(*n_operands
)++] = create_immediate_operand (imm
);
2148 /* Loop Primitives */
2163 static const struct lp lp_mode
[] = {
2164 {0x08, 0x00, LP_REG
},
2165 {0x0C, 0x08, LP_XY
},
2166 {0x0C, 0x0C, LP_OPR
},
2171 loop_prim_n_bytes (struct mem_read_abstraction_base
*mra
)
2175 mra
->read (mra
, mx
++, 1, &lb
);
2177 enum LP_MODE mode
= -1;
2179 for (i
= 0; i
< sizeof (lp_mode
) / sizeof (lp_mode
[0]); ++i
)
2181 const struct lp
*pb
= lp_mode
+ i
;
2182 if ((lb
& pb
->mask
) == pb
->value
)
2191 mx
+= x_opr_n_bytes (mra
, mx
) ;
2195 mra
->read (mra
, mx
++, 1, &rb
);
2206 exg_sex_discrim (struct mem_read_abstraction_base
*mra
,
2207 enum optr hint ATTRIBUTE_UNUSED
)
2210 int status
= mra
->read (mra
, 0, 1, &eb
);
2211 enum optr
operator = OP_INVALID
;
2215 struct operand
*op0
= create_register_operand ((eb
& 0xf0) >> 4);
2216 struct operand
*op1
= create_register_operand (eb
& 0xf);
2218 int reg0
= ((struct register_operand
*) op0
)->reg
;
2219 int reg1
= ((struct register_operand
*) op1
)->reg
;
2220 if (reg0
>= 0 && reg0
< S12Z_N_REGISTERS
2221 && reg1
>= 0 && reg1
< S12Z_N_REGISTERS
)
2223 const struct reg
*r0
= registers
+ reg0
;
2224 const struct reg
*r1
= registers
+ reg1
;
2226 operator = r0
->bytes
< r1
->bytes
? OP_sex
: OP_exg
;
2237 exg_sex_decode (struct mem_read_abstraction_base
*mra
,
2238 int *n_operands
, struct operand
**operands
)
2241 int status
= mra
->read (mra
, 0, 1, &eb
);
2245 /* Ship out the operands. */
2246 operands
[(*n_operands
)++] = create_register_operand ((eb
& 0xf0) >> 4);
2247 operands
[(*n_operands
)++] = create_register_operand (eb
& 0xf);
2251 loop_primitive_discrim (struct mem_read_abstraction_base
*mra
,
2252 enum optr hint ATTRIBUTE_UNUSED
)
2255 int status
= mra
->read (mra
, 0, 1, &lb
);
2259 enum optr opbase
= (lb
& 0x80) ? OP_dbNE
: OP_tbNE
;
2260 return opbase
+ ((lb
& 0x70) >> 4);
2264 loop_primitive_decode (struct mem_read_abstraction_base
*mra
,
2265 int *n_operands
, struct operand
**operands
)
2269 int status
= mra
->read (mra
, 0, 1, &lb
);
2273 enum LP_MODE mode
= -1;
2275 for (i
= 0; i
< sizeof (lp_mode
) / sizeof (lp_mode
[0]); ++i
)
2277 const struct lp
*pb
= lp_mode
+ i
;
2278 if ((lb
& pb
->mask
) == pb
->value
)
2288 operands
[(*n_operands
)++] = create_register_operand (lb
& 0x07);
2291 operands
[(*n_operands
)++] =
2292 create_register_operand ((lb
& 0x01) + REG_X
);
2295 offs
+= x_opr_n_bytes (mra
, 1);
2296 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, lb
& 0x03);
2300 rel_15_7 (mra
, offs
+ 1, n_operands
, operands
);
2305 shift_discrim (struct mem_read_abstraction_base
*mra
,
2306 enum optr hint ATTRIBUTE_UNUSED
)
2310 int status
= mra
->read (mra
, 0, 1, &sb
);
2314 enum SB_DIR dir
= (sb
& 0x40) ? SB_LEFT
: SB_RIGHT
;
2315 enum SB_TYPE type
= (sb
& 0x80) ? SB_ARITHMETIC
: SB_LOGICAL
;
2316 enum SB_MODE mode
= -1;
2317 for (i
= 0; i
< sizeof (sb_table
) / sizeof (sb_table
[0]); ++i
)
2319 const struct sb
*sbe
= sb_table
+ i
;
2320 if ((sb
& sbe
->mask
) == sbe
->value
)
2325 return (dir
== SB_LEFT
) ? OP_rol
: OP_ror
;
2327 if (type
== SB_LOGICAL
)
2328 return (dir
== SB_LEFT
) ? OP_lsl
: OP_lsr
;
2330 return (dir
== SB_LEFT
) ? OP_asl
: OP_asr
;
2335 shift_decode (struct mem_read_abstraction_base
*mra
, int *n_operands
,
2336 struct operand
**operands
)
2341 int status
= mra
->read (mra
, -1, 1, &byte
);
2346 status
= mra
->read (mra
, 0, 1, &sb
);
2350 enum SB_MODE mode
= -1;
2351 for (i
= 0; i
< sizeof (sb_table
) / sizeof (sb_table
[0]); ++i
)
2353 const struct sb
*sbe
= sb_table
+ i
;
2354 if ((sb
& sbe
->mask
) == sbe
->value
)
2361 case SB_REG_OPR_EFF
:
2363 case SB_REG_OPR_OPR
:
2369 mra
->read (mra
, 1, 1, &xb
);
2370 /* The size suffix is not printed if the OPR operand refers
2371 directly to a register, because the size is implied by the
2372 size of that register. */
2373 if ((xb
& 0xF8) != 0xB8)
2381 /* Destination register */
2384 case SB_REG_REG_N_EFF
:
2386 operands
[(*n_operands
)++] = create_register_operand (byte
& 0x07);
2388 case SB_REG_OPR_EFF
:
2389 case SB_REG_OPR_OPR
:
2390 operands
[(*n_operands
)++] = create_register_operand (byte
& 0x07);
2394 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, osize
);
2401 /* Source register */
2404 case SB_REG_REG_N_EFF
:
2406 operands
[(*n_operands
)++] =
2407 create_register_operand_with_size (sb
& 0x07, osize
);
2410 case SB_REG_OPR_OPR
:
2411 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, osize
);
2421 case SB_REG_OPR_EFF
:
2423 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1, osize
);
2429 mra
->read (mra
, 1, 1, &xb
);
2431 /* This case is slightly unusual.
2432 If XB matches the binary pattern 0111XXXX, then instead of
2433 interpreting this as a general OPR postbyte in the IMMe4 mode,
2434 the XB byte is interpreted in s special way. */
2435 if ((xb
& 0xF0) == 0x70)
2439 int shift
= ((sb
& 0x08) >> 3) | ((xb
& 0x0f) << 1);
2440 operands
[(*n_operands
)++] = create_immediate_operand (shift
);
2444 /* This should not happen. */
2450 operands
[(*n_operands
)++] = x_opr_decode (mra
, 1);
2454 case SB_REG_OPR_OPR
:
2457 int n
= x_opr_n_bytes (mra
, 1);
2458 mra
->read (mra
, 1 + n
, 1, &xb
);
2460 if ((xb
& 0xF0) == 0x70)
2462 int imm
= xb
& 0x0F;
2464 imm
|= (sb
& 0x08) >> 3;
2465 operands
[(*n_operands
)++] = create_immediate_operand (imm
);
2469 operands
[(*n_operands
)++] = x_opr_decode (mra
, 1 + n
);
2479 case SB_REG_REG_N_EFF
:
2480 case SB_REG_OPR_EFF
:
2483 int imm
= (sb
& 0x08) ? 2 : 1;
2484 operands
[(*n_operands
)++] = create_immediate_operand (imm
);
2494 psh_pul_discrim (struct mem_read_abstraction_base
*mra
,
2495 enum optr hint ATTRIBUTE_UNUSED
)
2498 int status
= mra
->read (mra
, 0, 1, &byte
);
2502 return (byte
& 0x80) ? OP_pull
: OP_push
;
2507 psh_pul_decode (struct mem_read_abstraction_base
*mra
,
2508 int *n_operands
, struct operand
**operand
)
2511 int status
= mra
->read (mra
, 0, 1, &byte
);
2517 if ((byte
& 0x3F) == 0)
2518 operand
[(*n_operands
)++] = create_register_all16_operand ();
2520 for (bit
= 5; bit
>= 0; --bit
)
2522 if (byte
& (0x1 << bit
))
2524 operand
[(*n_operands
)++] = create_register_operand (oprregs2
[bit
]);
2530 if ((byte
& 0x3F) == 0)
2531 operand
[(*n_operands
)++] = create_register_all_operand ();
2533 for (bit
= 5; bit
>= 0; --bit
)
2535 if (byte
& (0x1 << bit
))
2537 operand
[(*n_operands
)++] = create_register_operand (oprregs1
[bit
]);
2544 bit_field_discrim (struct mem_read_abstraction_base
*mra
,
2545 enum optr hint ATTRIBUTE_UNUSED
)
2549 status
= mra
->read (mra
, 0, 1, &bb
);
2553 return (bb
& 0x80) ? OP_bfins
: OP_bfext
;
2557 bit_field_decode (struct mem_read_abstraction_base
*mra
,
2558 int *n_operands
, struct operand
**operands
)
2563 status
= mra
->read (mra
, -1, 1, &byte2
);
2568 status
= mra
->read (mra
, 0, 1, &bb
);
2572 enum BB_MODE mode
= -1;
2574 const struct opr_bb
*bbs
= 0;
2575 for (i
= 0; i
< sizeof (bb_modes
) / sizeof (bb_modes
[0]); ++i
)
2578 if ((bb
& bbs
->mask
) == bbs
->value
)
2584 int reg1
= byte2
& 0x07;
2588 case BB_REG_REG_REG
:
2589 case BB_REG_REG_IMM
:
2590 case BB_REG_OPR_REG
:
2591 case BB_REG_OPR_IMM
:
2592 operands
[(*n_operands
)++] = create_register_operand (reg1
);
2594 case BB_OPR_REG_REG
:
2595 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1,
2598 case BB_OPR_REG_IMM
:
2599 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 2,
2604 /* Second operand */
2607 case BB_REG_REG_REG
:
2608 case BB_REG_REG_IMM
:
2610 int reg_src
= (bb
>> 2) & 0x07;
2611 operands
[(*n_operands
)++] = create_register_operand (reg_src
);
2614 case BB_OPR_REG_REG
:
2615 case BB_OPR_REG_IMM
:
2617 int reg_src
= (byte2
& 0x07);
2618 operands
[(*n_operands
)++] = create_register_operand (reg_src
);
2621 case BB_REG_OPR_REG
:
2622 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 1,
2625 case BB_REG_OPR_IMM
:
2626 operands
[(*n_operands
)++] = x_opr_decode_with_size (mra
, 2,
2634 case BB_REG_REG_REG
:
2635 case BB_OPR_REG_REG
:
2636 case BB_REG_OPR_REG
:
2638 int reg_parm
= bb
& 0x03;
2639 operands
[(*n_operands
)++] = create_register_operand (reg_parm
);
2642 case BB_REG_REG_IMM
:
2643 case BB_OPR_REG_IMM
:
2644 case BB_REG_OPR_IMM
:
2647 mra
->read (mra
, 1, 1, &i1
);
2648 int offset
= i1
& 0x1f;
2649 int width
= bb
& 0x03;
2652 operands
[(*n_operands
)++] = create_bitfield_operand (width
, offset
);
2659 /* Decode the next instruction at MRA, according to OPC.
2660 The operation to be performed is returned.
2661 The number of operands, will be placed in N_OPERANDS.
2662 The operands themselved into OPERANDS. */
2664 decode_operation (const struct opcode
*opc
,
2665 struct mem_read_abstraction_base
*mra
,
2666 int *n_operands
, struct operand
**operands
)
2668 enum optr op
= opc
->operator;
2669 if (opc
->discriminator
)
2670 op
= opc
->discriminator (mra
, opc
->operator);
2673 opc
->operands (mra
, n_operands
, operands
);
2676 opc
->operands2 (mra
, n_operands
, operands
);
2682 decode_s12z (enum optr
*myoperator
, short *osize
,
2683 int *n_operands
, struct operand
**operands
,
2684 struct mem_read_abstraction_base
*mra
)
2689 int status
= mra
->read (mra
, 0, 1, &byte
);
2695 const struct opcode
*opc
= page1
+ byte
;
2696 if (byte
== PAGE2_PREBYTE
)
2698 /* Opcodes in page2 have an additional byte */
2702 mra
->read (mra
, 0, 1, &byte2
);
2704 opc
= page2
+ byte2
;
2706 *myoperator
= decode_operation (opc
, mra
, n_operands
, operands
);
2707 *osize
= opc
->osize
;
2709 /* Return the number of bytes in the instruction. */
2710 n_bytes
+= (opc
&& opc
->insn_bytes
) ? opc
->insn_bytes (mra
) : 0;