1 /* to sanitize this file, grep -v v9 < sparc.h > clean-sparc.h */
3 /* Table of opcodes for the sparc.
4 Copyright 1989, 1991, 1992 Free Software Foundation, Inc.
6 This file is part of the BFD library.
8 BFD is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 BFD is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with this software; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
23 instruction's name rather than the args. This would make gas faster, pinsn
24 slower, but would mess up some macros a bit. xoxorich. */
26 /* v9 FIXME: Doesn't accept `iprefetch', `setX', `signx', `cleartop', `cas',
27 `casx', `clrx', `clruw' synthetic instructions for v9. */
31 #include "opcode/sparc.h"
33 CONST
char *architecture_pname
[] = {
42 /* v9: This file is correct for SPARC Version 9 Draft 1.2. */
44 /* Branch condition field. */
45 #define COND(x) (((x)&0xf)<<25)
47 /* v9: Move (MOVcc and FMOVcc) condition field. */
48 #define MCOND(x,i_or_f) ((((i_or_f)&1)<<18)|(((x)>>11)&(0xf<<14))) /* v9 */
50 /* v9: Move register (MOVRcc and FMOVRcc) condition field. */
51 #define RCOND(x) (((x)&0x7)<<10) /* v9 */
53 #define CONDA (COND(0x8))
54 #define CONDCC (COND(0xd))
55 #define CONDCS (COND(0x5))
56 #define CONDE (COND(0x1))
57 #define CONDG (COND(0xa))
58 #define CONDGE (COND(0xb))
59 #define CONDGU (COND(0xc))
60 #define CONDL (COND(0x3))
61 #define CONDLE (COND(0x2))
62 #define CONDLEU (COND(0x4))
63 #define CONDN (COND(0x0))
64 #define CONDNE (COND(0x9))
65 #define CONDNEG (COND(0x6))
66 #define CONDPOS (COND(0xe))
67 #define CONDVC (COND(0xf))
68 #define CONDVS (COND(0x7))
72 #define CONDGEU CONDCC
75 #define FCONDA (COND(0x8))
76 #define FCONDE (COND(0x9))
77 #define FCONDG (COND(0x6))
78 #define FCONDGE (COND(0xb))
79 #define FCONDL (COND(0x4))
80 #define FCONDLE (COND(0xd))
81 #define FCONDLG (COND(0x2))
82 #define FCONDN (COND(0x0))
83 #define FCONDNE (COND(0x1))
84 #define FCONDO (COND(0xf))
85 #define FCONDU (COND(0x7))
86 #define FCONDUE (COND(0xa))
87 #define FCONDUG (COND(0x5))
88 #define FCONDUGE (COND(0xc))
89 #define FCONDUL (COND(0x3))
90 #define FCONDULE (COND(0xe))
92 #define FCONDNZ FCONDNE
95 #define ICC (0) /* v9 */
96 #define XCC (1<<11) /* v9 */
97 #define FCC(x) (((x)&0x3)<<11) /* v9 */
98 #define FBFCC(x) (((x)&0x3)<<20) /* v9 */
100 /* The order of the opcodes in the table is significant:
102 * The assembler requires that all instances of the same mnemonic must
103 be consecutive. If they aren't, the assembler will bomb at runtime.
105 * The disassembler should not care about the order of the opcodes.
109 struct sparc_opcode sparc_opcodes
[] = {
111 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", 0, v6
},
112 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0
, "[1],d", 0, v6
}, /* ld [rs1+%g0],d */
113 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", 0, v6
},
114 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", 0, v6
},
115 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0
, "[i],d", 0, v6
},
116 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ld [rs1+0],d */
117 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0), "[1+2],g", 0, v6
},
118 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0)|RS2_G0
, "[1],g", 0, v6
}, /* ld [rs1+%g0],d */
119 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[1+i],g", 0, v6
},
120 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[i+1],g", 0, v6
},
121 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|RS1_G0
, "[i],g", 0, v6
},
122 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|SIMM13(~0), "[1],g", 0, v6
}, /* ld [rs1+0],d */
124 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RD(~0), "[1+2],F", 0, v6
},
125 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RS2_G0
|RD(~0),"[1],F", 0, v6
}, /* ld [rs1+%g0],d */
126 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[1+i],F", 0, v6
},
127 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[i+1],F", 0, v6
},
128 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RS1_G0
|RD(~0),"[i],F", 0, v6
},
129 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~0),"[1],F", 0, v6
}, /* ld [rs1+0],d */
131 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
132 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
133 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2],D", F_ALIAS
, v6
},
134 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0
, "[1],D", F_ALIAS
, v6
}, /* ld [rs1+%g0],d */
135 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i],D", F_ALIAS
, v6
},
136 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1],D", F_ALIAS
, v6
},
137 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0
, "[i],D", F_ALIAS
, v6
},
138 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1],D", F_ALIAS
, v6
}, /* ld [rs1+0],d */
139 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0), "[1+2],C", 0, v6
},
140 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0)|RS2_G0
, "[1],C", 0, v6
}, /* ld [rs1+%g0],d */
141 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[1+i],C", 0, v6
},
142 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[i+1],C", 0, v6
},
143 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|RS1_G0
, "[i],C", 0, v6
},
144 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|SIMM13(~0), "[1],C", 0, v6
}, /* ld [rs1+0],d */
146 /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the
147 'ld' pseudo-op in v9. */
148 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", F_ALIAS
, v9
},
149 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0
, "[1],d", F_ALIAS
, v9
}, /* ld [rs1+%g0],d */
150 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", F_ALIAS
, v9
},
151 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", F_ALIAS
, v9
},
152 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0
, "[i],d", F_ALIAS
, v9
},
153 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", F_ALIAS
, v9
}, /* ld [rs1+0],d */
155 { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI(~0), "[1+2],d", 0, v6
},
156 { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldd [rs1+%g0],d */
157 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[1+i],d", 0, v6
},
158 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[i+1],d", 0, v6
},
159 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|RS1_G0
, "[i],d", 0, v6
},
160 { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldd [rs1+0],d */
161 { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI(~0), "[1+2],H", 0, v6
},
162 { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI_RS2(~0), "[1],H", 0, v6
}, /* ldd [rs1+%g0],d */
163 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[1+i],H", 0, v6
},
164 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[i+1],H", 0, v6
},
165 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|RS1_G0
, "[i],H", 0, v6
},
166 { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|SIMM13(~0), "[1],H", 0, v6
}, /* ldd [rs1+0],d */
167 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
168 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
169 { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI(~0), "[1+2],D", F_ALIAS
, v6
},
170 { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI_RS2(~0), "[1],D", F_ALIAS
, v6
}, /* ldd [rs1+%g0],d */
171 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i],D", F_ALIAS
, v6
},
172 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1],D", F_ALIAS
, v6
},
173 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0
, "[i],D", F_ALIAS
, v6
},
174 { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1],D", F_ALIAS
, v6
}, /* ldd [rs1+0],d */
176 { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI(~0), "[1+2],J", 0, v9
},
177 { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI_RS2(~0), "[1],J", 0, v9
}, /* ldd [rs1+%g0],d */
178 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[1+i],J", 0, v9
},
179 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[i+1],J", 0, v9
},
180 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|RS1_G0
, "[i],J", 0, v9
},
181 { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|SIMM13(~0), "[1],J", 0, v9
}, /* ldd [rs1+0],d */
183 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI(~0), "[1+2],d", 0, v6
},
184 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldsb [rs1+%g0],d */
185 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[1+i],d", 0, v6
},
186 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[i+1],d", 0, v6
},
187 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|RS1_G0
, "[i],d", 0, v6
},
188 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldsb [rs1+0],d */
190 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldsh [rs1+%g0],d */
191 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI(~0), "[1+2],d", 0, v6
},
192 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[1+i],d", 0, v6
},
193 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[i+1],d", 0, v6
},
194 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|RS1_G0
, "[i],d", 0, v6
},
195 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldsh [rs1+0],d */
197 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI(~0), "[1+2],d", 0, v6
},
198 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldstub [rs1+%g0],d */
199 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[1+i],d", 0, v6
},
200 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[i+1],d", 0, v6
},
201 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|RS1_G0
, "[i],d", 0, v6
},
202 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldstub [rs1+0],d */
204 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI(~0), "[1+2],d", 0, v9
},
205 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI_RS2(~0), "[1],d", 0, v9
}, /* ldsw [rs1+%g0],d */
206 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[1+i],d", 0, v9
},
207 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[i+1],d", 0, v9
},
208 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|RS1_G0
, "[i],d", 0, v9
},
209 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|SIMM13(~0), "[1],d", 0, v9
}, /* ldsw [rs1+0],d */
211 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI(~0), "[1+2],d", 0, v6
},
212 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* ldub [rs1+%g0],d */
213 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[1+i],d", 0, v6
},
214 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[i+1],d", 0, v6
},
215 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|RS1_G0
, "[i],d", 0, v6
},
216 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* ldub [rs1+0],d */
218 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI(~0), "[1+2],d", 0, v6
},
219 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI_RS2(~0), "[1],d", 0, v6
}, /* lduh [rs1+%g0],d */
220 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[1+i],d", 0, v6
},
221 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[i+1],d", 0, v6
},
222 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|RS1_G0
, "[i],d", 0, v6
},
223 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|SIMM13(~0), "[1],d", 0, v6
}, /* lduh [rs1+0],d */
225 { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI(~0), "[1+2],d", 0, v9
},
226 { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI_RS2(~0), "[1],d", 0, v9
}, /* ldx [rs1+%g0],d */
227 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[1+i],d", 0, v9
},
228 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[i+1],d", 0, v9
},
229 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|RS1_G0
, "[i],d", 0, v9
},
230 { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|SIMM13(~0), "[1],d", 0, v9
}, /* ldx [rs1+0],d */
232 { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RD(~1), "[1+2],F", 0, v9
},
233 { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RS2_G0
|RD(~1), "[1],F", 0, v9
}, /* ld [rs1+%g0],d */
234 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[1+i],F", 0, v9
},
235 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[i+1],F", 0, v9
},
236 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0
|RD(~1), "[i],F", 0, v9
},
237 { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9
}, /* ld [rs1+0],d */
239 { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", 0, v6
},
240 { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lda [rs1+%g0],d */
241 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", 0, v9
},
242 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", 0, v9
},
243 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
244 { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
245 { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2]A,g", 0, v9
},
246 { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0
, "[1]A,g", 0, v9
}, /* lda [rs1+%g0],d */
247 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i]o,g", 0, v9
},
248 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1]o,g", 0, v9
},
249 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0
, "[i]o,g", 0, v9
},
250 { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1]o,g", 0, v9
}, /* ld [rs1+0],d */
252 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0), "[1+2]A,d", 0, v6
},
253 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldda [rs1+%g0],d */
254 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[1+i]o,d", 0, v9
},
255 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[i+1]o,d", 0, v9
},
256 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
257 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
259 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0), "[1+2]A,H", 0, v9
},
260 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|RS2_G0
, "[1]A,H", 0, v9
}, /* ldda [rs1+%g0],d */
261 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i]o,H", 0, v9
},
262 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1]o,H", 0, v9
},
263 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0
, "[i]o,H", 0, v9
},
264 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1]o,H", 0, v9
}, /* ld [rs1+0],d */
266 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0), "[1+2]A,J", 0, v9
},
267 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0)|RS2_G0
, "[1]A,J", 0, v9
}, /* ldd [rs1+%g0],d */
268 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[1+i]o,J", 0, v9
},
269 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[i+1]o,J", 0, v9
},
270 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|RS1_G0
, "[i]o,J", 0, v9
},
271 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|SIMM13(~0), "[1]o,J", 0, v9
}, /* ldd [rs1+0],d */
273 { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0), "[1+2]A,d", 0, v6
},
274 { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldsba [rs1+%g0],d */
275 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[1+i]o,d", 0, v9
},
276 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[i+1]o,d", 0, v9
},
277 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
278 { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
280 { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0), "[1+2]A,d", 0, v6
},
281 { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldsha [rs1+%g0],d */
282 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[1+i]o,d", 0, v9
},
283 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[i+1]o,d", 0, v9
},
284 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
285 { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
287 { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0), "[1+2]A,d", 0, v6
},
288 { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* ldstuba [rs1+%g0],d */
289 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[1+i]o,d", 0, v9
},
290 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[i+1]o,d", 0, v9
},
291 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
292 { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
294 { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0), "[1+2]A,d", 0, v9
},
295 { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0)|RS2_G0
, "[1]A,d", 0, v9
}, /* lda [rs1+%g0],d */
296 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[1+i]o,d", 0, v9
},
297 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[i+1]o,d", 0, v9
},
298 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
299 { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
301 { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0), "[1+2]A,d", 0, v6
},
302 { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lduba [rs1+%g0],d */
303 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[1+i]o,d", 0, v9
},
304 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[i+1]o,d", 0, v9
},
305 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
306 { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
308 { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0), "[1+2]A,d", 0, v6
},
309 { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0)|RS2_G0
, "[1]A,d", 0, v6
}, /* lduha [rs1+%g0],d */
310 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[1+i]o,d", 0, v9
},
311 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[i+1]o,d", 0, v9
},
312 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
313 { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
315 { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", F_ALIAS
, v9
}, /* lduwa === lda */
316 { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0
, "[1]A,d", F_ALIAS
, v9
}, /* lda [rs1+%g0],d */
317 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", F_ALIAS
, v9
},
318 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", F_ALIAS
, v9
},
319 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0
, "[i]o,d", F_ALIAS
, v9
},
320 { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", F_ALIAS
, v9
}, /* ld [rs1+0],d */
322 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0), "[1+2]A,d", 0, v9
}, /* lduwa === lda */
323 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0)|RS2_G0
, "[1]A,d", 0, v9
}, /* lda [rs1+%g0],d */
324 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[1+i]o,d", 0, v9
},
325 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[i+1]o,d", 0, v9
},
326 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
327 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* ld [rs1+0],d */
329 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
330 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* st d,[rs1+%g0] */
331 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", 0, v6
},
332 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", 0, v6
},
333 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", 0, v6
},
334 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* st d,[rs1+0] */
335 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI(~0), "g,[1+2]", 0, v6
},
336 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI_RS2(~0), "g,[1]", 0, v6
}, /* st d[rs1+%g0] */
337 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[1+i]", 0, v6
},
338 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[i+1]", 0, v6
},
339 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|RS1_G0
, "g,[i]", 0, v6
},
340 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|SIMM13(~0), "g,[1]", 0, v6
}, /* st d,[rs1+0] */
341 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
342 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
343 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI(~0), "D,[1+2]", F_ALIAS
, v6
},
344 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI_RS2(~0), "D,[1]", F_ALIAS
, v6
}, /* st d,[rs1+%g0] */
345 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[1+i]", F_ALIAS
, v6
},
346 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[i+1]", F_ALIAS
, v6
},
347 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0
, "D,[i]", F_ALIAS
, v6
},
348 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "D,[1]", F_ALIAS
, v6
}, /* st d,[rs1+0] */
349 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI(~0), "C,[1+2]", 0, v6
},
350 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI_RS2(~0), "C,[1]", 0, v6
}, /* st d,[rs1+%g0] */
351 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[1+i]", 0, v6
},
352 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[i+1]", 0, v6
},
353 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|RS1_G0
, "C,[i]", 0, v6
},
354 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|SIMM13(~0), "C,[1]", 0, v6
}, /* st d,[rs1+0] */
356 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0
|ASI(~0), "F,[1+2]", 0, v6
},
357 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0
|ASI_RS2(~0), "F,[1]", 0, v6
}, /* st d,[rs1+%g0] */
358 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
, "F,[1+i]", 0, v6
},
359 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
, "F,[i+1]", 0, v6
},
360 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
|RS1_G0
, "F,[i]", 0, v6
},
361 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0
|SIMM13(~0), "F,[1]", 0, v6
}, /* st d,[rs1+0] */
363 /* The v9 STW/STUW/STSW are the same as the old 'st' opcode, they are not
364 the same as the 'st' psuedo-op in v9. */
365 { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
366 { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
367 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
368 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
369 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
370 { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
372 { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
373 { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
374 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
375 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
376 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
377 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
379 { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
}, /* stsw === st */
380 { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+%g0] */
381 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS
, v9
},
382 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS
, v9
},
383 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
384 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* st d,[rs1+0] */
386 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", 0, v6
},
387 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* sta d,[rs1+%g0] */
388 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", 0, v9
},
389 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", 0, v9
},
390 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
391 { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* st d,[rs1+0] */
393 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0), "g,[1+2]A", 0, v9
},
394 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0), "g,[1]A", 0, v9
}, /* sta d,[rs1+%g0] */
395 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[1+i]o", 0, v9
},
396 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[i+1]o", 0, v9
},
397 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0
, "g,[i]o", 0, v9
},
398 { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "g,[1]o", 0, v9
}, /* st d,[rs1+0] */
400 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
401 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
402 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
403 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
404 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
405 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
407 { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
408 { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
409 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
410 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
411 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
412 { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
414 { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS
, v9
},
415 { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* sta d,[rs1+%g0] */
416 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS
, v9
},
417 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS
, v9
},
418 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
419 { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* st d,[rs1+0] */
421 { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
422 { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* stb d,[rs1+%g0] */
423 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", 0, v6
},
424 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", 0, v6
},
425 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", 0, v6
},
426 { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* stb d,[rs1+0] */
428 { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
429 { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+%g0] */
430 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", F_ALIAS
, v9
},
431 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", F_ALIAS
, v9
},
432 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
433 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
435 { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
436 { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+%g0] */
437 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", F_ALIAS
, v9
},
438 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", F_ALIAS
, v9
},
439 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
440 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
442 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", 0, v6
},
443 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stba d,[rs1+%g0] */
444 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", 0, v9
},
445 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", 0, v9
},
446 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
447 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* stb d,[rs1+0] */
449 { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", F_ALIAS
, v9
},
450 { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stba d,[rs1+%g0] */
451 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", F_ALIAS
, v9
},
452 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", F_ALIAS
, v9
},
453 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
454 { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
456 { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", F_ALIAS
, v9
},
457 { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stba d,[rs1+%g0] */
458 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", F_ALIAS
, v9
},
459 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", F_ALIAS
, v9
},
460 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
461 { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* stb d,[rs1+0] */
463 { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
464 { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* std d,[rs1+%g0] */
465 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[1+i]", 0, v6
},
466 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[i+1]", 0, v6
},
467 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0
, "d,[i]", 0, v6
},
468 { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* std d,[rs1+0] */
469 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
470 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
471 { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "q,[1+2]", F_ALIAS
, v6
},
472 { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+%g0] */
473 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[1+i]", F_ALIAS
, v6
},
474 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[i+1]", F_ALIAS
, v6
},
475 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0
, "q,[i]", F_ALIAS
, v6
},
476 { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+0] */
477 { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI(~0), "H,[1+2]", 0, v6
},
478 { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI_RS2(~0), "H,[1]", 0, v6
}, /* std d,[rs1+%g0] */
479 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[1+i]", 0, v6
},
480 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[i+1]", 0, v6
},
481 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|RS1_G0
, "H,[i]", 0, v6
},
482 { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|SIMM13(~0), "H,[1]", 0, v6
}, /* std d,[rs1+0] */
483 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
484 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
485 { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "Q,[1+2]", F_ALIAS
, v6
},
486 { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "Q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+%g0] */
487 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[1+i]", F_ALIAS
, v6
},
488 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[i+1]", F_ALIAS
, v6
},
489 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0
, "Q,[i]", F_ALIAS
, v6
},
490 { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "Q,[1]", F_ALIAS
, v6
}, /* std d,[rs1+0] */
491 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
492 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
493 { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI(~0), "D,[1+2]", F_ALIAS
, v6
},
494 { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI_RS2(~0), "D,[1]", F_ALIAS
, v6
}, /* std d,[rs1+%g0] */
495 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[1+i]", F_ALIAS
, v6
},
496 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[i+1]", F_ALIAS
, v6
},
497 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0
, "D,[i]", F_ALIAS
, v6
},
498 { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "D,[1]", F_ALIAS
, v6
}, /* std d,[rs1+0] */
500 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0), "d,[1+2]A", 0, v6
},
501 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stda d,[rs1+%g0] */
502 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[1+i]o", 0, v9
},
503 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[i+1]o", 0, v9
},
504 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
505 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* std d,[rs1+0] */
506 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0), "H,[1+2]A", 0, v9
},
507 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0), "H,[1]A", 0, v9
}, /* stda d,[rs1+%g0] */
508 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[1+i]o", 0, v9
},
509 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[i+1]o", 0, v9
},
510 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0
, "H,[i]o", 0, v9
},
511 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "H,[1]o", 0, v9
}, /* std d,[rs1+0] */
513 { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", 0, v6
},
514 { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", 0, v6
}, /* sth d,[rs1+%g0] */
515 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", 0, v6
},
516 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", 0, v6
},
517 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", 0, v6
},
518 { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", 0, v6
}, /* sth d,[+] */
520 { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
521 { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+%g0] */
522 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", F_ALIAS
, v9
},
523 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", F_ALIAS
, v9
},
524 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
525 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+0] */
527 { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", F_ALIAS
, v9
},
528 { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+%g0] */
529 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", F_ALIAS
, v9
},
530 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", F_ALIAS
, v9
},
531 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0
, "d,[i]", F_ALIAS
, v9
},
532 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS
, v9
}, /* sth d,[rs1+0] */
534 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", 0, v6
},
535 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", 0, v6
}, /* stha ,[+%] */
536 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", 0, v9
},
537 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", 0, v9
},
538 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
539 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* sth d,[+] */
541 { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", F_ALIAS
, v9
},
542 { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stha d,[rs1+%g0] */
543 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", F_ALIAS
, v9
},
544 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", F_ALIAS
, v9
},
545 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
546 { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* sth d,[+] */
548 { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", F_ALIAS
, v9
},
549 { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS
, v9
}, /* stha d,[rs1+%g0] */
550 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", F_ALIAS
, v9
},
551 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", F_ALIAS
, v9
},
552 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0
, "d,[i]o", F_ALIAS
, v9
},
553 { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS
, v9
}, /* sth d,[+] */
555 { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI(~0), "d,[1+2]", 0, v9
},
556 { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI_RS2(~0), "d,[1]", 0, v9
}, /* stx d,[rs1+%g0] */
557 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[1+i]", 0, v9
},
558 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[i+1]", 0, v9
},
559 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RS1_G0
, "d,[i]", 0, v9
},
560 { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|SIMM13(~0), "d,[1]", 0, v9
}, /* stx d,[rs1+0] */
562 { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI(~0)|RD(~1), "F,[1+2]", 0, v9
},
563 { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI_RS2(~0)|RD(~1),"F,[1]", 0, v9
}, /* st d,[rs1+%g0] */
564 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[1+i]", 0, v9
},
565 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[i+1]", 0, v9
},
566 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RS1_G0
|RD(~1), "F,[i]", 0, v9
},
567 { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|SIMM13(~0)|RD(~1),"F,[1]", 0, v9
}, /* st d,[rs1+0] */
569 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0), "d,[1+2]A", 0, v9
},
570 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0), "d,[1]A", 0, v9
}, /* stha d,[rs1+%g0] */
571 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[1+i]o", 0, v9
},
572 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[i+1]o", 0, v9
},
573 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|RS1_G0
, "d,[i]o", 0, v9
},
574 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|SIMM13(~0), "d,[1]o", 0, v9
}, /* stx d,[rs1+0] */
576 { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "J,[1+2]", 0, v9
},
577 { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "J,[1]", 0, v9
}, /* st d[rs1+%g0] */
578 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[1+i]", 0, v9
},
579 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[i+1]", 0, v9
},
580 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0
, "J,[i]", 0, v9
},
581 { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "J,[1]", 0, v9
}, /* st d,[rs1+0] */
583 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "J,[1+2]A", 0, v9
},
584 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "J,[1]A", 0, v9
}, /* st d[rs1+%g0] */
585 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[1+i]o", 0, v9
},
586 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[i+1]o", 0, v9
},
587 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0
, "J,[i]o", 0, v9
},
588 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "J,[1]o", 0, v9
}, /* st d,[rs1+0] */
590 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI(~0), "[1+2],d", 0, v7
},
591 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI_RS2(~0), "[1],d", 0, v7
}, /* swap [rs1+%g0],d */
592 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[1+i],d", 0, v7
},
593 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[i+1],d", 0, v7
},
594 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|RS1_G0
, "[i],d", 0, v7
},
595 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|SIMM13(~0), "[1],d", 0, v7
}, /* swap [rs1+0],d */
597 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0), "[1+2]A,d", 0, v7
},
598 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0), "[1]A,d", 0, v7
}, /* swapa [rs1+%g0],d */
599 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[1+i]o,d", 0, v9
},
600 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[i+1]o,d", 0, v9
},
601 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
602 { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* swap [rs1+0],d */
604 { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|ASI(~0), "1,2,d", 0, v6
},
605 { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "", 0, v6
}, /* restore %g0,%g0,%g0 */
606 { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1), "1,i,d", 0, v6
},
607 { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0
|RS1_G0
|SIMM13(~0), "", 0, v6
}, /* restore %g0,0,%g0 */
609 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0
|ASI(~0), "1+2", F_DELAYED
, v6
}, /* rett rs1+rs2 */
610 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0
|ASI_RS2(~0), "1", F_DELAYED
, v6
}, /* rett rs1,%g0 */
611 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
, "1+i", F_DELAYED
, v6
}, /* rett rs1+X */
612 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
, "i+1", F_DELAYED
, v6
}, /* rett X+rs1 */
613 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|RS1_G0
,"i", F_DELAYED
, v6
}, /* rett X+rs1 */
614 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|RS1_G0
, "i", F_DELAYED
, v6
}, /* rett X */
615 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0
|SIMM13(~0), "1", F_DELAYED
, v6
}, /* rett rs1+0 */
617 { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, v6
},
618 { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, v6
},
619 { "save", 0x81e00000, ~0x81e00000, "", F_ALIAS
, v6
},
621 { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_DELAYED
, v6
}, /* jmpl %i7+8,%g0 */
622 { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_DELAYED
, v6
}, /* jmpl %o7+8,%g0 */
624 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI(~0), "1+2,d", F_DELAYED
, v6
},
625 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI_RS2(~0), "1,d", F_DELAYED
, v6
}, /* jmpl rs1+%g0,d */
626 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|SIMM13(~0), "1,d", F_DELAYED
, v6
}, /* jmpl rs1+0,d */
627 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RS1_G0
, "i,d", F_DELAYED
, v6
}, /* jmpl %g0+i,d */
628 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "1+i,d", F_DELAYED
, v6
},
629 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "i+1,d", F_DELAYED
, v6
},
631 { "done", F3(2, 0x3e, 1)|RD(0), F3(~2, ~0x3e, ~1)|RD(~0)|RS1_G0
|SIMM13(~0), "", 0, v9
},
632 { "retry", F3(2, 0x3e, 1)|RD(1), F3(~2, ~0x3e, ~1)|RD(~1)|RS1_G0
|SIMM13(~0), "", 0, v9
},
633 { "saved", F3(2, 0x31, 1)|RD(0), F3(~2, ~0x31, ~1)|RD(~0)|RS1_G0
|SIMM13(~0), "", 0, v9
},
634 { "restored", F3(2, 0x31, 1)|RD(1), F3(~2, ~0x31, ~1)|RD(~1)|RS1_G0
|SIMM13(~0), "", 0, v9
},
635 { "sigm", F3(2, 0x30, 0)|RD(0xf), F3(~2, ~0x30, ~0)|RD(~0xf)|RS1_G0
|SIMM13(~0), "", 0, v9
},
637 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", 0, v8
},
638 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", 0, v8
}, /* flush rs1+%g0 */
639 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", 0, v8
}, /* flush rs1+0 */
640 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0
, "i", 0, v8
}, /* flush %g0+i */
641 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", 0, v8
},
642 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", 0, v8
},
644 /* IFLUSH was renamed to FLUSH in v8. */
645 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", F_ALIAS
, v6
},
646 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", F_ALIAS
, v6
}, /* flush rs1+%g0 */
647 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", F_ALIAS
, v6
}, /* flush rs1+0 */
648 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0
, "i", F_ALIAS
, v6
},
649 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", F_ALIAS
, v6
},
650 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", F_ALIAS
, v6
},
652 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI(~0), "1+2", 0, v9
},
653 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI_RS2(~0), "1", 0, v9
}, /* return rs1+%g0 */
654 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|SIMM13(~0), "1", 0, v9
}, /* return rs1+0 */
655 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RS1_G0
, "i", 0, v9
}, /* return %g0+i */
656 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "1+i", 0, v9
},
657 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "i+1", 0, v9
},
659 { "flushw", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "", 0, v9
},
661 { "membar", F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0
|RS1(~0xf)|ASI(~0), "K", 0, v9
},
662 { "stbar", F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0
|RS1(~0xf)|SIMM13(~0), "", 0, v8
},
664 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0), "[1+2],*", 0, v9
},
665 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0)|RS2_G0
, "[1],*", 0, v9
}, /* prefetch [rs1+%g0],prefetch_fcn */
666 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[1+i],*", 0, v9
},
667 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[i+1],*", 0, v9
},
668 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|RS1_G0
, "[i],*", 0, v9
},
669 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|SIMM13(~0), "[1],*", 0, v9
}, /* prefetch [rs1+0],prefetch_fcn */
670 { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0), "[1+2]A,*", 0, v9
},
671 { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0)|RS2_G0
, "[1]A,*", 0, v9
}, /* prefetcha [rs1+%g0],prefetch_fcn */
672 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[1+i]o,d", 0, v9
},
673 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[i+1]o,d", 0, v9
},
674 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|RS1_G0
, "[i]o,d", 0, v9
},
675 { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|SIMM13(~0), "[1]o,d", 0, v9
}, /* prefetcha [rs1+0],d */
677 /* The 1<<12 is a long story. It is necessary. For more info, please contact rich@cygnus.com */
678 { "sll", F3(2, 0x25, 0), F3(~2, ~0x25, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
679 { "sll", F3(2, 0x25, 1), F3(~2, ~0x25, ~1)|(1<<12), "1,i,d", 0, v6
},
680 { "sra", F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
681 { "sra", F3(2, 0x27, 1), F3(~2, ~0x27, ~1)|(1<<12), "1,i,d", 0, v6
},
682 { "srl", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6
},
683 { "srl", F3(2, 0x26, 1), F3(~2, ~0x26, ~1)|(1<<12), "1,i,d", 0, v6
},
685 { "sllx", F3(2, 0x25, 0)|(1<<12), F3(~2, ~0x25, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
686 { "sllx", F3(2, 0x25, 1)|(1<<12), F3(~2, ~0x25, ~1), "1,i,d", 0, v9
},
687 { "srax", F3(2, 0x27, 0)|(1<<12), F3(~2, ~0x27, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
688 { "srax", F3(2, 0x27, 1)|(1<<12), F3(~2, ~0x27, ~1), "1,i,d", 0, v9
},
689 { "srlx", F3(2, 0x26, 0)|(1<<12), F3(~2, ~0x26, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9
},
690 { "srlx", F3(2, 0x26, 1)|(1<<12), F3(~2, ~0x26, ~1), "1,i,d", 0, v9
},
692 { "mulscc", F3(2, 0x24, 0), F3(~2, ~0x24, ~0)|ASI(~0), "1,2,d", 0, v6
},
693 { "mulscc", F3(2, 0x24, 1), F3(~2, ~0x24, ~1), "1,i,d", 0, v6
},
695 { "divscc", F3(2, 0x1d, 0), F3(~2, ~0x1d, ~0)|ASI(~0), "1,2,d", 0, sparclite
},
696 { "divscc", F3(2, 0x1d, 1), F3(~2, ~0x1d, ~1), "1,i,d", 0, sparclite
},
698 { "scan", F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0), "1,2,d", 0, sparclite
},
699 { "scan", F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1), "1,i,d", 0, sparclite
},
701 { "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS2_G0
|ASI(~0),"2,d", 0, v9
},
702 { "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS2_G0
, "i,d", 0, v9
},
704 { "clr", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0
|RS1_G0
|ASI_RS2(~0), "d", F_ALIAS
, v6
}, /* or %g0,%g0,d */
705 { "clr", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0
|SIMM13(~0), "d", F_ALIAS
, v6
}, /* or %g0,0,d */
706 { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
707 { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* st %g0,[rs1+%g0] */
708 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
709 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
710 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
711 { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* st %g0,[rs1+0] */
713 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
714 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* stb %g0,[rs1+%g0] */
715 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
716 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
717 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
718 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* clrb [rs1+0],d */
720 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0
|ASI(~0), "[1+2]", F_ALIAS
, v6
},
721 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0
|ASI_RS2(~0), "[1]", F_ALIAS
, v6
}, /* sth %g0,[rs1+%g0] */
722 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
, "[1+i]", F_ALIAS
, v6
},
723 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
, "[i+1]", F_ALIAS
, v6
},
724 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
|RS1_G0
, "[i]", F_ALIAS
, v6
},
725 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0
|SIMM13(~0), "[1]", F_ALIAS
, v6
}, /* clrb [rs1+0],d */
727 { "orcc", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|ASI(~0), "1,2,d", 0, v6
},
728 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "1,i,d", 0, v6
},
729 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "i,1,d", 0, v6
},
731 /* This is not a commutative instruction. */
732 { "orncc", F3(2, 0x16, 0), F3(~2, ~0x16, ~0)|ASI(~0), "1,2,d", 0, v6
},
733 { "orncc", F3(2, 0x16, 1), F3(~2, ~0x16, ~1), "1,i,d", 0, v6
},
735 /* This is not a commutative instruction. */
736 { "orn", F3(2, 0x06, 0), F3(~2, ~0x06, ~0)|ASI(~0), "1,2,d", 0, v6
},
737 { "orn", F3(2, 0x06, 1), F3(~2, ~0x06, ~1), "1,i,d", 0, v6
},
739 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0
|ASI_RS2(~0), "1", 0, v6
}, /* orcc rs1, %g0, %g0 */
740 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0
|RS1_G0
|ASI(~0), "2", 0, v6
}, /* orcc %g0, rs2, %g0 */
741 { "tst", F3(2, 0x12, 1), F3(~2, ~0x12, ~1)|RD_G0
|SIMM13(~0), "1", 0, v6
}, /* orcc rs1, 0, %g0 */
743 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8
}, /* wr r,r,%asrX */
744 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI(~0), "1,2,y", 0, v6
}, /* wr r,r,%y */
745 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8
}, /* wr r,i,%asrX */
746 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "1,i,y", 0, v6
}, /* wr r,i,%y */
747 { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI(~0), "1,2,p", 0, v6
}, /* wr r,r,%psr */
748 { "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "1,i,p", 0, v6
}, /* wr r,i,%psr */
749 { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI(~0), "1,2,w", 0, v6
}, /* wr r,r,%wim */
750 { "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "1,i,w", 0, v6
}, /* wr r,i,%wim */
751 { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,t", 0, v6
}, /* wr r,r,%tbr */
752 { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,o", 0, v9
}, /* wr r,r,%asi */
753 { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,t", 0, v6
}, /* wr r,i,%tbr */
754 { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,o", 0, v9
}, /* wr r,i,%asi */
756 { "wr", F3(2, 0x30, 0)|RD(0), F3(~2, ~0x30, ~0)|RD(~0)|ASI(~0), "1,2,y", 0, v9
},
757 { "wr", F3(2, 0x30, 1)|RD(0), F3(~2, ~0x30, ~1)|RD(~0), "1,i,y", 0, v9
},
758 { "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9
},
759 { "wr", F3(2, 0x30, 1)|RD(2), F3(~2, ~0x30, ~1)|RD(~2), "1,i,E", 0, v9
},
760 { "wr", F3(2, 0x30, 0)|RD(3), F3(~2, ~0x30, ~0)|RD(~3)|ASI(~0), "1,2,o", 0, v9
},
761 { "wr", F3(2, 0x30, 1)|RD(3), F3(~2, ~0x30, ~1)|RD(~3), "1,i,o", 0, v9
},
762 { "wr", F3(2, 0x30, 0)|RD(6), F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0), "1,2,s", 0, v9
},
763 { "wr", F3(2, 0x30, 1)|RD(6), F3(~2, ~0x30, ~1)|RD(~6), "1,i,s", 0, v9
},
765 { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", 0, v8
}, /* rd %asr1,r */
766 { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0
|SIMM13(~0), "y,d", 0, v6
}, /* rd %y,r */
767 { "rd", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0
|SIMM13(~0), "p,d", 0, v6
}, /* rd %psr,r */
768 { "rd", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0
|SIMM13(~0), "w,d", 0, v6
}, /* rd %wim,r */
769 { "rd", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0
|SIMM13(~0), "t,d", 0, v6
}, /* rd %tbr,r */
771 { "rd", F3(2, 0x28, 0)|RS1(2), F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0), "E,d", 0, v9
}, /* rd %ccr,r */
772 { "rd", F3(2, 0x28, 0)|RS1(3), F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0), "o,d", 0, v9
}, /* rd %asi,r */
773 { "rd", F3(2, 0x28, 0)|RS1(4), F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0), "W,d", 0, v9
}, /* rd %tick,r */
774 { "rd", F3(2, 0x28, 0)|RS1(5), F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9
}, /* rd %pc,r */
775 { "rd", F3(2, 0x2b, 0)|RS1(6), F3(~2, ~0x2b, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9
}, /* rd %fprs,r */
777 { "rdpr", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|SIMM13(~0), "?,d", 0, v9
}, /* rdpr %priv_reg,r */
778 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,2,!", 0, v9
},
779 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,!", 0, v9
},
780 { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "!", 0, v9
},
781 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "1,i,!", 0, v9
},
782 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,1,!", 0, v9
},
783 { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,!", 0, v9
},
785 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", F_ALIAS
, v8
}, /* wr r,r,%asrX */
786 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0
|ASI(~0), "1,2,y", F_ALIAS
, v6
}, /* wr r,r,%y */
787 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", F_ALIAS
, v8
}, /* wr r,i,%asrX */
788 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0
, "1,i,y", F_ALIAS
, v6
}, /* wr r,i,%y */
789 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0
|ASI(~0), "1,2,p", F_ALIAS
, v6
}, /* wr r,r,%psr */
790 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0
, "1,i,p", F_ALIAS
, v6
}, /* wr r,i,%psr */
791 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0
|ASI(~0), "1,2,w", F_ALIAS
, v6
}, /* wr r,r,%wim */
792 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0
, "1,i,w", F_ALIAS
, v6
}, /* wr r,i,%wim */
793 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0
|ASI(~0), "1,2,t", F_ALIAS
, v6
}, /* wr r,r,%tbr */
794 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0
, "1,i,t", F_ALIAS
, v6
}, /* wr r,i,%tbr */
796 { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", F_ALIAS
, v8
}, /* rd %asr1,r */
797 { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0
|SIMM13(~0), "y,d", F_ALIAS
, v6
}, /* rd %y,r */
798 { "mov", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0
|SIMM13(~0), "p,d", F_ALIAS
, v6
}, /* rd %psr,r */
799 { "mov", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0
|SIMM13(~0), "w,d", F_ALIAS
, v6
}, /* rd %wim,r */
800 { "mov", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0
|SIMM13(~0), "t,d", F_ALIAS
, v6
}, /* rd %tbr,r */
802 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,y", F_ALIAS
, v6
}, /* wr rs1,%g0,%y */
803 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "i,y", F_ALIAS
, v6
},
804 { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0), "1,y", F_ALIAS
, v6
}, /* wr rs1,0,%y */
805 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|ASI_RS2(~0), "1,p", F_ALIAS
, v6
}, /* wr rs1,%g0,%psr */
806 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1), "i,p", F_ALIAS
, v6
},
807 { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|SIMM13(~0), "1,p", F_ALIAS
, v6
}, /* wr rs1,0,%psr */
808 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|ASI_RS2(~0), "1,w", F_ALIAS
, v6
}, /* wr rs1,%g0,%wim */
809 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,w", F_ALIAS
, v6
},
810 { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|SIMM13(~0), "1,w", F_ALIAS
, v6
}, /* wr rs1,0,%wim */
811 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|ASI_RS2(~0), "1,t", F_ALIAS
, v6
}, /* wr rs1,%g0,%tbr */
812 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1), "i,t", F_ALIAS
, v6
},
813 { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|SIMM13(~0), "1,t", F_ALIAS
, v6
}, /* wr rs1,0,%tbr */
815 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0
|ASI(~0), "2,d", 0, v6
}, /* or %g0,rs2,d */
816 { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0
, "i,d", 0, v6
}, /* or %g0,i,d */
817 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI_RS2(~0), "1,d", 0, v6
}, /* or rs1,%g0,d */
818 { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|SIMM13(~0), "1,d", 0, v6
}, /* or rs1,0,d */
820 { "or", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "1,2,d", 0, v6
},
821 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "1,i,d", 0, v6
},
822 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,1,d", 0, v6
},
824 { "bset", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* or rd,rs2,rd */
825 { "bset", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,r", F_ALIAS
, v6
}, /* or rd,i,rd */
827 /* This is not a commutative instruction. */
828 { "andn", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "1,2,d", 0, v6
},
829 { "andn", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "1,i,d", 0, v6
},
831 /* This is not a commutative instruction. */
832 { "andncc", F3(2, 0x15, 0), F3(~2, ~0x15, ~0)|ASI(~0), "1,2,d", 0, v6
},
833 { "andncc", F3(2, 0x15, 1), F3(~2, ~0x15, ~1), "1,i,d", 0, v6
},
835 { "bclr", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* andn rd,rs2,rd */
836 { "bclr", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "i,r", F_ALIAS
, v6
}, /* andn rd,i,rd */
838 { "cmp", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0
|ASI(~0), "1,2", 0, v6
}, /* subcc rs1,rs2,%g0 */
839 { "cmp", F3(2, 0x14, 1), F3(~2, ~0x14, ~1)|RD_G0
, "1,i", 0, v6
}, /* subcc rs1,i,%g0 */
841 { "sub", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|ASI(~0), "1,2,d", 0, v6
},
842 { "sub", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "1,i,d", 0, v6
},
844 { "subcc", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|ASI(~0), "1,2,d", 0, v6
},
845 { "subcc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "1,i,d", 0, v6
},
847 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
848 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
849 { "subx", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
850 { "subx", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", F_ALIAS
, v6
},
851 { "subc", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", 0, v9
},
852 { "subc", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", 0, v9
},
854 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
855 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
856 { "subxcc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
857 { "subxcc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", F_ALIAS
, v6
},
858 { "subccc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", 0, v9
},
859 { "subccc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", 0, v9
},
861 { "and", F3(2, 0x01, 0), F3(~2, ~0x01, ~0)|ASI(~0), "1,2,d", 0, v6
},
862 { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "1,i,d", 0, v6
},
863 { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "i,1,d", 0, v6
},
865 { "andcc", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|ASI(~0), "1,2,d", 0, v6
},
866 { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "1,i,d", 0, v6
},
867 { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "i,1,d", 0, v6
},
869 { "dec", F3(2, 0x04, 1)|SIMM13(0x1), F3(~2, ~0x04, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* sub rd,1,rd */
870 { "dec", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "i,r", F_ALIAS
, v8
}, /* sub rd,imm,rd */
871 { "deccc", F3(2, 0x14, 1)|SIMM13(0x1), F3(~2, ~0x14, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* subcc rd,1,rd */
872 { "deccc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "i,r", F_ALIAS
, v8
}, /* subcc rd,imm,rd */
873 { "inc", F3(2, 0x00, 1)|SIMM13(0x1), F3(~2, ~0x00, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* add rd,1,rd */
874 { "inc", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,r", F_ALIAS
, v8
}, /* add rd,imm,rd */
875 { "inccc", F3(2, 0x10, 1)|SIMM13(0x1), F3(~2, ~0x10, ~1)|SIMM13(~0x0001), "r", F_ALIAS
, v6
}, /* addcc rd,1,rd */
876 { "inccc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,r", F_ALIAS
, v8
}, /* addcc rd,imm,rd */
878 { "btst", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0
|ASI(~0), "1,2", F_ALIAS
, v6
}, /* andcc rs1,rs2,%g0 */
879 { "btst", F3(2, 0x11, 1), F3(~2, ~0x11, ~1)|RD_G0
, "i,1", F_ALIAS
, v6
}, /* andcc rs1,i,%g0 */
881 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0
|ASI(~0), "2,d", F_ALIAS
, v6
}, /* sub %g0,rs2,rd */
882 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0
|ASI(~0), "r", F_ALIAS
, v6
}, /* sub %g0,rd,rd */
884 { "add", F3(2, 0x00, 0), F3(~2, ~0x00, ~0)|ASI(~0), "1,2,d", 0, v6
},
885 { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "1,i,d", 0, v6
},
886 { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,1,d", 0, v6
},
887 { "addcc", F3(2, 0x10, 0), F3(~2, ~0x10, ~0)|ASI(~0), "1,2,d", 0, v6
},
888 { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "1,i,d", 0, v6
},
889 { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,1,d", 0, v6
},
890 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
891 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
892 { "addx", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
893 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", F_ALIAS
, v6
},
894 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", F_ALIAS
, v6
},
895 { "addc", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", 0, v9
},
896 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", 0, v9
},
897 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", 0, v9
},
898 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
899 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
900 { "addxcc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", F_ALIAS
, v6
},
901 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", F_ALIAS
, v6
},
902 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", F_ALIAS
, v6
},
903 { "addccc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", 0, v9
},
904 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", 0, v9
},
905 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", 0, v9
},
907 { "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0), "1,2,d", 0, v8
},
908 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "1,i,d", 0, v8
},
909 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "i,1,d", 0, v8
},
910 { "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0), "1,2,d", 0, v8
},
911 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "1,i,d", 0, v8
},
912 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "i,1,d", 0, v8
},
913 { "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0), "1,2,d", 0, v8
},
914 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "1,i,d", 0, v8
},
915 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "i,1,d", 0, v8
},
916 { "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0), "1,2,d", 0, v8
},
917 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "1,i,d", 0, v8
},
918 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "i,1,d", 0, v8
},
919 { "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0), "1,2,d", 0, v8
},
920 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "1,i,d", 0, v8
},
921 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "i,1,d", 0, v8
},
922 { "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0), "1,2,d", 0, v8
},
923 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "1,i,d", 0, v8
},
924 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "i,1,d", 0, v8
},
925 { "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0), "1,2,d", 0, v8
},
926 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "1,i,d", 0, v8
},
927 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "i,1,d", 0, v8
},
928 { "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0), "1,2,d", 0, v8
},
929 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "1,i,d", 0, v8
},
930 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "i,1,d", 0, v8
},
932 { "mulx", F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0), "1,2,d", 0, v9
},
933 { "mulx", F3(2, 0x09, 1), F3(~2, ~0x09, ~1), "1,i,d", 0, v9
},
934 { "sdivx", F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0), "1,2,d", 0, v9
},
935 { "sdivx", F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1), "1,i,d", 0, v9
},
936 { "udivx", F3(2, 0x0d, 0), F3(~2, ~0x0d, ~0)|ASI(~0), "1,2,d", 0, v9
},
937 { "udivx", F3(2, 0x0d, 1), F3(~2, ~0x0d, ~1), "1,i,d", 0, v9
},
939 { "call", F1(0x1), F1(~0x1), "L", F_DELAYED
, v6
},
940 { "call", F1(0x1), F1(~0x1), "L,#", F_DELAYED
, v6
},
941 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1", F_DELAYED
, v6
}, /* jmpl rs1+%g0, %o7 */
942 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1,#", F_DELAYED
, v6
},
944 /* Conditional instructions.
946 Because this part of the table was such a mess earlier, I have
947 macrofied it so that all the branches and traps are generated from
948 a single-line description of each condition value. John Gilmore. */
950 /* Define branches -- one annulled, one without, etc. */
951 #define br(opcode, mask, lose, flags) \
952 { opcode, (mask)|ANNUL, (lose), ",a l", (flags), v6 }, \
953 { opcode, (mask) , (lose)|ANNUL, "l", (flags), v6 }
955 #define brx(opcode, mask, lose, flags) /* v9 */ \
956 { opcode, (mask)|(2<<20), (lose)|ANNUL|BPRED, "Z,G", (flags), v9 }, \
957 { opcode, (mask)|(2<<20), (lose)|ANNUL|BPRED, ",N Z,G", (flags), v9 }, \
958 { opcode, (mask)|(2<<20)|ANNUL, (lose)|BPRED, ",a Z,G", (flags), v9 }, \
959 { opcode, (mask)|(2<<20)|ANNUL, (lose)|BPRED, ",a,N Z,G", (flags), v9 }, \
960 { opcode, (mask)|(2<<20)|BPRED, (lose)|ANNUL, ",T Z,G", (flags), v9 }, \
961 { opcode, (mask)|(2<<20)|ANNUL|BPRED, (lose), ",a,T Z,G", (flags), v9 }, \
962 { opcode, (mask), (lose)|(2<<20)|ANNUL|BPRED, "z,G", (flags), v9 }, \
963 { opcode, (mask), (lose)|(2<<20)|ANNUL|BPRED, ",N z,G", (flags), v9 }, \
964 { opcode, (mask)|ANNUL, (lose)|(2<<20)|BPRED, ",a z,G", (flags), v9 }, \
965 { opcode, (mask)|ANNUL, (lose)|(2<<20)|BPRED, ",a,N z,G", (flags), v9 }, \
966 { opcode, (mask)|BPRED, (lose)|(2<<20)|ANNUL, ",T z,G", (flags), v9 }, \
967 { opcode, (mask)|ANNUL|BPRED, (lose)|(2<<20), ",a,T z,G", (flags), v9 }
969 /* Define four traps: reg+reg, reg + immediate, immediate alone, reg alone. */
970 #define tr(opcode, mask, lose, flags) \
971 { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0, "Z,i", (flags), v9 }, /* %g0 + imm */ \
972 { opcode, (mask)|(2<<11)|IMMED, (lose), "Z,1+i", (flags), v9 }, /* rs1 + imm */ \
973 { opcode, (mask)|(2<<11), IMMED|(lose), "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \
974 { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0, "Z,1", (flags), v9 }, /* rs1 + %g0 */ \
975 { opcode, (mask)|IMMED, (lose)|RS1_G0, "z,i", (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \
976 { opcode, (mask)|IMMED, (lose), "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \
977 { opcode, (mask), IMMED|(lose), "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \
978 { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1", (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \
979 { opcode, (mask)|IMMED, (lose)|RS1_G0, "i", (flags), v6 }, /* %g0 + imm */ \
980 { opcode, (mask)|IMMED, (lose), "1+i", (flags), v6 }, /* rs1 + imm */ \
981 { opcode, (mask), IMMED|(lose), "1+2", (flags), v6 }, /* rs1 + rs2 */ \
982 { opcode, (mask), IMMED|(lose)|RS2_G0, "1", (flags), v6 } /* rs1 + %g0 */
984 /* v9: We must put `brx' before `br', to ensure that we never match something
985 v9: against an expression unless it is an expression. Otherwise, we end
986 v9: up with undefined symbol tables entries, because they get added, but
987 v9: are not deleted if the pattern fails to match. */
989 /* Define both branches and traps based on condition mask */
990 #define cond(bop, top, mask, flags) \
991 brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \
992 br(bop, F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \
993 tr(top, F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), (flags))
995 /* Define all the conditions, all the branches, all the traps. */
997 cond ("b", "ta", CONDA
, 0), /* Standard branch, trap mnemonics */
998 cond ("ba", "t", CONDA
, F_ALIAS
), /* Alternative forms (not for disas) */
999 cond ("bcc", "tcc", CONDCC
, 0),
1000 cond ("bcs", "tcs", CONDCS
, 0),
1001 cond ("be", "te", CONDE
, 0),
1002 cond ("bg", "tg", CONDG
, 0),
1003 cond ("bgt", "tgt", CONDG
, F_ALIAS
),
1004 cond ("bge", "tge", CONDGE
, 0),
1005 cond ("bgeu", "tgeu", CONDGEU
, F_ALIAS
), /* for cc */
1006 cond ("bgu", "tgu", CONDGU
, 0),
1007 cond ("bl", "tl", CONDL
, 0),
1008 cond ("blt", "tlt", CONDL
, F_ALIAS
),
1009 cond ("ble", "tle", CONDLE
, 0),
1010 cond ("bleu", "tleu", CONDLEU
, 0),
1011 cond ("blu", "tlu", CONDLU
, F_ALIAS
), /* for cs */
1012 cond ("bn", "tn", CONDN
, 0),
1013 cond ("bne", "tne", CONDNE
, 0),
1014 cond ("bneg", "tneg", CONDNEG
, 0),
1015 cond ("bnz", "tnz", CONDNZ
, F_ALIAS
), /* for ne */
1016 cond ("bpos", "tpos", CONDPOS
, 0),
1017 cond ("bvc", "tvc", CONDVC
, 0),
1018 cond ("bvs", "tvs", CONDVS
, 0),
1019 cond ("bz", "tz", CONDZ
, F_ALIAS
), /* for e */
1026 #define brr(opcode, mask, lose, flags) /* v9 */ \
1027 { opcode, (mask), (lose)|ANNUL|BPRED, "1,k", F_DELAYED|(flags), v9 }, \
1028 { opcode, (mask), (lose)|ANNUL|BPRED, ",N 1,k", F_DELAYED|(flags), v9 }, \
1029 { opcode, (mask)|ANNUL, (lose)|BPRED, ",a 1,k", F_DELAYED|(flags), v9 }, \
1030 { opcode, (mask)|ANNUL, (lose)|BPRED, ",a,N 1,k", F_DELAYED|(flags), v9 }, \
1031 { opcode, (mask)|BPRED, (lose)|ANNUL, ",T 1,k", F_DELAYED|(flags), v9 }, \
1032 { opcode, (mask)|ANNUL|BPRED, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 }
1034 #define condr(bop, mask, flags) /* v9 */ \
1035 brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */
1037 /* v9 */ condr("brnz", 0x5, 0),
1038 /* v9 */ condr("brz", 0x1, 0),
1039 /* v9 */ condr("brgez", 0x7, 0),
1040 /* v9 */ condr("brlz", 0x3, 0),
1041 /* v9 */ condr("brlez", 0x2, 0),
1042 /* v9 */ condr("brgz", 0x6, 0),
1044 #undef condr /* v9 */
1047 #define movr(opcode, mask, flags) /* v9 */ \
1048 { opcode, F3(2, 0x2f, 0)|RCOND(mask), F3(~2, ~0x2f, ~0)|RCOND(~(mask)), "1,2,d", (flags), v9 }, \
1049 { opcode, F3(2, 0x2f, 1)|RCOND(mask), F3(~2, ~0x2f, ~1)|RCOND(~(mask)), "1,j,d", (flags), v9 }
1051 #define fmrrs(opcode, mask, lose, flags) /* v9 */ \
1052 { opcode, (mask), (lose), "1,f,g", (flags), v9 }
1053 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1054 { opcode, (mask), (lose), "1,B,H", (flags), v9 }
1055 #define fmrrq(opcode, mask, lose, flags) /* v9 */ \
1056 { opcode, (mask), (lose), "1,R,J", (flags), v9 }
1058 #define fmovrs(mop, mask, flags) /* v9 */ \
1059 fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|RCOND(~(mask)), (flags)) /* v9 */
1060 #define fmovrd(mop, mask, flags) /* v9 */ \
1061 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
1062 #define fmovrq(mop, mask, flags) /* v9 */ \
1063 fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|RCOND(~(mask)), (flags)) /* v9 */
1065 /* v9 */ movr("movrne", 0x5, 0),
1066 /* v9 */ movr("movre", 0x1, 0),
1067 /* v9 */ movr("movrgez", 0x7, 0),
1068 /* v9 */ movr("movrlz", 0x3, 0),
1069 /* v9 */ movr("movrlez", 0x2, 0),
1070 /* v9 */ movr("movrgz", 0x6, 0),
1071 /* v9 */ movr("movrnz", 0x5, F_ALIAS
),
1072 /* v9 */ movr("movrz", 0x1, F_ALIAS
),
1074 /* v9 */ fmovrs("fmovrsne", 0x5, 0),
1075 /* v9 */ fmovrs("fmovrse", 0x1, 0),
1076 /* v9 */ fmovrs("fmovrsgez", 0x7, 0),
1077 /* v9 */ fmovrs("fmovrslz", 0x3, 0),
1078 /* v9 */ fmovrs("fmovrslez", 0x2, 0),
1079 /* v9 */ fmovrs("fmovrsgz", 0x6, 0),
1080 /* v9 */ fmovrs("fmovrsnz", 0x5, F_ALIAS
),
1081 /* v9 */ fmovrs("fmovrsz", 0x1, F_ALIAS
),
1083 /* v9 */ fmovrd("fmovrdne", 0x5, 0),
1084 /* v9 */ fmovrd("fmovrde", 0x1, 0),
1085 /* v9 */ fmovrd("fmovrdgez", 0x7, 0),
1086 /* v9 */ fmovrd("fmovrdlz", 0x3, 0),
1087 /* v9 */ fmovrd("fmovrdlez", 0x2, 0),
1088 /* v9 */ fmovrd("fmovrdgz", 0x6, 0),
1089 /* v9 */ fmovrd("fmovrdnz", 0x5, F_ALIAS
),
1090 /* v9 */ fmovrd("fmovrdz", 0x1, F_ALIAS
),
1092 /* v9 */ fmovrq("fmovrqne", 0x5, 0),
1093 /* v9 */ fmovrq("fmovrqe", 0x1, 0),
1094 /* v9 */ fmovrq("fmovrqgez", 0x7, 0),
1095 /* v9 */ fmovrq("fmovrqlz", 0x3, 0),
1096 /* v9 */ fmovrq("fmovrqlez", 0x2, 0),
1097 /* v9 */ fmovrq("fmovrqgz", 0x6, 0),
1098 /* v9 */ fmovrq("fmovrqnz", 0x5, F_ALIAS
),
1099 /* v9 */ fmovrq("fmovrqz", 0x1, F_ALIAS
),
1101 #undef movr /* v9 */
1102 #undef fmovr /* v9 */
1103 #undef fmrr /* v9 */
1105 #define movicc(opcode, cond, flags) /* v9 */ \
1106 { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|XCC|(1<<12), "z,2,d", flags, v9 }, \
1107 { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|XCC|(1<<12), "z,I,d", flags, v9 }, \
1108 { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|(1<<12), "Z,2,d", flags, v9 }, \
1109 { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|(1<<12), "Z,I,d", flags, v9 }
1111 #define movfcc(opcode, fcond, flags) /* v9 */ \
1112 { opcode, F3(2, 0x2c, 0)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", flags, v9 }, \
1113 { opcode, F3(2, 0x2c, 1)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", flags, v9 }, \
1114 { opcode, F3(2, 0x2c, 0)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", flags, v9 }, \
1115 { opcode, F3(2, 0x2c, 1)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", flags, v9 }, \
1116 { opcode, F3(2, 0x2c, 0)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", flags, v9 }, \
1117 { opcode, F3(2, 0x2c, 1)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", flags, v9 }, \
1118 { opcode, F3(2, 0x2c, 0)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", flags, v9 }, \
1119 { opcode, F3(2, 0x2c, 1)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", flags, v9 }
1121 #define movcc(opcode, cond, fcond, flags) /* v9 */ \
1122 movfcc (opcode, fcond, flags), /* v9 */ \
1123 movicc (opcode, cond, flags)
1125 /* v9 */ movcc ("mova", CONDA
, FCONDA
, 0),
1126 /* v9 */ movicc ("movcc", CONDCC
, 0),
1127 /* v9 */ movicc ("movgeu", CONDGEU
, F_ALIAS
),
1128 /* v9 */ movicc ("movcs", CONDCS
, 0),
1129 /* v9 */ movicc ("movlu", CONDLU
, F_ALIAS
),
1130 /* v9 */ movcc ("move", CONDE
, FCONDE
, 0),
1131 /* v9 */ movcc ("movg", CONDG
, FCONDG
, 0),
1132 /* v9 */ movcc ("movge", CONDGE
, FCONDGE
, 0),
1133 /* v9 */ movicc ("movgu", CONDGU
, 0),
1134 /* v9 */ movcc ("movl", CONDL
, FCONDL
, 0),
1135 /* v9 */ movcc ("movle", CONDLE
, FCONDLE
, 0),
1136 /* v9 */ movicc ("movleu", CONDLEU
, 0),
1137 /* v9 */ movfcc ("movlg", FCONDLG
, 0),
1138 /* v9 */ movcc ("movn", CONDN
, FCONDN
, 0),
1139 /* v9 */ movcc ("movne", CONDNE
, FCONDNE
, 0),
1140 /* v9 */ movicc ("movneg", CONDNEG
, 0),
1141 /* v9 */ movcc ("movnz", CONDNZ
, FCONDNZ
, F_ALIAS
),
1142 /* v9 */ movfcc ("movo", FCONDO
, 0),
1143 /* v9 */ movicc ("movpos", CONDPOS
, 0),
1144 /* v9 */ movfcc ("movu", FCONDU
, 0),
1145 /* v9 */ movfcc ("movue", FCONDUE
, 0),
1146 /* v9 */ movfcc ("movug", FCONDUG
, 0),
1147 /* v9 */ movfcc ("movuge", FCONDUGE
, 0),
1148 /* v9 */ movfcc ("movul", FCONDUL
, 0),
1149 /* v9 */ movfcc ("movule", FCONDULE
, 0),
1150 /* v9 */ movicc ("movvc", CONDVC
, 0),
1151 /* v9 */ movicc ("movvs", CONDVS
, 0),
1152 /* v9 */ movcc ("movz", CONDZ
, FCONDZ
, F_ALIAS
),
1154 #undef movicc /* v9 */
1155 #undef movfcc /* v9 */
1156 #undef movcc /* v9 */
1158 #define FM_SF 1 /* v9 - values for fpsize */
1159 #define FM_DF 2 /* v9 */
1160 #define FM_QF 3 /* v9 */
1162 #define fmovicc(opcode, fpsize, cond, flags) /* v9 */ \
1163 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags, v9 }, \
1164 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags, v9 }
1166 #define fmovfcc(opcode, fpsize, fcond, flags) /* v9 */ \
1167 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags, v9 }, \
1168 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags, v9 }, \
1169 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags, v9 }, \
1170 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags, v9 }
1172 /* FIXME: use fmovicc/fmovfcc? */
1173 #define fmovcc(opcode, fpsize, cond, fcond, flags) /* v9 */ \
1174 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags, v9 }, \
1175 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags, v9 }, \
1176 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags, v9 }, \
1177 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags, v9 }, \
1178 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags, v9 }, \
1179 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags, v9 }
1181 /* v9 */ fmovcc ("fmovda", FM_DF
, CONDA
, FCONDA
, 0),
1182 /* v9 */ fmovcc ("fmovqa", FM_QF
, CONDA
, FCONDA
, 0),
1183 /* v9 */ fmovcc ("fmovsa", FM_SF
, CONDA
, FCONDA
, 0),
1184 /* v9 */ fmovicc ("fmovdcc", FM_DF
, CONDCC
, 0),
1185 /* v9 */ fmovicc ("fmovqcc", FM_QF
, CONDCC
, 0),
1186 /* v9 */ fmovicc ("fmovscc", FM_SF
, CONDCC
, 0),
1187 /* v9 */ fmovicc ("fmovdcs", FM_DF
, CONDCS
, 0),
1188 /* v9 */ fmovicc ("fmovqcs", FM_QF
, CONDCS
, 0),
1189 /* v9 */ fmovicc ("fmovscs", FM_SF
, CONDCS
, 0),
1190 /* v9 */ fmovcc ("fmovde", FM_DF
, CONDE
, FCONDE
, 0),
1191 /* v9 */ fmovcc ("fmovqe", FM_QF
, CONDE
, FCONDE
, 0),
1192 /* v9 */ fmovcc ("fmovse", FM_SF
, CONDE
, FCONDE
, 0),
1193 /* v9 */ fmovcc ("fmovdg", FM_DF
, CONDG
, FCONDG
, 0),
1194 /* v9 */ fmovcc ("fmovqg", FM_QF
, CONDG
, FCONDG
, 0),
1195 /* v9 */ fmovcc ("fmovsg", FM_SF
, CONDG
, FCONDG
, 0),
1196 /* v9 */ fmovcc ("fmovdge", FM_DF
, CONDGE
, FCONDGE
, 0),
1197 /* v9 */ fmovcc ("fmovqge", FM_QF
, CONDGE
, FCONDGE
, 0),
1198 /* v9 */ fmovcc ("fmovsge", FM_SF
, CONDGE
, FCONDGE
, 0),
1199 /* v9 */ fmovicc ("fmovdgeu", FM_DF
, CONDGEU
, F_ALIAS
),
1200 /* v9 */ fmovicc ("fmovqgeu", FM_QF
, CONDGEU
, F_ALIAS
),
1201 /* v9 */ fmovicc ("fmovsgeu", FM_SF
, CONDGEU
, F_ALIAS
),
1202 /* v9 */ fmovicc ("fmovdgu", FM_DF
, CONDGU
, 0),
1203 /* v9 */ fmovicc ("fmovqgu", FM_QF
, CONDGU
, 0),
1204 /* v9 */ fmovicc ("fmovsgu", FM_SF
, CONDGU
, 0),
1205 /* v9 */ fmovcc ("fmovdl", FM_DF
, CONDL
, FCONDL
, 0),
1206 /* v9 */ fmovcc ("fmovql", FM_QF
, CONDL
, FCONDL
, 0),
1207 /* v9 */ fmovcc ("fmovsl", FM_SF
, CONDL
, FCONDL
, 0),
1208 /* v9 */ fmovcc ("fmovdle", FM_DF
, CONDLE
, FCONDLE
, 0),
1209 /* v9 */ fmovcc ("fmovqle", FM_QF
, CONDLE
, FCONDLE
, 0),
1210 /* v9 */ fmovcc ("fmovsle", FM_SF
, CONDLE
, FCONDLE
, 0),
1211 /* v9 */ fmovicc ("fmovdleu", FM_DF
, CONDLEU
, 0),
1212 /* v9 */ fmovicc ("fmovqleu", FM_QF
, CONDLEU
, 0),
1213 /* v9 */ fmovicc ("fmovsleu", FM_SF
, CONDLEU
, 0),
1214 /* v9 */ fmovfcc ("fmovdlg", FM_DF
, FCONDLG
, 0),
1215 /* v9 */ fmovfcc ("fmovqlg", FM_QF
, FCONDLG
, 0),
1216 /* v9 */ fmovfcc ("fmovslg", FM_SF
, FCONDLG
, 0),
1217 /* v9 */ fmovicc ("fmovdlu", FM_DF
, CONDLU
, F_ALIAS
),
1218 /* v9 */ fmovicc ("fmovqlu", FM_QF
, CONDLU
, F_ALIAS
),
1219 /* v9 */ fmovicc ("fmovslu", FM_SF
, CONDLU
, F_ALIAS
),
1220 /* v9 */ fmovcc ("fmovdn", FM_DF
, CONDN
, FCONDN
, 0),
1221 /* v9 */ fmovcc ("fmovqn", FM_QF
, CONDN
, FCONDN
, 0),
1222 /* v9 */ fmovcc ("fmovsn", FM_SF
, CONDN
, FCONDN
, 0),
1223 /* v9 */ fmovcc ("fmovdne", FM_DF
, CONDNE
, FCONDNE
, 0),
1224 /* v9 */ fmovcc ("fmovqne", FM_QF
, CONDNE
, FCONDNE
, 0),
1225 /* v9 */ fmovcc ("fmovsne", FM_SF
, CONDNE
, FCONDNE
, 0),
1226 /* v9 */ fmovicc ("fmovdneg", FM_DF
, CONDNEG
, 0),
1227 /* v9 */ fmovicc ("fmovqneg", FM_QF
, CONDNEG
, 0),
1228 /* v9 */ fmovicc ("fmovsneg", FM_SF
, CONDNEG
, 0),
1229 /* v9 */ fmovcc ("fmovdnz", FM_DF
, CONDNZ
, FCONDNZ
, F_ALIAS
),
1230 /* v9 */ fmovcc ("fmovqnz", FM_QF
, CONDNZ
, FCONDNZ
, F_ALIAS
),
1231 /* v9 */ fmovcc ("fmovsnz", FM_SF
, CONDNZ
, FCONDNZ
, F_ALIAS
),
1232 /* v9 */ fmovfcc ("fmovdo", FM_DF
, FCONDO
, 0),
1233 /* v9 */ fmovfcc ("fmovqo", FM_QF
, FCONDO
, 0),
1234 /* v9 */ fmovfcc ("fmovso", FM_SF
, FCONDO
, 0),
1235 /* v9 */ fmovicc ("fmovdpos", FM_DF
, CONDPOS
, 0),
1236 /* v9 */ fmovicc ("fmovqpos", FM_QF
, CONDPOS
, 0),
1237 /* v9 */ fmovicc ("fmovspos", FM_SF
, CONDPOS
, 0),
1238 /* v9 */ fmovfcc ("fmovdu", FM_DF
, FCONDU
, 0),
1239 /* v9 */ fmovfcc ("fmovqu", FM_QF
, FCONDU
, 0),
1240 /* v9 */ fmovfcc ("fmovsu", FM_SF
, FCONDU
, 0),
1241 /* v9 */ fmovfcc ("fmovdue", FM_DF
, FCONDUE
, 0),
1242 /* v9 */ fmovfcc ("fmovque", FM_QF
, FCONDUE
, 0),
1243 /* v9 */ fmovfcc ("fmovsue", FM_SF
, FCONDUE
, 0),
1244 /* v9 */ fmovfcc ("fmovdug", FM_DF
, FCONDUG
, 0),
1245 /* v9 */ fmovfcc ("fmovqug", FM_QF
, FCONDUG
, 0),
1246 /* v9 */ fmovfcc ("fmovsug", FM_SF
, FCONDUG
, 0),
1247 /* v9 */ fmovfcc ("fmovduge", FM_DF
, FCONDUGE
, 0),
1248 /* v9 */ fmovfcc ("fmovquge", FM_QF
, FCONDUGE
, 0),
1249 /* v9 */ fmovfcc ("fmovsuge", FM_SF
, FCONDUGE
, 0),
1250 /* v9 */ fmovfcc ("fmovdul", FM_DF
, FCONDUL
, 0),
1251 /* v9 */ fmovfcc ("fmovqul", FM_QF
, FCONDUL
, 0),
1252 /* v9 */ fmovfcc ("fmovsul", FM_SF
, FCONDUL
, 0),
1253 /* v9 */ fmovfcc ("fmovdule", FM_DF
, FCONDULE
, 0),
1254 /* v9 */ fmovfcc ("fmovqule", FM_QF
, FCONDULE
, 0),
1255 /* v9 */ fmovfcc ("fmovsule", FM_SF
, FCONDULE
, 0),
1256 /* v9 */ fmovicc ("fmovdvc", FM_DF
, CONDVC
, 0),
1257 /* v9 */ fmovicc ("fmovqvc", FM_QF
, CONDVC
, 0),
1258 /* v9 */ fmovicc ("fmovsvc", FM_SF
, CONDVC
, 0),
1259 /* v9 */ fmovicc ("fmovdvs", FM_DF
, CONDVS
, 0),
1260 /* v9 */ fmovicc ("fmovqvs", FM_QF
, CONDVS
, 0),
1261 /* v9 */ fmovicc ("fmovsvs", FM_SF
, CONDVS
, 0),
1262 /* v9 */ fmovcc ("fmovdz", FM_DF
, CONDZ
, FCONDZ
, F_ALIAS
),
1263 /* v9 */ fmovcc ("fmovqz", FM_QF
, CONDZ
, FCONDZ
, F_ALIAS
),
1264 /* v9 */ fmovcc ("fmovsz", FM_SF
, CONDZ
, FCONDZ
, F_ALIAS
),
1266 #undef fmovicc /* v9 */
1267 #undef fmovfcc /* v9 */
1268 #undef fmovcc /* v9 */
1269 #undef FM_DF /* v9 */
1270 #undef FM_QF /* v9 */
1271 #undef FM_SF /* v9 */
1273 #define brfc(opcode, mask, lose, flags) \
1274 { opcode, (mask), ANNUL|(lose), "l", flags|F_DELAYED, v6 }, \
1275 { opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, v6 }
1277 #define brfcx(opcode, mask, lose, flags) /* v9 */ \
1278 { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), "6,G", flags|F_DELAYED, v9 }, \
1279 { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a 6,G", flags|F_DELAYED, v9 }, \
1280 { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G", flags|F_DELAYED, v9 }, \
1281 { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED, v9 }, \
1282 { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G", flags|F_DELAYED, v9 }, \
1283 { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED, v9 }, \
1284 { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), "7,G", flags|F_DELAYED, v9 }, \
1285 { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a 7,G", flags|F_DELAYED, v9 }, \
1286 { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G", flags|F_DELAYED, v9 }, \
1287 { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED, v9 }, \
1288 { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G", flags|F_DELAYED, v9 }, \
1289 { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED, v9 }, \
1290 { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), "8,G", flags|F_DELAYED, v9 }, \
1291 { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a 8,G", flags|F_DELAYED, v9 }, \
1292 { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G", flags|F_DELAYED, v9 }, \
1293 { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED, v9 }, \
1294 { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G", flags|F_DELAYED, v9 }, \
1295 { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED, v9 }, \
1296 { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), "9,G", flags|F_DELAYED, v9 }, \
1297 { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a 9,G", flags|F_DELAYED, v9 }, \
1298 { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G", flags|F_DELAYED, v9 }, \
1299 { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED, v9 }, \
1300 { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G", flags|F_DELAYED, v9 }, \
1301 { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED, v9 }
1303 /* v9: We must put `brfcx' before `brfc', to ensure that we never match
1304 v9: something against an expression unless it is an expression. Otherwise,
1305 v9: we end up with undefined symbol tables entries, because they get added,
1306 v9: but are not deleted if the pattern fails to match. */
1308 #define condfc(fop, cop, mask, flags) \
1309 brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1310 brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
1311 brfc(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags)
1313 #define condf(fop, mask, flags) \
1314 brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
1315 brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
1317 condfc("fb", "cb", 0x8, 0),
1318 condfc("fba", "cba", 0x8, F_ALIAS
),
1319 condfc("fbe", "cb0", 0x9, 0),
1320 condf("fbz", 0x9, F_ALIAS
),
1321 condfc("fbg", "cb2", 0x6, 0),
1322 condfc("fbge", "cb02", 0xb, 0),
1323 condfc("fbl", "cb1", 0x4, 0),
1324 condfc("fble", "cb01", 0xd, 0),
1325 condfc("fblg", "cb12", 0x2, 0),
1326 condfc("fbn", "cbn", 0x0, 0),
1327 condfc("fbne", "cb123", 0x1, 0),
1328 condf("fbnz", 0x1, F_ALIAS
),
1329 condfc("fbo", "cb012", 0xf, 0),
1330 condfc("fbu", "cb3", 0x7, 0),
1331 condfc("fbue", "cb03", 0xa, 0),
1332 condfc("fbug", "cb23", 0x5, 0),
1333 condfc("fbuge", "cb023", 0xc, 0),
1334 condfc("fbul", "cb13", 0x3, 0),
1335 condfc("fbule", "cb013", 0xe, 0),
1339 #undef brfcx /* v9 */
1341 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0
|ASI(~0), "1+2", F_DELAYED
, v6
}, /* jmpl rs1+rs2,%g0 */
1342 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0
|ASI_RS2(~0), "1", F_DELAYED
, v6
}, /* jmpl rs1+%g0,%g0 */
1343 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
, "1+i", F_DELAYED
, v6
}, /* jmpl rs1+i,%g0 */
1344 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
, "i+1", F_DELAYED
, v6
}, /* jmpl i+rs1,%g0 */
1345 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
|RS1_G0
, "i", F_DELAYED
, v6
}, /* jmpl %g0+i,%g0 */
1346 { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0
|SIMM13(~0), "1", F_DELAYED
, v6
}, /* jmpl rs1+0,%g0 */
1348 { "nop", F2(0, 4), 0xfeffffff, "", 0, v6
}, /* sethi 0, %g0 */
1350 { "set", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS
, v6
},
1352 { "sethi", F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6
},
1354 { "taddcc", F3(2, 0x20, 0), F3(~2, ~0x20, ~0)|ASI(~0), "1,2,d", 0, v6
},
1355 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "1,i,d", 0, v6
},
1356 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "i,1,d", 0, v6
},
1357 { "taddcctv", F3(2, 0x22, 0), F3(~2, ~0x22, ~0)|ASI(~0), "1,2,d", 0, v6
},
1358 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "1,i,d", 0, v6
},
1359 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "i,1,d", 0, v6
},
1361 { "tsubcc", F3(2, 0x21, 0), F3(~2, ~0x21, ~0)|ASI(~0), "1,2,d", 0, v6
},
1362 { "tsubcc", F3(2, 0x21, 1), F3(~2, ~0x21, ~1), "1,i,d", 0, v6
},
1363 { "tsubcctv", F3(2, 0x23, 0), F3(~2, ~0x23, ~0)|ASI(~0), "1,2,d", 0, v6
},
1364 { "tsubcctv", F3(2, 0x23, 1), F3(~2, ~0x23, ~1), "1,i,d", 0, v6
},
1366 /* FIXME This is marked F_ALIAS, so that it won't conflict with new v9
1367 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
1368 { "unimp", F2(0x0, 0x0), 0xffc00000, "n", F_ALIAS
, v6
},
1369 { "illtrap", F2(0, 0), F2(~0, ~0)|RD_G0
, "n", 0, v9
},
1371 /* This *is* a commutative instruction. */
1372 { "xnor", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,2,d", 0, v6
},
1373 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "1,i,d", 0, v6
},
1374 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "i,1,d", 0, v6
},
1375 /* This *is* a commutative instruction. */
1376 { "xnorcc", F3(2, 0x17, 0), F3(~2, ~0x17, ~0)|ASI(~0), "1,2,d", 0, v6
},
1377 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "1,i,d", 0, v6
},
1378 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "i,1,d", 0, v6
},
1379 { "xor", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "1,2,d", 0, v6
},
1380 { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "1,i,d", 0, v6
},
1381 { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,1,d", 0, v6
},
1382 { "xorcc", F3(2, 0x13, 0), F3(~2, ~0x13, ~0)|ASI(~0), "1,2,d", 0, v6
},
1383 { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "1,i,d", 0, v6
},
1384 { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "i,1,d", 0, v6
},
1386 { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,d", F_ALIAS
, v6
}, /* xnor rs1,%0,rd */
1387 { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "r", F_ALIAS
, v6
}, /* xnor rd,%0,rd */
1389 { "btog", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "2,r", F_ALIAS
, v6
}, /* xor rd,rs2,rd */
1390 { "btog", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,r", F_ALIAS
, v6
}, /* xor rd,i,rd */
1392 /* FPop1 and FPop2 are not instructions. Don't accept them. */
1394 { "fdtoi", F3F(2, 0x34, 0x0d2), F3F(~2, ~0x34, ~0x0d2)|RS1_G0
, "B,g", 0, v6
},
1395 { "fstoi", F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0
, "f,g", 0, v6
},
1396 { "fqtoi", F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0
, "R,g", 0, v8
},
1398 { "fdtox", F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0
, "B,g", 0, v9
},
1399 { "fstox", F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0
, "f,g", 0, v9
},
1400 { "fqtox", F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0
, "R,g", 0, v9
},
1402 { "fitod", F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0
, "f,H", 0, v6
},
1403 { "fitos", F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0
, "f,g", 0, v6
},
1404 { "fitoq", F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0
, "f,J", 0, v8
},
1406 { "fxtod", F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0
, "f,H", 0, v9
},
1407 { "fxtos", F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0
, "f,g", 0, v9
},
1408 { "fxtoq", F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0
, "f,J", 0, v9
},
1410 { "fdtoq", F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0
, "B,J", 0, v8
},
1411 { "fdtos", F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0
, "B,g", 0, v6
},
1412 { "fqtod", F3F(2, 0x34, 0x0cb), F3F(~2, ~0x34, ~0x0cb)|RS1_G0
, "R,H", 0, v8
},
1413 { "fqtos", F3F(2, 0x34, 0x0c7), F3F(~2, ~0x34, ~0x0c7)|RS1_G0
, "R,g", 0, v8
},
1414 { "fstod", F3F(2, 0x34, 0x0c9), F3F(~2, ~0x34, ~0x0c9)|RS1_G0
, "f,H", 0, v6
},
1415 { "fstoq", F3F(2, 0x34, 0x0cd), F3F(~2, ~0x34, ~0x0cd)|RS1_G0
, "f,J", 0, v8
},
1417 { "fdivd", F3F(2, 0x34, 0x04e), F3F(~2, ~0x34, ~0x04e), "v,B,H", 0, v6
},
1418 { "fdivq", F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", 0, v8
},
1419 { "fdivs", F3F(2, 0x34, 0x04d), F3F(~2, ~0x34, ~0x04d), "e,f,g", 0, v6
},
1420 { "fmuld", F3F(2, 0x34, 0x04a), F3F(~2, ~0x34, ~0x04a), "v,B,H", 0, v6
},
1421 { "fmulq", F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", 0, v8
},
1422 { "fmuls", F3F(2, 0x34, 0x049), F3F(~2, ~0x34, ~0x049), "e,f,g", 0, v6
},
1424 { "fdmulq", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", 0, v8
},
1425 { "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", 0, v8
},
1427 { "fsqrtd", F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0
, "B,H", 0, v7
},
1428 { "fsqrtq", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0
, "R,J", 0, v8
},
1429 { "fsqrts", F3F(2, 0x34, 0x029), F3F(~2, ~0x34, ~0x029)|RS1_G0
, "f,g", 0, v7
},
1431 { "fabsd", F3F(2, 0x34, 0x00a), F3F(~2, ~0x34, ~0x00a)|RS1_G0
, "B,H", 0, v9
},
1432 { "fabsq", F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0
, "R,J", 0, v9
},
1433 { "fabss", F3F(2, 0x34, 0x009), F3F(~2, ~0x34, ~0x009)|RS1_G0
, "f,g", 0, v6
},
1434 { "fmovd", F3F(2, 0x34, 0x002), F3F(~2, ~0x34, ~0x002)|RS1_G0
, "B,H", 0, v9
},
1435 { "fmovq", F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0
, "R,J", 0, v9
},
1436 { "fmovs", F3F(2, 0x34, 0x001), F3F(~2, ~0x34, ~0x001)|RS1_G0
, "f,g", 0, v6
},
1437 { "fnegd", F3F(2, 0x34, 0x006), F3F(~2, ~0x34, ~0x006)|RS1_G0
, "B,H", 0, v9
},
1438 { "fnegq", F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0
, "R,J", 0, v9
},
1439 { "fnegs", F3F(2, 0x34, 0x005), F3F(~2, ~0x34, ~0x005)|RS1_G0
, "f,g", 0, v6
},
1441 { "faddd", F3F(2, 0x34, 0x042), F3F(~2, ~0x34, ~0x042), "v,B,H", 0, v6
},
1442 { "faddq", F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", 0, v8
},
1443 { "fadds", F3F(2, 0x34, 0x041), F3F(~2, ~0x34, ~0x041), "e,f,g", 0, v6
},
1444 { "fsubd", F3F(2, 0x34, 0x046), F3F(~2, ~0x34, ~0x046), "v,B,H", 0, v6
},
1445 { "fsubq", F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", 0, v8
},
1446 { "fsubs", F3F(2, 0x34, 0x045), F3F(~2, ~0x34, ~0x045), "e,f,g", 0, v6
},
1448 #define CMPFCC(x) (((x)&0x3)<<25)
1450 { "fcmpd", F3F(2, 0x35, 0x052), F3F(~2, ~0x35, ~0x052)|RD_G0
, "v,B", 0, v6
},
1451 { "fcmpd", CMPFCC(0)|F3F(2, 0x35, 0x052), CMPFCC(~0)|F3F(~2, ~0x35, ~0x052), "6,v,B", 0, v9
},
1452 { "fcmpd", CMPFCC(1)|F3F(2, 0x35, 0x052), CMPFCC(~1)|F3F(~2, ~0x35, ~0x052), "7,v,B", 0, v9
},
1453 { "fcmpd", CMPFCC(2)|F3F(2, 0x35, 0x052), CMPFCC(~2)|F3F(~2, ~0x35, ~0x052), "8,v,B", 0, v9
},
1454 { "fcmpd", CMPFCC(3)|F3F(2, 0x35, 0x052), CMPFCC(~3)|F3F(~2, ~0x35, ~0x052), "9,v,B", 0, v9
},
1455 { "fcmped", F3F(2, 0x35, 0x056), F3F(~2, ~0x35, ~0x056)|RD_G0
, "v,B", 0, v6
},
1456 { "fcmped", CMPFCC(0)|F3F(2, 0x35, 0x056), CMPFCC(~0)|F3F(~2, ~0x35, ~0x056), "6,v,B", 0, v9
},
1457 { "fcmped", CMPFCC(1)|F3F(2, 0x35, 0x056), CMPFCC(~1)|F3F(~2, ~0x35, ~0x056), "7,v,B", 0, v9
},
1458 { "fcmped", CMPFCC(2)|F3F(2, 0x35, 0x056), CMPFCC(~2)|F3F(~2, ~0x35, ~0x056), "8,v,B", 0, v9
},
1459 { "fcmped", CMPFCC(3)|F3F(2, 0x35, 0x056), CMPFCC(~3)|F3F(~2, ~0x35, ~0x056), "9,v,B", 0, v9
},
1460 { "fcmpq", F3F(2, 0x34, 0x053), F3F(~2, ~0x34, ~0x053)|RD_G0
, "V,R", 0, v8
},
1461 { "fcmpq", CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053), "6,V,R", 0, v9
},
1462 { "fcmpq", CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053), "7,V,R", 0, v9
},
1463 { "fcmpq", CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053), "8,V,R", 0, v9
},
1464 { "fcmpq", CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053), "9,V,R", 0, v9
},
1465 { "fcmpeq", F3F(2, 0x34, 0x057), F3F(~2, ~0x34, ~0x057)|RD_G0
, "V,R", 0, v8
},
1466 { "fcmpeq", CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057), "6,V,R", 0, v9
},
1467 { "fcmpeq", CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057), "7,V,R", 0, v9
},
1468 { "fcmpeq", CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057), "8,V,R", 0, v9
},
1469 { "fcmpeq", CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057), "9,V,R", 0, v9
},
1470 { "fcmps", F3F(2, 0x35, 0x051), F3F(~2, ~0x35, ~0x051)|RD_G0
, "e,f", 0, v6
},
1471 { "fcmps", CMPFCC(0)|F3F(2, 0x35, 0x051), CMPFCC(~0)|F3F(~2, ~0x35, ~0x051), "6,e,f", 0, v9
},
1472 { "fcmps", CMPFCC(1)|F3F(2, 0x35, 0x051), CMPFCC(~1)|F3F(~2, ~0x35, ~0x051), "7,e,f", 0, v9
},
1473 { "fcmps", CMPFCC(2)|F3F(2, 0x35, 0x051), CMPFCC(~2)|F3F(~2, ~0x35, ~0x051), "8,e,f", 0, v9
},
1474 { "fcmps", CMPFCC(3)|F3F(2, 0x35, 0x051), CMPFCC(~3)|F3F(~2, ~0x35, ~0x051), "9,e,f", 0, v9
},
1475 { "fcmpes", F3F(2, 0x35, 0x055), F3F(~2, ~0x35, ~0x055)|RD_G0
, "e,f", 0, v6
},
1476 { "fcmpes", CMPFCC(0)|F3F(2, 0x35, 0x055), CMPFCC(~0)|F3F(~2, ~0x35, ~0x055), "6,e,f", 0, v9
},
1477 { "fcmpes", CMPFCC(1)|F3F(2, 0x35, 0x055), CMPFCC(~1)|F3F(~2, ~0x35, ~0x055), "7,e,f", 0, v9
},
1478 { "fcmpes", CMPFCC(2)|F3F(2, 0x35, 0x055), CMPFCC(~2)|F3F(~2, ~0x35, ~0x055), "8,e,f", 0, v9
},
1479 { "fcmpes", CMPFCC(3)|F3F(2, 0x35, 0x055), CMPFCC(~3)|F3F(~2, ~0x35, ~0x055), "9,e,f", 0, v9
},
1481 /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9
1482 insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */
1483 { "cpop1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", F_ALIAS
, v6
},
1484 { "cpop2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", F_ALIAS
, v6
},
1485 { "impdep1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", 0, v9
},
1486 { "impdep2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", 0, v9
},
1488 { "casa", F3(3, 0x3c, 0), F3(~3, ~0x3c, ~0), "[1]A,2,d", 0, v9
},
1489 { "casa", F3(3, 0x3c, 1), F3(~3, ~0x3c, ~1), "[1]o,2,d", 0, v9
},
1490 { "casxa", F3(3, 0x3e, 0), F3(~3, ~0x3e, ~0), "[1]A,2,d", 0, v9
},
1491 { "casxa", F3(3, 0x3e, 1), F3(~3, ~0x3e, ~1), "[1]o,2,d", 0, v9
},
1495 CONST
int bfd_sparc_num_opcodes
= ((sizeof sparc_opcodes
)/(sizeof sparc_opcodes
[0]));