1 /* Disassembly routines for TMS320C54X architecture
2 Copyright (C) 1999-2019 Free Software Foundation, Inc.
3 Contributed by Timothy Wall (twall@cygnus.com)
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 #include "disassemble.h"
27 #include "opcode/tic54x.h"
28 #include "coff/tic54x.h"
30 static int has_lkaddr (unsigned short, const insn_template
*);
31 static int get_insn_size (unsigned short, const insn_template
*);
32 static int print_instruction (disassemble_info
*, bfd_vma
,
33 unsigned short, const char *,
34 const enum optype
[], int, int);
35 static int print_parallel_instruction (disassemble_info
*, bfd_vma
,
37 const insn_template
*, int);
38 static int sprint_dual_address (disassemble_info
*,char [],
40 static int sprint_indirect_address (disassemble_info
*,char [],
42 static int sprint_direct_address (disassemble_info
*,char [],
44 static int sprint_mmr (disassemble_info
*,char [],int);
45 static int sprint_condition (disassemble_info
*,char *,unsigned short);
46 static int sprint_cc2 (disassemble_info
*,char *,unsigned short);
49 print_insn_tic54x (bfd_vma memaddr
, disassemble_info
*info
)
52 unsigned short opcode
;
54 const insn_template
* tm
;
56 status
= (*info
->read_memory_func
) (memaddr
, opbuf
, 2, info
);
59 (*info
->memory_error_func
) (status
, memaddr
, info
);
63 opcode
= bfd_getl16 (opbuf
);
64 tm
= tic54x_get_insn (info
, memaddr
, opcode
, &size
);
66 info
->bytes_per_line
= 2;
67 info
->bytes_per_chunk
= 2;
68 info
->octets_per_byte
= 2;
69 info
->display_endian
= BFD_ENDIAN_LITTLE
;
71 if (tm
->flags
& FL_PAR
)
73 if (!print_parallel_instruction (info
, memaddr
, opcode
, tm
, size
))
78 if (!print_instruction (info
, memaddr
, opcode
,
81 size
, (tm
->flags
& FL_EXT
)))
89 has_lkaddr (unsigned short memdata
, const insn_template
*tm
)
91 return (IS_LKADDR (memdata
)
92 && (OPTYPE (tm
->operand_types
[0]) == OP_Smem
93 || OPTYPE (tm
->operand_types
[1]) == OP_Smem
94 || OPTYPE (tm
->operand_types
[2]) == OP_Smem
95 || OPTYPE (tm
->operand_types
[1]) == OP_Sind
96 || OPTYPE (tm
->operand_types
[0]) == OP_Lmem
97 || OPTYPE (tm
->operand_types
[1]) == OP_Lmem
));
100 /* always returns 1 (whether an insn template was found) since we provide an
101 "unknown instruction" template */
103 tic54x_get_insn (disassemble_info
*info
, bfd_vma addr
,
104 unsigned short memdata
, int *size
)
106 const insn_template
*tm
= NULL
;
108 for (tm
= tic54x_optab
; tm
->name
; tm
++)
110 if (tm
->opcode
== (memdata
& tm
->mask
))
112 /* a few opcodes span two words */
113 if (tm
->flags
& FL_EXT
)
115 /* if lk addressing is used, the second half of the opcode gets
116 pushed one word later */
118 bfd_vma addr2
= addr
+ 1 + has_lkaddr (memdata
, tm
);
119 int status
= (*info
->read_memory_func
) (addr2
, opbuf
, 2, info
);
120 // FIXME handle errors
123 unsigned short data2
= bfd_getl16 (opbuf
);
124 if (tm
->opcode2
== (data2
& tm
->mask2
))
126 if (size
) *size
= get_insn_size (memdata
, tm
);
133 if (size
) *size
= get_insn_size (memdata
, tm
);
138 for (tm
= (insn_template
*) tic54x_paroptab
; tm
->name
; tm
++)
140 if (tm
->opcode
== (memdata
& tm
->mask
))
142 if (size
) *size
= get_insn_size (memdata
, tm
);
148 return &tic54x_unknown_opcode
;
152 get_insn_size (unsigned short memdata
, const insn_template
*insn
)
156 if (insn
->flags
& FL_PAR
)
158 /* only non-parallel instructions support lk addressing */
163 size
= insn
->words
+ has_lkaddr (memdata
, insn
);
170 print_instruction (disassemble_info
*info
,
172 unsigned short opcode
,
174 const enum optype tm_operands
[],
179 /* string storage for multiple operands */
180 char operand
[4][64] = { {0},{0},{0},{0}, };
182 unsigned long opcode2
= 0;
183 unsigned long lkaddr
= 0;
184 enum optype src
= OP_None
;
185 enum optype dst
= OP_None
;
189 info
->fprintf_func (info
->stream
, "%-7s", tm_name
);
193 int status
= (*info
->read_memory_func
) (memaddr
+ 1, buf
, 2, info
);
196 lkaddr
= opcode2
= bfd_getl16 (buf
);
199 status
= (*info
->read_memory_func
) (memaddr
+ 2, buf
, 2, info
);
202 opcode2
= bfd_getl16 (buf
);
206 for (i
= 0; i
< MAX_OPERANDS
&& OPTYPE (tm_operands
[i
]) != OP_None
; i
++)
208 char *next_comma
= ",";
209 int optional
= (tm_operands
[i
] & OPT
) != 0;
211 switch (OPTYPE (tm_operands
[i
]))
214 sprint_dual_address (info
, operand
[i
], XMEM (opcode
));
215 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
218 sprint_dual_address (info
, operand
[i
], YMEM (opcode
));
219 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
224 info
->fprintf_func (info
->stream
, "%s", comma
);
225 if (INDIRECT (opcode
))
227 if (MOD (opcode
) >= 12)
229 bfd_vma addr
= lkaddr
;
230 int arf
= ARF (opcode
);
231 int mod
= MOD (opcode
);
233 info
->fprintf_func (info
->stream
, "*(");
235 info
->fprintf_func (info
->stream
, "*%sar%d(",
236 (mod
== 13 || mod
== 14 ? "+" : ""),
238 (*(info
->print_address_func
)) ((bfd_vma
) addr
, info
);
239 info
->fprintf_func (info
->stream
, ")%s",
240 mod
== 14 ? "%" : "");
244 sprint_indirect_address (info
, operand
[i
], opcode
);
245 info
->fprintf_func (info
->stream
, "%s", operand
[i
]);
250 /* FIXME -- use labels (print_address_func) */
251 /* in order to do this, we need to guess what DP is */
252 sprint_direct_address (info
, operand
[i
], opcode
);
253 info
->fprintf_func (info
->stream
, "%s", operand
[i
]);
257 info
->fprintf_func (info
->stream
, "%s", comma
);
258 (*(info
->print_address_func
)) ((bfd_vma
) opcode2
, info
);
261 /* upper 7 bits of address are in the opcode */
262 opcode2
+= ((unsigned long) opcode
& 0x7F) << 16;
265 info
->fprintf_func (info
->stream
, "%s", comma
);
266 (*(info
->print_address_func
)) ((bfd_vma
) opcode2
, info
);
269 sprint_mmr (info
, operand
[i
], MMRX (opcode
));
270 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
273 sprint_mmr (info
, operand
[i
], MMRY (opcode
));
274 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
277 sprint_mmr (info
, operand
[i
], MMR (opcode
));
278 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
281 sprintf (operand
[i
], "pa%d", (unsigned) opcode2
);
282 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
285 src
= SRC (ext
? opcode2
: opcode
) ? OP_B
: OP_A
;
286 sprintf (operand
[i
], (src
== OP_B
) ? "b" : "a");
287 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
290 src
= SRC1 (ext
? opcode2
: opcode
) ? OP_B
: OP_A
;
291 sprintf (operand
[i
], (src
== OP_B
) ? "b" : "a");
292 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
295 dst
= DST (opcode
) ? OP_B
: OP_A
;
296 sprintf (operand
[i
], (dst
== OP_B
) ? "a" : "b");
297 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
300 dst
= DST (ext
? opcode2
: opcode
) ? OP_B
: OP_A
;
301 if (!optional
|| dst
!= src
)
303 sprintf (operand
[i
], (dst
== OP_B
) ? "b" : "a");
304 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
310 sprintf (operand
[i
], "b");
311 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
314 sprintf (operand
[i
], "a");
315 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
318 sprintf (operand
[i
], "ar%d", (int) ARX (opcode
));
319 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
322 shift
= SHIFT (ext
? opcode2
: opcode
);
323 if (!optional
|| shift
!= 0)
325 sprintf (operand
[i
], "%d", shift
);
326 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
332 shift
= SHFT (opcode
);
333 if (!optional
|| shift
!= 0)
335 sprintf (operand
[i
], "%d", (unsigned) shift
);
336 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
342 sprintf (operand
[i
], "#%d", (int) (short) opcode2
);
343 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
346 sprintf (operand
[i
], "t");
347 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
350 sprintf (operand
[i
], "ts");
351 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
354 sprintf (operand
[i
], "%d", (int) ((signed char) (opcode
& 0xFF)));
355 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
358 sprintf (operand
[i
], "16");
359 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
362 sprintf (operand
[i
], "asm");
363 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
366 sprintf (operand
[i
], "%d", (int) (opcode
& 0xF));
367 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
370 /* put all CC operands in the same operand */
371 sprint_condition (info
, operand
[i
], opcode
);
372 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
376 sprint_cc2 (info
, operand
[i
], opcode
);
377 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
381 const char *code
[] = { "eq", "lt", "gt", "neq" };
383 /* Do not use sprintf with only two parameters as a
384 compiler warning could be generated in such conditions. */
385 sprintf (operand
[i
], "%s", code
[CC3 (opcode
)]);
386 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
391 int code
= (opcode
>> 8) & 0x3;
392 sprintf (operand
[i
], "%d", (code
== 0) ? 1 : (code
== 2) ? 2 : 3);
393 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
397 sprintf (operand
[i
], "#%d",
398 (int) (((signed char) opcode
& 0x1F) << 3) >> 3);
399 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
402 sprintf (operand
[i
], "#%d", (unsigned) (opcode
& 0xFF));
403 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
406 sprintf (operand
[i
], "#%d", (int) (opcode
& 0x7));
407 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
410 sprintf (operand
[i
], "#%d", (unsigned) opcode2
);
411 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
414 n
= (opcode
>> 9) & 0x1;
415 sprintf (operand
[i
], "st%d", n
);
416 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
420 const char *status0
[] = {
421 "0", "1", "2", "3", "4", "5", "6", "7", "8",
422 "ovb", "ova", "c", "tc", "13", "14", "15"
424 const char *status1
[] = {
425 "0", "1", "2", "3", "4",
426 "cmpt", "frct", "c16", "sxm", "ovm", "10",
427 "intm", "hm", "xf", "cpl", "braf"
429 sprintf (operand
[i
], "%s",
430 n
? status1
[SBIT (opcode
)] : status0
[SBIT (opcode
)]);
431 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
435 sprintf (operand
[i
], "%d", (int) ((opcode
>> 9) & 1) + 1);
436 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
439 sprintf (operand
[i
], "trn");
440 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
443 sprintf (operand
[i
], "dp");
444 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
447 /* FIXME-- this is DP, print the original address? */
448 sprintf (operand
[i
], "#%d", (int) (opcode
& 0x1FF));
449 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
452 sprintf (operand
[i
], "arp");
453 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
456 sprintf (operand
[i
], "%d", (int) (opcode
& 0x1F));
457 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
460 sprintf (operand
[i
], "??? (0x%x)", tm_operands
[i
]);
461 info
->fprintf_func (info
->stream
, "%s%s", comma
, operand
[i
]);
470 print_parallel_instruction (disassemble_info
*info
,
472 unsigned short opcode
,
473 const insn_template
*ptm
,
476 print_instruction (info
, memaddr
, opcode
,
477 ptm
->name
, ptm
->operand_types
, size
, 0);
478 info
->fprintf_func (info
->stream
, " || ");
479 return print_instruction (info
, memaddr
, opcode
,
480 ptm
->parname
, ptm
->paroperand_types
, size
, 0);
484 sprint_dual_address (disassemble_info
*info ATTRIBUTE_UNUSED
,
488 const char *formats
[] = {
494 return sprintf (buf
, formats
[XMOD (code
)], XARX (code
));
498 sprint_indirect_address (disassemble_info
*info ATTRIBUTE_UNUSED
,
500 unsigned short opcode
)
502 const char *formats
[] = {
516 return sprintf (buf
, formats
[MOD (opcode
)], ARF (opcode
));
520 sprint_direct_address (disassemble_info
*info ATTRIBUTE_UNUSED
,
522 unsigned short opcode
)
524 /* FIXME -- look up relocation if available */
525 return sprintf (buf
, "DP+0x%02x", (int) (opcode
& 0x7F));
529 sprint_mmr (disassemble_info
*info ATTRIBUTE_UNUSED
,
533 tic54x_symbol
*reg
= (tic54x_symbol
*) mmregs
;
534 while (reg
->name
!= NULL
)
536 if (mmr
== reg
->value
)
538 sprintf (buf
, "%s", (reg
+ 1)->name
);
543 sprintf (buf
, "MMR(%d)", mmr
); /* FIXME -- different targets. */
548 sprint_cc2 (disassemble_info
*info ATTRIBUTE_UNUSED
,
550 unsigned short opcode
)
552 const char *cc2
[] = {
553 "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq",
554 "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq",
556 return sprintf (buf
, "%s", cc2
[opcode
& 0xF]);
560 sprint_condition (disassemble_info
*info ATTRIBUTE_UNUSED
,
562 unsigned short opcode
)
565 const char *cmp
[] = {
566 "??", "??", "geq", "lt", "neq", "eq", "gt", "leq"
570 char acc
= (opcode
& 0x8) ? 'b' : 'a';
572 buf
+= sprintf (buf
, "%c%s%s", acc
, cmp
[(opcode
& 0x7)],
573 (opcode
& 0x20) ? ", " : "");
575 buf
+= sprintf (buf
, "%c%s", acc
, (opcode
& 0x10) ? "ov" : "nov");
577 else if (opcode
& 0x3F)
580 buf
+= sprintf (buf
, "%s%s",
581 ((opcode
& 0x30) == 0x30) ? "tc" : "ntc",
582 (opcode
& 0x0F) ? ", " : "");
584 buf
+= sprintf (buf
, "%s%s",
585 ((opcode
& 0x0C) == 0x0C) ? "c" : "nc",
586 (opcode
& 0x03) ? ", " : "");
588 buf
+= sprintf (buf
, "%s",
589 ((opcode
& 0x03) == 0x03) ? "bio" : "nbio");
592 buf
+= sprintf (buf
, "unc");
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