1 /* Disassemble V850 instructions.
2 Copyright 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2010
3 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 #include "opcode/v850.h"
30 static const char *const v850_reg_names
[] =
32 "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7",
33 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
34 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
35 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "lp"
38 static const char *const v850_sreg_names
[] =
40 "eipc/vip/mpm", "eipsw/mpc", "fepc/tid", "fepsw/ppa", "ecr/vmecr", "psw/vmtid",
41 "sr6/fpsr/vmadr/dcc", "sr7/fpepc/dc0",
42 "sr8/fpst/vpecr/dcv1", "sr9/fpcc/vptid", "sr10/fpcfg/vpadr/spal", "sr11/spau",
43 "sr12/vdecr/ipa0l", "eiic/vdtid/ipa0u", "feic/ipa1l", "dbic/ipa1u",
44 "ctpc/ipa2l", "ctpsw/ipa2u", "dbpc/ipa3l", "dbpsw/ipa3u", "ctbp/dpa0l",
45 "dir/dpa0u", "bpc/dpa0u", "asid/dpa1l",
46 "bpav/dpa1u", "bpam/dpa2l", "bpdv/dpa2u", "bpdm/dpa3l", "eiwr/dpa3u",
47 "fewr", "dbwr", "bsel"
50 static const char *const v850_cc_names
[] =
52 "v", "c/l", "z", "nh", "s/n", "t", "lt", "le",
53 "nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt"
56 static const char *const v850_float_cc_names
[] =
58 "f/t", "un/or", "eq/neq", "ueq/ogl", "olt/uge", "ult/oge", "ole/ugt", "ule/ogt",
59 "sf/st", "ngle/gle", "seq/sne", "ngl/gl", "lt/nlt", "nge/ge", "le/nle", "ngt/gt"
64 print_value (int flags
, bfd_vma memaddr
, struct disassemble_info
*info
, long value
)
66 if (flags
& V850_PCREL
)
68 bfd_vma addr
= value
+ memaddr
;
69 info
->print_address_func (addr
, info
);
71 else if (flags
& V850_OPERAND_DISP
)
73 if (flags
& V850_OPERAND_SIGNED
)
75 info
->fprintf_func (info
->stream
, "%ld", value
);
79 info
->fprintf_func (info
->stream
, "%lu", value
);
82 else if (flags
& V850E_IMMEDIATE32
)
84 info
->fprintf_func (info
->stream
, "0x%lx", value
);
88 if (flags
& V850_OPERAND_SIGNED
)
90 info
->fprintf_func (info
->stream
, "%ld", value
);
94 info
->fprintf_func (info
->stream
, "%lu", value
);
100 get_operand_value (const struct v850_operand
*operand
,
104 struct disassemble_info
* info
,
111 if ((operand
->flags
& V850E_IMMEDIATE16
)
112 || (operand
->flags
& V850E_IMMEDIATE16HI
))
114 int status
= info
->read_memory_func (memaddr
+ bytes_read
, buffer
, 2, info
);
118 value
= bfd_getl16 (buffer
);
120 if (operand
->flags
& V850E_IMMEDIATE16HI
)
127 info
->memory_error_func (status
, memaddr
+ bytes_read
, info
);
132 if (operand
->flags
& V850E_IMMEDIATE23
)
134 int status
= info
->read_memory_func (memaddr
+ 2, buffer
, 4, info
);
138 value
= bfd_getl32 (buffer
);
140 value
= (operand
->extract
) (value
, invalid
);
146 info
->memory_error_func (status
, memaddr
+ bytes_read
, info
);
151 if (operand
->flags
& V850E_IMMEDIATE32
)
153 int status
= info
->read_memory_func (memaddr
+ bytes_read
, buffer
, 4, info
);
158 value
= bfd_getl32 (buffer
);
164 info
->memory_error_func (status
, memaddr
+ bytes_read
, info
);
169 if (operand
->extract
)
170 value
= (operand
->extract
) (insn
, invalid
);
173 if (operand
->bits
== -1)
174 value
= (insn
& operand
->shift
);
176 value
= (insn
>> operand
->shift
) & ((1 << operand
->bits
) - 1);
178 if (operand
->flags
& V850_OPERAND_SIGNED
)
179 value
= ((long)(value
<< (sizeof (long)*8 - operand
->bits
))
180 >> (sizeof (long)*8 - operand
->bits
));
188 disassemble (bfd_vma memaddr
, struct disassemble_info
*info
, int bytes_read
, unsigned long insn
)
190 struct v850_opcode
*op
= (struct v850_opcode
*)v850_opcodes
;
191 const struct v850_operand
*operand
;
193 int target_processor
;
199 target_processor
= PROCESSOR_V850
;
203 target_processor
= PROCESSOR_V850E
;
206 case bfd_mach_v850e1
:
207 target_processor
= PROCESSOR_V850E
;
210 case bfd_mach_v850e2
:
211 target_processor
= PROCESSOR_V850E2
;
214 case bfd_mach_v850e2v3
:
215 target_processor
= PROCESSOR_V850E2V3
;
219 /* If this is a two byte insn, then mask off the high bits. */
223 /* Find the opcode. */
226 if ((op
->mask
& insn
) == op
->opcode
227 && (op
->processors
& target_processor
)
228 && !(op
->processors
& PROCESSOR_OPTION_ALIAS
))
230 /* Code check start. */
231 const unsigned char *opindex_ptr
;
235 for (opindex_ptr
= op
->operands
, opnum
= 1;
237 opindex_ptr
++, opnum
++)
242 operand
= &v850_operands
[*opindex_ptr
];
244 value
= get_operand_value (operand
, insn
, bytes_read
, memaddr
, info
, 1, &invalid
);
249 if ((operand
->flags
& V850_NOT_R0
) && value
== 0 && (op
->memop
) <=2)
252 if ((operand
->flags
& V850_NOT_SA
) && value
== 0xd)
255 if ((operand
->flags
& V850_NOT_IMM0
) && value
== 0)
259 /* Code check end. */
262 (*info
->fprintf_func
) (info
->stream
, "%s\t", op
->name
);
264 fprintf (stderr
, "match: insn: %lx, mask: %lx, opcode: %lx, name: %s\n",
265 insn
, op
->mask
, op
->opcode
, op
->name
);
269 /* Now print the operands.
271 MEMOP is the operand number at which a memory
272 address specification starts, or zero if this
273 instruction has no memory addresses.
275 A memory address is always two arguments.
277 This information allows us to determine when to
278 insert commas into the output stream as well as
279 when to insert disp[reg] expressions onto the
282 for (opindex_ptr
= op
->operands
, opnum
= 1;
284 opindex_ptr
++, opnum
++)
286 bfd_boolean square
= FALSE
;
291 operand
= &v850_operands
[*opindex_ptr
];
293 value
= get_operand_value (operand
, insn
, bytes_read
, memaddr
, info
, 0, 0);
295 /* The first operand is always output without any
298 For the following arguments:
300 If memop && opnum == memop + 1, then we need '[' since
301 we're about to output the register used in a memory
304 If memop && opnum == memop + 2, then we need ']' since
305 we just finished the register in a memory reference. We
306 also need a ',' before this operand.
308 Else we just need a comma.
310 We may need to output a trailing ']' if the last operand
311 in an instruction is the register for a memory address.
313 The exception (and there's always an exception) is the
314 "jmp" insn which needs square brackets around it's only
315 register argument. */
317 if (operand
->flags
& V850_OPERAND_BANG
)
321 else if (operand
->flags
& V850_OPERAND_PERCENT
)
326 if (opnum
== 1 && opnum
== memop
)
328 info
->fprintf_func (info
->stream
, "%s[", prefix
);
332 && (v850_operands
[*(opindex_ptr
- 1)].flags
& V850_OPERAND_DISP
) != 0
335 info
->fprintf_func (info
->stream
, "%s[", prefix
);
339 info
->fprintf_func (info
->stream
, ", %s", prefix
);
341 /* Extract the flags, ignoring ones which do not effect disassembly output. */
342 flag
= operand
->flags
& (V850_OPERAND_REG
346 | V850E_OPERAND_REG_LIST
348 | V850_OPERAND_FLOAT_CC
);
352 case V850_OPERAND_REG
: info
->fprintf_func (info
->stream
, "%s", v850_reg_names
[value
]); break;
353 case (V850_OPERAND_REG
|V850_REG_EVEN
): info
->fprintf_func (info
->stream
, "%s", v850_reg_names
[value
*2]); break;
354 case V850_OPERAND_EP
: info
->fprintf_func (info
->stream
, "ep"); break;
355 case V850_OPERAND_SRG
: info
->fprintf_func (info
->stream
, "%s", v850_sreg_names
[value
]); break;
357 case V850E_OPERAND_REG_LIST
:
359 static int list12_regs
[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
360 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
363 unsigned long int mask
= 0;
367 switch (operand
->shift
)
369 case 0xffe00001: regs
= list12_regs
; break;
371 /* xgettext:c-format */
372 fprintf (stderr
, _("unknown operand shift: %x\n"), operand
->shift
);
376 for (i
= 0; i
< 32; i
++)
378 if (value
& (1 << i
))
382 default: mask
|= (1 << regs
[ i
]); break;
383 /* xgettext:c-format */
384 case 0: fprintf (stderr
, _("unknown reg: %d\n"), i
); abort ();
385 case -1: pc
= 1; break;
390 info
->fprintf_func (info
->stream
, "{");
399 for (bit
= 0; bit
< 32; bit
++)
400 if (mask
& (1 << bit
))
402 unsigned long int first
= bit
;
403 unsigned long int last
;
406 info
->fprintf_func (info
->stream
, ", ");
410 info
->fprintf_func (info
->stream
, v850_reg_names
[first
]);
412 for (bit
++; bit
< 32; bit
++)
413 if ((mask
& (1 << bit
)) == 0)
418 if (last
> first
+ 1)
420 info
->fprintf_func (info
->stream
, " - %s", v850_reg_names
[ last
- 1 ]);
426 info
->fprintf_func (info
->stream
, "%sPC", mask
? ", " : "");
429 info
->fprintf_func (info
->stream
, "}");
433 case V850_OPERAND_CC
: info
->fprintf_func (info
->stream
, "%s", v850_cc_names
[value
]); break;
434 case V850_OPERAND_FLOAT_CC
: info
->fprintf_func (info
->stream
, "%s", v850_float_cc_names
[value
]); break;
437 print_value (operand
->flags
, memaddr
, info
, value
);
442 (*info
->fprintf_func
) (info
->stream
, "]");
456 print_insn_v850 (bfd_vma memaddr
, struct disassemble_info
* info
)
458 int status
, status2
, match
;
460 int length
= 0, code_length
= 0;
461 unsigned long insn
= 0, insn2
= 0;
462 int target_processor
;
468 target_processor
= PROCESSOR_V850
;
472 target_processor
= PROCESSOR_V850E
;
475 case bfd_mach_v850e1
:
476 target_processor
= PROCESSOR_V850E
;
479 case bfd_mach_v850e2
:
480 target_processor
= PROCESSOR_V850E2
;
483 case bfd_mach_v850e2v3
:
484 target_processor
= PROCESSOR_V850E2V3
;
488 status
= info
->read_memory_func (memaddr
, buffer
, 2, info
);
492 info
->memory_error_func (status
, memaddr
, info
);
496 insn
= bfd_getl16 (buffer
);
498 status2
= info
->read_memory_func (memaddr
+2, buffer
, 2 , info
);
502 insn2
= bfd_getl16 (buffer
);
503 /* fprintf (stderr, "insn2 0x%08lx\n", insn2); */
508 && (target_processor
== PROCESSOR_V850E2
509 || target_processor
== PROCESSOR_V850E2V3
))
511 if ((insn
& 0xffff) == 0x02e0 /* jr 32bit */
512 && !status2
&& (insn2
& 0x1) == 0)
517 else if ((insn
& 0xffe0) == 0x02e0 /* jarl 32bit */
518 && !status2
&& (insn2
& 0x1) == 0)
523 else if ((insn
& 0xffe0) == 0x06e0 /* jmp 32bit */
524 && !status2
&& (insn2
& 0x1) == 0)
532 && target_processor
== PROCESSOR_V850E2V3
)
534 if (((insn
& 0xffe0) == 0x0780 /* ld.b 23bit */
535 && !status2
&& (insn2
& 0x000f) == 0x0005)
536 || ((insn
& 0xffe0) == 0x07a0 /* ld.bu 23bit */
537 && !status2
&& (insn2
& 0x000f) == 0x0005)
538 || ((insn
& 0xffe0) == 0x0780 /* ld.h 23bit */
539 && !status2
&& (insn2
& 0x000f) == 0x0007)
540 || ((insn
& 0xffe0) == 0x07a0 /* ld.hu 23bit */
541 && !status2
&& (insn2
& 0x000f) == 0x0007)
542 || ((insn
& 0xffe0) == 0x0780 /* ld.w 23bit */
543 && !status2
&& (insn2
& 0x000f) == 0x0009))
548 else if (((insn
& 0xffe0) == 0x0780 /* st.b 23bit */
549 && !status2
&& (insn2
& 0x000f) == 0x000d)
550 || ((insn
& 0xffe0) == 0x07a0 /* st.h 23bit */
551 && !status2
&& (insn2
& 0x000f) == 0x000d)
552 || ((insn
& 0xffe0) == 0x0780 /* st.w 23bit */
553 && !status2
&& (insn2
& 0x000f) == 0x000f))
561 && target_processor
!= PROCESSOR_V850
)
563 if ((insn
& 0xffe0) == 0x0620) /* 32 bit MOV */
568 else if ((insn
& 0xffc0) == 0x0780 /* prepare {list}, imm5, imm16<<16 */
569 && !status2
&& (insn2
& 0x001f) == 0x0013)
574 else if ((insn
& 0xffc0) == 0x0780 /* prepare {list}, imm5, imm16 */
575 && !status2
&& (insn2
& 0x001f) == 0x000b)
580 else if ((insn
& 0xffc0) == 0x0780 /* prepare {list}, imm5, imm32 */
581 && !status2
&& (insn2
& 0x001f) == 0x001b)
590 && (insn
& 0x0600) == 0x0600))
592 /* This is a 4 byte insn. */
593 status
= info
->read_memory_func (memaddr
, buffer
, 4, info
);
596 insn
= bfd_getl32 (buffer
);
599 length
= code_length
= 4;
603 if (code_length
> length
)
605 status
= info
->read_memory_func (memaddr
+ length
, buffer
, code_length
- length
, info
);
610 if (length
== 0 && !status
)
611 length
= code_length
= 2;
616 match
= disassemble (memaddr
, info
, length
, insn
);
622 status
= info
->read_memory_func (memaddr
, buffer
, code_length
, info
);
624 while (l
< code_length
)
626 if (code_length
- l
== 2)
628 insn
= bfd_getl16 (buffer
+ l
) & 0xffff;
629 info
->fprintf_func (info
->stream
, ".short\t0x%04lx", insn
);
634 insn
= bfd_getl32 (buffer
+ l
);
635 info
->fprintf_func (info
->stream
, ".long\t0x%08lx", insn
);
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