kbuild: strip generated symbols from *.ko
[deliverable/linux.git] / scripts / Makefile.build
1 # ==========================================================================
2 # Building
3 # ==========================================================================
4
5 src := $(obj)
6
7 PHONY := __build
8 __build:
9
10 # Init all relevant variables used in kbuild files so
11 # 1) they have correct type
12 # 2) they do not inherit any value from the environment
13 obj-y :=
14 obj-m :=
15 lib-y :=
16 lib-m :=
17 always :=
18 targets :=
19 subdir-y :=
20 subdir-m :=
21 EXTRA_AFLAGS :=
22 EXTRA_CFLAGS :=
23 EXTRA_CPPFLAGS :=
24 EXTRA_LDFLAGS :=
25 asflags-y :=
26 ccflags-y :=
27 cppflags-y :=
28 ldflags-y :=
29
30 # Read auto.conf if it exists, otherwise ignore
31 -include include/config/auto.conf
32
33 include scripts/Kbuild.include
34
35 # For backward compatibility check that these variables do not change
36 save-cflags := $(CFLAGS)
37
38 # The filename Kbuild has precedence over Makefile
39 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
40 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
41 include $(kbuild-file)
42
43 # If the save-* variables changed error out
44 ifeq ($(KBUILD_NOPEDANTIC),)
45 ifneq ("$(save-cflags)","$(CFLAGS)")
46 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
47 endif
48 endif
49 include scripts/Makefile.lib
50
51 ifdef host-progs
52 ifneq ($(hostprogs-y),$(host-progs))
53 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
54 hostprogs-y += $(host-progs)
55 endif
56 endif
57
58 # Do not include host rules unless needed
59 ifneq ($(hostprogs-y)$(hostprogs-m),)
60 include scripts/Makefile.host
61 endif
62
63 ifneq ($(KBUILD_SRC),)
64 # Create output directory if not already present
65 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
66
67 # Create directories for object files if directory does not exist
68 # Needed when obj-y := dir/file.o syntax is used
69 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
70 endif
71
72 ifndef obj
73 $(warning kbuild: Makefile.build is included improperly)
74 endif
75
76 # ===========================================================================
77
78 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
79 lib-target := $(obj)/lib.a
80 endif
81
82 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
83 builtin-target := $(obj)/built-in.o
84 endif
85
86 modorder-target := $(obj)/modules.order
87
88 # We keep a list of all modules in $(MODVERDIR)
89
90 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
91 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
92 $(subdir-ym) $(always)
93 @:
94
95 # Linus' kernel sanity checking tool
96 ifneq ($(KBUILD_CHECKSRC),0)
97 ifeq ($(KBUILD_CHECKSRC),2)
98 quiet_cmd_force_checksrc = CHECK $<
99 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
100 else
101 quiet_cmd_checksrc = CHECK $<
102 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
103 endif
104 endif
105
106 # Do section mismatch analysis for each module/built-in.o
107 ifdef CONFIG_DEBUG_SECTION_MISMATCH
108 cmd_secanalysis = ; scripts/mod/modpost $@
109 endif
110
111 # Compile C sources (.c)
112 # ---------------------------------------------------------------------------
113
114 # Default is built-in, unless we know otherwise
115 modkern_cflags := $(CFLAGS_KERNEL)
116 quiet_modtag := $(empty) $(empty)
117
118 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
119 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
120 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
121 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
122
123 $(real-objs-m) : quiet_modtag := [M]
124 $(real-objs-m:.o=.i) : quiet_modtag := [M]
125 $(real-objs-m:.o=.s) : quiet_modtag := [M]
126 $(real-objs-m:.o=.lst): quiet_modtag := [M]
127
128 $(obj-m) : quiet_modtag := [M]
129
130 # Default for not multi-part modules
131 modname = $(basetarget)
132
133 $(multi-objs-m) : modname = $(modname-multi)
134 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
135 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
136 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
137 $(multi-objs-y) : modname = $(modname-multi)
138 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
139 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
140 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
141
142 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
143 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
144
145 $(obj)/%.s: $(src)/%.c FORCE
146 $(call if_changed_dep,cc_s_c)
147
148 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
149 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
150
151 $(obj)/%.i: $(src)/%.c FORCE
152 $(call if_changed_dep,cc_i_c)
153
154 cmd_genksyms = \
155 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
156 $(GENKSYMS) -T $@ -A -a $(ARCH) \
157 $(if $(KBUILD_PRESERVE),-p) \
158 $(if $(1),-r $(firstword $(wildcard $(@:.symtypes=.symref) /dev/null)))
159
160 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
161 cmd_cc_symtypes_c = \
162 set -e; \
163 $(call cmd_genksyms, true) >/dev/null; \
164 test -s $@ || rm -f $@
165
166 $(obj)/%.symtypes : $(src)/%.c FORCE
167 $(call cmd,cc_symtypes_c)
168
169 # C (.c) files
170 # The C file is compiled and updated dependency information is generated.
171 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
172
173 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
174
175 ifndef CONFIG_MODVERSIONS
176 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
177
178 else
179 # When module versioning is enabled the following steps are executed:
180 # o compile a .tmp_<file>.s from <file>.c
181 # o if .tmp_<file>.s doesn't contain a __ksymtab version, i.e. does
182 # not export symbols, we just assemble .tmp_<file>.s to <file>.o and
183 # are done.
184 # o otherwise, we calculate symbol versions using the good old
185 # genksyms on the preprocessed source and postprocess them in a way
186 # that they are usable as assembly source
187 # o assemble <file>.o from .tmp_<file>.s forcing inclusion of directives
188 # defining the actual values of __crc_*, followed by objcopy-ing them
189 # to force these symbols to be local to permit stripping them later.
190 s_file = $(@D)/.tmp_$(@F:.o=.s)
191 v_file = $(@D)/.tmp_$(@F:.o=.v)
192 tmp_o_file = $(@D)/.tmp_$(@F)
193 no_g_c_flags = $(filter-out -g%,$(c_flags))
194
195 cmd_cc_o_c = $(CC) $(c_flags) -S -o $(s_file) $<
196
197 cmd_modversions = \
198 if grep -q __ksymtab $(s_file); then \
199 if $(call cmd_genksyms, $(KBUILD_SYMTYPES)) > $(v_file) \
200 && $(CC) $(no_g_c_flags) -c -Wa,$(v_file) \
201 -o $(tmp_o_file) $(s_file) \
202 && $(OBJCOPY) -L '__crc_*' -L '___crc_*' -w \
203 $(tmp_o_file) $@; \
204 then \
205 : ; \
206 else \
207 rm -f $@; exit 1; \
208 fi; \
209 else \
210 rm -f $(v_file); \
211 $(CC) $(no_g_c_flags) -c -o $@ $(s_file); \
212 fi;
213 endif
214
215 ifdef CONFIG_64BIT
216 arch_bits = 64
217 else
218 arch_bits = 32
219 endif
220
221 ifdef CONFIG_FTRACE_MCOUNT_RECORD
222 cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl \
223 "$(ARCH)" "$(arch_bits)" "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" \
224 "$(NM)" "$(RM)" "$(MV)" "$(@)";
225 endif
226
227 define rule_cc_o_c
228 $(call echo-cmd,checksrc) $(cmd_checksrc) \
229 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
230 $(cmd_modversions) \
231 $(cmd_record_mcount) \
232 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
233 $(dot-target).tmp; \
234 if [ -r $(@D)/.tmp_$(@F:.o=.v) ]; then \
235 echo >> $(dot-target).tmp; \
236 echo '$@: $(GENKSYMS)' >> $(dot-target).tmp; \
237 echo '$(GENKSYMS):: ;' >> $(dot-target).tmp; \
238 fi; \
239 rm -f $(depfile) $(@D)/.tmp_$(@F:.o=.?); \
240 mv -f $(dot-target).tmp $(dot-target).cmd
241 endef
242
243 # Built-in and composite module parts
244 $(obj)/%.o: $(src)/%.c FORCE
245 $(call cmd,force_checksrc)
246 $(call if_changed_rule,cc_o_c)
247
248 # Single-part modules are special since we need to mark them in $(MODVERDIR)
249
250 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
251 $(call cmd,force_checksrc)
252 $(call if_changed_rule,cc_o_c)
253 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
254
255 quiet_cmd_cc_lst_c = MKLST $@
256 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
257 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
258 System.map $(OBJDUMP) > $@
259
260 $(obj)/%.lst: $(src)/%.c FORCE
261 $(call if_changed_dep,cc_lst_c)
262
263 # Compile assembler sources (.S)
264 # ---------------------------------------------------------------------------
265
266 modkern_aflags := $(AFLAGS_KERNEL)
267
268 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
269 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
270
271 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
272 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
273
274 $(obj)/%.s: $(src)/%.S FORCE
275 $(call if_changed_dep,as_s_S)
276
277 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
278 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
279
280 $(obj)/%.o: $(src)/%.S FORCE
281 $(call if_changed_dep,as_o_S)
282
283 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
284 targets += $(extra-y) $(MAKECMDGOALS) $(always)
285
286 # Linker scripts preprocessor (.lds.S -> .lds)
287 # ---------------------------------------------------------------------------
288 quiet_cmd_cpp_lds_S = LDS $@
289 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
290
291 $(obj)/%.lds: $(src)/%.lds.S FORCE
292 $(call if_changed_dep,cpp_lds_S)
293
294 # Build the compiled-in targets
295 # ---------------------------------------------------------------------------
296
297 # To build objects in subdirs, we need to descend into the directories
298 $(sort $(subdir-obj-y)): $(subdir-ym) ;
299
300 #
301 # Rule to compile a set of .o files into one .o file
302 #
303 ifdef builtin-target
304 quiet_cmd_link_o_target = LD $@
305 # If the list of objects to link is empty, just create an empty built-in.o
306 cmd_link_o_target = $(if $(strip $(obj-y)),\
307 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
308 $(cmd_secanalysis),\
309 rm -f $@; $(AR) rcs $@)
310
311 $(builtin-target): $(obj-y) FORCE
312 $(call if_changed,link_o_target)
313
314 targets += $(builtin-target)
315 endif # builtin-target
316
317 #
318 # Rule to create modules.order file
319 #
320 # Create commands to either record .ko file or cat modules.order from
321 # a subdirectory
322 modorder-cmds = \
323 $(foreach m, $(modorder), \
324 $(if $(filter %/modules.order, $m), \
325 cat $m;, echo kernel/$m;))
326
327 $(modorder-target): $(subdir-ym) FORCE
328 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
329
330 #
331 # Rule to compile a set of .o files into one .a file
332 #
333 ifdef lib-target
334 quiet_cmd_link_l_target = AR $@
335 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
336
337 $(lib-target): $(lib-y) FORCE
338 $(call if_changed,link_l_target)
339
340 targets += $(lib-target)
341 endif
342
343 #
344 # Rule to link composite objects
345 #
346 # Composite objects are specified in kbuild makefile as follows:
347 # <composite-object>-objs := <list of .o files>
348 # or
349 # <composite-object>-y := <list of .o files>
350 link_multi_deps = \
351 $(filter $(addprefix $(obj)/, \
352 $($(subst $(obj)/,,$(@:.o=-objs))) \
353 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
354
355 quiet_cmd_link_multi-y = LD $@
356 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
357
358 quiet_cmd_link_multi-m = LD [M] $@
359 cmd_link_multi-m = $(cmd_link_multi-y)
360
361 # We would rather have a list of rules like
362 # foo.o: $(foo-objs)
363 # but that's not so easy, so we rather make all composite objects depend
364 # on the set of all their parts
365 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
366 $(call if_changed,link_multi-y)
367
368 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
369 $(call if_changed,link_multi-m)
370 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
371
372 targets += $(multi-used-y) $(multi-used-m)
373
374
375 # Descending
376 # ---------------------------------------------------------------------------
377
378 PHONY += $(subdir-ym)
379 $(subdir-ym):
380 $(Q)$(MAKE) $(build)=$@
381
382 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
383 # ---------------------------------------------------------------------------
384
385 PHONY += FORCE
386
387 FORCE:
388
389 # Read all saved command lines and dependencies for the $(targets) we
390 # may be building above, using $(if_changed{,_dep}). As an
391 # optimization, we don't need to read them if the target does not
392 # exist, we will rebuild anyway in that case.
393
394 targets := $(wildcard $(sort $(targets)))
395 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
396
397 ifneq ($(cmd_files),)
398 include $(cmd_files)
399 endif
400
401
402 # Declare the contents of the .PHONY variable as phony. We keep that
403 # information in a variable se we can use it in if_changed and friends.
404
405 .PHONY: $(PHONY)
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