scripts/Makefile.build

   1 # ==========================================================================
   2 # Building
   3 # ==========================================================================
   4
   5 src := $(obj)
   6
   7 PHONY := __build
   8 __build:
   9
  10 # Init all relevant variables used in kbuild files so
  11 # 1) they have correct type
  12 # 2) they do not inherit any value from the environment
  13 obj-y :=
  14 obj-m :=
  15 lib-y :=
  16 lib-m :=
  17 always :=
  18 targets :=
  19 subdir-y :=
  20 subdir-m :=
  21 EXTRA_AFLAGS   :=
  22 EXTRA_CFLAGS   :=
  23 EXTRA_CPPFLAGS :=
  24 EXTRA_LDFLAGS  :=
  25
  26 # Read .config if it exist, otherwise ignore
  27 -include include/config/auto.conf
  28
  29 include scripts/Kbuild.include
  30
  31 # For backward compatibility check that these variables does not change
  32 save-cflags := $(CFLAGS)
  33
  34 # The filename Kbuild has precedence over Makefile
  35 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  36 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  37 include $(kbuild-file)
  38
  39 # If the save-* variables changed error out
  40 ifeq ($(KBUILD_NOPEDANTIC),)
  41         ifneq ("$(save-cflags)","$(CFLAGS)")
  42                 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
  43         endif
  44 endif
  45 include scripts/Makefile.lib
  46
  47 ifdef host-progs
  48 ifneq ($(hostprogs-y),$(host-progs))
  49 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  50 hostprogs-y += $(host-progs)
  51 endif
  52 endif
  53
  54 # Do not include host rules unles needed
  55 ifneq ($(hostprogs-y)$(hostprogs-m),)
  56 include scripts/Makefile.host
  57 endif
  58
  59 ifneq ($(KBUILD_SRC),)
  60 # Create output directory if not already present
  61 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  62
  63 # Create directories for object files if directory does not exist
  64 # Needed when obj-y := dir/file.o syntax is used
  65 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  66 endif
  67
  68 ifndef obj
  69 $(warning kbuild: Makefile.build is included improperly)
  70 endif
  71
  72 # ===========================================================================
  73
  74 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  75 lib-target := $(obj)/lib.a
  76 endif
  77
  78 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
  79 builtin-target := $(obj)/built-in.o
  80 endif
  81
  82 # We keep a list of all modules in $(MODVERDIR)
  83
  84 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  85          $(if $(KBUILD_MODULES),$(obj-m)) \
  86          $(subdir-ym) $(always)
  87         @:
  88
  89 # Linus' kernel sanity checking tool
  90 ifneq ($(KBUILD_CHECKSRC),0)
  91   ifeq ($(KBUILD_CHECKSRC),2)
  92     quiet_cmd_force_checksrc = CHECK   $<
  93           cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  94   else
  95       quiet_cmd_checksrc     = CHECK   $<
  96             cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  97   endif
  98 endif
  99
 100
 101 # Compile C sources (.c)
 102 # ---------------------------------------------------------------------------
 103
 104 # Default is built-in, unless we know otherwise
 105 modkern_cflags := $(CFLAGS_KERNEL)
 106 quiet_modtag := $(empty)   $(empty)
 107
 108 $(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
 109 $(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
 110 $(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
 111 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
 112
 113 $(real-objs-m)        : quiet_modtag := [M]
 114 $(real-objs-m:.o=.i)  : quiet_modtag := [M]
 115 $(real-objs-m:.o=.s)  : quiet_modtag := [M]
 116 $(real-objs-m:.o=.lst): quiet_modtag := [M]
 117
 118 $(obj-m)              : quiet_modtag := [M]
 119
 120 # Default for not multi-part modules
 121 modname = $(basetarget)
 122
 123 $(multi-objs-m)         : modname = $(modname-multi)
 124 $(multi-objs-m:.o=.i)   : modname = $(modname-multi)
 125 $(multi-objs-m:.o=.s)   : modname = $(modname-multi)
 126 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
 127 $(multi-objs-y)         : modname = $(modname-multi)
 128 $(multi-objs-y:.o=.i)   : modname = $(modname-multi)
 129 $(multi-objs-y:.o=.s)   : modname = $(modname-multi)
 130 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
 131
 132 quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
 133 cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
 134
 135 $(obj)/%.s: $(src)/%.c FORCE
 136         $(call if_changed_dep,cc_s_c)
 137
 138 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
 139 cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
 140
 141 $(obj)/%.i: $(src)/%.c FORCE
 142         $(call if_changed_dep,cc_i_c)
 143
 144 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
 145 cmd_cc_symtypes_c          = \
 146                 $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
 147                 | $(GENKSYMS) -T $@ >/dev/null;                         \
 148                 test -s $@ || rm -f $@
 149
 150 $(obj)/%.symtypes : $(src)/%.c FORCE
 151         $(call if_changed_dep,cc_symtypes_c)
 152
 153 # C (.c) files
 154 # The C file is compiled and updated dependency information is generated.
 155 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 156
 157 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
 158
 159 ifndef CONFIG_MODVERSIONS
 160 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
 161
 162 else
 163 # When module versioning is enabled the following steps are executed:
 164 # o compile a .tmp_<file>.o from <file>.c
 165 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
 166 #   not export symbols, we just rename .tmp_<file>.o to <file>.o and
 167 #   are done.
 168 # o otherwise, we calculate symbol versions using the good old
 169 #   genksyms on the preprocessed source and postprocess them in a way
 170 #   that they are usable as a linker script
 171 # o generate <file>.o from .tmp_<file>.o using the linker to
 172 #   replace the unresolved symbols __crc_exported_symbol with
 173 #   the actual value of the checksum generated by genksyms
 174
 175 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
 176 cmd_modversions =                                                       \
 177         if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then     \
 178                 $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
 179                 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES),                  \
 180                               -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH)   \
 181                 > $(@D)/.tmp_$(@F:.o=.ver);                             \
 182                                                                         \
 183                 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F)              \
 184                         -T $(@D)/.tmp_$(@F:.o=.ver);                    \
 185                 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);        \
 186         else                                                            \
 187                 mv -f $(@D)/.tmp_$(@F) $@;                              \
 188         fi;
 189 endif
 190
 191 define rule_cc_o_c
 192         $(call echo-cmd,checksrc) $(cmd_checksrc)                         \
 193         $(call echo-cmd,cc_o_c) $(cmd_cc_o_c);                            \
 194         $(cmd_modversions)                                                \
 195         scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
 196                                                       $(dot-target).tmp;  \
 197         rm -f $(depfile);                                                 \
 198         mv -f $(dot-target).tmp $(dot-target).cmd
 199 endef
 200
 201 # Built-in and composite module parts
 202 $(obj)/%.o: $(src)/%.c FORCE
 203         $(call cmd,force_checksrc)
 204         $(call if_changed_rule,cc_o_c)
 205
 206 # Single-part modules are special since we need to mark them in $(MODVERDIR)
 207
 208 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
 209         $(call cmd,force_checksrc)
 210         $(call if_changed_rule,cc_o_c)
 211         @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
 212
 213 quiet_cmd_cc_lst_c = MKLST   $@
 214       cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
 215                      $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
 216                                      System.map $(OBJDUMP) > $@
 217
 218 $(obj)/%.lst: $(src)/%.c FORCE
 219         $(call if_changed_dep,cc_lst_c)
 220
 221 # Compile assembler sources (.S)
 222 # ---------------------------------------------------------------------------
 223
 224 modkern_aflags := $(AFLAGS_KERNEL)
 225
 226 $(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
 227 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
 228
 229 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
 230 cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 231
 232 $(obj)/%.s: $(src)/%.S FORCE
 233         $(call if_changed_dep,as_s_S)
 234
 235 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 236 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 237
 238 $(obj)/%.o: $(src)/%.S FORCE
 239         $(call if_changed_dep,as_o_S)
 240
 241 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
 242 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 243
 244 # Linker scripts preprocessor (.lds.S -> .lds)
 245 # ---------------------------------------------------------------------------
 246 quiet_cmd_cpp_lds_S = LDS     $@
 247       cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
 248
 249 $(obj)/%.lds: $(src)/%.lds.S FORCE
 250         $(call if_changed_dep,cpp_lds_S)
 251
 252 # Build the compiled-in targets
 253 # ---------------------------------------------------------------------------
 254
 255 # To build objects in subdirs, we need to descend into the directories
 256 $(sort $(subdir-obj-y)): $(subdir-ym) ;
 257
 258 #
 259 # Rule to compile a set of .o files into one .o file
 260 #
 261 ifdef builtin-target
 262 quiet_cmd_link_o_target = LD      $@
 263 # If the list of objects to link is empty, just create an empty built-in.o
 264 cmd_link_o_target = $(if $(strip $(obj-y)),\
 265                       $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
 266                       rm -f $@; $(AR) rcs $@)
 267
 268 $(builtin-target): $(obj-y) FORCE
 269         $(call if_changed,link_o_target)
 270
 271 targets += $(builtin-target)
 272 endif # builtin-target
 273
 274 #
 275 # Rule to compile a set of .o files into one .a file
 276 #
 277 ifdef lib-target
 278 quiet_cmd_link_l_target = AR      $@
 279 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
 280
 281 $(lib-target): $(lib-y) FORCE
 282         $(call if_changed,link_l_target)
 283
 284 targets += $(lib-target)
 285 endif
 286
 287 #
 288 # Rule to link composite objects
 289 #
 290 #  Composite objects are specified in kbuild makefile as follows:
 291 #    <composite-object>-objs := <list of .o files>
 292 #  or
 293 #    <composite-object>-y    := <list of .o files>
 294 link_multi_deps =                     \
 295 $(filter $(addprefix $(obj)/,         \
 296 $($(subst $(obj)/,,$(@:.o=-objs)))    \
 297 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
 298
 299 quiet_cmd_link_multi-y = LD      $@
 300 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
 301
 302 quiet_cmd_link_multi-m = LD [M]  $@
 303 cmd_link_multi-m = $(cmd_link_multi-y)
 304
 305 # We would rather have a list of rules like
 306 #       foo.o: $(foo-objs)
 307 # but that's not so easy, so we rather make all composite objects depend
 308 # on the set of all their parts
 309 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
 310         $(call if_changed,link_multi-y)
 311
 312 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
 313         $(call if_changed,link_multi-m)
 314         @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
 315
 316 targets += $(multi-used-y) $(multi-used-m)
 317
 318
 319 # Descending
 320 # ---------------------------------------------------------------------------
 321
 322 PHONY += $(subdir-ym)
 323 $(subdir-ym):
 324         $(Q)$(MAKE) $(build)=$@
 325
 326 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
 327 # ---------------------------------------------------------------------------
 328
 329 PHONY += FORCE
 330
 331 FORCE:
 332
 333 # Read all saved command lines and dependencies for the $(targets) we
 334 # may be building above, using $(if_changed{,_dep}). As an
 335 # optimization, we don't need to read them if the target does not
 336 # exist, we will rebuild anyway in that case.
 337
 338 targets := $(wildcard $(sort $(targets)))
 339 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 340
 341 ifneq ($(cmd_files),)
 342   include $(cmd_files)
 343 endif
 344
 345
 346 # Declare the contents of the .PHONY variable as phony.  We keep that
 347 # information in a variable se we can use it in if_changed and friends.
 348
 349 .PHONY: $(PHONY)