sim/aarch64/ChangeLog

   1 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
   2
   3         * cpustate.h: Include config.h.
   4         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
   5         use anonymous structs to align members.
   6         * simulator.c (aarch64_step): Use sim_core_read_buffer and
   7         endian_le2h_4 to read instruction from pc.
   8
   9 2016-05-06  Nick Clifton  <nickc@redhat.com>
  10
  11         * simulator.c (do_FMLA_by_element): New function.
  12         (do_vec_op2): Call it.
  13
  14 2016-04-27  Nick Clifton  <nickc@redhat.com>
  15
  16         * simulator.c: Add TRACE_DECODE statements to all emulation
  17         functions.
  18
  19 2016-03-30  Nick Clifton  <nickc@redhat.com>
  20
  21         * cpustate.c (aarch64_set_reg_s32): New function.
  22         (aarch64_set_reg_u32): New function.
  23         (aarch64_get_FP_half): Place half precision value into the correct
  24         slot of the union.
  25         (aarch64_set_FP_half): Likewise.
  26         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
  27         aarch64_set_reg_u32.
  28         * memory.c (FETCH_FUNC): Cast the read value to the access type
  29         before converting it to the return type.  Rename to FETCH_FUNC64.
  30         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
  31         accesses.  Use for 32-bit memory access functions.
  32         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
  33         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
  34         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
  35         (ldrsh_scale_ext, ldrsw_abs): Likewise.
  36         (ldrh32_abs): Store 32 bit value not 64-bits.
  37         (ldrh32_wb, ldrh32_scale_ext): Likewise.
  38         (do_vec_MOV_immediate): Fix computation of val.
  39         (do_vec_MVNI): Likewise.
  40         (DO_VEC_WIDENING_MUL): New macro.
  41         (do_vec_mull): Use new macro.
  42         (do_vec_mul): Use new macro.
  43         (do_vec_MLA): Read values before writing.
  44         (do_vec_xtl): Likewise.
  45         (do_vec_SSHL): Select correct shift value.
  46         (do_vec_USHL): Likewise.
  47         (do_scalar_UCVTF): New function.
  48         (do_scalar_vec): Call new function.
  49         (store_pair_u64): Treat reads of SP as reads of XZR.
  50
  51 2016-03-29  Nick Clifton  <nickc@redhat.com>
  52
  53         * cpustate.c: Remove space after asterisk in function parameters.
  54         * decode.h (greg): Delete unused function.
  55         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
  56         * simulator.c: Use INSTR macro in more places.
  57         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
  58         Remove extraneous whitespace.
  59
  60 2016-03-23  Nick Clifton  <nickc@redhat.com>
  61
  62         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
  63         register as a half precision floating point number.
  64         (aarch64_set_FP_half): New function.  Similar, but for setting
  65         a half precision register.
  66         (aarch64_get_thread_id): New function.  Returns the value of the
  67         CPU's TPIDR register.
  68         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
  69         floating point control register.
  70         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
  71         register.
  72         * cpustate.h: Add prototypes for new functions.
  73         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
  74         * memory.c: Use unaligned core access functions for all memory
  75         reads and writes.
  76         * simulator.c (HALT_NYI): Generate an error message if tracing
  77         will not tell the user why the simulator is halting.
  78         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
  79         (INSTR): New time-saver macro.
  80         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
  81         offset.
  82         (fldrh_abs): New function.  Likewise for 16-bit values.
  83         (do_vec_SSHL): Allow for negative shift values.
  84         (do_vec_USHL): Likewise.
  85         (do_vec_SHL): Correct computation of shift amount.
  86         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
  87         shifts and computation of shift value.
  88         (clz): New function.  Counts leading zero bits.
  89         (do_vec_CLZ): New function.  Implements CLZ (vector).
  90         (do_vec_MOV_element): Call do_vec_CLZ.
  91         (dexSimpleFPCondCompare): Implement.
  92         (do_FCVT_half_to_single): New function.  Implements one of the
  93         FCVT operations.
  94         (do_FCVT_half_to_double): New function.  Likewise.
  95         (do_FCVT_single_to_half): New function.  Likewise.
  96         (do_FCVT_double_to_half): New function.  Likewise.
  97         (dexSimpleFPDataProc1Source): Call new FCVT functions.
  98         (do_scalar_SHL): Handle negative shifts.
  99         (do_scalar_shift): Handle SSHR.
 100         (do_scalar_USHL): New function.
 101         (do_double_add): Simplify to just performing a double precision
 102         add operation.  Move remaining code into...
 103         (do_scalar_vec): ... New function.
 104         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 105         functions.
 106         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 107         registers.
 108         (system_set): New function.
 109         (do_MSR_immediate): New function.  Stub for now.
 110         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 111         instruction.
 112         (do_SYS): New function.  Stub for now,
 113         (dexSystem): Call new functions.
 114
 115 2016-03-18  Nick Clifton  <nickc@redhat.com>
 116
 117         * cpustate.c: Remove spurious spaces from TRACE strings.
 118         Print hex equivalents of floats and doubles.
 119         Check element number against array size when accessing vector
 120         registers.
 121         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 122         element index.
 123         (SET_VEC_ELEMENT): Likewise.
 124         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 125
 126         * memory.c: Trace memory reads when --trace-memory is enabled.
 127         Remove float and double load and store functions.
 128         * memory.h (aarch64_get_mem_float): Delete prototype.
 129         (aarch64_get_mem_double): Likewise.
 130         (aarch64_set_mem_float): Likewise.
 131         (aarch64_set_mem_double): Likewise.
 132         * simulator (IS_SET): Always return either 0 or 1.
 133         (IS_CLEAR): Likewise.
 134         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 135         and doubles using 64-bit memory accesses.
 136         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 137         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 138         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 139         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 140         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 141         (do_vec_MUL_by_element): New function.
 142         (do_vec_op2): Call do_vec_MUL_by_element.
 143         (do_scalar_NEG): New function.
 144         (do_double_add): Call do_scalar_NEG.
 145
 146 2016-03-03  Nick Clifton  <nickc@redhat.com>
 147
 148         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 149         (CondCompare): Swap interpretation of bit 30.
 150         (DO_ADDP): Delete macro.
 151         (do_vec_ADDP): Copy source registers before starting to update
 152         destination register.
 153         (do_vec_FADDP): Likewise.
 154         (do_vec_load_store): Fix computation of sizeof_operation.
 155         (rbit64): Fix type of constant.
 156         (aarch64_step): When displaying insn value, display all 32 bits.
 157
 158 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * config.in, configure: Regenerate.
 161
 162 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * configure: Regenerate.
 165
 166 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 169         * configure: Regenerate.
 170
 171 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 172
 173         * configure: Regenerate.
 174
 175 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 176
 177         * configure: Regenerate.
 178
 179 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 180
 181         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 182         * configure: Regenerate.
 183
 184 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * configure: Regenerate.
 187
 188 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 189
 190         * configure: Regenerate.
 191
 192 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 193
 194         * config.in, configure: Regenerate.
 195
 196 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 197
 198         * interp.c (sim_create_inferior): Mark argv and env const.
 199         (sim_open): Mark argv const.
 200
 201 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * interp.c: Delete dis-asm.h include.
 204         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 205         (sim_create_inferior): Delete disassemble init logic.
 206         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 207         (sim_open): Delete sim_add_option_table call.
 208         * memory.c (mem_error): Delete disas check.
 209         * simulator.c: Delete dis-asm.h include.
 210         (disas): Delete.
 211         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 212         (HALT_NYI): Likewise.
 213         (handle_halt): Delete disas call.
 214         (aarch64_step): Replace disas logic with TRACE_DISASM.
 215         * simulator.h: Delete dis-asm.h include.
 216         (aarch64_print_insn): Delete.
 217
 218 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 219
 220         * simulator.c (MAX, MIN): Delete.
 221         (do_vec_maxv): Change MAX to max and MIN to min.
 222         (do_vec_fminmaxV): Likewise.
 223
 224 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 225
 226         * simulator.c: Remove syscall.h include.
 227
 228 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 229
 230         * configure: Regenerate.
 231
 232 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 233
 234         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 235         * configure: Regenerate.
 236
 237 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 238
 239         * configure: Regenerate.
 240
 241 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 242
 243         * interp.c (sim_dis_read): Change private_data to application_data.
 244         (sim_create_inferior): Likewise.
 245
 246 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 247
 248         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 249
 250 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 251
 252         * config.in, configure: Regenerate.
 253
 254 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 255
 256         * interp.c (sim_create_inferior): Update comment and argv check.
 257
 258 2015-12-14  Nick Clifton  <nickc@redhat.com>
 259
 260         * simulator.c (system_get): New function.  Provides read
 261         access to the dczid system register.
 262         (do_mrs): New function - implements the MRS instruction.
 263         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 264         unimplemented system instructions.
 265
 266 2015-11-24  Nick Clifton  <nickc@redhat.com>
 267
 268         * configure.ac: New configure template.
 269         * aclocal.m4: Generate.
 270         * config.in: Generate.
 271         * configure: Generate.
 272         * cpustate.c: New file - functions for accessing AArch64 registers.
 273         * cpustate.h: New header.
 274         * decode.h: New header.
 275         * interp.c: New file - interface between GDB and simulator.
 276         * Makefile.in: New makefile template.
 277         * memory.c: New file - functions for simulating aarch64 memory
 278         accesses.
 279         * memory.h: New header.
 280         * sim-main.h: New header.
 281         * simulator.c: New file - aarch64 simulator functions.
 282         * simulator.h: New header.