sim/aarch64/ChangeLog

   1 2016-08-11  Nick Clifton  <nickc@redhat.com>
   2
   3         * interp.c (sim_create_inferior): Allow for being called with a
   4         NULL abfd parameter.  If a bfd is provided, initialise the sim
   5         with that start address.
   6         * simulator.c (HALT_NYI): Just print out the numeric value of the
   7         instruction when not tracing.
   8
   9 2016-07-27  Alan Modra  <amodra@gmail.com>
  10
  11         * memory.c: Don't include libbfd.h.
  12
  13 2016-07-21  Nick Clifton  <nickc@redhat.com>
  14
  15         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
  16
  17 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
  18
  19         * cpustate.h: Include config.h.
  20         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
  21         use anonymous structs to align members.
  22         * simulator.c (aarch64_step): Use sim_core_read_buffer and
  23         endian_le2h_4 to read instruction from pc.
  24
  25 2016-05-06  Nick Clifton  <nickc@redhat.com>
  26
  27         * simulator.c (do_FMLA_by_element): New function.
  28         (do_vec_op2): Call it.
  29
  30 2016-04-27  Nick Clifton  <nickc@redhat.com>
  31
  32         * simulator.c: Add TRACE_DECODE statements to all emulation
  33         functions.
  34
  35 2016-03-30  Nick Clifton  <nickc@redhat.com>
  36
  37         * cpustate.c (aarch64_set_reg_s32): New function.
  38         (aarch64_set_reg_u32): New function.
  39         (aarch64_get_FP_half): Place half precision value into the correct
  40         slot of the union.
  41         (aarch64_set_FP_half): Likewise.
  42         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
  43         aarch64_set_reg_u32.
  44         * memory.c (FETCH_FUNC): Cast the read value to the access type
  45         before converting it to the return type.  Rename to FETCH_FUNC64.
  46         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
  47         accesses.  Use for 32-bit memory access functions.
  48         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
  49         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
  50         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
  51         (ldrsh_scale_ext, ldrsw_abs): Likewise.
  52         (ldrh32_abs): Store 32 bit value not 64-bits.
  53         (ldrh32_wb, ldrh32_scale_ext): Likewise.
  54         (do_vec_MOV_immediate): Fix computation of val.
  55         (do_vec_MVNI): Likewise.
  56         (DO_VEC_WIDENING_MUL): New macro.
  57         (do_vec_mull): Use new macro.
  58         (do_vec_mul): Use new macro.
  59         (do_vec_MLA): Read values before writing.
  60         (do_vec_xtl): Likewise.
  61         (do_vec_SSHL): Select correct shift value.
  62         (do_vec_USHL): Likewise.
  63         (do_scalar_UCVTF): New function.
  64         (do_scalar_vec): Call new function.
  65         (store_pair_u64): Treat reads of SP as reads of XZR.
  66
  67 2016-03-29  Nick Clifton  <nickc@redhat.com>
  68
  69         * cpustate.c: Remove space after asterisk in function parameters.
  70         * decode.h (greg): Delete unused function.
  71         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
  72         * simulator.c: Use INSTR macro in more places.
  73         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
  74         Remove extraneous whitespace.
  75
  76 2016-03-23  Nick Clifton  <nickc@redhat.com>
  77
  78         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
  79         register as a half precision floating point number.
  80         (aarch64_set_FP_half): New function.  Similar, but for setting
  81         a half precision register.
  82         (aarch64_get_thread_id): New function.  Returns the value of the
  83         CPU's TPIDR register.
  84         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
  85         floating point control register.
  86         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
  87         register.
  88         * cpustate.h: Add prototypes for new functions.
  89         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
  90         * memory.c: Use unaligned core access functions for all memory
  91         reads and writes.
  92         * simulator.c (HALT_NYI): Generate an error message if tracing
  93         will not tell the user why the simulator is halting.
  94         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
  95         (INSTR): New time-saver macro.
  96         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
  97         offset.
  98         (fldrh_abs): New function.  Likewise for 16-bit values.
  99         (do_vec_SSHL): Allow for negative shift values.
 100         (do_vec_USHL): Likewise.
 101         (do_vec_SHL): Correct computation of shift amount.
 102         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 103         shifts and computation of shift value.
 104         (clz): New function.  Counts leading zero bits.
 105         (do_vec_CLZ): New function.  Implements CLZ (vector).
 106         (do_vec_MOV_element): Call do_vec_CLZ.
 107         (dexSimpleFPCondCompare): Implement.
 108         (do_FCVT_half_to_single): New function.  Implements one of the
 109         FCVT operations.
 110         (do_FCVT_half_to_double): New function.  Likewise.
 111         (do_FCVT_single_to_half): New function.  Likewise.
 112         (do_FCVT_double_to_half): New function.  Likewise.
 113         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 114         (do_scalar_SHL): Handle negative shifts.
 115         (do_scalar_shift): Handle SSHR.
 116         (do_scalar_USHL): New function.
 117         (do_double_add): Simplify to just performing a double precision
 118         add operation.  Move remaining code into...
 119         (do_scalar_vec): ... New function.
 120         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 121         functions.
 122         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 123         registers.
 124         (system_set): New function.
 125         (do_MSR_immediate): New function.  Stub for now.
 126         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 127         instruction.
 128         (do_SYS): New function.  Stub for now,
 129         (dexSystem): Call new functions.
 130
 131 2016-03-18  Nick Clifton  <nickc@redhat.com>
 132
 133         * cpustate.c: Remove spurious spaces from TRACE strings.
 134         Print hex equivalents of floats and doubles.
 135         Check element number against array size when accessing vector
 136         registers.
 137         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 138         element index.
 139         (SET_VEC_ELEMENT): Likewise.
 140         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 141
 142         * memory.c: Trace memory reads when --trace-memory is enabled.
 143         Remove float and double load and store functions.
 144         * memory.h (aarch64_get_mem_float): Delete prototype.
 145         (aarch64_get_mem_double): Likewise.
 146         (aarch64_set_mem_float): Likewise.
 147         (aarch64_set_mem_double): Likewise.
 148         * simulator (IS_SET): Always return either 0 or 1.
 149         (IS_CLEAR): Likewise.
 150         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 151         and doubles using 64-bit memory accesses.
 152         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 153         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 154         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 155         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 156         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 157         (do_vec_MUL_by_element): New function.
 158         (do_vec_op2): Call do_vec_MUL_by_element.
 159         (do_scalar_NEG): New function.
 160         (do_double_add): Call do_scalar_NEG.
 161
 162 2016-03-03  Nick Clifton  <nickc@redhat.com>
 163
 164         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 165         (CondCompare): Swap interpretation of bit 30.
 166         (DO_ADDP): Delete macro.
 167         (do_vec_ADDP): Copy source registers before starting to update
 168         destination register.
 169         (do_vec_FADDP): Likewise.
 170         (do_vec_load_store): Fix computation of sizeof_operation.
 171         (rbit64): Fix type of constant.
 172         (aarch64_step): When displaying insn value, display all 32 bits.
 173
 174 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 175
 176         * config.in, configure: Regenerate.
 177
 178 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * configure: Regenerate.
 181
 182 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 183
 184         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 185         * configure: Regenerate.
 186
 187 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * configure: Regenerate.
 190
 191 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 192
 193         * configure: Regenerate.
 194
 195 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 196
 197         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 198         * configure: Regenerate.
 199
 200 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 201
 202         * configure: Regenerate.
 203
 204 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 205
 206         * configure: Regenerate.
 207
 208 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 209
 210         * config.in, configure: Regenerate.
 211
 212 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 213
 214         * interp.c (sim_create_inferior): Mark argv and env const.
 215         (sim_open): Mark argv const.
 216
 217 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 218
 219         * interp.c: Delete dis-asm.h include.
 220         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 221         (sim_create_inferior): Delete disassemble init logic.
 222         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 223         (sim_open): Delete sim_add_option_table call.
 224         * memory.c (mem_error): Delete disas check.
 225         * simulator.c: Delete dis-asm.h include.
 226         (disas): Delete.
 227         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 228         (HALT_NYI): Likewise.
 229         (handle_halt): Delete disas call.
 230         (aarch64_step): Replace disas logic with TRACE_DISASM.
 231         * simulator.h: Delete dis-asm.h include.
 232         (aarch64_print_insn): Delete.
 233
 234 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 235
 236         * simulator.c (MAX, MIN): Delete.
 237         (do_vec_maxv): Change MAX to max and MIN to min.
 238         (do_vec_fminmaxV): Likewise.
 239
 240 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 241
 242         * simulator.c: Remove syscall.h include.
 243
 244 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 245
 246         * configure: Regenerate.
 247
 248 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 249
 250         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 251         * configure: Regenerate.
 252
 253 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 254
 255         * configure: Regenerate.
 256
 257 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * interp.c (sim_dis_read): Change private_data to application_data.
 260         (sim_create_inferior): Likewise.
 261
 262 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 263
 264         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 265
 266 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 267
 268         * config.in, configure: Regenerate.
 269
 270 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 271
 272         * interp.c (sim_create_inferior): Update comment and argv check.
 273
 274 2015-12-14  Nick Clifton  <nickc@redhat.com>
 275
 276         * simulator.c (system_get): New function.  Provides read
 277         access to the dczid system register.
 278         (do_mrs): New function - implements the MRS instruction.
 279         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 280         unimplemented system instructions.
 281
 282 2015-11-24  Nick Clifton  <nickc@redhat.com>
 283
 284         * configure.ac: New configure template.
 285         * aclocal.m4: Generate.
 286         * config.in: Generate.
 287         * configure: Generate.
 288         * cpustate.c: New file - functions for accessing AArch64 registers.
 289         * cpustate.h: New header.
 290         * decode.h: New header.
 291         * interp.c: New file - interface between GDB and simulator.
 292         * Makefile.in: New makefile template.
 293         * memory.c: New file - functions for simulating aarch64 memory
 294         accesses.
 295         * memory.h: New header.
 296         * sim-main.h: New header.
 297         * simulator.c: New file - aarch64 simulator functions.
 298         * simulator.h: New header.