sim/aarch64/ChangeLog

   1 2017-02-19  Jim Wilson  <jim.wilson@linaro.org>
   2
   3         * simulator.c (do_vec_ADDV): Mov val declaration inside each case,
   4         with type set to input type size.
   5         (do_vec_xtl): Change bias from 3 to 4 for byte case.
   6
   7 2017-02-14  Jim Wilson  <jim.wilson@linaro.org>
   8
   9         * simulator.c (do_vec_MLA): Rewrite switch body.
  10
  11         * simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
  12         2.  Move test_false if inside loop.  Fix logic for computing result
  13         stored to vd.
  14
  15         * simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
  16         (do_vec_LDn_single, do_vec_STn_single): New.
  17         (do_vec_LDnR): Add and set new nregs var.  Replace switch on nregs with
  18         loop over nregs using new var n.  Add n times size to address in loop.
  19         Add n to vd in loop.
  20         (do_vec_load_store): Add comment for instruction bit 24.  New var
  21         single to hold instruction bit 24.  Add new code to use single.  Move
  22         ldnr support inside single if statements.  Fix ldnr register counts
  23         inside post if statement.  Change HALT_NYI calls to HALT_UNALLOC.
  24
  25 2017-01-23  Jim Wilson  <jim.wilson@linaro.org>
  26
  27         * simulator.c (do_vec_compare): Add case 0x23 for CMTST.
  28
  29 2017-01-17  Jim Wilson  <jim.wilson@linaro.org>
  30
  31         * simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of
  32         aarch64_set_reg_u64.  In case 2, call HALT_UNALLOC if not full.  In
  33         case 3, call HALT_UNALLOC unconditionally.
  34         (do_vec_XTN): Delete shifts.  In case 2, change index from i + 4 to
  35         i + 2.  Delete if on bias, change index to i + bias * X.
  36
  37 2017-01-09  Jim Wilson  <jim.wilson@linaro.org>
  38
  39         * simulator.c (do_vec_UZP): Rewrite.
  40
  41 2017-01-04  Jim Wilson  <jim.wilson@linaro.org>
  42
  43         * cpustate.c: Include math.h.
  44         (aarch64_set_FP_float): Use signbit to check for signed zero.
  45         (aarch64_set_FP_double): Likewise.
  46         * simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
  47         (do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
  48         args same size as third arg.
  49         (fmaxnm): Use isnan instead of fpclassify.
  50         (fminnm, dmaxnm, dminnm): Likewise.
  51         (do_vec_MLS): Reverse order of subtraction operands.
  52         (dexSimpleFPCondSelect): Call aarch64_get_FP_double or
  53         aarch64_get_FP_float to get source register contents.
  54         (UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
  55         DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
  56         DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
  57         (do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
  58         raise_exception calls.
  59
  60 2016-12-21  Jim Wilson  <jim.wilson@linaro.org>
  61
  62         * simulator.c (set_flags_for_float_compare): Add code to handle Inf.
  63         Add comment to document NaN issue.
  64         (set_flags_for_double_compare): Likewise.
  65
  66 2016-12-13  Jim Wilson  <jim.wilson@linaro.org>
  67
  68         * simulator.c (NEG, POS): Move before set_flags_for_add64.
  69         (set_flags_for_add64): Replace with a modified copy of
  70         set_flags_for_sub64.
  71
  72 2016-12-03  Jim Wilson  <jim.wilson@linaro.org>
  73
  74         * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
  75         (dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
  76
  77 2016-12-01  Jim Wilson  <jim.wilson@linaro.org>
  78
  79         * simulator.c (fsturs): Switch use of rn and st variables.
  80         (fsturd, fsturq): Likewise
  81
  82 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
  83
  84         * interp.c: Include bfd.h.
  85         (symcount, symtab, aarch64_get_sym_value): Delete.
  86         (remove_useless_symbols): Change count type to long.
  87         (aarch64_get_func): Add SIM_DESC to arg list.  Add symcount
  88         and symtab local variables.
  89         (sim_create_inferior): Delete storage.  Replace symbol code
  90         with a call to trace_load_symbols.
  91         * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h
  92         includes.
  93         (aarch64_get_heap_start): Change aarch64_get_sym_value to
  94         trace_sym_value.
  95         * memory.h: Delete bfd.h include.
  96         (mem_add_blk): Delete unused prototype.
  97         * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func.
  98         * simulator.c (aarch64_get_func): Add SIM_DESC to arg list.
  99         (aarch64_get_sym_value): Delete.
 100
 101 2016-08-12  Nick Clifton  <nickc@redhat.com>
 102
 103         * simulator.c (aarch64_step): Revert pervious delta.
 104         (aarch64_run): Call sim_events_tick after each
 105         instruction is simulated, and if necessary call
 106         sim_events_process.
 107         * simulator.h: Revert previous delta.
 108
 109 2016-08-11  Nick Clifton  <nickc@redhat.com>
 110
 111         * interp.c (sim_create_inferior): Allow for being called with a
 112         NULL abfd parameter.  If a bfd is provided, initialise the sim
 113         with that start address.
 114         * simulator.c (HALT_NYI): Just print out the numeric value of the
 115         instruction when not tracing.
 116         (aarch64_step): Change from static to global.
 117         * simulator.h: Add a prototype for aarch64_step().
 118
 119 2016-07-27  Alan Modra  <amodra@gmail.com>
 120
 121         * memory.c: Don't include libbfd.h.
 122
 123 2016-07-21  Nick Clifton  <nickc@redhat.com>
 124
 125         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
 126
 127 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
 128
 129         * cpustate.h: Include config.h.
 130         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
 131         use anonymous structs to align members.
 132         * simulator.c (aarch64_step): Use sim_core_read_buffer and
 133         endian_le2h_4 to read instruction from pc.
 134
 135 2016-05-06  Nick Clifton  <nickc@redhat.com>
 136
 137         * simulator.c (do_FMLA_by_element): New function.
 138         (do_vec_op2): Call it.
 139
 140 2016-04-27  Nick Clifton  <nickc@redhat.com>
 141
 142         * simulator.c: Add TRACE_DECODE statements to all emulation
 143         functions.
 144
 145 2016-03-30  Nick Clifton  <nickc@redhat.com>
 146
 147         * cpustate.c (aarch64_set_reg_s32): New function.
 148         (aarch64_set_reg_u32): New function.
 149         (aarch64_get_FP_half): Place half precision value into the correct
 150         slot of the union.
 151         (aarch64_set_FP_half): Likewise.
 152         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
 153         aarch64_set_reg_u32.
 154         * memory.c (FETCH_FUNC): Cast the read value to the access type
 155         before converting it to the return type.  Rename to FETCH_FUNC64.
 156         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
 157         accesses.  Use for 32-bit memory access functions.
 158         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
 159         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
 160         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
 161         (ldrsh_scale_ext, ldrsw_abs): Likewise.
 162         (ldrh32_abs): Store 32 bit value not 64-bits.
 163         (ldrh32_wb, ldrh32_scale_ext): Likewise.
 164         (do_vec_MOV_immediate): Fix computation of val.
 165         (do_vec_MVNI): Likewise.
 166         (DO_VEC_WIDENING_MUL): New macro.
 167         (do_vec_mull): Use new macro.
 168         (do_vec_mul): Use new macro.
 169         (do_vec_MLA): Read values before writing.
 170         (do_vec_xtl): Likewise.
 171         (do_vec_SSHL): Select correct shift value.
 172         (do_vec_USHL): Likewise.
 173         (do_scalar_UCVTF): New function.
 174         (do_scalar_vec): Call new function.
 175         (store_pair_u64): Treat reads of SP as reads of XZR.
 176
 177 2016-03-29  Nick Clifton  <nickc@redhat.com>
 178
 179         * cpustate.c: Remove space after asterisk in function parameters.
 180         * decode.h (greg): Delete unused function.
 181         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
 182         * simulator.c: Use INSTR macro in more places.
 183         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
 184         Remove extraneous whitespace.
 185
 186 2016-03-23  Nick Clifton  <nickc@redhat.com>
 187
 188         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
 189         register as a half precision floating point number.
 190         (aarch64_set_FP_half): New function.  Similar, but for setting
 191         a half precision register.
 192         (aarch64_get_thread_id): New function.  Returns the value of the
 193         CPU's TPIDR register.
 194         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
 195         floating point control register.
 196         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
 197         register.
 198         * cpustate.h: Add prototypes for new functions.
 199         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
 200         * memory.c: Use unaligned core access functions for all memory
 201         reads and writes.
 202         * simulator.c (HALT_NYI): Generate an error message if tracing
 203         will not tell the user why the simulator is halting.
 204         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
 205         (INSTR): New time-saver macro.
 206         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
 207         offset.
 208         (fldrh_abs): New function.  Likewise for 16-bit values.
 209         (do_vec_SSHL): Allow for negative shift values.
 210         (do_vec_USHL): Likewise.
 211         (do_vec_SHL): Correct computation of shift amount.
 212         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 213         shifts and computation of shift value.
 214         (clz): New function.  Counts leading zero bits.
 215         (do_vec_CLZ): New function.  Implements CLZ (vector).
 216         (do_vec_MOV_element): Call do_vec_CLZ.
 217         (dexSimpleFPCondCompare): Implement.
 218         (do_FCVT_half_to_single): New function.  Implements one of the
 219         FCVT operations.
 220         (do_FCVT_half_to_double): New function.  Likewise.
 221         (do_FCVT_single_to_half): New function.  Likewise.
 222         (do_FCVT_double_to_half): New function.  Likewise.
 223         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 224         (do_scalar_SHL): Handle negative shifts.
 225         (do_scalar_shift): Handle SSHR.
 226         (do_scalar_USHL): New function.
 227         (do_double_add): Simplify to just performing a double precision
 228         add operation.  Move remaining code into...
 229         (do_scalar_vec): ... New function.
 230         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 231         functions.
 232         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 233         registers.
 234         (system_set): New function.
 235         (do_MSR_immediate): New function.  Stub for now.
 236         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 237         instruction.
 238         (do_SYS): New function.  Stub for now,
 239         (dexSystem): Call new functions.
 240
 241 2016-03-18  Nick Clifton  <nickc@redhat.com>
 242
 243         * cpustate.c: Remove spurious spaces from TRACE strings.
 244         Print hex equivalents of floats and doubles.
 245         Check element number against array size when accessing vector
 246         registers.
 247         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 248         element index.
 249         (SET_VEC_ELEMENT): Likewise.
 250         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 251
 252         * memory.c: Trace memory reads when --trace-memory is enabled.
 253         Remove float and double load and store functions.
 254         * memory.h (aarch64_get_mem_float): Delete prototype.
 255         (aarch64_get_mem_double): Likewise.
 256         (aarch64_set_mem_float): Likewise.
 257         (aarch64_set_mem_double): Likewise.
 258         * simulator (IS_SET): Always return either 0 or 1.
 259         (IS_CLEAR): Likewise.
 260         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 261         and doubles using 64-bit memory accesses.
 262         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 263         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 264         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 265         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 266         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 267         (do_vec_MUL_by_element): New function.
 268         (do_vec_op2): Call do_vec_MUL_by_element.
 269         (do_scalar_NEG): New function.
 270         (do_double_add): Call do_scalar_NEG.
 271
 272 2016-03-03  Nick Clifton  <nickc@redhat.com>
 273
 274         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 275         (CondCompare): Swap interpretation of bit 30.
 276         (DO_ADDP): Delete macro.
 277         (do_vec_ADDP): Copy source registers before starting to update
 278         destination register.
 279         (do_vec_FADDP): Likewise.
 280         (do_vec_load_store): Fix computation of sizeof_operation.
 281         (rbit64): Fix type of constant.
 282         (aarch64_step): When displaying insn value, display all 32 bits.
 283
 284 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 285
 286         * config.in, configure: Regenerate.
 287
 288 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 289
 290         * configure: Regenerate.
 291
 292 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 293
 294         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 295         * configure: Regenerate.
 296
 297 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 298
 299         * configure: Regenerate.
 300
 301 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 302
 303         * configure: Regenerate.
 304
 305 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 306
 307         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 308         * configure: Regenerate.
 309
 310 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 311
 312         * configure: Regenerate.
 313
 314 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 315
 316         * configure: Regenerate.
 317
 318 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 319
 320         * config.in, configure: Regenerate.
 321
 322 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 323
 324         * interp.c (sim_create_inferior): Mark argv and env const.
 325         (sim_open): Mark argv const.
 326
 327 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 328
 329         * interp.c: Delete dis-asm.h include.
 330         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 331         (sim_create_inferior): Delete disassemble init logic.
 332         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 333         (sim_open): Delete sim_add_option_table call.
 334         * memory.c (mem_error): Delete disas check.
 335         * simulator.c: Delete dis-asm.h include.
 336         (disas): Delete.
 337         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 338         (HALT_NYI): Likewise.
 339         (handle_halt): Delete disas call.
 340         (aarch64_step): Replace disas logic with TRACE_DISASM.
 341         * simulator.h: Delete dis-asm.h include.
 342         (aarch64_print_insn): Delete.
 343
 344 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 345
 346         * simulator.c (MAX, MIN): Delete.
 347         (do_vec_maxv): Change MAX to max and MIN to min.
 348         (do_vec_fminmaxV): Likewise.
 349
 350 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 351
 352         * simulator.c: Remove syscall.h include.
 353
 354 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 355
 356         * configure: Regenerate.
 357
 358 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 359
 360         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 361         * configure: Regenerate.
 362
 363 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 364
 365         * configure: Regenerate.
 366
 367 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 368
 369         * interp.c (sim_dis_read): Change private_data to application_data.
 370         (sim_create_inferior): Likewise.
 371
 372 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 373
 374         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 375
 376 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 377
 378         * config.in, configure: Regenerate.
 379
 380 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 381
 382         * interp.c (sim_create_inferior): Update comment and argv check.
 383
 384 2015-12-14  Nick Clifton  <nickc@redhat.com>
 385
 386         * simulator.c (system_get): New function.  Provides read
 387         access to the dczid system register.
 388         (do_mrs): New function - implements the MRS instruction.
 389         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 390         unimplemented system instructions.
 391
 392 2015-11-24  Nick Clifton  <nickc@redhat.com>
 393
 394         * configure.ac: New configure template.
 395         * aclocal.m4: Generate.
 396         * config.in: Generate.
 397         * configure: Generate.
 398         * cpustate.c: New file - functions for accessing AArch64 registers.
 399         * cpustate.h: New header.
 400         * decode.h: New header.
 401         * interp.c: New file - interface between GDB and simulator.
 402         * Makefile.in: New makefile template.
 403         * memory.c: New file - functions for simulating aarch64 memory
 404         accesses.
 405         * memory.h: New header.
 406         * sim-main.h: New header.
 407         * simulator.c: New file - aarch64 simulator functions.
 408         * simulator.h: New header.