sim/aarch64/ChangeLog

   1 2016-03-23  Nick Clifton  <nickc@redhat.com>
   2
   3         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
   4         register as a half precision floating point number.
   5         (aarch64_set_FP_half): New function.  Similar, but for setting
   6         a half precision register.
   7         (aarch64_get_thread_id): New function.  Returns the value of the
   8         CPU's TPIDR register.
   9         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
  10         floating point control register.
  11         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
  12         register.
  13         * cpustate.h: Add prototypes for new functions.
  14         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
  15         * memory.c: Use unaligned core access functions for all memory
  16         reads and writes.
  17         * simulator.c (HALT_NYI): Generate an error message if tracing
  18         will not tell the user why the simulator is halting.
  19         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
  20         (INSTR): New time-saver macro.
  21         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
  22         offset.
  23         (fldrh_abs): New function.  Likewise for 16-bit values.
  24         (do_vec_SSHL): Allow for negative shift values.
  25         (do_vec_USHL): Likewise.
  26         (do_vec_SHL): Correct computation of shift amount.
  27         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
  28         shifts and computation of shift value.
  29         (clz): New function.  Counts leading zero bits.
  30         (do_vec_CLZ): New function.  Implements CLZ (vector).
  31         (do_vec_MOV_element): Call do_vec_CLZ.
  32         (dexSimpleFPCondCompare): Implement.
  33         (do_FCVT_half_to_single): New function.  Implements one of the
  34         FCVT operations.
  35         (do_FCVT_half_to_double): New function.  Likewise.
  36         (do_FCVT_single_to_half): New function.  Likewise.
  37         (do_FCVT_double_to_half): New function.  Likewise.
  38         (dexSimpleFPDataProc1Source): Call new FCVT functions.
  39         (do_scalar_SHL): Handle negative shifts.
  40         (do_scalar_shift): Handle SSHR.
  41         (do_scalar_USHL): New function.
  42         (do_double_add): Simplify to just performing a double precision
  43         add operation.  Move remaining code into...
  44         (do_scalar_vec): ... New function.
  45         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
  46         functions.
  47         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
  48         registers.
  49         (system_set): New function.
  50         (do_MSR_immediate): New function.  Stub for now.
  51         (do_MSR_reg): New function.  Likewise. Partially implements MSR
  52         instruction.
  53         (do_SYS): New function.  Stub for now,
  54         (dexSystem): Call new functions.
  55
  56 2016-03-18  Nick Clifton  <nickc@redhat.com>
  57
  58         * cpustate.c: Remove spurious spaces from TRACE strings.
  59         Print hex equivalents of floats and doubles.
  60         Check element number against array size when accessing vector
  61         registers.
  62         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
  63         element index.
  64         (SET_VEC_ELEMENT): Likewise.
  65         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
  66
  67         * memory.c: Trace memory reads when --trace-memory is enabled.
  68         Remove float and double load and store functions.
  69         * memory.h (aarch64_get_mem_float): Delete prototype.
  70         (aarch64_get_mem_double): Likewise.
  71         (aarch64_set_mem_float): Likewise.
  72         (aarch64_set_mem_double): Likewise.
  73         * simulator (IS_SET): Always return either 0 or 1.
  74         (IS_CLEAR): Likewise.
  75         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
  76         and doubles using 64-bit memory accesses.
  77         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
  78         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
  79         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
  80         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
  81         (store_pair_double, load_pair_float, load_pair_double): Likewise.
  82         (do_vec_MUL_by_element): New function.
  83         (do_vec_op2): Call do_vec_MUL_by_element.
  84         (do_scalar_NEG): New function.
  85         (do_double_add): Call do_scalar_NEG.
  86
  87 2016-03-03  Nick Clifton  <nickc@redhat.com>
  88
  89         * simulator.c (set_flags_for_sub32): Correct type of signbit.
  90         (CondCompare): Swap interpretation of bit 30.
  91         (DO_ADDP): Delete macro.
  92         (do_vec_ADDP): Copy source registers before starting to update
  93         destination register.
  94         (do_vec_FADDP): Likewise.
  95         (do_vec_load_store): Fix computation of sizeof_operation.
  96         (rbit64): Fix type of constant.
  97         (aarch64_step): When displaying insn value, display all 32 bits.
  98
  99 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * config.in, configure: Regenerate.
 102
 103 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 104
 105         * configure: Regenerate.
 106
 107 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 110         * configure: Regenerate.
 111
 112 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 113
 114         * configure: Regenerate.
 115
 116 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * configure: Regenerate.
 119
 120 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 121
 122         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 123         * configure: Regenerate.
 124
 125 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 126
 127         * configure: Regenerate.
 128
 129 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 130
 131         * configure: Regenerate.
 132
 133 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 134
 135         * config.in, configure: Regenerate.
 136
 137 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 138
 139         * interp.c (sim_create_inferior): Mark argv and env const.
 140         (sim_open): Mark argv const.
 141
 142 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 143
 144         * interp.c: Delete dis-asm.h include.
 145         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 146         (sim_create_inferior): Delete disassemble init logic.
 147         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 148         (sim_open): Delete sim_add_option_table call.
 149         * memory.c (mem_error): Delete disas check.
 150         * simulator.c: Delete dis-asm.h include.
 151         (disas): Delete.
 152         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 153         (HALT_NYI): Likewise.
 154         (handle_halt): Delete disas call.
 155         (aarch64_step): Replace disas logic with TRACE_DISASM.
 156         * simulator.h: Delete dis-asm.h include.
 157         (aarch64_print_insn): Delete.
 158
 159 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 160
 161         * simulator.c (MAX, MIN): Delete.
 162         (do_vec_maxv): Change MAX to max and MIN to min.
 163         (do_vec_fminmaxV): Likewise.
 164
 165 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 166
 167         * simulator.c: Remove syscall.h include.
 168
 169 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 170
 171         * configure: Regenerate.
 172
 173 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 174
 175         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 176         * configure: Regenerate.
 177
 178 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * configure: Regenerate.
 181
 182 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 183
 184         * interp.c (sim_dis_read): Change private_data to application_data.
 185         (sim_create_inferior): Likewise.
 186
 187 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 190
 191 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 192
 193         * config.in, configure: Regenerate.
 194
 195 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 196
 197         * interp.c (sim_create_inferior): Update comment and argv check.
 198
 199 2015-12-14  Nick Clifton  <nickc@redhat.com>
 200
 201         * simulator.c (system_get): New function.  Provides read
 202         access to the dczid system register.
 203         (do_mrs): New function - implements the MRS instruction.
 204         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 205         unimplemented system instructions.
 206
 207 2015-11-24  Nick Clifton  <nickc@redhat.com>
 208
 209         * configure.ac: New configure template.
 210         * aclocal.m4: Generate.
 211         * config.in: Generate.
 212         * configure: Generate.
 213         * cpustate.c: New file - functions for accessing AArch64 registers.
 214         * cpustate.h: New header.
 215         * decode.h: New header.
 216         * interp.c: New file - interface between GDB and simulator.
 217         * Makefile.in: New makefile template.
 218         * memory.c: New file - functions for simulating aarch64 memory
 219         accesses.
 220         * memory.h: New header.
 221         * sim-main.h: New header.
 222         * simulator.c: New file - aarch64 simulator functions.
 223         * simulator.h: New header.