sim/aarch64/ChangeLog

   1 2016-03-30  Nick Clifton  <nickc@redhat.com>
   2
   3         * cpustate.c (aarch64_set_reg_s32): New function.
   4         (aarch64_set_reg_u32): New function.
   5         (aarch64_get_FP_half): Place half precision value into the correct
   6         slot of the union.
   7         (aarch64_set_FP_half): Likewise.
   8         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
   9         aarch64_set_reg_u32.
  10         * memory.c (FETCH_FUNC): Cast the read value to the access type
  11         before converting it to the return type.  Rename to FETCH_FUNC64.
  12         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
  13         accesses.  Use for 32-bit memory access functions.
  14         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
  15         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
  16         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
  17         (ldrsh_scale_ext, ldrsw_abs): Likewise.
  18         (ldrh32_abs): Store 32 bit value not 64-bits.
  19         (ldrh32_wb, ldrh32_scale_ext): Likewise.
  20         (do_vec_MOV_immediate): Fix computation of val.
  21         (do_vec_MVNI): Likewise.
  22         (DO_VEC_WIDENING_MUL): New macro.
  23         (do_vec_mull): Use new macro.
  24         (do_vec_mul): Use new macro.
  25         (do_vec_MLA): Read values before writing.
  26         (do_vec_xtl): Likewise.
  27         (do_vec_SSHL): Select correct shift value.
  28         (do_vec_USHL): Likewise.
  29         (do_scalar_UCVTF): New function.
  30         (do_scalar_vec): Call new function.
  31         (store_pair_u64): Treat reads of SP as reads of XZR.
  32
  33 2016-03-29  Nick Clifton  <nickc@redhat.com>
  34
  35         * cpustate.c: Remove space after asterisk in function parameters.
  36         * decode.h (greg): Delete unused function.
  37         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
  38         * simulator.c: Use INSTR macro in more places.
  39         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
  40         Remove extraneous whitespace.
  41
  42 2016-03-23  Nick Clifton  <nickc@redhat.com>
  43
  44         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
  45         register as a half precision floating point number.
  46         (aarch64_set_FP_half): New function.  Similar, but for setting
  47         a half precision register.
  48         (aarch64_get_thread_id): New function.  Returns the value of the
  49         CPU's TPIDR register.
  50         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
  51         floating point control register.
  52         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
  53         register.
  54         * cpustate.h: Add prototypes for new functions.
  55         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
  56         * memory.c: Use unaligned core access functions for all memory
  57         reads and writes.
  58         * simulator.c (HALT_NYI): Generate an error message if tracing
  59         will not tell the user why the simulator is halting.
  60         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
  61         (INSTR): New time-saver macro.
  62         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
  63         offset.
  64         (fldrh_abs): New function.  Likewise for 16-bit values.
  65         (do_vec_SSHL): Allow for negative shift values.
  66         (do_vec_USHL): Likewise.
  67         (do_vec_SHL): Correct computation of shift amount.
  68         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
  69         shifts and computation of shift value.
  70         (clz): New function.  Counts leading zero bits.
  71         (do_vec_CLZ): New function.  Implements CLZ (vector).
  72         (do_vec_MOV_element): Call do_vec_CLZ.
  73         (dexSimpleFPCondCompare): Implement.
  74         (do_FCVT_half_to_single): New function.  Implements one of the
  75         FCVT operations.
  76         (do_FCVT_half_to_double): New function.  Likewise.
  77         (do_FCVT_single_to_half): New function.  Likewise.
  78         (do_FCVT_double_to_half): New function.  Likewise.
  79         (dexSimpleFPDataProc1Source): Call new FCVT functions.
  80         (do_scalar_SHL): Handle negative shifts.
  81         (do_scalar_shift): Handle SSHR.
  82         (do_scalar_USHL): New function.
  83         (do_double_add): Simplify to just performing a double precision
  84         add operation.  Move remaining code into...
  85         (do_scalar_vec): ... New function.
  86         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
  87         functions.
  88         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
  89         registers.
  90         (system_set): New function.
  91         (do_MSR_immediate): New function.  Stub for now.
  92         (do_MSR_reg): New function.  Likewise. Partially implements MSR
  93         instruction.
  94         (do_SYS): New function.  Stub for now,
  95         (dexSystem): Call new functions.
  96
  97 2016-03-18  Nick Clifton  <nickc@redhat.com>
  98
  99         * cpustate.c: Remove spurious spaces from TRACE strings.
 100         Print hex equivalents of floats and doubles.
 101         Check element number against array size when accessing vector
 102         registers.
 103         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 104         element index.
 105         (SET_VEC_ELEMENT): Likewise.
 106         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 107
 108         * memory.c: Trace memory reads when --trace-memory is enabled.
 109         Remove float and double load and store functions.
 110         * memory.h (aarch64_get_mem_float): Delete prototype.
 111         (aarch64_get_mem_double): Likewise.
 112         (aarch64_set_mem_float): Likewise.
 113         (aarch64_set_mem_double): Likewise.
 114         * simulator (IS_SET): Always return either 0 or 1.
 115         (IS_CLEAR): Likewise.
 116         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 117         and doubles using 64-bit memory accesses.
 118         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 119         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 120         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 121         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 122         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 123         (do_vec_MUL_by_element): New function.
 124         (do_vec_op2): Call do_vec_MUL_by_element.
 125         (do_scalar_NEG): New function.
 126         (do_double_add): Call do_scalar_NEG.
 127
 128 2016-03-03  Nick Clifton  <nickc@redhat.com>
 129
 130         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 131         (CondCompare): Swap interpretation of bit 30.
 132         (DO_ADDP): Delete macro.
 133         (do_vec_ADDP): Copy source registers before starting to update
 134         destination register.
 135         (do_vec_FADDP): Likewise.
 136         (do_vec_load_store): Fix computation of sizeof_operation.
 137         (rbit64): Fix type of constant.
 138         (aarch64_step): When displaying insn value, display all 32 bits.
 139
 140 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 141
 142         * config.in, configure: Regenerate.
 143
 144 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 145
 146         * configure: Regenerate.
 147
 148 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 149
 150         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 151         * configure: Regenerate.
 152
 153 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 154
 155         * configure: Regenerate.
 156
 157 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 158
 159         * configure: Regenerate.
 160
 161 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 162
 163         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 164         * configure: Regenerate.
 165
 166 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * configure: Regenerate.
 169
 170 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * configure: Regenerate.
 173
 174 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 175
 176         * config.in, configure: Regenerate.
 177
 178 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * interp.c (sim_create_inferior): Mark argv and env const.
 181         (sim_open): Mark argv const.
 182
 183 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 184
 185         * interp.c: Delete dis-asm.h include.
 186         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 187         (sim_create_inferior): Delete disassemble init logic.
 188         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 189         (sim_open): Delete sim_add_option_table call.
 190         * memory.c (mem_error): Delete disas check.
 191         * simulator.c: Delete dis-asm.h include.
 192         (disas): Delete.
 193         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 194         (HALT_NYI): Likewise.
 195         (handle_halt): Delete disas call.
 196         (aarch64_step): Replace disas logic with TRACE_DISASM.
 197         * simulator.h: Delete dis-asm.h include.
 198         (aarch64_print_insn): Delete.
 199
 200 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 201
 202         * simulator.c (MAX, MIN): Delete.
 203         (do_vec_maxv): Change MAX to max and MIN to min.
 204         (do_vec_fminmaxV): Likewise.
 205
 206 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 207
 208         * simulator.c: Remove syscall.h include.
 209
 210 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 211
 212         * configure: Regenerate.
 213
 214 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 215
 216         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 217         * configure: Regenerate.
 218
 219 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 220
 221         * configure: Regenerate.
 222
 223 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 224
 225         * interp.c (sim_dis_read): Change private_data to application_data.
 226         (sim_create_inferior): Likewise.
 227
 228 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 229
 230         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 231
 232 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 233
 234         * config.in, configure: Regenerate.
 235
 236 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 237
 238         * interp.c (sim_create_inferior): Update comment and argv check.
 239
 240 2015-12-14  Nick Clifton  <nickc@redhat.com>
 241
 242         * simulator.c (system_get): New function.  Provides read
 243         access to the dczid system register.
 244         (do_mrs): New function - implements the MRS instruction.
 245         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 246         unimplemented system instructions.
 247
 248 2015-11-24  Nick Clifton  <nickc@redhat.com>
 249
 250         * configure.ac: New configure template.
 251         * aclocal.m4: Generate.
 252         * config.in: Generate.
 253         * configure: Generate.
 254         * cpustate.c: New file - functions for accessing AArch64 registers.
 255         * cpustate.h: New header.
 256         * decode.h: New header.
 257         * interp.c: New file - interface between GDB and simulator.
 258         * Makefile.in: New makefile template.
 259         * memory.c: New file - functions for simulating aarch64 memory
 260         accesses.
 261         * memory.h: New header.
 262         * sim-main.h: New header.
 263         * simulator.c: New file - aarch64 simulator functions.
 264         * simulator.h: New header.