sim/aarch64/ChangeLog

   1 2017-01-04  Jim Wilson  <jim.wilson@linaro.org>
   2
   3         * cpustate.c: Include math.h.
   4         (aarch64_set_FP_float): Use signbit to check for signed zero.
   5         (aarch64_set_FP_double): Likewise.
   6         * simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
   7         (do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
   8         args same size as third arg.
   9         (fmaxnm): Use isnan instead of fpclassify.
  10         (fminnm, dmaxnm, dminnm): Likewise.
  11         (do_vec_MLS): Reverse order of subtraction operands.
  12         (dexSimpleFPCondSelect): Call aarch64_get_FP_double or
  13         aarch64_get_FP_float to get source register contents.
  14         (UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
  15         DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
  16         DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
  17         (do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
  18         raise_exception calls.
  19
  20 2016-12-21  Jim Wilson  <jim.wilson@linaro.org>
  21
  22         * simulator.c (set_flags_for_float_compare): Add code to handle Inf.
  23         Add comment to document NaN issue.
  24         (set_flags_for_double_compare): Likewise.
  25
  26 2016-12-13  Jim Wilson  <jim.wilson@linaro.org>
  27
  28         * simulator.c (NEG, POS): Move before set_flags_for_add64.
  29         (set_flags_for_add64): Replace with a modified copy of
  30         set_flags_for_sub64.
  31
  32 2016-12-03  Jim Wilson  <jim.wilson@linaro.org>
  33
  34         * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
  35         (dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
  36
  37 2016-12-01  Jim Wilson  <jim.wilson@linaro.org>
  38
  39         * simulator.c (fsturs): Switch use of rn and st variables.
  40         (fsturd, fsturq): Likewise
  41
  42 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * interp.c: Include bfd.h.
  45         (symcount, symtab, aarch64_get_sym_value): Delete.
  46         (remove_useless_symbols): Change count type to long.
  47         (aarch64_get_func): Add SIM_DESC to arg list.  Add symcount
  48         and symtab local variables.
  49         (sim_create_inferior): Delete storage.  Replace symbol code
  50         with a call to trace_load_symbols.
  51         * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h
  52         includes.
  53         (aarch64_get_heap_start): Change aarch64_get_sym_value to
  54         trace_sym_value.
  55         * memory.h: Delete bfd.h include.
  56         (mem_add_blk): Delete unused prototype.
  57         * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func.
  58         * simulator.c (aarch64_get_func): Add SIM_DESC to arg list.
  59         (aarch64_get_sym_value): Delete.
  60
  61 2016-08-12  Nick Clifton  <nickc@redhat.com>
  62
  63         * simulator.c (aarch64_step): Revert pervious delta.
  64         (aarch64_run): Call sim_events_tick after each
  65         instruction is simulated, and if necessary call
  66         sim_events_process.
  67         * simulator.h: Revert previous delta.
  68
  69 2016-08-11  Nick Clifton  <nickc@redhat.com>
  70
  71         * interp.c (sim_create_inferior): Allow for being called with a
  72         NULL abfd parameter.  If a bfd is provided, initialise the sim
  73         with that start address.
  74         * simulator.c (HALT_NYI): Just print out the numeric value of the
  75         instruction when not tracing.
  76         (aarch64_step): Change from static to global.
  77         * simulator.h: Add a prototype for aarch64_step().
  78
  79 2016-07-27  Alan Modra  <amodra@gmail.com>
  80
  81         * memory.c: Don't include libbfd.h.
  82
  83 2016-07-21  Nick Clifton  <nickc@redhat.com>
  84
  85         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
  86
  87 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
  88
  89         * cpustate.h: Include config.h.
  90         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
  91         use anonymous structs to align members.
  92         * simulator.c (aarch64_step): Use sim_core_read_buffer and
  93         endian_le2h_4 to read instruction from pc.
  94
  95 2016-05-06  Nick Clifton  <nickc@redhat.com>
  96
  97         * simulator.c (do_FMLA_by_element): New function.
  98         (do_vec_op2): Call it.
  99
 100 2016-04-27  Nick Clifton  <nickc@redhat.com>
 101
 102         * simulator.c: Add TRACE_DECODE statements to all emulation
 103         functions.
 104
 105 2016-03-30  Nick Clifton  <nickc@redhat.com>
 106
 107         * cpustate.c (aarch64_set_reg_s32): New function.
 108         (aarch64_set_reg_u32): New function.
 109         (aarch64_get_FP_half): Place half precision value into the correct
 110         slot of the union.
 111         (aarch64_set_FP_half): Likewise.
 112         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
 113         aarch64_set_reg_u32.
 114         * memory.c (FETCH_FUNC): Cast the read value to the access type
 115         before converting it to the return type.  Rename to FETCH_FUNC64.
 116         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
 117         accesses.  Use for 32-bit memory access functions.
 118         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
 119         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
 120         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
 121         (ldrsh_scale_ext, ldrsw_abs): Likewise.
 122         (ldrh32_abs): Store 32 bit value not 64-bits.
 123         (ldrh32_wb, ldrh32_scale_ext): Likewise.
 124         (do_vec_MOV_immediate): Fix computation of val.
 125         (do_vec_MVNI): Likewise.
 126         (DO_VEC_WIDENING_MUL): New macro.
 127         (do_vec_mull): Use new macro.
 128         (do_vec_mul): Use new macro.
 129         (do_vec_MLA): Read values before writing.
 130         (do_vec_xtl): Likewise.
 131         (do_vec_SSHL): Select correct shift value.
 132         (do_vec_USHL): Likewise.
 133         (do_scalar_UCVTF): New function.
 134         (do_scalar_vec): Call new function.
 135         (store_pair_u64): Treat reads of SP as reads of XZR.
 136
 137 2016-03-29  Nick Clifton  <nickc@redhat.com>
 138
 139         * cpustate.c: Remove space after asterisk in function parameters.
 140         * decode.h (greg): Delete unused function.
 141         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
 142         * simulator.c: Use INSTR macro in more places.
 143         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
 144         Remove extraneous whitespace.
 145
 146 2016-03-23  Nick Clifton  <nickc@redhat.com>
 147
 148         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
 149         register as a half precision floating point number.
 150         (aarch64_set_FP_half): New function.  Similar, but for setting
 151         a half precision register.
 152         (aarch64_get_thread_id): New function.  Returns the value of the
 153         CPU's TPIDR register.
 154         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
 155         floating point control register.
 156         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
 157         register.
 158         * cpustate.h: Add prototypes for new functions.
 159         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
 160         * memory.c: Use unaligned core access functions for all memory
 161         reads and writes.
 162         * simulator.c (HALT_NYI): Generate an error message if tracing
 163         will not tell the user why the simulator is halting.
 164         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
 165         (INSTR): New time-saver macro.
 166         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
 167         offset.
 168         (fldrh_abs): New function.  Likewise for 16-bit values.
 169         (do_vec_SSHL): Allow for negative shift values.
 170         (do_vec_USHL): Likewise.
 171         (do_vec_SHL): Correct computation of shift amount.
 172         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 173         shifts and computation of shift value.
 174         (clz): New function.  Counts leading zero bits.
 175         (do_vec_CLZ): New function.  Implements CLZ (vector).
 176         (do_vec_MOV_element): Call do_vec_CLZ.
 177         (dexSimpleFPCondCompare): Implement.
 178         (do_FCVT_half_to_single): New function.  Implements one of the
 179         FCVT operations.
 180         (do_FCVT_half_to_double): New function.  Likewise.
 181         (do_FCVT_single_to_half): New function.  Likewise.
 182         (do_FCVT_double_to_half): New function.  Likewise.
 183         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 184         (do_scalar_SHL): Handle negative shifts.
 185         (do_scalar_shift): Handle SSHR.
 186         (do_scalar_USHL): New function.
 187         (do_double_add): Simplify to just performing a double precision
 188         add operation.  Move remaining code into...
 189         (do_scalar_vec): ... New function.
 190         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 191         functions.
 192         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 193         registers.
 194         (system_set): New function.
 195         (do_MSR_immediate): New function.  Stub for now.
 196         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 197         instruction.
 198         (do_SYS): New function.  Stub for now,
 199         (dexSystem): Call new functions.
 200
 201 2016-03-18  Nick Clifton  <nickc@redhat.com>
 202
 203         * cpustate.c: Remove spurious spaces from TRACE strings.
 204         Print hex equivalents of floats and doubles.
 205         Check element number against array size when accessing vector
 206         registers.
 207         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 208         element index.
 209         (SET_VEC_ELEMENT): Likewise.
 210         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 211
 212         * memory.c: Trace memory reads when --trace-memory is enabled.
 213         Remove float and double load and store functions.
 214         * memory.h (aarch64_get_mem_float): Delete prototype.
 215         (aarch64_get_mem_double): Likewise.
 216         (aarch64_set_mem_float): Likewise.
 217         (aarch64_set_mem_double): Likewise.
 218         * simulator (IS_SET): Always return either 0 or 1.
 219         (IS_CLEAR): Likewise.
 220         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 221         and doubles using 64-bit memory accesses.
 222         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 223         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 224         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 225         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 226         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 227         (do_vec_MUL_by_element): New function.
 228         (do_vec_op2): Call do_vec_MUL_by_element.
 229         (do_scalar_NEG): New function.
 230         (do_double_add): Call do_scalar_NEG.
 231
 232 2016-03-03  Nick Clifton  <nickc@redhat.com>
 233
 234         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 235         (CondCompare): Swap interpretation of bit 30.
 236         (DO_ADDP): Delete macro.
 237         (do_vec_ADDP): Copy source registers before starting to update
 238         destination register.
 239         (do_vec_FADDP): Likewise.
 240         (do_vec_load_store): Fix computation of sizeof_operation.
 241         (rbit64): Fix type of constant.
 242         (aarch64_step): When displaying insn value, display all 32 bits.
 243
 244 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 245
 246         * config.in, configure: Regenerate.
 247
 248 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 249
 250         * configure: Regenerate.
 251
 252 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 253
 254         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 255         * configure: Regenerate.
 256
 257 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * configure: Regenerate.
 260
 261 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 262
 263         * configure: Regenerate.
 264
 265 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 266
 267         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 268         * configure: Regenerate.
 269
 270 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 271
 272         * configure: Regenerate.
 273
 274 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 275
 276         * configure: Regenerate.
 277
 278 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 279
 280         * config.in, configure: Regenerate.
 281
 282 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 283
 284         * interp.c (sim_create_inferior): Mark argv and env const.
 285         (sim_open): Mark argv const.
 286
 287 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 288
 289         * interp.c: Delete dis-asm.h include.
 290         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 291         (sim_create_inferior): Delete disassemble init logic.
 292         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 293         (sim_open): Delete sim_add_option_table call.
 294         * memory.c (mem_error): Delete disas check.
 295         * simulator.c: Delete dis-asm.h include.
 296         (disas): Delete.
 297         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 298         (HALT_NYI): Likewise.
 299         (handle_halt): Delete disas call.
 300         (aarch64_step): Replace disas logic with TRACE_DISASM.
 301         * simulator.h: Delete dis-asm.h include.
 302         (aarch64_print_insn): Delete.
 303
 304 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 305
 306         * simulator.c (MAX, MIN): Delete.
 307         (do_vec_maxv): Change MAX to max and MIN to min.
 308         (do_vec_fminmaxV): Likewise.
 309
 310 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 311
 312         * simulator.c: Remove syscall.h include.
 313
 314 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 315
 316         * configure: Regenerate.
 317
 318 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 319
 320         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 321         * configure: Regenerate.
 322
 323 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 324
 325         * configure: Regenerate.
 326
 327 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 328
 329         * interp.c (sim_dis_read): Change private_data to application_data.
 330         (sim_create_inferior): Likewise.
 331
 332 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 333
 334         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 335
 336 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 337
 338         * config.in, configure: Regenerate.
 339
 340 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 341
 342         * interp.c (sim_create_inferior): Update comment and argv check.
 343
 344 2015-12-14  Nick Clifton  <nickc@redhat.com>
 345
 346         * simulator.c (system_get): New function.  Provides read
 347         access to the dczid system register.
 348         (do_mrs): New function - implements the MRS instruction.
 349         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 350         unimplemented system instructions.
 351
 352 2015-11-24  Nick Clifton  <nickc@redhat.com>
 353
 354         * configure.ac: New configure template.
 355         * aclocal.m4: Generate.
 356         * config.in: Generate.
 357         * configure: Generate.
 358         * cpustate.c: New file - functions for accessing AArch64 registers.
 359         * cpustate.h: New header.
 360         * decode.h: New header.
 361         * interp.c: New file - interface between GDB and simulator.
 362         * Makefile.in: New makefile template.
 363         * memory.c: New file - functions for simulating aarch64 memory
 364         accesses.
 365         * memory.h: New header.
 366         * sim-main.h: New header.
 367         * simulator.c: New file - aarch64 simulator functions.
 368         * simulator.h: New header.