1 2016-03-29 Nick Clifton <nickc@redhat.com>
3 * cpustate.c: Remove space after asterisk in function parameters.
4 * decode.h (greg): Delete unused function.
5 (vreg, shift, extension, scaling, writeback, condcode): Likewise.
6 * simulator.c: Use INSTR macro in more places.
7 (HALT_NYI): Use sim_io_eprintf in place of fprintf.
8 Remove extraneous whitespace.
10 2016-03-23 Nick Clifton <nickc@redhat.com>
12 * cpustate.c (aarch64_get_FP_half): New function. Read a vector
13 register as a half precision floating point number.
14 (aarch64_set_FP_half): New function. Similar, but for setting
15 a half precision register.
16 (aarch64_get_thread_id): New function. Returns the value of the
18 (aarch64_get_FPCR): New function. Returns the value of the CPU's
19 floating point control register.
20 (aarch64_set_FPCR): New function. Set the value of the CPU's FPCR
22 * cpustate.h: Add prototypes for new functions.
23 * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
24 * memory.c: Use unaligned core access functions for all memory
26 * simulator.c (HALT_NYI): Generate an error message if tracing
27 will not tell the user why the simulator is halting.
28 (HALT_UNREACHABLE): Delete. Delete (unneeded) uses of the macro.
29 (INSTR): New time-saver macro.
30 (fldrb_abs): New function. Loads an 8-bit value using a scaled
32 (fldrh_abs): New function. Likewise for 16-bit values.
33 (do_vec_SSHL): Allow for negative shift values.
34 (do_vec_USHL): Likewise.
35 (do_vec_SHL): Correct computation of shift amount.
36 (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
37 shifts and computation of shift value.
38 (clz): New function. Counts leading zero bits.
39 (do_vec_CLZ): New function. Implements CLZ (vector).
40 (do_vec_MOV_element): Call do_vec_CLZ.
41 (dexSimpleFPCondCompare): Implement.
42 (do_FCVT_half_to_single): New function. Implements one of the
44 (do_FCVT_half_to_double): New function. Likewise.
45 (do_FCVT_single_to_half): New function. Likewise.
46 (do_FCVT_double_to_half): New function. Likewise.
47 (dexSimpleFPDataProc1Source): Call new FCVT functions.
48 (do_scalar_SHL): Handle negative shifts.
49 (do_scalar_shift): Handle SSHR.
50 (do_scalar_USHL): New function.
51 (do_double_add): Simplify to just performing a double precision
52 add operation. Move remaining code into...
53 (do_scalar_vec): ... New function.
54 (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
56 (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
58 (system_set): New function.
59 (do_MSR_immediate): New function. Stub for now.
60 (do_MSR_reg): New function. Likewise. Partially implements MSR
62 (do_SYS): New function. Stub for now,
63 (dexSystem): Call new functions.
65 2016-03-18 Nick Clifton <nickc@redhat.com>
67 * cpustate.c: Remove spurious spaces from TRACE strings.
68 Print hex equivalents of floats and doubles.
69 Check element number against array size when accessing vector
71 (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
73 (SET_VEC_ELEMENT): Likewise.
74 (GET_VEC_ELEMENT): And fix thinko using macro arguments.
76 * memory.c: Trace memory reads when --trace-memory is enabled.
77 Remove float and double load and store functions.
78 * memory.h (aarch64_get_mem_float): Delete prototype.
79 (aarch64_get_mem_double): Likewise.
80 (aarch64_set_mem_float): Likewise.
81 (aarch64_set_mem_double): Likewise.
82 * simulator (IS_SET): Always return either 0 or 1.
84 (fldrs_pcrel): Load and store floats using 32-bit memory accesses
85 and doubles using 64-bit memory accesses.
86 (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
87 (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
88 (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
89 (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
90 (store_pair_double, load_pair_float, load_pair_double): Likewise.
91 (do_vec_MUL_by_element): New function.
92 (do_vec_op2): Call do_vec_MUL_by_element.
93 (do_scalar_NEG): New function.
94 (do_double_add): Call do_scalar_NEG.
96 2016-03-03 Nick Clifton <nickc@redhat.com>
98 * simulator.c (set_flags_for_sub32): Correct type of signbit.
99 (CondCompare): Swap interpretation of bit 30.
100 (DO_ADDP): Delete macro.
101 (do_vec_ADDP): Copy source registers before starting to update
102 destination register.
103 (do_vec_FADDP): Likewise.
104 (do_vec_load_store): Fix computation of sizeof_operation.
105 (rbit64): Fix type of constant.
106 (aarch64_step): When displaying insn value, display all 32 bits.
108 2016-01-10 Mike Frysinger <vapier@gentoo.org>
110 * config.in, configure: Regenerate.
112 2016-01-10 Mike Frysinger <vapier@gentoo.org>
114 * configure: Regenerate.
116 2016-01-10 Mike Frysinger <vapier@gentoo.org>
118 * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
119 * configure: Regenerate.
121 2016-01-10 Mike Frysinger <vapier@gentoo.org>
123 * configure: Regenerate.
125 2016-01-10 Mike Frysinger <vapier@gentoo.org>
127 * configure: Regenerate.
129 2016-01-10 Mike Frysinger <vapier@gentoo.org>
131 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
132 * configure: Regenerate.
134 2016-01-10 Mike Frysinger <vapier@gentoo.org>
136 * configure: Regenerate.
138 2016-01-10 Mike Frysinger <vapier@gentoo.org>
140 * configure: Regenerate.
142 2016-01-09 Mike Frysinger <vapier@gentoo.org>
144 * config.in, configure: Regenerate.
146 2016-01-06 Mike Frysinger <vapier@gentoo.org>
148 * interp.c (sim_create_inferior): Mark argv and env const.
149 (sim_open): Mark argv const.
151 2016-01-05 Mike Frysinger <vapier@gentoo.org>
153 * interp.c: Delete dis-asm.h include.
154 (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
155 (sim_create_inferior): Delete disassemble init logic.
156 (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
157 (sim_open): Delete sim_add_option_table call.
158 * memory.c (mem_error): Delete disas check.
159 * simulator.c: Delete dis-asm.h include.
161 (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
162 (HALT_NYI): Likewise.
163 (handle_halt): Delete disas call.
164 (aarch64_step): Replace disas logic with TRACE_DISASM.
165 * simulator.h: Delete dis-asm.h include.
166 (aarch64_print_insn): Delete.
168 2016-01-04 Mike Frysinger <vapier@gentoo.org>
170 * simulator.c (MAX, MIN): Delete.
171 (do_vec_maxv): Change MAX to max and MIN to min.
172 (do_vec_fminmaxV): Likewise.
174 2016-01-04 Tristan Gingold <gingold@adacore.com>
176 * simulator.c: Remove syscall.h include.
178 2016-01-04 Mike Frysinger <vapier@gentoo.org>
180 * configure: Regenerate.
182 2016-01-03 Mike Frysinger <vapier@gentoo.org>
184 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
185 * configure: Regenerate.
187 2016-01-02 Mike Frysinger <vapier@gentoo.org>
189 * configure: Regenerate.
191 2015-12-27 Mike Frysinger <vapier@gentoo.org>
193 * interp.c (sim_dis_read): Change private_data to application_data.
194 (sim_create_inferior): Likewise.
196 2015-12-27 Mike Frysinger <vapier@gentoo.org>
198 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
200 2015-12-26 Mike Frysinger <vapier@gentoo.org>
202 * config.in, configure: Regenerate.
204 2015-12-26 Mike Frysinger <vapier@gentoo.org>
206 * interp.c (sim_create_inferior): Update comment and argv check.
208 2015-12-14 Nick Clifton <nickc@redhat.com>
210 * simulator.c (system_get): New function. Provides read
211 access to the dczid system register.
212 (do_mrs): New function - implements the MRS instruction.
213 (dexSystem): Call do_mrs for the MRS instruction. Halt on
214 unimplemented system instructions.
216 2015-11-24 Nick Clifton <nickc@redhat.com>
218 * configure.ac: New configure template.
219 * aclocal.m4: Generate.
220 * config.in: Generate.
221 * configure: Generate.
222 * cpustate.c: New file - functions for accessing AArch64 registers.
223 * cpustate.h: New header.
224 * decode.h: New header.
225 * interp.c: New file - interface between GDB and simulator.
226 * Makefile.in: New makefile template.
227 * memory.c: New file - functions for simulating aarch64 memory
229 * memory.h: New header.
230 * sim-main.h: New header.
231 * simulator.c: New file - aarch64 simulator functions.
232 * simulator.h: New header.