4ad5c5f07aed6fe0903c2d1bdec07933b8670fe6
1 /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
29 typedef char *VoidStar
;
32 typedef unsigned long ARMword
; /* must be 32 bits wide */
33 typedef unsigned long long ARMdword
; /* Must be at least 64 bits wide. */
34 typedef struct ARMul_State ARMul_State
;
36 typedef unsigned ARMul_CPInits (ARMul_State
* state
);
37 typedef unsigned ARMul_CPExits (ARMul_State
* state
);
38 typedef unsigned ARMul_LDCs (ARMul_State
* state
, unsigned type
,
39 ARMword instr
, ARMword value
);
40 typedef unsigned ARMul_STCs (ARMul_State
* state
, unsigned type
,
41 ARMword instr
, ARMword
* value
);
42 typedef unsigned ARMul_MRCs (ARMul_State
* state
, unsigned type
,
43 ARMword instr
, ARMword
* value
);
44 typedef unsigned ARMul_MCRs (ARMul_State
* state
, unsigned type
,
45 ARMword instr
, ARMword value
);
46 typedef unsigned ARMul_CDPs (ARMul_State
* state
, unsigned type
,
48 typedef unsigned ARMul_CPReads (ARMul_State
* state
, unsigned reg
,
50 typedef unsigned ARMul_CPWrites (ARMul_State
* state
, unsigned reg
,
55 ARMword Emulate
; /* to start and stop emulation */
56 unsigned EndCondition
; /* reason for stopping */
57 unsigned ErrorCode
; /* type of illegal instruction */
58 ARMword Reg
[16]; /* the current register file */
59 ARMword RegBank
[7][16]; /* all the registers */
60 /* 40 bit accumulator. We always keep this 64 bits wide,
61 and move only 40 bits out of it in an MRA insn. */
63 ARMword Cpsr
; /* the current psr */
64 ARMword Spsr
[7]; /* the exception psr's */
65 ARMword NFlag
, ZFlag
, CFlag
, VFlag
, IFFlags
; /* dummy flags for speed */
68 ARMword TFlag
; /* Thumb state */
70 ARMword Bank
; /* the current register bank */
71 ARMword Mode
; /* the current mode */
72 ARMword instr
, pc
, temp
; /* saved register state */
73 ARMword loaded
, decoded
; /* saved pipeline state */
74 unsigned long NumScycles
, NumNcycles
, NumIcycles
, NumCcycles
, NumFcycles
; /* emulated cycles used */
75 unsigned long NumInstrs
; /* the number of instructions executed */
77 unsigned VectorCatch
; /* caught exception mask */
78 unsigned CallDebug
; /* set to call the debugger */
79 unsigned CanWatch
; /* set by memory interface if its willing to suffer the
80 overhead of checking for watchpoints on each memory
82 unsigned MemReadDebug
, MemWriteDebug
;
83 unsigned long StopHandle
;
85 unsigned char *MemDataPtr
; /* admin data */
86 unsigned char *MemInPtr
; /* the Data In bus */
87 unsigned char *MemOutPtr
; /* the Data Out bus (which you may not need */
88 unsigned char *MemSparePtr
; /* extra space */
91 unsigned char *OSptr
; /* OS Handle */
92 char *CommandLine
; /* Command Line from ARMsd */
94 ARMul_CPInits
*CPInit
[16]; /* coprocessor initialisers */
95 ARMul_CPExits
*CPExit
[16]; /* coprocessor finalisers */
96 ARMul_LDCs
*LDC
[16]; /* LDC instruction */
97 ARMul_STCs
*STC
[16]; /* STC instruction */
98 ARMul_MRCs
*MRC
[16]; /* MRC instruction */
99 ARMul_MCRs
*MCR
[16]; /* MCR instruction */
100 ARMul_CDPs
*CDP
[16]; /* CDP instruction */
101 ARMul_CPReads
*CPRead
[16]; /* Read CP register */
102 ARMul_CPWrites
*CPWrite
[16]; /* Write CP register */
103 unsigned char *CPData
[16]; /* Coprocessor data */
104 unsigned char const *CPRegWords
[16]; /* map of coprocessor register sizes */
106 unsigned EventSet
; /* the number of events in the queue */
107 unsigned long Now
; /* time to the nearest cycle */
108 struct EventNode
**EventPtr
; /* the event list */
110 unsigned Exception
; /* enable the next four values */
111 unsigned Debug
; /* show instructions as they are executed */
112 unsigned NresetSig
; /* reset the processor */
122 ARMword Vector
; /* synthesize aborts in cycle modes */
123 ARMword Aborted
; /* sticky flag for aborts */
124 ARMword Reseted
; /* sticky flag for Reset */
125 ARMword Inted
, LastInted
; /* sticky flags for interrupts */
126 ARMword Base
; /* extra hand for base writeback */
127 ARMword AbortAddr
; /* to keep track of Prefetch aborts */
129 const struct Dbg_HostosInterface
*hostif
;
131 unsigned is_v4
; /* Are we emulating a v4 architecture (or higher) ? */
132 unsigned is_v5
; /* Are we emulating a v5 architecture ? */
133 unsigned is_v5e
; /* Are we emulating a v5e architecture ? */
134 unsigned is_XScale
; /* Are we emulating an XScale architecture ? */
135 unsigned verbose
; /* Print various messages like the banner */
138 #define ResetPin NresetSig
139 #define FIQPin NfiqSig
140 #define IRQPin NirqSig
141 #define AbortPin abortSig
142 #define TransPin NtransSig
143 #define BigEndPin bigendSig
144 #define Prog32Pin prog32Sig
145 #define Data32Pin data32Sig
146 #define LateAbortPin lateabtSig
148 /***************************************************************************\
149 * Properties of ARM we know about *
150 \***************************************************************************/
153 #define ARM_Fix26_Prop 0x01
154 #define ARM_Nexec_Prop 0x02
155 #define ARM_Debug_Prop 0x10
156 #define ARM_Isync_Prop ARM_Debug_Prop
157 #define ARM_Lock_Prop 0x20
158 #define ARM_v4_Prop 0x40
159 #define ARM_v5_Prop 0x80
160 #define ARM_v5e_Prop 0x100
161 #define ARM_XScale_Prop 0x200
163 /***************************************************************************\
164 * Macros to extract instruction fields *
165 \***************************************************************************/
167 #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
168 #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
169 #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
171 /***************************************************************************\
172 * The hardware vector addresses *
173 \***************************************************************************/
176 #define ARMUndefinedInstrV 4L
178 #define ARMPrefetchAbortV 12L
179 #define ARMDataAbortV 16L
180 #define ARMAddrExceptnV 20L
183 #define ARMErrorV 32L /* This is an offset, not an address ! */
185 #define ARMul_ResetV ARMResetV
186 #define ARMul_UndefinedInstrV ARMUndefinedInstrV
187 #define ARMul_SWIV ARMSWIV
188 #define ARMul_PrefetchAbortV ARMPrefetchAbortV
189 #define ARMul_DataAbortV ARMDataAbortV
190 #define ARMul_AddrExceptnV ARMAddrExceptnV
191 #define ARMul_IRQV ARMIRQV
192 #define ARMul_FIQV ARMFIQV
194 /***************************************************************************\
195 * Mode and Bank Constants *
196 \***************************************************************************/
198 #define USER26MODE 0L
202 #define USER32MODE 16L
203 #define FIQ32MODE 17L
204 #define IRQ32MODE 18L
205 #define SVC32MODE 19L
206 #define ABORT32MODE 23L
207 #define UNDEF32MODE 27L
208 #define SYSTEMMODE 31L
210 #define ARM32BITMODE (state->Mode > 3)
211 #define ARM26BITMODE (state->Mode <= 3)
212 #define ARMMODE (state->Mode)
213 #define ARMul_MODEBITS 0x1fL
214 #define ARMul_MODE32BIT ARM32BITMODE
215 #define ARMul_MODE26BIT ARM26BITMODE
224 #define SYSTEMBANK USERBANK
226 #define BANK_CAN_ACCESS_SPSR(bank) \
227 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
229 /***************************************************************************\
230 * Definitons of things in the emulator *
231 \***************************************************************************/
233 extern void ARMul_EmulateInit (void);
234 extern ARMul_State
*ARMul_NewState (void);
235 extern void ARMul_Reset (ARMul_State
* state
);
236 extern ARMword
ARMul_DoProg (ARMul_State
* state
);
237 extern ARMword
ARMul_DoInstr (ARMul_State
* state
);
239 /***************************************************************************\
240 * Definitons of things for event handling *
241 \***************************************************************************/
243 extern void ARMul_ScheduleEvent (ARMul_State
* state
, unsigned long delay
,
244 unsigned (*func
) ());
245 extern void ARMul_EnvokeEvent (ARMul_State
* state
);
246 extern unsigned long ARMul_Time (ARMul_State
* state
);
248 /***************************************************************************\
249 * Useful support routines *
250 \***************************************************************************/
252 extern ARMword
ARMul_GetReg (ARMul_State
* state
, unsigned mode
,
254 extern void ARMul_SetReg (ARMul_State
* state
, unsigned mode
, unsigned reg
,
256 extern ARMword
ARMul_GetPC (ARMul_State
* state
);
257 extern ARMword
ARMul_GetNextPC (ARMul_State
* state
);
258 extern void ARMul_SetPC (ARMul_State
* state
, ARMword value
);
259 extern ARMword
ARMul_GetR15 (ARMul_State
* state
);
260 extern void ARMul_SetR15 (ARMul_State
* state
, ARMword value
);
262 extern ARMword
ARMul_GetCPSR (ARMul_State
* state
);
263 extern void ARMul_SetCPSR (ARMul_State
* state
, ARMword value
);
264 extern ARMword
ARMul_GetSPSR (ARMul_State
* state
, ARMword mode
);
265 extern void ARMul_SetSPSR (ARMul_State
* state
, ARMword mode
, ARMword value
);
267 /***************************************************************************\
268 * Definitons of things to handle aborts *
269 \***************************************************************************/
271 extern void ARMul_Abort (ARMul_State
* state
, ARMword address
);
272 #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
273 #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
274 state->AbortAddr = (address & ~3L)
275 #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
276 state->Aborted = ARMul_DataAbortV ;
277 #define ARMul_CLEARABORT state->abortSig = LOW
279 /***************************************************************************\
280 * Definitons of things in the memory interface *
281 \***************************************************************************/
283 extern unsigned ARMul_MemoryInit (ARMul_State
* state
,
284 unsigned long initmemsize
);
285 extern void ARMul_MemoryExit (ARMul_State
* state
);
287 extern ARMword
ARMul_LoadInstrS (ARMul_State
* state
, ARMword address
,
289 extern ARMword
ARMul_LoadInstrN (ARMul_State
* state
, ARMword address
,
291 extern ARMword
ARMul_ReLoadInstr (ARMul_State
* state
, ARMword address
,
294 extern ARMword
ARMul_LoadWordS (ARMul_State
* state
, ARMword address
);
295 extern ARMword
ARMul_LoadWordN (ARMul_State
* state
, ARMword address
);
296 extern ARMword
ARMul_LoadHalfWord (ARMul_State
* state
, ARMword address
);
297 extern ARMword
ARMul_LoadByte (ARMul_State
* state
, ARMword address
);
299 extern void ARMul_StoreWordS (ARMul_State
* state
, ARMword address
,
301 extern void ARMul_StoreWordN (ARMul_State
* state
, ARMword address
,
303 extern void ARMul_StoreHalfWord (ARMul_State
* state
, ARMword address
,
305 extern void ARMul_StoreByte (ARMul_State
* state
, ARMword address
,
308 extern ARMword
ARMul_SwapWord (ARMul_State
* state
, ARMword address
,
310 extern ARMword
ARMul_SwapByte (ARMul_State
* state
, ARMword address
,
313 extern void ARMul_Icycles (ARMul_State
* state
, unsigned number
,
315 extern void ARMul_Ccycles (ARMul_State
* state
, unsigned number
,
318 extern ARMword
ARMul_ReadWord (ARMul_State
* state
, ARMword address
);
319 extern ARMword
ARMul_ReadByte (ARMul_State
* state
, ARMword address
);
320 extern ARMword
ARMul_SafeReadByte (ARMul_State
* state
, ARMword address
);
321 extern void ARMul_WriteWord (ARMul_State
* state
, ARMword address
,
323 extern void ARMul_WriteByte (ARMul_State
* state
, ARMword address
,
325 extern void ARMul_SafeWriteByte (ARMul_State
* state
, ARMword address
,
328 extern ARMword
ARMul_MemAccess (ARMul_State
* state
, ARMword
, ARMword
,
329 ARMword
, ARMword
, ARMword
, ARMword
, ARMword
,
330 ARMword
, ARMword
, ARMword
);
332 /***************************************************************************\
333 * Definitons of things in the co-processor interface *
334 \***************************************************************************/
336 #define ARMul_FIRST 0
337 #define ARMul_TRANSFER 1
340 #define ARMul_INTERRUPT 4
345 extern unsigned ARMul_CoProInit (ARMul_State
* state
);
346 extern void ARMul_CoProExit (ARMul_State
* state
);
347 extern void ARMul_CoProAttach (ARMul_State
* state
, unsigned number
,
348 ARMul_CPInits
* init
, ARMul_CPExits
* exit
,
349 ARMul_LDCs
* ldc
, ARMul_STCs
* stc
,
350 ARMul_MRCs
* mrc
, ARMul_MCRs
* mcr
,
352 ARMul_CPReads
* read
, ARMul_CPWrites
* write
);
353 extern void ARMul_CoProDetach (ARMul_State
* state
, unsigned number
);
355 /***************************************************************************\
356 * Definitons of things in the host environment *
357 \***************************************************************************/
359 extern unsigned ARMul_OSInit (ARMul_State
* state
);
360 extern void ARMul_OSExit (ARMul_State
* state
);
361 extern unsigned ARMul_OSHandleSWI (ARMul_State
* state
, ARMword number
);
362 extern ARMword
ARMul_OSLastErrorP (ARMul_State
* state
);
364 extern ARMword
ARMul_Debug (ARMul_State
* state
, ARMword pc
, ARMword instr
);
365 extern unsigned ARMul_OSException (ARMul_State
* state
, ARMword vector
,
369 /***************************************************************************\
370 * Host-dependent stuff *
371 \***************************************************************************/
374 pascal void SpinCursor (short increment
); /* copied from CursorCtl.h */
375 # define HOURGLASS SpinCursor( 1 )
376 # define HOURGLASS_RATE 1023 /* 2^n - 1 */
379 extern void ARMul_UndefInstr (ARMul_State
*, ARMword
);
380 extern void ARMul_FixCPSR (ARMul_State
*, ARMword
, ARMword
);
381 extern void ARMul_FixSPSR (ARMul_State
*, ARMword
, ARMword
);
382 extern void ARMul_ConsolePrint (ARMul_State
*, const char *, ...);
383 extern void ARMul_SelectProcessor (ARMul_State
*, unsigned);
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