e2d2d95134c6f005737715f2d838cd3146b83ca6
1 /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
29 typedef char *VoidStar
;
32 typedef unsigned long ARMword
; /* must be 32 bits wide */
33 typedef unsigned long long ARMdword
; /* Must be at least 64 bits wide. */
34 typedef struct ARMul_State ARMul_State
;
36 typedef unsigned ARMul_CPInits (ARMul_State
* state
);
37 typedef unsigned ARMul_CPExits (ARMul_State
* state
);
38 typedef unsigned ARMul_LDCs (ARMul_State
* state
, unsigned type
,
39 ARMword instr
, ARMword value
);
40 typedef unsigned ARMul_STCs (ARMul_State
* state
, unsigned type
,
41 ARMword instr
, ARMword
* value
);
42 typedef unsigned ARMul_MRCs (ARMul_State
* state
, unsigned type
,
43 ARMword instr
, ARMword
* value
);
44 typedef unsigned ARMul_MCRs (ARMul_State
* state
, unsigned type
,
45 ARMword instr
, ARMword value
);
46 typedef unsigned ARMul_CDPs (ARMul_State
* state
, unsigned type
,
48 typedef unsigned ARMul_CPReads (ARMul_State
* state
, unsigned reg
,
50 typedef unsigned ARMul_CPWrites (ARMul_State
* state
, unsigned reg
,
55 ARMword Emulate
; /* to start and stop emulation */
56 unsigned EndCondition
; /* reason for stopping */
57 unsigned ErrorCode
; /* type of illegal instruction */
58 ARMword Reg
[16]; /* the current register file */
59 ARMword RegBank
[7][16]; /* all the registers */
60 /* 40 bit accumulator. We always keep this 64 bits wide,
61 and move only 40 bits out of it in an MRA insn. */
63 ARMword Cpsr
; /* the current psr */
64 ARMword Spsr
[7]; /* the exception psr's */
65 ARMword NFlag
, ZFlag
, CFlag
, VFlag
, IFFlags
; /* dummy flags for speed */
68 ARMword TFlag
; /* Thumb state */
70 ARMword Bank
; /* the current register bank */
71 ARMword Mode
; /* the current mode */
72 ARMword instr
, pc
, temp
; /* saved register state */
73 ARMword loaded
, decoded
; /* saved pipeline state */
74 unsigned long NumScycles
, NumNcycles
, NumIcycles
, NumCcycles
, NumFcycles
; /* emulated cycles used */
75 unsigned long NumInstrs
; /* the number of instructions executed */
77 unsigned VectorCatch
; /* caught exception mask */
78 unsigned CallDebug
; /* set to call the debugger */
79 unsigned CanWatch
; /* set by memory interface if its willing to suffer the
80 overhead of checking for watchpoints on each memory
82 unsigned MemReadDebug
, MemWriteDebug
;
83 unsigned long StopHandle
;
85 unsigned char *MemDataPtr
; /* admin data */
86 unsigned char *MemInPtr
; /* the Data In bus */
87 unsigned char *MemOutPtr
; /* the Data Out bus (which you may not need */
88 unsigned char *MemSparePtr
; /* extra space */
91 unsigned char *OSptr
; /* OS Handle */
92 char *CommandLine
; /* Command Line from ARMsd */
94 ARMul_CPInits
*CPInit
[16]; /* coprocessor initialisers */
95 ARMul_CPExits
*CPExit
[16]; /* coprocessor finalisers */
96 ARMul_LDCs
*LDC
[16]; /* LDC instruction */
97 ARMul_STCs
*STC
[16]; /* STC instruction */
98 ARMul_MRCs
*MRC
[16]; /* MRC instruction */
99 ARMul_MCRs
*MCR
[16]; /* MCR instruction */
100 ARMul_CDPs
*CDP
[16]; /* CDP instruction */
101 ARMul_CPReads
*CPRead
[16]; /* Read CP register */
102 ARMul_CPWrites
*CPWrite
[16]; /* Write CP register */
103 unsigned char *CPData
[16]; /* Coprocessor data */
104 unsigned char const *CPRegWords
[16]; /* map of coprocessor register sizes */
105 unsigned long LastTime
; /* Value of last call to ARMul_Time() */
106 ARMword CP14R0_CCD
; /* used to count 64 clock cycles with CP14 R0 bit
109 unsigned EventSet
; /* the number of events in the queue */
110 unsigned long Now
; /* time to the nearest cycle */
111 struct EventNode
**EventPtr
; /* the event list */
113 unsigned Exception
; /* enable the next four values */
114 unsigned Debug
; /* show instructions as they are executed */
115 unsigned NresetSig
; /* reset the processor */
125 ARMword Vector
; /* synthesize aborts in cycle modes */
126 ARMword Aborted
; /* sticky flag for aborts */
127 ARMword Reseted
; /* sticky flag for Reset */
128 ARMword Inted
, LastInted
; /* sticky flags for interrupts */
129 ARMword Base
; /* extra hand for base writeback */
130 ARMword AbortAddr
; /* to keep track of Prefetch aborts */
132 const struct Dbg_HostosInterface
*hostif
;
134 unsigned is_v4
; /* Are we emulating a v4 architecture (or higher) ? */
135 unsigned is_v5
; /* Are we emulating a v5 architecture ? */
136 unsigned is_v5e
; /* Are we emulating a v5e architecture ? */
137 unsigned is_v6
; /* Are we emulating a v6 architecture ? */
138 unsigned is_XScale
; /* Are we emulating an XScale architecture ? */
139 unsigned is_iWMMXt
; /* Are we emulating an iWMMXt co-processor ? */
140 unsigned is_ep9312
; /* Are we emulating a Cirrus Maverick co-processor ? */
141 unsigned verbose
; /* Print various messages like the banner */
144 #define ResetPin NresetSig
145 #define FIQPin NfiqSig
146 #define IRQPin NirqSig
147 #define AbortPin abortSig
148 #define TransPin NtransSig
149 #define BigEndPin bigendSig
150 #define Prog32Pin prog32Sig
151 #define Data32Pin data32Sig
152 #define LateAbortPin lateabtSig
154 /***************************************************************************\
155 * Properties of ARM we know about *
156 \***************************************************************************/
159 #define ARM_Fix26_Prop 0x01
160 #define ARM_Nexec_Prop 0x02
161 #define ARM_Debug_Prop 0x10
162 #define ARM_Isync_Prop ARM_Debug_Prop
163 #define ARM_Lock_Prop 0x20
164 #define ARM_v4_Prop 0x40
165 #define ARM_v5_Prop 0x80
166 #define ARM_v5e_Prop 0x100
167 #define ARM_XScale_Prop 0x200
168 #define ARM_ep9312_Prop 0x400
169 #define ARM_iWMMXt_Prop 0x800
170 #define ARM_v6_Prop 0x1000
172 /***************************************************************************\
173 * Macros to extract instruction fields *
174 \***************************************************************************/
176 #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
177 #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
178 #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
180 /***************************************************************************\
181 * The hardware vector addresses *
182 \***************************************************************************/
185 #define ARMUndefinedInstrV 4L
187 #define ARMPrefetchAbortV 12L
188 #define ARMDataAbortV 16L
189 #define ARMAddrExceptnV 20L
192 #define ARMErrorV 32L /* This is an offset, not an address ! */
194 #define ARMul_ResetV ARMResetV
195 #define ARMul_UndefinedInstrV ARMUndefinedInstrV
196 #define ARMul_SWIV ARMSWIV
197 #define ARMul_PrefetchAbortV ARMPrefetchAbortV
198 #define ARMul_DataAbortV ARMDataAbortV
199 #define ARMul_AddrExceptnV ARMAddrExceptnV
200 #define ARMul_IRQV ARMIRQV
201 #define ARMul_FIQV ARMFIQV
203 /***************************************************************************\
204 * Mode and Bank Constants *
205 \***************************************************************************/
207 #define USER26MODE 0L
211 #define USER32MODE 16L
212 #define FIQ32MODE 17L
213 #define IRQ32MODE 18L
214 #define SVC32MODE 19L
215 #define ABORT32MODE 23L
216 #define UNDEF32MODE 27L
217 #define SYSTEMMODE 31L
219 #define ARM32BITMODE (state->Mode > 3)
220 #define ARM26BITMODE (state->Mode <= 3)
221 #define ARMMODE (state->Mode)
222 #define ARMul_MODEBITS 0x1fL
223 #define ARMul_MODE32BIT ARM32BITMODE
224 #define ARMul_MODE26BIT ARM26BITMODE
233 #define SYSTEMBANK USERBANK
235 #define BANK_CAN_ACCESS_SPSR(bank) \
236 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
238 /***************************************************************************\
239 * Definitons of things in the emulator *
240 \***************************************************************************/
242 extern void ARMul_EmulateInit (void);
243 extern ARMul_State
*ARMul_NewState (void);
244 extern void ARMul_Reset (ARMul_State
* state
);
245 extern ARMword
ARMul_DoProg (ARMul_State
* state
);
246 extern ARMword
ARMul_DoInstr (ARMul_State
* state
);
248 /***************************************************************************\
249 * Definitons of things for event handling *
250 \***************************************************************************/
252 extern void ARMul_ScheduleEvent (ARMul_State
* state
, unsigned long delay
,
253 unsigned (*func
) ());
254 extern void ARMul_EnvokeEvent (ARMul_State
* state
);
255 extern unsigned long ARMul_Time (ARMul_State
* state
);
257 /***************************************************************************\
258 * Useful support routines *
259 \***************************************************************************/
261 extern ARMword
ARMul_GetReg (ARMul_State
* state
, unsigned mode
,
263 extern void ARMul_SetReg (ARMul_State
* state
, unsigned mode
, unsigned reg
,
265 extern ARMword
ARMul_GetPC (ARMul_State
* state
);
266 extern ARMword
ARMul_GetNextPC (ARMul_State
* state
);
267 extern void ARMul_SetPC (ARMul_State
* state
, ARMword value
);
268 extern ARMword
ARMul_GetR15 (ARMul_State
* state
);
269 extern void ARMul_SetR15 (ARMul_State
* state
, ARMword value
);
271 extern ARMword
ARMul_GetCPSR (ARMul_State
* state
);
272 extern void ARMul_SetCPSR (ARMul_State
* state
, ARMword value
);
273 extern ARMword
ARMul_GetSPSR (ARMul_State
* state
, ARMword mode
);
274 extern void ARMul_SetSPSR (ARMul_State
* state
, ARMword mode
, ARMword value
);
276 /***************************************************************************\
277 * Definitons of things to handle aborts *
278 \***************************************************************************/
280 extern void ARMul_Abort (ARMul_State
* state
, ARMword address
);
281 #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
282 #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
283 state->AbortAddr = (address & ~3L)
284 #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
285 state->Aborted = ARMul_DataAbortV ;
286 #define ARMul_CLEARABORT state->abortSig = LOW
288 /***************************************************************************\
289 * Definitons of things in the memory interface *
290 \***************************************************************************/
292 extern unsigned ARMul_MemoryInit (ARMul_State
* state
,
293 unsigned long initmemsize
);
294 extern void ARMul_MemoryExit (ARMul_State
* state
);
296 extern ARMword
ARMul_LoadInstrS (ARMul_State
* state
, ARMword address
,
298 extern ARMword
ARMul_LoadInstrN (ARMul_State
* state
, ARMword address
,
300 extern ARMword
ARMul_ReLoadInstr (ARMul_State
* state
, ARMword address
,
303 extern ARMword
ARMul_LoadWordS (ARMul_State
* state
, ARMword address
);
304 extern ARMword
ARMul_LoadWordN (ARMul_State
* state
, ARMword address
);
305 extern ARMword
ARMul_LoadHalfWord (ARMul_State
* state
, ARMword address
);
306 extern ARMword
ARMul_LoadByte (ARMul_State
* state
, ARMword address
);
308 extern void ARMul_StoreWordS (ARMul_State
* state
, ARMword address
,
310 extern void ARMul_StoreWordN (ARMul_State
* state
, ARMword address
,
312 extern void ARMul_StoreHalfWord (ARMul_State
* state
, ARMword address
,
314 extern void ARMul_StoreByte (ARMul_State
* state
, ARMword address
,
317 extern ARMword
ARMul_SwapWord (ARMul_State
* state
, ARMword address
,
319 extern ARMword
ARMul_SwapByte (ARMul_State
* state
, ARMword address
,
322 extern void ARMul_Icycles (ARMul_State
* state
, unsigned number
,
324 extern void ARMul_Ccycles (ARMul_State
* state
, unsigned number
,
327 extern ARMword
ARMul_ReadWord (ARMul_State
* state
, ARMword address
);
328 extern ARMword
ARMul_ReadByte (ARMul_State
* state
, ARMword address
);
329 extern ARMword
ARMul_SafeReadByte (ARMul_State
* state
, ARMword address
);
330 extern void ARMul_WriteWord (ARMul_State
* state
, ARMword address
,
332 extern void ARMul_WriteByte (ARMul_State
* state
, ARMword address
,
334 extern void ARMul_SafeWriteByte (ARMul_State
* state
, ARMword address
,
337 extern ARMword
ARMul_MemAccess (ARMul_State
* state
, ARMword
, ARMword
,
338 ARMword
, ARMword
, ARMword
, ARMword
, ARMword
,
339 ARMword
, ARMword
, ARMword
);
341 /***************************************************************************\
342 * Definitons of things in the co-processor interface *
343 \***************************************************************************/
345 #define ARMul_FIRST 0
346 #define ARMul_TRANSFER 1
349 #define ARMul_INTERRUPT 4
354 #define ARMul_CP13_R0_FIQ 0x1
355 #define ARMul_CP13_R0_IRQ 0x2
356 #define ARMul_CP13_R8_PMUS 0x1
358 #define ARMul_CP14_R0_ENABLE 0x0001
359 #define ARMul_CP14_R0_CLKRST 0x0004
360 #define ARMul_CP14_R0_CCD 0x0008
361 #define ARMul_CP14_R0_INTEN0 0x0010
362 #define ARMul_CP14_R0_INTEN1 0x0020
363 #define ARMul_CP14_R0_INTEN2 0x0040
364 #define ARMul_CP14_R0_FLAG0 0x0100
365 #define ARMul_CP14_R0_FLAG1 0x0200
366 #define ARMul_CP14_R0_FLAG2 0x0400
367 #define ARMul_CP14_R10_MOE_IB 0x0004
368 #define ARMul_CP14_R10_MOE_DB 0x0008
369 #define ARMul_CP14_R10_MOE_BT 0x000c
370 #define ARMul_CP15_R1_ENDIAN 0x0080
371 #define ARMul_CP15_R1_ALIGN 0x0002
372 #define ARMul_CP15_R5_X 0x0400
373 #define ARMul_CP15_R5_ST_ALIGN 0x0001
374 #define ARMul_CP15_R5_IMPRE 0x0406
375 #define ARMul_CP15_R5_MMU_EXCPT 0x0400
376 #define ARMul_CP15_DBCON_M 0x0100
377 #define ARMul_CP15_DBCON_E1 0x000c
378 #define ARMul_CP15_DBCON_E0 0x0003
380 extern unsigned ARMul_CoProInit (ARMul_State
* state
);
381 extern void ARMul_CoProExit (ARMul_State
* state
);
382 extern void ARMul_CoProAttach (ARMul_State
* state
, unsigned number
,
383 ARMul_CPInits
* init
, ARMul_CPExits
* exit
,
384 ARMul_LDCs
* ldc
, ARMul_STCs
* stc
,
385 ARMul_MRCs
* mrc
, ARMul_MCRs
* mcr
,
387 ARMul_CPReads
* read
, ARMul_CPWrites
* write
);
388 extern void ARMul_CoProDetach (ARMul_State
* state
, unsigned number
);
389 extern void XScale_check_memacc (ARMul_State
* state
, ARMword
* address
,
391 extern void XScale_set_fsr_far (ARMul_State
* state
, ARMword fsr
, ARMword far
);
392 extern int XScale_debug_moe (ARMul_State
* state
, int moe
);
394 /***************************************************************************\
395 * Definitons of things in the host environment *
396 \***************************************************************************/
398 extern unsigned ARMul_OSInit (ARMul_State
* state
);
399 extern void ARMul_OSExit (ARMul_State
* state
);
400 extern unsigned ARMul_OSHandleSWI (ARMul_State
* state
, ARMword number
);
401 extern ARMword
ARMul_OSLastErrorP (ARMul_State
* state
);
403 extern ARMword
ARMul_Debug (ARMul_State
* state
, ARMword pc
, ARMword instr
);
404 extern unsigned ARMul_OSException (ARMul_State
* state
, ARMword vector
,
408 /***************************************************************************\
409 * Host-dependent stuff *
410 \***************************************************************************/
413 pascal void SpinCursor (short increment
); /* copied from CursorCtl.h */
414 # define HOURGLASS SpinCursor( 1 )
415 # define HOURGLASS_RATE 1023 /* 2^n - 1 */
418 extern void ARMul_UndefInstr (ARMul_State
*, ARMword
);
419 extern void ARMul_FixCPSR (ARMul_State
*, ARMword
, ARMword
);
420 extern void ARMul_FixSPSR (ARMul_State
*, ARMword
, ARMword
);
421 extern void ARMul_ConsolePrint (ARMul_State
*, const char *, ...);
422 extern void ARMul_SelectProcessor (ARMul_State
*, unsigned);
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