sim/arm/armdefs.h

   1 /*  armdefs.h -- ARMulator common definitions:  ARM6 Instruction Emulator.
   2     Copyright (C) 1994 Advanced RISC Machines Ltd.
   3
   4     This program is free software; you can redistribute it and/or modify
   5     it under the terms of the GNU General Public License as published by
   6     the Free Software Foundation; either version 2 of the License, or
   7     (at your option) any later version.
   8
   9     This program is distributed in the hope that it will be useful,
  10     but WITHOUT ANY WARRANTY; without even the implied warranty of
  11     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12     GNU General Public License for more details.
  13
  14     You should have received a copy of the GNU General Public License
  15     along with this program; if not, write to the Free Software
  16     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
  17
  18 #include <stdio.h>
  19 #include <stdlib.h>
  20
  21 #define FALSE 0
  22 #define TRUE 1
  23 #define LOW 0
  24 #define HIGH 1
  25 #define LOWHIGH 1
  26 #define HIGHLOW 2
  27
  28 #ifndef __STDC__
  29 typedef char * VoidStar ;
  30 #endif
  31
  32 typedef unsigned long ARMword ; /* must be 32 bits wide */
  33
  34 typedef struct ARMul_State ARMul_State ;
  35
  36 typedef unsigned ARMul_CPInits(ARMul_State *state) ;
  37 typedef unsigned ARMul_CPExits(ARMul_State *state) ;
  38 typedef unsigned ARMul_LDCs(ARMul_State *state,unsigned type,ARMword instr,ARMword value) ;
  39 typedef unsigned ARMul_STCs(ARMul_State *state,unsigned type,ARMword instr,ARMword *value) ;
  40 typedef unsigned ARMul_MRCs(ARMul_State *state,unsigned type,ARMword instr,ARMword *value) ;
  41 typedef unsigned ARMul_MCRs(ARMul_State *state,unsigned type,ARMword instr,ARMword value) ;
  42 typedef unsigned ARMul_CDPs(ARMul_State *state,unsigned type,ARMword instr) ;
  43 typedef unsigned ARMul_CPReads(ARMul_State *state,unsigned reg,ARMword *value) ;
  44 typedef unsigned ARMul_CPWrites(ARMul_State *state,unsigned reg,ARMword value) ;
  45
  46 struct ARMul_State {
  47    ARMword Emulate ; /* to start and stop emulation */
  48    unsigned EndCondition ; /* reason for stopping */
  49    unsigned ErrorCode ; /* type of illegal instruction */
  50    ARMword Reg[16] ; /* the current register file */
  51    ARMword RegBank[7][16] ; /* all the registers */
  52    ARMword Cpsr ; /* the current psr */
  53    ARMword Spsr[7] ; /* the exception psr's */
  54    ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags ; /* dummy flags for speed */
  55 #ifdef MODET
  56    ARMword TFlag ; /* Thumb state */
  57 #endif
  58    ARMword Bank ; /* the current register bank */
  59    ARMword Mode ; /* the current mode */
  60    ARMword instr, pc, temp ; /* saved register state */
  61    ARMword loaded, decoded ; /* saved pipeline state */
  62    unsigned long NumScycles,
  63                  NumNcycles,
  64                  NumIcycles,
  65                  NumCcycles,
  66                  NumFcycles ; /* emulated cycles used */
  67    unsigned long NumInstrs ; /* the number of instructions executed */
  68    unsigned NextInstr ;
  69    unsigned VectorCatch ; /* caught exception mask */
  70    unsigned CallDebug ; /* set to call the debugger */
  71    unsigned CanWatch ; /* set by memory interface if its willing to suffer the
  72                           overhead of checking for watchpoints on each memory
  73                           access */
  74    unsigned MemReadDebug, MemWriteDebug ;
  75    unsigned long StopHandle ;
  76
  77    unsigned char *MemDataPtr ; /* admin data */
  78    unsigned char *MemInPtr ; /* the Data In bus */
  79    unsigned char *MemOutPtr ; /* the Data Out bus (which you may not need */
  80    unsigned char *MemSparePtr ; /* extra space */
  81    ARMword MemSize ;
  82
  83    unsigned char *OSptr ; /* OS Handle */
  84    char *CommandLine ; /* Command Line from ARMsd */
  85
  86    ARMul_CPInits *CPInit[16] ; /* coprocessor initialisers */
  87    ARMul_CPExits *CPExit[16] ; /* coprocessor finalisers */
  88    ARMul_LDCs *LDC[16] ; /* LDC instruction */
  89    ARMul_STCs *STC[16] ; /* STC instruction */
  90    ARMul_MRCs *MRC[16] ; /* MRC instruction */
  91    ARMul_MCRs *MCR[16] ; /* MCR instruction */
  92    ARMul_CDPs *CDP[16] ; /* CDP instruction */
  93    ARMul_CPReads *CPRead[16] ; /* Read CP register */
  94    ARMul_CPWrites *CPWrite[16] ; /* Write CP register */
  95    unsigned char *CPData[16] ; /* Coprocessor data */
  96    unsigned char const *CPRegWords[16] ;  /* map of coprocessor register sizes */
  97
  98    unsigned EventSet ; /* the number of events in the queue */
  99    unsigned long Now ; /* time to the nearest cycle */
 100    struct EventNode **EventPtr ; /* the event list */
 101
 102    unsigned Exception ; /* enable the next four values */
 103    unsigned Debug ; /* show instructions as they are executed */
 104    unsigned NresetSig ; /* reset the processor */
 105    unsigned NfiqSig ;
 106    unsigned NirqSig ;
 107
 108    unsigned abortSig ;
 109    unsigned NtransSig ;
 110    unsigned bigendSig ;
 111    unsigned prog32Sig ;
 112    unsigned data32Sig ;
 113    unsigned lateabtSig ;
 114    ARMword Vector ; /* synthesize aborts in cycle modes */
 115    ARMword Aborted ; /* sticky flag for aborts */
 116    ARMword Reseted ; /* sticky flag for Reset */
 117    ARMword Inted, LastInted ; /* sticky flags for interrupts */
 118    ARMword Base ; /* extra hand for base writeback */
 119    ARMword AbortAddr ; /* to keep track of Prefetch aborts */
 120
 121    const struct Dbg_HostosInterface *hostif;
 122
 123    int verbose; /* non-zero means print various messages like the banner */
 124  } ;
 125
 126 #define ResetPin NresetSig
 127 #define FIQPin NfiqSig
 128 #define IRQPin NirqSig
 129 #define AbortPin abortSig
 130 #define TransPin NtransSig
 131 #define BigEndPin bigendSig
 132 #define Prog32Pin prog32Sig
 133 #define Data32Pin data32Sig
 134 #define LateAbortPin lateabtSig
 135
 136 /***************************************************************************\
 137 *                        Types of ARM we know about                         *
 138 \***************************************************************************/
 139
 140 /* The bitflags */
 141 #define ARM_Fix26_Prop   0x01
 142 #define ARM_Nexec_Prop   0x02
 143 #define ARM_Debug_Prop   0x10
 144 #define ARM_Isync_Prop   ARM_Debug_Prop
 145 #define ARM_Lock_Prop    0x20
 146
 147 /* ARM2 family */
 148 #define ARM2    (ARM_Fix26_Prop)
 149 #define ARM2as  ARM2
 150 #define ARM61   ARM2
 151 #define ARM3    ARM2
 152
 153 #ifdef ARM60    /* previous definition in armopts.h */
 154 #undef ARM60
 155 #endif
 156
 157 /* ARM6 family */
 158 #define ARM6    (ARM_Lock_Prop)
 159 #define ARM60   ARM6
 160 #define ARM600  ARM6
 161 #define ARM610  ARM6
 162 #define ARM620  ARM6
 163
 164
 165 /***************************************************************************\
 166 *                   Macros to extract instruction fields                    *
 167 \***************************************************************************/
 168
 169 #define BIT(n) ( (ARMword)(instr>>(n))&1)   /* bit n of instruction */
 170 #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
 171 #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
 172
 173 /***************************************************************************\
 174 *                      The hardware vector addresses                        *
 175 \***************************************************************************/
 176
 177 #define ARMResetV 0L
 178 #define ARMUndefinedInstrV 4L
 179 #define ARMSWIV 8L
 180 #define ARMPrefetchAbortV 12L
 181 #define ARMDataAbortV 16L
 182 #define ARMAddrExceptnV 20L
 183 #define ARMIRQV 24L
 184 #define ARMFIQV 28L
 185 #define ARMErrorV 32L /* This is an offset, not an address ! */
 186
 187 #define ARMul_ResetV ARMResetV
 188 #define ARMul_UndefinedInstrV ARMUndefinedInstrV
 189 #define ARMul_SWIV ARMSWIV
 190 #define ARMul_PrefetchAbortV ARMPrefetchAbortV
 191 #define ARMul_DataAbortV ARMDataAbortV
 192 #define ARMul_AddrExceptnV ARMAddrExceptnV
 193 #define ARMul_IRQV ARMIRQV
 194 #define ARMul_FIQV ARMFIQV
 195
 196 /***************************************************************************\
 197 *                          Mode and Bank Constants                          *
 198 \***************************************************************************/
 199
 200 #define USER26MODE 0L
 201 #define FIQ26MODE 1L
 202 #define IRQ26MODE 2L
 203 #define SVC26MODE 3L
 204 #define USER32MODE 16L
 205 #define FIQ32MODE 17L
 206 #define IRQ32MODE 18L
 207 #define SVC32MODE 19L
 208 #define ABORT32MODE 23L
 209 #define UNDEF32MODE 27L
 210
 211 #define ARM32BITMODE (state->Mode > 3)
 212 #define ARM26BITMODE (state->Mode <= 3)
 213 #define ARMMODE (state->Mode)
 214 #define ARMul_MODEBITS 0x1fL
 215 #define ARMul_MODE32BIT ARM32BITMODE
 216 #define ARMul_MODE26BIT ARM26BITMODE
 217
 218 #define USERBANK 0
 219 #define FIQBANK 1
 220 #define IRQBANK 2
 221 #define SVCBANK 3
 222 #define ABORTBANK 4
 223 #define UNDEFBANK 5
 224 #define DUMMYBANK 6
 225
 226 /***************************************************************************\
 227 *                  Definitons of things in the emulator                     *
 228 \***************************************************************************/
 229
 230 extern void ARMul_EmulateInit(void) ;
 231 extern ARMul_State *ARMul_NewState(void) ;
 232 extern void ARMul_Reset(ARMul_State *state) ;
 233 extern ARMword ARMul_DoProg(ARMul_State *state) ;
 234 extern ARMword ARMul_DoInstr(ARMul_State *state) ;
 235
 236 /***************************************************************************\
 237 *                Definitons of things for event handling                    *
 238 \***************************************************************************/
 239
 240 extern void ARMul_ScheduleEvent(ARMul_State *state, unsigned long delay, unsigned (*func)() ) ;
 241 extern void ARMul_EnvokeEvent(ARMul_State *state) ;
 242 extern unsigned long ARMul_Time(ARMul_State *state) ;
 243
 244 /***************************************************************************\
 245 *                          Useful support routines                          *
 246 \***************************************************************************/
 247
 248 extern ARMword ARMul_GetReg(ARMul_State *state, unsigned mode, unsigned reg) ;
 249 extern void ARMul_SetReg(ARMul_State *state, unsigned mode, unsigned reg, ARMword value) ;
 250 extern ARMword ARMul_GetPC(ARMul_State *state) ;
 251 extern ARMword ARMul_GetNextPC(ARMul_State *state) ;
 252 extern void ARMul_SetPC(ARMul_State *state, ARMword value) ;
 253 extern ARMword ARMul_GetR15(ARMul_State *state) ;
 254 extern void ARMul_SetR15(ARMul_State *state, ARMword value) ;
 255
 256 extern ARMword ARMul_GetCPSR(ARMul_State *state) ;
 257 extern void ARMul_SetCPSR(ARMul_State *state, ARMword value) ;
 258 extern ARMword ARMul_GetSPSR(ARMul_State *state, ARMword mode) ;
 259 extern void ARMul_SetSPSR(ARMul_State *state, ARMword mode, ARMword value) ;
 260
 261 /***************************************************************************\
 262 *                  Definitons of things to handle aborts                    *
 263 \***************************************************************************/
 264
 265 extern void ARMul_Abort(ARMul_State *state, ARMword address) ;
 266 #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
 267 #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
 268                                         state->AbortAddr = (address & ~3L)
 269 #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
 270                                  state->Aborted = ARMul_DataAbortV ;
 271 #define ARMul_CLEARABORT state->abortSig = LOW
 272
 273 /***************************************************************************\
 274 *              Definitons of things in the memory interface                 *
 275 \***************************************************************************/
 276
 277 extern unsigned ARMul_MemoryInit(ARMul_State *state,unsigned long initmemsize) ;
 278 extern void ARMul_MemoryExit(ARMul_State *state) ;
 279
 280 extern ARMword ARMul_LoadInstrS(ARMul_State *state,ARMword address,ARMword isize) ;
 281 extern ARMword ARMul_LoadInstrN(ARMul_State *state,ARMword address,ARMword isize) ;
 282 extern ARMword ARMul_ReLoadInstr(ARMul_State *state,ARMword address,ARMword isize) ;
 283
 284 extern ARMword ARMul_LoadWordS(ARMul_State *state,ARMword address) ;
 285 extern ARMword ARMul_LoadWordN(ARMul_State *state,ARMword address) ;
 286 extern ARMword ARMul_LoadHalfWord(ARMul_State *state,ARMword address) ;
 287 extern ARMword ARMul_LoadByte(ARMul_State *state,ARMword address) ;
 288
 289 extern void ARMul_StoreWordS(ARMul_State *state,ARMword address, ARMword data) ;
 290 extern void ARMul_StoreWordN(ARMul_State *state,ARMword address, ARMword data) ;
 291 extern void ARMul_StoreHalfWord(ARMul_State *state,ARMword address, ARMword data) ;
 292 extern void ARMul_StoreByte(ARMul_State *state,ARMword address, ARMword data) ;
 293
 294 extern ARMword ARMul_SwapWord(ARMul_State *state,ARMword address, ARMword data) ;
 295 extern ARMword ARMul_SwapByte(ARMul_State *state,ARMword address, ARMword data) ;
 296
 297 extern void ARMul_Icycles(ARMul_State *state,unsigned number, ARMword address) ;
 298 extern void ARMul_Ccycles(ARMul_State *state,unsigned number, ARMword address) ;
 299
 300 extern ARMword ARMul_ReadWord(ARMul_State *state,ARMword address) ;
 301 extern ARMword ARMul_ReadByte(ARMul_State *state,ARMword address) ;
 302 extern void ARMul_WriteWord(ARMul_State *state,ARMword address, ARMword data) ;
 303 extern void ARMul_WriteByte(ARMul_State *state,ARMword address, ARMword data) ;
 304
 305 extern ARMword ARMul_MemAccess(ARMul_State *state,ARMword,ARMword,ARMword,
 306                   ARMword,ARMword,ARMword,ARMword,ARMword,ARMword,ARMword) ;
 307
 308 /***************************************************************************\
 309 *            Definitons of things in the co-processor interface             *
 310 \***************************************************************************/
 311
 312 #define ARMul_FIRST 0
 313 #define ARMul_TRANSFER 1
 314 #define ARMul_BUSY 2
 315 #define ARMul_DATA 3
 316 #define ARMul_INTERRUPT 4
 317 #define ARMul_DONE 0
 318 #define ARMul_CANT 1
 319 #define ARMul_INC 3
 320
 321 extern unsigned ARMul_CoProInit(ARMul_State *state) ;
 322 extern void ARMul_CoProExit(ARMul_State *state) ;
 323 extern void ARMul_CoProAttach(ARMul_State *state, unsigned number,
 324                               ARMul_CPInits *init, ARMul_CPExits *exit,
 325                               ARMul_LDCs *ldc, ARMul_STCs *stc,
 326                               ARMul_MRCs *mrc, ARMul_MCRs *mcr,
 327                               ARMul_CDPs *cdp,
 328                               ARMul_CPReads *read, ARMul_CPWrites *write) ;
 329 extern void ARMul_CoProDetach(ARMul_State *state, unsigned number) ;
 330
 331 /***************************************************************************\
 332 *               Definitons of things in the host environment                *
 333 \***************************************************************************/
 334
 335 extern unsigned ARMul_OSInit(ARMul_State *state) ;
 336 extern void ARMul_OSExit(ARMul_State *state) ;
 337 extern unsigned ARMul_OSHandleSWI(ARMul_State *state,ARMword number) ;
 338 extern ARMword ARMul_OSLastErrorP(ARMul_State *state) ;
 339
 340 extern ARMword ARMul_Debug(ARMul_State *state, ARMword pc, ARMword instr) ;
 341 extern unsigned ARMul_OSException(ARMul_State *state, ARMword vector, ARMword pc) ;
 342 extern int rdi_log ;
 343
 344 /***************************************************************************\
 345 *                            Host-dependent stuff                           *
 346 \***************************************************************************/
 347
 348 #ifdef macintosh
 349 pascal void SpinCursor(short increment);        /* copied from CursorCtl.h */
 350 # define HOURGLASS           SpinCursor( 1 )
 351 # define HOURGLASS_RATE      1023   /* 2^n - 1 */
 352 #endif
 353