1 /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
29 typedef char * VoidStar
;
32 typedef unsigned long ARMword
; /* must be 32 bits wide */
34 typedef struct ARMul_State ARMul_State
;
36 typedef unsigned ARMul_CPInits(ARMul_State
*state
) ;
37 typedef unsigned ARMul_CPExits(ARMul_State
*state
) ;
38 typedef unsigned ARMul_LDCs(ARMul_State
*state
,unsigned type
,ARMword instr
,ARMword value
) ;
39 typedef unsigned ARMul_STCs(ARMul_State
*state
,unsigned type
,ARMword instr
,ARMword
*value
) ;
40 typedef unsigned ARMul_MRCs(ARMul_State
*state
,unsigned type
,ARMword instr
,ARMword
*value
) ;
41 typedef unsigned ARMul_MCRs(ARMul_State
*state
,unsigned type
,ARMword instr
,ARMword value
) ;
42 typedef unsigned ARMul_CDPs(ARMul_State
*state
,unsigned type
,ARMword instr
) ;
43 typedef unsigned ARMul_CPReads(ARMul_State
*state
,unsigned reg
,ARMword
*value
) ;
44 typedef unsigned ARMul_CPWrites(ARMul_State
*state
,unsigned reg
,ARMword value
) ;
47 ARMword Emulate
; /* to start and stop emulation */
48 unsigned EndCondition
; /* reason for stopping */
49 unsigned ErrorCode
; /* type of illegal instruction */
50 ARMword Reg
[16] ; /* the current register file */
51 ARMword RegBank
[7][16] ; /* all the registers */
52 ARMword Cpsr
; /* the current psr */
53 ARMword Spsr
[7] ; /* the exception psr's */
54 ARMword NFlag
, ZFlag
, CFlag
, VFlag
, IFFlags
; /* dummy flags for speed */
56 ARMword TFlag
; /* Thumb state */
58 ARMword Bank
; /* the current register bank */
59 ARMword Mode
; /* the current mode */
60 ARMword instr
, pc
, temp
; /* saved register state */
61 ARMword loaded
, decoded
; /* saved pipeline state */
62 unsigned long NumScycles
,
66 NumFcycles
; /* emulated cycles used */
67 unsigned long NumInstrs
; /* the number of instructions executed */
69 unsigned VectorCatch
; /* caught exception mask */
70 unsigned CallDebug
; /* set to call the debugger */
71 unsigned CanWatch
; /* set by memory interface if its willing to suffer the
72 overhead of checking for watchpoints on each memory
74 unsigned MemReadDebug
, MemWriteDebug
;
75 unsigned long StopHandle
;
77 unsigned char *MemDataPtr
; /* admin data */
78 unsigned char *MemInPtr
; /* the Data In bus */
79 unsigned char *MemOutPtr
; /* the Data Out bus (which you may not need */
80 unsigned char *MemSparePtr
; /* extra space */
83 unsigned char *OSptr
; /* OS Handle */
84 char *CommandLine
; /* Command Line from ARMsd */
86 ARMul_CPInits
*CPInit
[16] ; /* coprocessor initialisers */
87 ARMul_CPExits
*CPExit
[16] ; /* coprocessor finalisers */
88 ARMul_LDCs
*LDC
[16] ; /* LDC instruction */
89 ARMul_STCs
*STC
[16] ; /* STC instruction */
90 ARMul_MRCs
*MRC
[16] ; /* MRC instruction */
91 ARMul_MCRs
*MCR
[16] ; /* MCR instruction */
92 ARMul_CDPs
*CDP
[16] ; /* CDP instruction */
93 ARMul_CPReads
*CPRead
[16] ; /* Read CP register */
94 ARMul_CPWrites
*CPWrite
[16] ; /* Write CP register */
95 unsigned char *CPData
[16] ; /* Coprocessor data */
96 unsigned char const *CPRegWords
[16] ; /* map of coprocessor register sizes */
98 unsigned EventSet
; /* the number of events in the queue */
99 unsigned long Now
; /* time to the nearest cycle */
100 struct EventNode
**EventPtr
; /* the event list */
102 unsigned Exception
; /* enable the next four values */
103 unsigned Debug
; /* show instructions as they are executed */
104 unsigned NresetSig
; /* reset the processor */
113 unsigned lateabtSig
;
114 ARMword Vector
; /* synthesize aborts in cycle modes */
115 ARMword Aborted
; /* sticky flag for aborts */
116 ARMword Reseted
; /* sticky flag for Reset */
117 ARMword Inted
, LastInted
; /* sticky flags for interrupts */
118 ARMword Base
; /* extra hand for base writeback */
119 ARMword AbortAddr
; /* to keep track of Prefetch aborts */
121 const struct Dbg_HostosInterface
*hostif
;
123 int verbose
; /* non-zero means print various messages like the banner */
126 #define ResetPin NresetSig
127 #define FIQPin NfiqSig
128 #define IRQPin NirqSig
129 #define AbortPin abortSig
130 #define TransPin NtransSig
131 #define BigEndPin bigendSig
132 #define Prog32Pin prog32Sig
133 #define Data32Pin data32Sig
134 #define LateAbortPin lateabtSig
136 /***************************************************************************\
137 * Types of ARM we know about *
138 \***************************************************************************/
141 #define ARM_Fix26_Prop 0x01
142 #define ARM_Nexec_Prop 0x02
143 #define ARM_Debug_Prop 0x10
144 #define ARM_Isync_Prop ARM_Debug_Prop
145 #define ARM_Lock_Prop 0x20
148 #define ARM2 (ARM_Fix26_Prop)
153 #ifdef ARM60 /* previous definition in armopts.h */
158 #define ARM6 (ARM_Lock_Prop)
165 /***************************************************************************\
166 * Macros to extract instruction fields *
167 \***************************************************************************/
169 #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
170 #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
171 #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
173 /***************************************************************************\
174 * The hardware vector addresses *
175 \***************************************************************************/
178 #define ARMUndefinedInstrV 4L
180 #define ARMPrefetchAbortV 12L
181 #define ARMDataAbortV 16L
182 #define ARMAddrExceptnV 20L
185 #define ARMErrorV 32L /* This is an offset, not an address ! */
187 #define ARMul_ResetV ARMResetV
188 #define ARMul_UndefinedInstrV ARMUndefinedInstrV
189 #define ARMul_SWIV ARMSWIV
190 #define ARMul_PrefetchAbortV ARMPrefetchAbortV
191 #define ARMul_DataAbortV ARMDataAbortV
192 #define ARMul_AddrExceptnV ARMAddrExceptnV
193 #define ARMul_IRQV ARMIRQV
194 #define ARMul_FIQV ARMFIQV
196 /***************************************************************************\
197 * Mode and Bank Constants *
198 \***************************************************************************/
200 #define USER26MODE 0L
204 #define USER32MODE 16L
205 #define FIQ32MODE 17L
206 #define IRQ32MODE 18L
207 #define SVC32MODE 19L
208 #define ABORT32MODE 23L
209 #define UNDEF32MODE 27L
211 #define ARM32BITMODE (state->Mode > 3)
212 #define ARM26BITMODE (state->Mode <= 3)
213 #define ARMMODE (state->Mode)
214 #define ARMul_MODEBITS 0x1fL
215 #define ARMul_MODE32BIT ARM32BITMODE
216 #define ARMul_MODE26BIT ARM26BITMODE
226 /***************************************************************************\
227 * Definitons of things in the emulator *
228 \***************************************************************************/
230 extern void ARMul_EmulateInit(void) ;
231 extern ARMul_State
*ARMul_NewState(void) ;
232 extern void ARMul_Reset(ARMul_State
*state
) ;
233 extern ARMword
ARMul_DoProg(ARMul_State
*state
) ;
234 extern ARMword
ARMul_DoInstr(ARMul_State
*state
) ;
236 /***************************************************************************\
237 * Definitons of things for event handling *
238 \***************************************************************************/
240 extern void ARMul_ScheduleEvent(ARMul_State
*state
, unsigned long delay
, unsigned (*func
)() ) ;
241 extern void ARMul_EnvokeEvent(ARMul_State
*state
) ;
242 extern unsigned long ARMul_Time(ARMul_State
*state
) ;
244 /***************************************************************************\
245 * Useful support routines *
246 \***************************************************************************/
248 extern ARMword
ARMul_GetReg(ARMul_State
*state
, unsigned mode
, unsigned reg
) ;
249 extern void ARMul_SetReg(ARMul_State
*state
, unsigned mode
, unsigned reg
, ARMword value
) ;
250 extern ARMword
ARMul_GetPC(ARMul_State
*state
) ;
251 extern ARMword
ARMul_GetNextPC(ARMul_State
*state
) ;
252 extern void ARMul_SetPC(ARMul_State
*state
, ARMword value
) ;
253 extern ARMword
ARMul_GetR15(ARMul_State
*state
) ;
254 extern void ARMul_SetR15(ARMul_State
*state
, ARMword value
) ;
256 extern ARMword
ARMul_GetCPSR(ARMul_State
*state
) ;
257 extern void ARMul_SetCPSR(ARMul_State
*state
, ARMword value
) ;
258 extern ARMword
ARMul_GetSPSR(ARMul_State
*state
, ARMword mode
) ;
259 extern void ARMul_SetSPSR(ARMul_State
*state
, ARMword mode
, ARMword value
) ;
261 /***************************************************************************\
262 * Definitons of things to handle aborts *
263 \***************************************************************************/
265 extern void ARMul_Abort(ARMul_State
*state
, ARMword address
) ;
266 #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
267 #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
268 state->AbortAddr = (address & ~3L)
269 #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
270 state->Aborted = ARMul_DataAbortV ;
271 #define ARMul_CLEARABORT state->abortSig = LOW
273 /***************************************************************************\
274 * Definitons of things in the memory interface *
275 \***************************************************************************/
277 extern unsigned ARMul_MemoryInit(ARMul_State
*state
,unsigned long initmemsize
) ;
278 extern void ARMul_MemoryExit(ARMul_State
*state
) ;
280 extern ARMword
ARMul_LoadInstrS(ARMul_State
*state
,ARMword address
,ARMword isize
) ;
281 extern ARMword
ARMul_LoadInstrN(ARMul_State
*state
,ARMword address
,ARMword isize
) ;
282 extern ARMword
ARMul_ReLoadInstr(ARMul_State
*state
,ARMword address
,ARMword isize
) ;
284 extern ARMword
ARMul_LoadWordS(ARMul_State
*state
,ARMword address
) ;
285 extern ARMword
ARMul_LoadWordN(ARMul_State
*state
,ARMword address
) ;
286 extern ARMword
ARMul_LoadHalfWord(ARMul_State
*state
,ARMword address
) ;
287 extern ARMword
ARMul_LoadByte(ARMul_State
*state
,ARMword address
) ;
289 extern void ARMul_StoreWordS(ARMul_State
*state
,ARMword address
, ARMword data
) ;
290 extern void ARMul_StoreWordN(ARMul_State
*state
,ARMword address
, ARMword data
) ;
291 extern void ARMul_StoreHalfWord(ARMul_State
*state
,ARMword address
, ARMword data
) ;
292 extern void ARMul_StoreByte(ARMul_State
*state
,ARMword address
, ARMword data
) ;
294 extern ARMword
ARMul_SwapWord(ARMul_State
*state
,ARMword address
, ARMword data
) ;
295 extern ARMword
ARMul_SwapByte(ARMul_State
*state
,ARMword address
, ARMword data
) ;
297 extern void ARMul_Icycles(ARMul_State
*state
,unsigned number
, ARMword address
) ;
298 extern void ARMul_Ccycles(ARMul_State
*state
,unsigned number
, ARMword address
) ;
300 extern ARMword
ARMul_ReadWord(ARMul_State
*state
,ARMword address
) ;
301 extern ARMword
ARMul_ReadByte(ARMul_State
*state
,ARMword address
) ;
302 extern void ARMul_WriteWord(ARMul_State
*state
,ARMword address
, ARMword data
) ;
303 extern void ARMul_WriteByte(ARMul_State
*state
,ARMword address
, ARMword data
) ;
305 extern ARMword
ARMul_MemAccess(ARMul_State
*state
,ARMword
,ARMword
,ARMword
,
306 ARMword
,ARMword
,ARMword
,ARMword
,ARMword
,ARMword
,ARMword
) ;
308 /***************************************************************************\
309 * Definitons of things in the co-processor interface *
310 \***************************************************************************/
312 #define ARMul_FIRST 0
313 #define ARMul_TRANSFER 1
316 #define ARMul_INTERRUPT 4
321 extern unsigned ARMul_CoProInit(ARMul_State
*state
) ;
322 extern void ARMul_CoProExit(ARMul_State
*state
) ;
323 extern void ARMul_CoProAttach(ARMul_State
*state
, unsigned number
,
324 ARMul_CPInits
*init
, ARMul_CPExits
*exit
,
325 ARMul_LDCs
*ldc
, ARMul_STCs
*stc
,
326 ARMul_MRCs
*mrc
, ARMul_MCRs
*mcr
,
328 ARMul_CPReads
*read
, ARMul_CPWrites
*write
) ;
329 extern void ARMul_CoProDetach(ARMul_State
*state
, unsigned number
) ;
331 /***************************************************************************\
332 * Definitons of things in the host environment *
333 \***************************************************************************/
335 extern unsigned ARMul_OSInit(ARMul_State
*state
) ;
336 extern void ARMul_OSExit(ARMul_State
*state
) ;
337 extern unsigned ARMul_OSHandleSWI(ARMul_State
*state
,ARMword number
) ;
338 extern ARMword
ARMul_OSLastErrorP(ARMul_State
*state
) ;
340 extern ARMword
ARMul_Debug(ARMul_State
*state
, ARMword pc
, ARMword instr
) ;
341 extern unsigned ARMul_OSException(ARMul_State
*state
, ARMword vector
, ARMword pc
) ;
344 /***************************************************************************\
345 * Host-dependent stuff *
346 \***************************************************************************/
349 pascal void SpinCursor(short increment
); /* copied from CursorCtl.h */
350 # define HOURGLASS SpinCursor( 1 )
351 # define HOURGLASS_RATE 1023 /* 2^n - 1 */
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