1 /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
29 typedef char *VoidStar
;
32 typedef unsigned long ARMword
; /* must be 32 bits wide */
33 typedef struct ARMul_State ARMul_State
;
35 typedef unsigned ARMul_CPInits (ARMul_State
* state
);
36 typedef unsigned ARMul_CPExits (ARMul_State
* state
);
37 typedef unsigned ARMul_LDCs (ARMul_State
* state
, unsigned type
,
38 ARMword instr
, ARMword value
);
39 typedef unsigned ARMul_STCs (ARMul_State
* state
, unsigned type
,
40 ARMword instr
, ARMword
* value
);
41 typedef unsigned ARMul_MRCs (ARMul_State
* state
, unsigned type
,
42 ARMword instr
, ARMword
* value
);
43 typedef unsigned ARMul_MCRs (ARMul_State
* state
, unsigned type
,
44 ARMword instr
, ARMword value
);
45 typedef unsigned ARMul_CDPs (ARMul_State
* state
, unsigned type
,
47 typedef unsigned ARMul_CPReads (ARMul_State
* state
, unsigned reg
,
49 typedef unsigned ARMul_CPWrites (ARMul_State
* state
, unsigned reg
,
54 ARMword Emulate
; /* to start and stop emulation */
55 unsigned EndCondition
; /* reason for stopping */
56 unsigned ErrorCode
; /* type of illegal instruction */
57 ARMword Reg
[16]; /* the current register file */
58 ARMword RegBank
[7][16]; /* all the registers */
59 ARMword Cpsr
; /* the current psr */
60 ARMword Spsr
[7]; /* the exception psr's */
61 ARMword NFlag
, ZFlag
, CFlag
, VFlag
, IFFlags
; /* dummy flags for speed */
63 ARMword TFlag
; /* Thumb state */
65 ARMword Bank
; /* the current register bank */
66 ARMword Mode
; /* the current mode */
67 ARMword instr
, pc
, temp
; /* saved register state */
68 ARMword loaded
, decoded
; /* saved pipeline state */
69 unsigned long NumScycles
, NumNcycles
, NumIcycles
, NumCcycles
, NumFcycles
; /* emulated cycles used */
70 unsigned long NumInstrs
; /* the number of instructions executed */
72 unsigned VectorCatch
; /* caught exception mask */
73 unsigned CallDebug
; /* set to call the debugger */
74 unsigned CanWatch
; /* set by memory interface if its willing to suffer the
75 overhead of checking for watchpoints on each memory
77 unsigned MemReadDebug
, MemWriteDebug
;
78 unsigned long StopHandle
;
80 unsigned char *MemDataPtr
; /* admin data */
81 unsigned char *MemInPtr
; /* the Data In bus */
82 unsigned char *MemOutPtr
; /* the Data Out bus (which you may not need */
83 unsigned char *MemSparePtr
; /* extra space */
86 unsigned char *OSptr
; /* OS Handle */
87 char *CommandLine
; /* Command Line from ARMsd */
89 ARMul_CPInits
*CPInit
[16]; /* coprocessor initialisers */
90 ARMul_CPExits
*CPExit
[16]; /* coprocessor finalisers */
91 ARMul_LDCs
*LDC
[16]; /* LDC instruction */
92 ARMul_STCs
*STC
[16]; /* STC instruction */
93 ARMul_MRCs
*MRC
[16]; /* MRC instruction */
94 ARMul_MCRs
*MCR
[16]; /* MCR instruction */
95 ARMul_CDPs
*CDP
[16]; /* CDP instruction */
96 ARMul_CPReads
*CPRead
[16]; /* Read CP register */
97 ARMul_CPWrites
*CPWrite
[16]; /* Write CP register */
98 unsigned char *CPData
[16]; /* Coprocessor data */
99 unsigned char const *CPRegWords
[16]; /* map of coprocessor register sizes */
101 unsigned EventSet
; /* the number of events in the queue */
102 unsigned long Now
; /* time to the nearest cycle */
103 struct EventNode
**EventPtr
; /* the event list */
105 unsigned Exception
; /* enable the next four values */
106 unsigned Debug
; /* show instructions as they are executed */
107 unsigned NresetSig
; /* reset the processor */
117 ARMword Vector
; /* synthesize aborts in cycle modes */
118 ARMword Aborted
; /* sticky flag for aborts */
119 ARMword Reseted
; /* sticky flag for Reset */
120 ARMword Inted
, LastInted
; /* sticky flags for interrupts */
121 ARMword Base
; /* extra hand for base writeback */
122 ARMword AbortAddr
; /* to keep track of Prefetch aborts */
124 const struct Dbg_HostosInterface
*hostif
;
126 unsigned is_StrongARM
; /* Are we emulating a StrongARM? */
128 int verbose
; /* non-zero means print various messages like the banner */
131 #define ResetPin NresetSig
132 #define FIQPin NfiqSig
133 #define IRQPin NirqSig
134 #define AbortPin abortSig
135 #define TransPin NtransSig
136 #define BigEndPin bigendSig
137 #define Prog32Pin prog32Sig
138 #define Data32Pin data32Sig
139 #define LateAbortPin lateabtSig
141 /***************************************************************************\
142 * Types of ARM we know about *
143 \***************************************************************************/
146 #define ARM_Fix26_Prop 0x01
147 #define ARM_Nexec_Prop 0x02
148 #define ARM_Debug_Prop 0x10
149 #define ARM_Isync_Prop ARM_Debug_Prop
150 #define ARM_Lock_Prop 0x20
151 #define ARM_Strong_Prop 0x40
154 #define ARM2 (ARM_Fix26_Prop)
159 #ifdef ARM60 /* previous definition in armopts.h */
164 #define ARM6 (ARM_Lock_Prop)
170 #define STRONGARM (ARM_Strong_Prop)
172 /***************************************************************************\
173 * Macros to extract instruction fields *
174 \***************************************************************************/
176 #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
177 #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
178 #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
180 /***************************************************************************\
181 * The hardware vector addresses *
182 \***************************************************************************/
185 #define ARMUndefinedInstrV 4L
187 #define ARMPrefetchAbortV 12L
188 #define ARMDataAbortV 16L
189 #define ARMAddrExceptnV 20L
192 #define ARMErrorV 32L /* This is an offset, not an address ! */
194 #define ARMul_ResetV ARMResetV
195 #define ARMul_UndefinedInstrV ARMUndefinedInstrV
196 #define ARMul_SWIV ARMSWIV
197 #define ARMul_PrefetchAbortV ARMPrefetchAbortV
198 #define ARMul_DataAbortV ARMDataAbortV
199 #define ARMul_AddrExceptnV ARMAddrExceptnV
200 #define ARMul_IRQV ARMIRQV
201 #define ARMul_FIQV ARMFIQV
203 /***************************************************************************\
204 * Mode and Bank Constants *
205 \***************************************************************************/
207 #define USER26MODE 0L
211 #define USER32MODE 16L
212 #define FIQ32MODE 17L
213 #define IRQ32MODE 18L
214 #define SVC32MODE 19L
215 #define ABORT32MODE 23L
216 #define UNDEF32MODE 27L
217 #define SYSTEMMODE 31L
219 #define ARM32BITMODE (state->Mode > 3)
220 #define ARM26BITMODE (state->Mode <= 3)
221 #define ARMMODE (state->Mode)
222 #define ARMul_MODEBITS 0x1fL
223 #define ARMul_MODE32BIT ARM32BITMODE
224 #define ARMul_MODE26BIT ARM26BITMODE
233 #define SYSTEMBANK USERBANK
235 #define BANK_CAN_ACCESS_SPSR(bank) \
236 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
238 /***************************************************************************\
239 * Definitons of things in the emulator *
240 \***************************************************************************/
242 extern void ARMul_EmulateInit (void);
243 extern ARMul_State
*ARMul_NewState (void);
244 extern void ARMul_Reset (ARMul_State
* state
);
245 extern ARMword
ARMul_DoProg (ARMul_State
* state
);
246 extern ARMword
ARMul_DoInstr (ARMul_State
* state
);
248 /***************************************************************************\
249 * Definitons of things for event handling *
250 \***************************************************************************/
252 extern void ARMul_ScheduleEvent (ARMul_State
* state
, unsigned long delay
,
253 unsigned (*func
) ());
254 extern void ARMul_EnvokeEvent (ARMul_State
* state
);
255 extern unsigned long ARMul_Time (ARMul_State
* state
);
257 /***************************************************************************\
258 * Useful support routines *
259 \***************************************************************************/
261 extern ARMword
ARMul_GetReg (ARMul_State
* state
, unsigned mode
,
263 extern void ARMul_SetReg (ARMul_State
* state
, unsigned mode
, unsigned reg
,
265 extern ARMword
ARMul_GetPC (ARMul_State
* state
);
266 extern ARMword
ARMul_GetNextPC (ARMul_State
* state
);
267 extern void ARMul_SetPC (ARMul_State
* state
, ARMword value
);
268 extern ARMword
ARMul_GetR15 (ARMul_State
* state
);
269 extern void ARMul_SetR15 (ARMul_State
* state
, ARMword value
);
271 extern ARMword
ARMul_GetCPSR (ARMul_State
* state
);
272 extern void ARMul_SetCPSR (ARMul_State
* state
, ARMword value
);
273 extern ARMword
ARMul_GetSPSR (ARMul_State
* state
, ARMword mode
);
274 extern void ARMul_SetSPSR (ARMul_State
* state
, ARMword mode
, ARMword value
);
276 /***************************************************************************\
277 * Definitons of things to handle aborts *
278 \***************************************************************************/
280 extern void ARMul_Abort (ARMul_State
* state
, ARMword address
);
281 #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
282 #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
283 state->AbortAddr = (address & ~3L)
284 #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
285 state->Aborted = ARMul_DataAbortV ;
286 #define ARMul_CLEARABORT state->abortSig = LOW
288 /***************************************************************************\
289 * Definitons of things in the memory interface *
290 \***************************************************************************/
292 extern unsigned ARMul_MemoryInit (ARMul_State
* state
,
293 unsigned long initmemsize
);
294 extern void ARMul_MemoryExit (ARMul_State
* state
);
296 extern ARMword
ARMul_LoadInstrS (ARMul_State
* state
, ARMword address
,
298 extern ARMword
ARMul_LoadInstrN (ARMul_State
* state
, ARMword address
,
300 extern ARMword
ARMul_ReLoadInstr (ARMul_State
* state
, ARMword address
,
303 extern ARMword
ARMul_LoadWordS (ARMul_State
* state
, ARMword address
);
304 extern ARMword
ARMul_LoadWordN (ARMul_State
* state
, ARMword address
);
305 extern ARMword
ARMul_LoadHalfWord (ARMul_State
* state
, ARMword address
);
306 extern ARMword
ARMul_LoadByte (ARMul_State
* state
, ARMword address
);
308 extern void ARMul_StoreWordS (ARMul_State
* state
, ARMword address
,
310 extern void ARMul_StoreWordN (ARMul_State
* state
, ARMword address
,
312 extern void ARMul_StoreHalfWord (ARMul_State
* state
, ARMword address
,
314 extern void ARMul_StoreByte (ARMul_State
* state
, ARMword address
,
317 extern ARMword
ARMul_SwapWord (ARMul_State
* state
, ARMword address
,
319 extern ARMword
ARMul_SwapByte (ARMul_State
* state
, ARMword address
,
322 extern void ARMul_Icycles (ARMul_State
* state
, unsigned number
,
324 extern void ARMul_Ccycles (ARMul_State
* state
, unsigned number
,
327 extern ARMword
ARMul_ReadWord (ARMul_State
* state
, ARMword address
);
328 extern ARMword
ARMul_ReadByte (ARMul_State
* state
, ARMword address
);
329 extern void ARMul_WriteWord (ARMul_State
* state
, ARMword address
,
331 extern void ARMul_WriteByte (ARMul_State
* state
, ARMword address
,
334 extern ARMword
ARMul_MemAccess (ARMul_State
* state
, ARMword
, ARMword
,
335 ARMword
, ARMword
, ARMword
, ARMword
, ARMword
,
336 ARMword
, ARMword
, ARMword
);
338 /***************************************************************************\
339 * Definitons of things in the co-processor interface *
340 \***************************************************************************/
342 #define ARMul_FIRST 0
343 #define ARMul_TRANSFER 1
346 #define ARMul_INTERRUPT 4
351 extern unsigned ARMul_CoProInit (ARMul_State
* state
);
352 extern void ARMul_CoProExit (ARMul_State
* state
);
353 extern void ARMul_CoProAttach (ARMul_State
* state
, unsigned number
,
354 ARMul_CPInits
* init
, ARMul_CPExits
* exit
,
355 ARMul_LDCs
* ldc
, ARMul_STCs
* stc
,
356 ARMul_MRCs
* mrc
, ARMul_MCRs
* mcr
,
358 ARMul_CPReads
* read
, ARMul_CPWrites
* write
);
359 extern void ARMul_CoProDetach (ARMul_State
* state
, unsigned number
);
361 /***************************************************************************\
362 * Definitons of things in the host environment *
363 \***************************************************************************/
365 extern unsigned ARMul_OSInit (ARMul_State
* state
);
366 extern void ARMul_OSExit (ARMul_State
* state
);
367 extern unsigned ARMul_OSHandleSWI (ARMul_State
* state
, ARMword number
);
368 extern ARMword
ARMul_OSLastErrorP (ARMul_State
* state
);
370 extern ARMword
ARMul_Debug (ARMul_State
* state
, ARMword pc
, ARMword instr
);
371 extern unsigned ARMul_OSException (ARMul_State
* state
, ARMword vector
,
375 /***************************************************************************\
376 * Host-dependent stuff *
377 \***************************************************************************/
380 pascal void SpinCursor (short increment
); /* copied from CursorCtl.h */
381 # define HOURGLASS SpinCursor( 1 )
382 # define HOURGLASS_RATE 1023 /* 2^n - 1 */
385 extern void ARMul_UndefInstr (ARMul_State
*, ARMword
);
386 extern void ARMul_FixCPSR (ARMul_State
*, ARMword
, ARMword
);
387 extern void ARMul_FixSPSR (ARMul_State
*, ARMword
, ARMword
);
388 extern void ARMul_ConsolePrint (ARMul_State
*, const char *, ...);
389 extern void ARMul_SelectProcessor (ARMul_State
*, unsigned);
This page took 0.048156 seconds and 5 git commands to generate.